]> Cypherpunks repositories - gostls13.git/commit
[dev.simd] cmd/compile: ensure the whole X15 register is zeroed
authorCherry Mui <cherryyz@google.com>
Thu, 21 Aug 2025 18:37:18 +0000 (14:37 -0400)
committerCherry Mui <cherryyz@google.com>
Fri, 22 Aug 2025 21:57:00 +0000 (14:57 -0700)
commit4c311aa38f6e354ec4d9f5882a16c36a2e4b0f36
tree1296a61554fb276afc795ad1aafd03c7d8465404
parentbaea0c700b70d90331be3370f89991d7428d92aa
[dev.simd] cmd/compile: ensure the whole X15 register is zeroed

On AMD64, we reserve the X15 register as the zero register.
Currently we use an SSE instruction to zero it, and we only use
it in SSE contexts. When the machine supports AVX, the high bits
of the register is not necessarily zeroed.

Now that the compiler generates AVX code for SIMD, it would be
great to have a zero register in the AVX context. This CL zeroes
the whole X15 register if AVX is supported.

Change-Id: I4dc803362f2e007b1614b90de435fbb7814cebc7
Reviewed-on: https://go-review.googlesource.com/c/go/+/698237
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>
Reviewed-by: David Chase <drchase@google.com>
16 files changed:
src/cmd/compile/internal/amd64/ssa.go
src/cmd/compile/internal/ir/symtab.go
src/cmd/compile/internal/ssagen/ssa.go
src/cmd/compile/internal/typecheck/_builtin/runtime.go
src/cmd/compile/internal/typecheck/builtin.go
src/runtime/asm_amd64.s
src/runtime/cpuflags.go
src/runtime/proc.go
src/runtime/race_amd64.s
src/runtime/sys_darwin_amd64.s
src/runtime/sys_dragonfly_amd64.s
src/runtime/sys_freebsd_amd64.s
src/runtime/sys_linux_amd64.s
src/runtime/sys_netbsd_amd64.s
src/runtime/sys_openbsd_amd64.s
src/runtime/sys_windows_amd64.s