[dev.simd] cmd/compile: adapters for simd

This combines several CLs into a single patch of "glue"
for the generated SIMD extensions.

This glue includes GOEXPERIMENT checks that disable
the creation of user-visible "simd" types and
that disable the registration of "simd" intrinsics.

The simd type checks were changed to work for either
package "simd" or "internal/simd" so that moving that
package won't be quite so fragile.

cmd/compile, internal/simd: glue for adding SIMD extensions to Go
cmd/compile: theft of Cherry's sample SIMD compilation

Change-Id: Id44e2f4bafe74032c26de576a8691b6f7d977e01
Reviewed-on: https://go-review.googlesource.com/c/go/+/675598
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Junyang Shao <shaojunyang@google.com>

diff --git a/src/cmd/compile/internal/abi/abiutils.go b/src/cmd/compile/internal/abi/abiutils.go
index c013aba19c41a61ef9d14432139f50fe91a0b0e0..cef7885815150127068941c9c940f6844bc69f89 100644 (file)
--- a/src/cmd/compile/internal/abi/abiutils.go
+++ b/src/cmd/compile/internal/abi/abiutils.go
@@ -150,12 +150,12 @@ func appendParamTypes(rts []*types.Type, t *types.Type) []*types.Type {
        if w == 0 {
                return rts
        }
-       if t.IsScalar() || t.IsPtrShaped() {
+       if t.IsScalar() || t.IsPtrShaped() || t.IsSIMD() {
                if t.IsComplex() {
                        c := types.FloatForComplex(t)
                        return append(rts, c, c)
                } else {
-                       if int(t.Size()) <= types.RegSize {
+                       if int(t.Size()) <= types.RegSize || t.IsSIMD() {
                                return append(rts, t)
                        }
                        // assume 64bit int on 32-bit machine
@@ -199,6 +199,9 @@ func appendParamOffsets(offsets []int64, at int64, t *types.Type) ([]int64, int6
        if w == 0 {
                return offsets, at
        }
+       if t.IsSIMD() {
+               return append(offsets, at), at + w
+       }
        if t.IsScalar() || t.IsPtrShaped() {
                if t.IsComplex() || int(t.Size()) > types.RegSize { // complex and *int64 on 32-bit
                        s := w / 2
@@ -521,11 +524,11 @@ func (state *assignState) allocateRegs(regs []RegIndex, t *types.Type) []RegInde
        }
        ri := state.rUsed.intRegs
        rf := state.rUsed.floatRegs
-       if t.IsScalar() || t.IsPtrShaped() {
+       if t.IsScalar() || t.IsPtrShaped() || t.IsSIMD() {
                if t.IsComplex() {
                        regs = append(regs, RegIndex(rf+state.rTotal.intRegs), RegIndex(rf+1+state.rTotal.intRegs))
                        rf += 2
-               } else if t.IsFloat() {
+               } else if t.IsFloat() || t.IsSIMD() {
                        regs = append(regs, RegIndex(rf+state.rTotal.intRegs))
                        rf += 1
                } else {

diff --git a/src/cmd/compile/internal/amd64/simdssa.go b/src/cmd/compile/internal/amd64/simdssa.go
new file mode 100644 (file)
index 0000000..0cd9b85
--- /dev/null
+++ b/src/cmd/compile/internal/amd64/simdssa.go
@@ -0,0 +1,19 @@
+// Copyright 2025 The Go Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+
+// Placeholder for generated glue to come later
+package amd64
+
+import (
+       "cmd/compile/internal/ssa"
+       "cmd/compile/internal/ssagen"
+)
+
+func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool {
+       switch v.Op {
+       default:
+               return false
+       }
+       return true
+}

diff --git a/src/cmd/compile/internal/amd64/ssa.go b/src/cmd/compile/internal/amd64/ssa.go
index 3af513773d3b2e9eeeb3c4ad74cf1af83eba1209..cf5f81345602832279f2ed66f92ddeeec0d20215 100644 (file)
--- a/src/cmd/compile/internal/amd64/ssa.go
+++ b/src/cmd/compile/internal/amd64/ssa.go
@@ -67,6 +67,8 @@ func storeByType(t *types.Type) obj.As {
                case 8:
                        return x86.AMOVSD
                }
+       } else if t.IsSIMD() {
+               return simdMov(width)
        } else {
                switch width {
                case 1:
@@ -92,6 +94,8 @@ func moveByType(t *types.Type) obj.As {
                // There is no xmm->xmm move with 1 byte opcode,
                // so use movups, which has 2 byte opcode.
                return x86.AMOVUPS
+       } else if t.IsSIMD() {
+               return simdMov(t.Size())
        } else {
                switch t.Size() {
                case 1:
@@ -1038,6 +1042,10 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
                }
                x := v.Args[0].Reg()
                y := v.Reg()
+               if v.Type.IsSIMD() {
+                       x = simdReg(v.Args[0])
+                       y = simdReg(v)
+               }
                if x != y {
                        opregreg(s, moveByType(v.Type), y, x)
                }
@@ -1049,16 +1057,24 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
                p := s.Prog(loadByType(v.Type))
                ssagen.AddrAuto(&p.From, v.Args[0])
                p.To.Type = obj.TYPE_REG
-               p.To.Reg = v.Reg()
+               r := v.Reg()
+               if v.Type.IsSIMD() {
+                       r = simdReg(v)
+               }
+               p.To.Reg = r
 
        case ssa.OpStoreReg:
                if v.Type.IsFlags() {
                        v.Fatalf("store flags not implemented: %v", v.LongString())
                        return
                }
+               r := v.Args[0].Reg()
+               if v.Type.IsSIMD() {
+                       r = simdReg(v.Args[0])
+               }
                p := s.Prog(storeByType(v.Type))
                p.From.Type = obj.TYPE_REG
-               p.From.Reg = v.Args[0].Reg()
+               p.From.Reg = r
                ssagen.AddrAuto(&p.To, v)
        case ssa.OpAMD64LoweredHasCPUFeature:
                p := s.Prog(x86.AMOVBLZX)
@@ -1426,11 +1442,125 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
                p.From.Offset = int64(x)
                p.To.Type = obj.TYPE_REG
                p.To.Reg = v.Reg()
+
+       // XXX SIMD
+       // XXX may change depending on how we handle aliased registers
+       case ssa.OpAMD64Zero128, ssa.OpAMD64Zero256, ssa.OpAMD64Zero512:
+               p := s.Prog(v.Op.Asm())
+               p.From.Type = obj.TYPE_REG
+               p.From.Reg = simdReg(v)
+               p.AddRestSourceReg(simdReg(v))
+               p.To.Type = obj.TYPE_REG
+               p.To.Reg = simdReg(v)
+       case ssa.OpAMD64VPADDD4:
+               p := s.Prog(v.Op.Asm())
+               p.From.Type = obj.TYPE_REG
+               p.From.Reg = simdReg(v.Args[0])
+               p.AddRestSourceReg(simdReg(v.Args[1]))
+               p.To.Type = obj.TYPE_REG
+               p.To.Reg = simdReg(v)
+       case ssa.OpAMD64VMOVDQUload128, ssa.OpAMD64VMOVDQUload256, ssa.OpAMD64VMOVDQUload512:
+               p := s.Prog(v.Op.Asm())
+               p.From.Type = obj.TYPE_MEM
+               p.From.Reg = v.Args[0].Reg()
+               ssagen.AddAux(&p.From, v)
+               p.To.Type = obj.TYPE_REG
+               p.To.Reg = simdReg(v)
+       case ssa.OpAMD64VMOVDQUstore128, ssa.OpAMD64VMOVDQUstore256, ssa.OpAMD64VMOVDQUstore512:
+               p := s.Prog(v.Op.Asm())
+               p.From.Type = obj.TYPE_REG
+               p.From.Reg = simdReg(v.Args[1])
+               p.To.Type = obj.TYPE_MEM
+               p.To.Reg = v.Args[0].Reg()
+               ssagen.AddAux(&p.To, v)
+
+       case ssa.OpAMD64VPMOVMToVec8x16,
+               ssa.OpAMD64VPMOVMToVec8x32,
+               ssa.OpAMD64VPMOVMToVec8x64,
+               ssa.OpAMD64VPMOVMToVec16x8,
+               ssa.OpAMD64VPMOVMToVec16x16,
+               ssa.OpAMD64VPMOVMToVec16x32,
+               ssa.OpAMD64VPMOVMToVec32x4,
+               ssa.OpAMD64VPMOVMToVec32x8,
+               ssa.OpAMD64VPMOVMToVec32x16,
+               ssa.OpAMD64VPMOVMToVec64x2,
+               ssa.OpAMD64VPMOVMToVec64x4,
+               ssa.OpAMD64VPMOVMToVec64x8:
+               p := s.Prog(v.Op.Asm())
+               p.From.Type = obj.TYPE_REG
+               p.From.Reg = v.Args[0].Reg()
+               p.To.Type = obj.TYPE_REG
+               p.To.Reg = simdReg(v)
+
+       case ssa.OpAMD64VPMOVVec8x16ToM,
+               ssa.OpAMD64VPMOVVec8x32ToM,
+               ssa.OpAMD64VPMOVVec8x64ToM,
+               ssa.OpAMD64VPMOVVec16x8ToM,
+               ssa.OpAMD64VPMOVVec16x16ToM,
+               ssa.OpAMD64VPMOVVec16x32ToM,
+               ssa.OpAMD64VPMOVVec32x4ToM,
+               ssa.OpAMD64VPMOVVec32x8ToM,
+               ssa.OpAMD64VPMOVVec32x16ToM,
+               ssa.OpAMD64VPMOVVec64x2ToM,
+               ssa.OpAMD64VPMOVVec64x4ToM,
+               ssa.OpAMD64VPMOVVec64x8ToM:
+               p := s.Prog(v.Op.Asm())
+               p.From.Type = obj.TYPE_REG
+               p.From.Reg = simdReg(v.Args[0])
+               p.To.Type = obj.TYPE_REG
+               p.To.Reg = v.Reg()
+
        default:
-               v.Fatalf("genValue not implemented: %s", v.LongString())
+               if !ssaGenSIMDValue(s, v) {
+                       v.Fatalf("genValue not implemented: %s", v.LongString())
+               }
        }
 }
 
+func simdGenUnary(s *ssagen.State, v *ssa.Value) {
+       p := s.Prog(v.Op.Asm())
+       p.From.Type = obj.TYPE_REG
+       p.From.Reg = simdReg(v.Args[0])
+       p.To.Type = obj.TYPE_REG
+       p.To.Reg = simdReg(v)
+}
+
+func simdGenBinary(s *ssagen.State, v *ssa.Value) {
+       p := s.Prog(v.Op.Asm())
+       p.From.Type = obj.TYPE_REG
+       p.From.Reg = simdReg(v.Args[0])
+       p.AddRestSourceReg(simdReg(v.Args[1]))
+       p.To.Type = obj.TYPE_REG
+       p.To.Reg = simdReg(v)
+}
+
+func simdGenUnaryImmUint8(s *ssagen.State, v *ssa.Value) {
+       p := s.Prog(v.Op.Asm())
+       imm := v.AuxInt
+       if imm < 0 || imm > 255 {
+               v.Fatalf("Invalid source selection immediate")
+       }
+       p.From.Offset = imm
+       p.From.Type = obj.TYPE_CONST
+       p.AddRestSourceReg(simdReg(v.Args[0]))
+       p.To.Type = obj.TYPE_REG
+       p.To.Reg = simdReg(v)
+}
+
+func simdGenBinaryImmUint8(s *ssagen.State, v *ssa.Value) {
+       p := s.Prog(v.Op.Asm())
+       imm := v.AuxInt
+       if imm < 0 || imm > 255 {
+               v.Fatalf("Invalid source selection immediate")
+       }
+       p.From.Offset = imm
+       p.From.Type = obj.TYPE_CONST
+       p.AddRestSourceReg(simdReg(v.Args[0]))
+       p.AddRestSourceReg(simdReg(v.Args[1]))
+       p.To.Type = obj.TYPE_REG
+       p.To.Reg = simdReg(v)
+}
+
 var blockJump = [...]struct {
        asm, invasm obj.As
 }{
@@ -1532,3 +1662,30 @@ func spillArgReg(pp *objw.Progs, p *obj.Prog, f *ssa.Func, t *types.Type, reg in
        p.Pos = p.Pos.WithNotStmt()
        return p
 }
+
+// XXX maybe make this part of v.Reg?
+// On the other hand, it is architecture-specific.
+func simdReg(v *ssa.Value) int16 {
+       t := v.Type
+       if !t.IsSIMD() {
+               panic("simdReg: not a simd type")
+       }
+       switch t.Size() {
+       case 16:
+               return v.Reg()
+       case 32:
+               return v.Reg() + (x86.REG_Y0 - x86.REG_X0)
+       case 64:
+               return v.Reg() + (x86.REG_Z0 - x86.REG_X0)
+       }
+       panic("unreachable")
+}
+
+func simdMov(width int64) obj.As {
+       if width >= 64 {
+               return x86.AVMOVDQU64
+       } else if width >= 16 {
+               return x86.AVMOVDQU
+       }
+       return x86.AKMOVQ
+}

diff --git a/src/cmd/compile/internal/ssa/_gen/AMD64.rules b/src/cmd/compile/internal/ssa/_gen/AMD64.rules
index d55dfe70acc155e14fc79022ef68ac57a6d616f6..2972eae87d54795358abde6c10f7bfe477ac9dad 100644 (file)
--- a/src/cmd/compile/internal/ssa/_gen/AMD64.rules
+++ b/src/cmd/compile/internal/ssa/_gen/AMD64.rules
@@ -1680,3 +1680,36 @@
 
 // If we don't use the flags any more, just use the standard op.
 (Select0 a:(ADD(Q|L)constflags [c] x)) && a.Uses == 1 => (ADD(Q|L)const [c] x)
+
+// XXX SIMD
+(Load <t> ptr mem) && t.Size() == 16 => (VMOVDQUload128 ptr mem)
+
+(Store {t} ptr val mem) && t.Size() == 16 => (VMOVDQUstore128 ptr val mem)
+
+(Load <t> ptr mem) && t.Size() == 32 => (VMOVDQUload256 ptr mem)
+
+(Store {t} ptr val mem) && t.Size() == 32 => (VMOVDQUstore256 ptr val mem)
+
+(Load <t> ptr mem) && t.Size() == 64 => (VMOVDQUload512 ptr mem)
+
+(Store {t} ptr val mem) && t.Size() == 64 => (VMOVDQUstore512 ptr val mem)
+
+(ZeroSIMD <t>) && t.Size() == 16 => (Zero128 <t>)
+(ZeroSIMD <t>) && t.Size() == 32 => (Zero256 <t>)
+(ZeroSIMD <t>) && t.Size() == 64 => (Zero512 <t>)
+
+(VPMOVVec8x16ToM (VPMOVMToVec8x16 x)) => x
+(VPMOVVec8x32ToM (VPMOVMToVec8x32 x)) => x
+(VPMOVVec8x64ToM (VPMOVMToVec8x64 x)) => x
+
+(VPMOVVec16x8ToM (VPMOVMToVec16x8 x)) => x
+(VPMOVVec16x16ToM (VPMOVMToVec16x16 x)) => x
+(VPMOVVec16x32ToM (VPMOVMToVec16x32 x)) => x
+
+(VPMOVVec32x4ToM (VPMOVMToVec32x4 x)) => x
+(VPMOVVec32x8ToM (VPMOVMToVec32x8 x)) => x
+(VPMOVVec32x16ToM (VPMOVMToVec32x16 x)) => x
+
+(VPMOVVec64x2ToM (VPMOVMToVec64x2 x)) => x
+(VPMOVVec64x4ToM (VPMOVMToVec64x4 x)) => x
+(VPMOVVec64x8ToM (VPMOVMToVec64x8 x)) => x

diff --git a/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go b/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
index a8ec2a278c964c4f2cb07b7b973cf82c7558c1c7..aafe4d179bb230bb1db248db58b28c4c20a068a6 100644 (file)
--- a/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
+++ b/src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
@@ -63,6 +63,16 @@ var regNamesAMD64 = []string{
        "X14",
        "X15", // constant 0 in ABIInternal
 
+       // TODO: update asyncPreempt for K registers.
+       // asyncPreempt also needs to store Z0-Z15 properly.
+       "K0",
+       "K1",
+       "K2",
+       "K3",
+       "K4",
+       "K5",
+       "K6",
+       "K7",
        // If you add registers, update asyncPreempt in runtime
 
        // pseudo-registers
@@ -100,6 +110,7 @@ func init() {
                g          = buildReg("g")
                fp         = buildReg("X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14")
                x15        = buildReg("X15")
+               mask       = buildReg("K1 K2 K3 K4 K5 K6 K7")
                gpsp       = gp | buildReg("SP")
                gpspsb     = gpsp | buildReg("SB")
                gpspsbg    = gpspsb | g
@@ -107,8 +118,9 @@ func init() {
        )
        // Common slices of register masks
        var (
-               gponly = []regMask{gp}
-               fponly = []regMask{fp}
+               gponly   = []regMask{gp}
+               fponly   = []regMask{fp}
+               maskonly = []regMask{mask}
        )
 
        // Common regInfo
@@ -170,6 +182,12 @@ func init() {
                fpstore    = regInfo{inputs: []regMask{gpspsb, fp, 0}}
                fpstoreidx = regInfo{inputs: []regMask{gpspsb, gpsp, fp, 0}}
 
+               fp1m1    = regInfo{inputs: fponly, outputs: maskonly}
+               m1fp1    = regInfo{inputs: maskonly, outputs: fponly}
+               fp2m1    = regInfo{inputs: []regMask{fp, fp}, outputs: maskonly}
+               fp2m1fp1 = regInfo{inputs: []regMask{fp, fp, mask}, outputs: fponly}
+               fp2m1m1  = regInfo{inputs: []regMask{fp, fp, mask}, outputs: maskonly}
+
                prefreg = regInfo{inputs: []regMask{gpspsbg}}
        )
 
@@ -1199,6 +1217,54 @@ func init() {
                //
                // output[i] = (input[i] >> 7) & 1
                {name: "PMOVMSKB", argLength: 1, reg: fpgp, asm: "PMOVMSKB"},
+
+               // XXX SIMD
+               {name: "VPADDD4", argLength: 2, reg: fp21, asm: "VPADDD", commutative: true}, // arg0 + arg1
+
+               {name: "VMOVDQUload128", argLength: 2, reg: fpload, asm: "VMOVDQU", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},    // load from arg0+auxint+aux, arg1 = mem
+               {name: "VMOVDQUstore128", argLength: 3, reg: fpstore, asm: "VMOVDQU", aux: "SymOff", faultOnNilArg0: true, symEffect: "Write"}, // store, *(arg0+auxint+aux) = arg1, arg2 = mem
+
+               {name: "VMOVDQUload256", argLength: 2, reg: fpload, asm: "VMOVDQU", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},    // load from arg0+auxint+aux, arg1 = mem
+               {name: "VMOVDQUstore256", argLength: 3, reg: fpstore, asm: "VMOVDQU", aux: "SymOff", faultOnNilArg0: true, symEffect: "Write"}, // store, *(arg0+auxint+aux) = arg1, arg2 = mem
+
+               {name: "VMOVDQUload512", argLength: 2, reg: fpload, asm: "VMOVDQU64", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},    // load from arg0+auxint+aux, arg1 = mem
+               {name: "VMOVDQUstore512", argLength: 3, reg: fpstore, asm: "VMOVDQU64", aux: "SymOff", faultOnNilArg0: true, symEffect: "Write"}, // store, *(arg0+auxint+aux) = arg1, arg2 = mem
+
+               {name: "VPMOVMToVec8x16", argLength: 1, reg: m1fp1, asm: "VPMOVM2B"},
+               {name: "VPMOVMToVec8x32", argLength: 1, reg: m1fp1, asm: "VPMOVM2B"},
+               {name: "VPMOVMToVec8x64", argLength: 1, reg: m1fp1, asm: "VPMOVM2B"},
+
+               {name: "VPMOVMToVec16x8", argLength: 1, reg: m1fp1, asm: "VPMOVM2W"},
+               {name: "VPMOVMToVec16x16", argLength: 1, reg: m1fp1, asm: "VPMOVM2W"},
+               {name: "VPMOVMToVec16x32", argLength: 1, reg: m1fp1, asm: "VPMOVM2W"},
+
+               {name: "VPMOVMToVec32x4", argLength: 1, reg: m1fp1, asm: "VPMOVM2D"},
+               {name: "VPMOVMToVec32x8", argLength: 1, reg: m1fp1, asm: "VPMOVM2D"},
+               {name: "VPMOVMToVec32x16", argLength: 1, reg: m1fp1, asm: "VPMOVM2D"},
+
+               {name: "VPMOVMToVec64x2", argLength: 1, reg: m1fp1, asm: "VPMOVM2Q"},
+               {name: "VPMOVMToVec64x4", argLength: 1, reg: m1fp1, asm: "VPMOVM2Q"},
+               {name: "VPMOVMToVec64x8", argLength: 1, reg: m1fp1, asm: "VPMOVM2Q"},
+
+               {name: "VPMOVVec8x16ToM", argLength: 1, reg: fp1m1, asm: "VPMOVB2M"},
+               {name: "VPMOVVec8x32ToM", argLength: 1, reg: fp1m1, asm: "VPMOVB2M"},
+               {name: "VPMOVVec8x64ToM", argLength: 1, reg: fp1m1, asm: "VPMOVB2M"},
+
+               {name: "VPMOVVec16x8ToM", argLength: 1, reg: fp1m1, asm: "VPMOVW2M"},
+               {name: "VPMOVVec16x16ToM", argLength: 1, reg: fp1m1, asm: "VPMOVW2M"},
+               {name: "VPMOVVec16x32ToM", argLength: 1, reg: fp1m1, asm: "VPMOVW2M"},
+
+               {name: "VPMOVVec32x4ToM", argLength: 1, reg: fp1m1, asm: "VPMOVD2M"},
+               {name: "VPMOVVec32x8ToM", argLength: 1, reg: fp1m1, asm: "VPMOVD2M"},
+               {name: "VPMOVVec32x16ToM", argLength: 1, reg: fp1m1, asm: "VPMOVD2M"},
+
+               {name: "VPMOVVec64x2ToM", argLength: 1, reg: fp1m1, asm: "VPMOVQ2M"},
+               {name: "VPMOVVec64x4ToM", argLength: 1, reg: fp1m1, asm: "VPMOVQ2M"},
+               {name: "VPMOVVec64x8ToM", argLength: 1, reg: fp1m1, asm: "VPMOVQ2M"},
+
+               {name: "Zero128", argLength: 0, reg: fp01, asm: "VPXOR"},
+               {name: "Zero256", argLength: 0, reg: fp01, asm: "VPXOR"},
+               {name: "Zero512", argLength: 0, reg: fp01, asm: "VPXORQ"},
        }
 
        var AMD64blocks = []blockData{
@@ -1230,14 +1296,15 @@ func init() {
                name:               "AMD64",
                pkg:                "cmd/internal/obj/x86",
                genfile:            "../../amd64/ssa.go",
-               ops:                AMD64ops,
+               genSIMDfile:        "../../amd64/simdssa.go",
+               ops:                append(AMD64ops, simdAMD64Ops(fp11, fp21, fp2m1, fp2m1fp1, fp2m1m1)...), // AMD64ops,
                blocks:             AMD64blocks,
                regnames:           regNamesAMD64,
                ParamIntRegNames:   "AX BX CX DI SI R8 R9 R10 R11",
                ParamFloatRegNames: "X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14",
                gpregmask:          gp,
                fpregmask:          fp,
-               specialregmask:     x15,
+               specialregmask:     x15 | mask,
                framepointerreg:    int8(num["BP"]),
                linkreg:            -1, // not used
        })

diff --git a/src/cmd/compile/internal/ssa/_gen/generic.rules b/src/cmd/compile/internal/ssa/_gen/generic.rules
index b178a1add6de29eb2181106a311dd7ac0fd0a099..1077921f93400ca01739f3a2273a39ec6f37078c 100644 (file)
--- a/src/cmd/compile/internal/ssa/_gen/generic.rules
+++ b/src/cmd/compile/internal/ssa/_gen/generic.rules
@@ -910,7 +910,7 @@
 
 // struct operations
 (StructSelect [i] x:(StructMake ___)) => x.Args[i]
-(Load <t> _ _) && t.IsStruct() && CanSSA(t) => rewriteStructLoad(v)
+(Load <t> _ _) && t.IsStruct() && CanSSA(t) && !t.IsSIMD() => rewriteStructLoad(v)
 (Store _ (StructMake ___) _) => rewriteStructStore(v)
 
 (StructSelect [i] x:(Load <t> ptr mem)) && !CanSSA(t) =>

diff --git a/src/cmd/compile/internal/ssa/_gen/genericOps.go b/src/cmd/compile/internal/ssa/_gen/genericOps.go
index 1f6ad4e16d98f8803ed54473ac360db487bb2b48..2d44cc85f8242e7c74510bd848bd1dd36404d6d5 100644 (file)
--- a/src/cmd/compile/internal/ssa/_gen/genericOps.go
+++ b/src/cmd/compile/internal/ssa/_gen/genericOps.go
@@ -662,6 +662,10 @@ var genericOps = []opData{
        // Prefetch instruction
        {name: "PrefetchCache", argLength: 2, hasSideEffects: true},         // Do prefetch arg0 to cache. arg0=addr, arg1=memory.
        {name: "PrefetchCacheStreamed", argLength: 2, hasSideEffects: true}, // Do non-temporal or streamed prefetch arg0 to cache. arg0=addr, arg1=memory.
+
+       // XXX SIMD
+       {name: "Add32x4", argLength: 2}, // arg0 + arg1
+       {name: "ZeroSIMD", argLength: 0},
 }
 
 //     kind          controls          successors   implicit exit
@@ -689,6 +693,7 @@ var genericBlocks = []blockData{
 }
 
 func init() {
+       genericOps = append(genericOps, simdGenericOps()...)
        archs = append(archs, arch{
                name:    "generic",
                ops:     genericOps,

diff --git a/src/cmd/compile/internal/ssa/_gen/main.go b/src/cmd/compile/internal/ssa/_gen/main.go
index 3f65831b6e02b5ec429c5d87ca215b0ca2561343..13d3ce6f8f6305cd411d9e946fec7a37b6f5f6d8 100644 (file)
--- a/src/cmd/compile/internal/ssa/_gen/main.go
+++ b/src/cmd/compile/internal/ssa/_gen/main.go
@@ -32,6 +32,7 @@ type arch struct {
        name               string
        pkg                string // obj package to import for this arch.
        genfile            string // source file containing opcode code generation.
+       genSIMDfile        string // source file containing opcode code generation for SIMD.
        ops                []opData
        blocks             []blockData
        regnames           []string
@@ -525,6 +526,15 @@ func genOp() {
                if err != nil {
                        log.Fatalf("can't read %s: %v", a.genfile, err)
                }
+               // Append the file of simd operations, too
+               if a.genSIMDfile != "" {
+                       simdSrc, err := os.ReadFile(a.genSIMDfile)
+                       if err != nil {
+                               log.Fatalf("can't read %s: %v", a.genSIMDfile, err)
+                       }
+                       src = append(src, simdSrc...)
+               }
+
                seen := make(map[string]bool, len(a.ops))
                for _, m := range rxOp.FindAllSubmatch(src, -1) {
                        seen[string(m[1])] = true

diff --git a/src/cmd/compile/internal/ssa/_gen/rulegen.go b/src/cmd/compile/internal/ssa/_gen/rulegen.go
index c2891da6c8d368b2296815cd09606047577f85af..558bbab6a75a9d89fb8086ccae38055834fd9a4f 100644 (file)
--- a/src/cmd/compile/internal/ssa/_gen/rulegen.go
+++ b/src/cmd/compile/internal/ssa/_gen/rulegen.go
@@ -95,6 +95,7 @@ func genLateLowerRules(arch arch) { genRulesSuffix(arch, "latelower") }
 
 func genRulesSuffix(arch arch, suff string) {
        // Open input file.
+       var text io.Reader
        text, err := os.Open(arch.name + suff + ".rules")
        if err != nil {
                if suff == "" {
@@ -105,6 +106,14 @@ func genRulesSuffix(arch arch, suff string) {
                return
        }
 
+       // Check for file of SIMD rules to add
+       if suff == "" {
+               simdtext, err := os.Open("simd" + arch.name + ".rules")
+               if err == nil {
+                       text = io.MultiReader(text, simdtext)
+               }
+       }
+
        // oprules contains a list of rules for each block and opcode
        blockrules := map[string][]Rule{}
        oprules := map[string][]Rule{}

diff --git a/src/cmd/compile/internal/ssa/_gen/simdAMD64.rules b/src/cmd/compile/internal/ssa/_gen/simdAMD64.rules
new file mode 100644 (file)
index 0000000..3c6be4c
--- /dev/null
+++ b/src/cmd/compile/internal/ssa/_gen/simdAMD64.rules
@@ -0,0 +1,4 @@
+// Code generated by internal/simd/_gen using 'go run .'; DO NOT EDIT.
+
+// (AddInt8x16 ...) => (VPADDB ...)
+// etc

diff --git a/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go b/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
new file mode 100644 (file)
index 0000000..b0852db
--- /dev/null
+++ b/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
@@ -0,0 +1,10 @@
+// Code generated by internal/simd/_gen using 'go run .'; DO NOT EDIT.
+
+package main
+
+func simdAMD64Ops(fp11, fp21, fp2m1, fp2m1fp1, fp2m1m1 regInfo) []opData {
+       return []opData{
+               //              {name: "VPADDB", argLength: 2, reg: fp21, asm: "VPADDB", commutative: true},
+               //      etc, generated
+       }
+}

diff --git a/src/cmd/compile/internal/ssa/_gen/simdgenericOps.go b/src/cmd/compile/internal/ssa/_gen/simdgenericOps.go
new file mode 100644 (file)
index 0000000..666d687
--- /dev/null
+++ b/src/cmd/compile/internal/ssa/_gen/simdgenericOps.go
@@ -0,0 +1,10 @@
+// Code generated by internal/simd/_gen using 'go run .'; DO NOT EDIT.
+
+package main
+
+func simdGenericOps() []opData {
+       return []opData{
+               //      {name: "AddInt8x16", argLength: 2, commutative: true},
+               // etc
+       }
+}

diff --git a/src/cmd/compile/internal/ssa/config.go b/src/cmd/compile/internal/ssa/config.go
index d4cd32a0d7b5b62f611642fcdce1805c3eec498d..0299e808c6d365dfabcccc1a425fadad0f33d3dc 100644 (file)
--- a/src/cmd/compile/internal/ssa/config.go
+++ b/src/cmd/compile/internal/ssa/config.go
@@ -89,6 +89,10 @@ type Types struct {
        Float32Ptr *types.Type
        Float64Ptr *types.Type
        BytePtrPtr *types.Type
+       Vec128     *types.Type
+       Vec256     *types.Type
+       Vec512     *types.Type
+       Mask       *types.Type
 }
 
 // NewTypes creates and populates a Types.
@@ -123,6 +127,10 @@ func (t *Types) SetTypPtrs() {
        t.Float32Ptr = types.NewPtr(types.Types[types.TFLOAT32])
        t.Float64Ptr = types.NewPtr(types.Types[types.TFLOAT64])
        t.BytePtrPtr = types.NewPtr(types.NewPtr(types.Types[types.TUINT8]))
+       t.Vec128 = types.TypeVec128
+       t.Vec256 = types.TypeVec256
+       t.Vec512 = types.TypeVec512
+       t.Mask = types.TypeMask
 }
 
 type Logger interface {

diff --git a/src/cmd/compile/internal/ssa/decompose.go b/src/cmd/compile/internal/ssa/decompose.go
index cf9285741ed085150a257125f475b9079358bdf1..c3d9997793ef05be31c08b6fc095158d4690236c 100644 (file)
--- a/src/cmd/compile/internal/ssa/decompose.go
+++ b/src/cmd/compile/internal/ssa/decompose.go
@@ -100,7 +100,7 @@ func decomposeBuiltIn(f *Func) {
                        }
                case t.IsFloat():
                        // floats are never decomposed, even ones bigger than RegSize
-               case t.Size() > f.Config.RegSize:
+               case t.Size() > f.Config.RegSize && !t.IsSIMD():
                        f.Fatalf("undecomposed named type %s %v", name, t)
                }
        }
@@ -135,7 +135,7 @@ func decomposeBuiltInPhi(v *Value) {
                decomposeInterfacePhi(v)
        case v.Type.IsFloat():
                // floats are never decomposed, even ones bigger than RegSize
-       case v.Type.Size() > v.Block.Func.Config.RegSize:
+       case v.Type.Size() > v.Block.Func.Config.RegSize && !v.Type.IsSIMD():
                v.Fatalf("%v undecomposed type %v", v, v.Type)
        }
 }
@@ -248,7 +248,7 @@ func decomposeUser(f *Func) {
        for _, name := range f.Names {
                t := name.Type
                switch {
-               case t.IsStruct():
+               case isStructNotSIMD(t):
                        newNames = decomposeUserStructInto(f, name, newNames)
                case t.IsArray():
                        newNames = decomposeUserArrayInto(f, name, newNames)
@@ -293,7 +293,7 @@ func decomposeUserArrayInto(f *Func, name *LocalSlot, slots []*LocalSlot) []*Loc
 
        if t.Elem().IsArray() {
                return decomposeUserArrayInto(f, elemName, slots)
-       } else if t.Elem().IsStruct() {
+       } else if isStructNotSIMD(t.Elem()) {
                return decomposeUserStructInto(f, elemName, slots)
        }
 
@@ -313,7 +313,7 @@ func decomposeUserStructInto(f *Func, name *LocalSlot, slots []*LocalSlot) []*Lo
                fnames = append(fnames, fs)
                // arrays and structs will be decomposed further, so
                // there's no need to record a name
-               if !fs.Type.IsArray() && !fs.Type.IsStruct() {
+               if !fs.Type.IsArray() && !isStructNotSIMD(fs.Type) {
                        slots = maybeAppend(f, slots, fs)
                }
        }
@@ -339,7 +339,7 @@ func decomposeUserStructInto(f *Func, name *LocalSlot, slots []*LocalSlot) []*Lo
        // now that this f.NamedValues contains values for the struct
        // fields, recurse into nested structs
        for i := 0; i < n; i++ {
-               if name.Type.FieldType(i).IsStruct() {
+               if isStructNotSIMD(name.Type.FieldType(i)) {
                        slots = decomposeUserStructInto(f, fnames[i], slots)
                        delete(f.NamedValues, *fnames[i])
                } else if name.Type.FieldType(i).IsArray() {
@@ -351,7 +351,7 @@ func decomposeUserStructInto(f *Func, name *LocalSlot, slots []*LocalSlot) []*Lo
 }
 func decomposeUserPhi(v *Value) {
        switch {
-       case v.Type.IsStruct():
+       case isStructNotSIMD(v.Type):
                decomposeStructPhi(v)
        case v.Type.IsArray():
                decomposeArrayPhi(v)
@@ -458,3 +458,7 @@ func deleteNamedVals(f *Func, toDelete []namedVal) {
        }
        f.Names = f.Names[:end]
 }
+
+func isStructNotSIMD(t *types.Type) bool {
+       return t.IsStruct() && !t.IsSIMD()
+}

diff --git a/src/cmd/compile/internal/ssa/expand_calls.go b/src/cmd/compile/internal/ssa/expand_calls.go
index fb281f2f8452cb7b49f5ee89641ed0b342f7b904..9e46182a4cd9aed89350204e611225aa9da97a00 100644 (file)
--- a/src/cmd/compile/internal/ssa/expand_calls.go
+++ b/src/cmd/compile/internal/ssa/expand_calls.go
@@ -399,6 +399,9 @@ func (x *expandState) decomposeAsNecessary(pos src.XPos, b *Block, a, m0 *Value,
                return mem
 
        case types.TSTRUCT:
+               if at.IsSIMD() {
+                       break // XXX
+               }
                for i := 0; i < at.NumFields(); i++ {
                        et := at.Field(i).Type // might need to read offsets from the fields
                        e := b.NewValue1I(pos, OpStructSelect, et, int64(i), a)
@@ -547,6 +550,9 @@ func (x *expandState) rewriteSelectOrArg(pos src.XPos, b *Block, container, a, m
 
        case types.TSTRUCT:
                // Assume ssagen/ssa.go (in buildssa) spills large aggregates so they won't appear here.
+               if at.IsSIMD() {
+                       break // XXX
+               }
                for i := 0; i < at.NumFields(); i++ {
                        et := at.Field(i).Type
                        e := x.rewriteSelectOrArg(pos, b, container, nil, m0, et, rc.next(et))
@@ -713,6 +719,9 @@ func (x *expandState) rewriteWideSelectToStores(pos src.XPos, b *Block, containe
 
        case types.TSTRUCT:
                // Assume ssagen/ssa.go (in buildssa) spills large aggregates so they won't appear here.
+               if at.IsSIMD() {
+                       break // XXX
+               }
                for i := 0; i < at.NumFields(); i++ {
                        et := at.Field(i).Type
                        m0 = x.rewriteWideSelectToStores(pos, b, container, m0, et, rc.next(et))
@@ -859,7 +868,7 @@ func (c *registerCursor) at(t *types.Type, i int) registerCursor {
                rc.nextSlice += Abi1RO(i * w)
                return rc
        }
-       if t.IsStruct() {
+       if isStructNotSIMD(t) {
                for j := 0; j < i; j++ {
                        rc.next(t.FieldType(j))
                }
@@ -973,7 +982,7 @@ func (x *expandState) regOffset(t *types.Type, i int) Abi1RO {
        if t.IsArray() {
                return Abi1RO(i) * x.regWidth(t.Elem())
        }
-       if t.IsStruct() {
+       if isStructNotSIMD(t) {
                k := Abi1RO(0)
                for j := 0; j < i; j++ {
                        k += x.regWidth(t.FieldType(j))

diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go
index 90a38c783a861c5fa3d44d41a276f11dde6584a7..512dc065279af7574c4384ef19385d58aee213b1 100644 (file)
--- a/src/cmd/compile/internal/ssa/opGen.go
+++ b/src/cmd/compile/internal/ssa/opGen.go
@@ -1162,6 +1162,40 @@ const (
        OpAMD64PSIGNB
        OpAMD64PCMPEQB
        OpAMD64PMOVMSKB
+       OpAMD64VPADDD4
+       OpAMD64VMOVDQUload128
+       OpAMD64VMOVDQUstore128
+       OpAMD64VMOVDQUload256
+       OpAMD64VMOVDQUstore256
+       OpAMD64VMOVDQUload512
+       OpAMD64VMOVDQUstore512
+       OpAMD64VPMOVMToVec8x16
+       OpAMD64VPMOVMToVec8x32
+       OpAMD64VPMOVMToVec8x64
+       OpAMD64VPMOVMToVec16x8
+       OpAMD64VPMOVMToVec16x16
+       OpAMD64VPMOVMToVec16x32
+       OpAMD64VPMOVMToVec32x4
+       OpAMD64VPMOVMToVec32x8
+       OpAMD64VPMOVMToVec32x16
+       OpAMD64VPMOVMToVec64x2
+       OpAMD64VPMOVMToVec64x4
+       OpAMD64VPMOVMToVec64x8
+       OpAMD64VPMOVVec8x16ToM
+       OpAMD64VPMOVVec8x32ToM
+       OpAMD64VPMOVVec8x64ToM
+       OpAMD64VPMOVVec16x8ToM
+       OpAMD64VPMOVVec16x16ToM
+       OpAMD64VPMOVVec16x32ToM
+       OpAMD64VPMOVVec32x4ToM
+       OpAMD64VPMOVVec32x8ToM
+       OpAMD64VPMOVVec32x16ToM
+       OpAMD64VPMOVVec64x2ToM
+       OpAMD64VPMOVVec64x4ToM
+       OpAMD64VPMOVVec64x8ToM
+       OpAMD64Zero128
+       OpAMD64Zero256
+       OpAMD64Zero512
 
        OpARMADD
        OpARMADDconst
@@ -3386,6 +3420,8 @@ const (
        OpClobberReg
        OpPrefetchCache
        OpPrefetchCacheStreamed
+       OpAdd32x4
+       OpZeroSIMD
 )
 
 var opcodeTable = [...]opInfo{
@@ -6856,7 +6892,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -6872,7 +6908,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -6912,8 +6948,8 @@ var opcodeTable = [...]opInfo{
                scale:     1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -6929,8 +6965,8 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -6946,8 +6982,8 @@ var opcodeTable = [...]opInfo{
                scale:     1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -6963,8 +6999,8 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -6980,8 +7016,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -6994,8 +7030,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -7008,9 +7044,9 @@ var opcodeTable = [...]opInfo{
                scale:     1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -7023,9 +7059,9 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -7038,9 +7074,9 @@ var opcodeTable = [...]opInfo{
                scale:     1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -7053,9 +7089,9 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -7069,8 +7105,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7087,8 +7123,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7105,8 +7141,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASUBSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7123,8 +7159,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASUBSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7141,8 +7177,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMULSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7159,8 +7195,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMULSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7177,8 +7213,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ADIVSS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7195,8 +7231,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ADIVSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7213,9 +7249,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7232,9 +7268,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7251,9 +7287,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7270,9 +7306,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7289,9 +7325,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7308,9 +7344,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7327,9 +7363,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7346,9 +7382,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7365,9 +7401,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7384,9 +7420,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7403,9 +7439,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7422,9 +7458,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7441,9 +7477,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7460,9 +7496,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7479,9 +7515,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7498,9 +7534,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {2, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {2, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -7579,7 +7615,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -7593,7 +7629,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8227,7 +8263,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8241,7 +8277,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8321,7 +8357,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8335,7 +8371,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8415,7 +8451,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8429,7 +8465,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8530,8 +8566,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8544,8 +8580,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8558,8 +8594,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8572,8 +8608,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8586,7 +8622,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8599,7 +8635,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8612,7 +8648,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8625,7 +8661,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ACMPB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8638,9 +8674,9 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8654,9 +8690,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8669,9 +8705,9 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8685,9 +8721,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8700,9 +8736,9 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8716,9 +8752,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8732,9 +8768,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8747,8 +8783,8 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8762,8 +8798,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8776,8 +8812,8 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8791,8 +8827,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8805,8 +8841,8 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8820,8 +8856,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -8835,8 +8871,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -9060,7 +9096,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -9074,7 +9110,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTRQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -9088,7 +9124,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ABTCQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -9741,8 +9777,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9760,8 +9796,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9779,8 +9815,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASUBQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9798,8 +9834,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASUBL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9817,8 +9853,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9836,8 +9872,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9855,8 +9891,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9874,8 +9910,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9893,8 +9929,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9912,8 +9948,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9931,9 +9967,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9951,9 +9987,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9971,9 +10007,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -9991,9 +10027,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10011,9 +10047,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10031,9 +10067,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10051,9 +10087,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10071,9 +10107,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10091,9 +10127,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10111,9 +10147,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10131,9 +10167,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10151,9 +10187,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10171,9 +10207,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10191,9 +10227,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10211,9 +10247,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10231,9 +10267,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10251,9 +10287,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10271,9 +10307,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10291,9 +10327,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10311,9 +10347,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10331,9 +10367,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10351,9 +10387,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10371,9 +10407,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10391,9 +10427,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10411,9 +10447,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -10430,8 +10466,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10445,8 +10481,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASUBQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10460,8 +10496,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10475,8 +10511,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10490,8 +10526,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10505,8 +10541,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AADDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10520,8 +10556,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASUBL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10535,8 +10571,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10550,8 +10586,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10565,8 +10601,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10580,9 +10616,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10596,9 +10632,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10612,9 +10648,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10628,9 +10664,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10644,9 +10680,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10660,9 +10696,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10676,9 +10712,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10692,9 +10728,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10708,9 +10744,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10724,9 +10760,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10740,9 +10776,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10756,9 +10792,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10772,9 +10808,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10788,9 +10824,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10804,9 +10840,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10820,9 +10856,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10836,9 +10872,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10852,9 +10888,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10868,9 +10904,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10884,9 +10920,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10900,9 +10936,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10916,9 +10952,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10932,9 +10968,9 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10948,9 +10984,9 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10964,9 +11000,9 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10980,8 +11016,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -10995,8 +11031,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11010,8 +11046,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11025,8 +11061,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11040,8 +11076,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11055,8 +11091,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11070,8 +11106,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11085,8 +11121,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11100,8 +11136,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11115,8 +11151,8 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11130,8 +11166,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11145,8 +11181,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11160,8 +11196,8 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11175,8 +11211,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11190,8 +11226,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11205,8 +11241,8 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11220,8 +11256,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11235,8 +11271,8 @@ var opcodeTable = [...]opInfo{
                scale:        1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11250,8 +11286,8 @@ var opcodeTable = [...]opInfo{
                scale:        4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -11265,8 +11301,8 @@ var opcodeTable = [...]opInfo{
                scale:        8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12342,7 +12378,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETEQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12355,7 +12391,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12368,7 +12404,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETLT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12381,7 +12417,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETLE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12394,7 +12430,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETGT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12407,7 +12443,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETGE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12420,7 +12456,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETCS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12433,7 +12469,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETLS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12446,7 +12482,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETHI,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12459,7 +12495,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASETCC,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12473,8 +12509,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12488,8 +12524,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12503,8 +12539,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12518,8 +12554,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12533,8 +12569,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12548,8 +12584,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12563,8 +12599,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12578,8 +12614,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12593,8 +12629,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12608,8 +12644,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -12998,7 +13034,7 @@ var opcodeTable = [...]opInfo{
                asm:               x86.ALEAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13014,7 +13050,7 @@ var opcodeTable = [...]opInfo{
                asm:               x86.ALEAL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13030,7 +13066,7 @@ var opcodeTable = [...]opInfo{
                asm:               x86.ALEAW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13047,8 +13083,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13065,8 +13101,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13083,8 +13119,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13100,8 +13136,8 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13117,8 +13153,8 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13134,8 +13170,8 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13151,8 +13187,8 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13168,8 +13204,8 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13185,8 +13221,8 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13202,8 +13238,8 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13219,8 +13255,8 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13236,8 +13272,8 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13253,7 +13289,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVBLZX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13269,7 +13305,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVBQSX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13285,7 +13321,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVWLZX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13301,7 +13337,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVWQSX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13317,7 +13353,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13333,7 +13369,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVLQSX,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13349,7 +13385,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13365,8 +13401,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13379,8 +13415,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13393,8 +13429,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13407,8 +13443,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13421,7 +13457,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVUPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -13437,8 +13473,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVUPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {0, 4295016447}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                },
        },
@@ -13452,8 +13488,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13470,8 +13506,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13487,8 +13523,8 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13505,8 +13541,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13522,8 +13558,8 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13539,8 +13575,8 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13557,8 +13593,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13574,8 +13610,8 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -13592,9 +13628,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13608,9 +13644,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13623,9 +13659,9 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13639,9 +13675,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13654,9 +13690,9 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13669,9 +13705,9 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13685,9 +13721,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13700,9 +13736,9 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13715,7 +13751,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13728,7 +13764,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13741,7 +13777,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13754,7 +13790,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13767,7 +13803,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVUPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13781,8 +13817,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13796,8 +13832,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13810,8 +13846,8 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13825,8 +13861,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13839,8 +13875,8 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13854,8 +13890,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -13868,8 +13904,8 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14127,7 +14163,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14143,7 +14179,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14159,7 +14195,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14177,8 +14213,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXCHGB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14196,8 +14232,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXCHGL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14215,8 +14251,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXCHGQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14235,8 +14271,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXADDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14255,8 +14291,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AXADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14328,8 +14364,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14344,8 +14380,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14360,8 +14396,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14376,8 +14412,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14392,8 +14428,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14408,8 +14444,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14512,7 +14548,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.APREFETCHT0,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14523,7 +14559,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.APREFETCHNTA,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14706,8 +14742,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVBEW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14720,7 +14756,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVBEL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14736,8 +14772,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVBEL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14750,7 +14786,7 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVBEQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14766,8 +14802,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.AMOVBEQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14781,8 +14817,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14798,8 +14834,8 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14815,8 +14851,8 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14833,8 +14869,8 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14850,8 +14886,8 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -14868,9 +14904,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14883,9 +14919,9 @@ var opcodeTable = [...]opInfo{
                scale:     2,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14899,9 +14935,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14914,9 +14950,9 @@ var opcodeTable = [...]opInfo{
                scale:     4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14929,9 +14965,9 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14945,9 +14981,9 @@ var opcodeTable = [...]opInfo{
                scale:       1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -14960,9 +14996,9 @@ var opcodeTable = [...]opInfo{
                scale:     8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {2, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {2, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                },
        },
@@ -15059,8 +15095,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASARXL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15076,8 +15112,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASARXQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15093,8 +15129,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASHLXL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15110,8 +15146,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASHLXQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15127,8 +15163,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASHRXL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15144,8 +15180,8 @@ var opcodeTable = [...]opInfo{
                asm:            x86.ASHRXQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {1, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15162,9 +15198,9 @@ var opcodeTable = [...]opInfo{
                scale:          1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15181,9 +15217,9 @@ var opcodeTable = [...]opInfo{
                scale:          4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15200,9 +15236,9 @@ var opcodeTable = [...]opInfo{
                scale:          8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15219,9 +15255,9 @@ var opcodeTable = [...]opInfo{
                scale:          1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15238,9 +15274,9 @@ var opcodeTable = [...]opInfo{
                scale:          8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15257,9 +15293,9 @@ var opcodeTable = [...]opInfo{
                scale:          1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15276,9 +15312,9 @@ var opcodeTable = [...]opInfo{
                scale:          4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15295,9 +15331,9 @@ var opcodeTable = [...]opInfo{
                scale:          8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15314,9 +15350,9 @@ var opcodeTable = [...]opInfo{
                scale:          1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15333,9 +15369,9 @@ var opcodeTable = [...]opInfo{
                scale:          8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15352,9 +15388,9 @@ var opcodeTable = [...]opInfo{
                scale:          1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15371,9 +15407,9 @@ var opcodeTable = [...]opInfo{
                scale:          4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15390,9 +15426,9 @@ var opcodeTable = [...]opInfo{
                scale:          8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15409,9 +15445,9 @@ var opcodeTable = [...]opInfo{
                scale:          1,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15428,9 +15464,9 @@ var opcodeTable = [...]opInfo{
                scale:          8,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {1, 49151},      // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
+                               {2, 49135},         // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {1, 49151},         // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 1099511693311}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 g R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
@@ -15537,6 +15573,453 @@ var opcodeTable = [...]opInfo{
                        },
                },
        },
+       {
+               name:        "VPADDD4",
+               argLen:      2,
+               commutative: true,
+               asm:         x86.AVPADDD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:           "VMOVDQUload128",
+               auxType:        auxSymOff,
+               argLen:         2,
+               faultOnNilArg0: true,
+               symEffect:      SymRead,
+               asm:            x86.AVMOVDQU,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:           "VMOVDQUstore128",
+               auxType:        auxSymOff,
+               argLen:         3,
+               faultOnNilArg0: true,
+               symEffect:      SymWrite,
+               asm:            x86.AVMOVDQU,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                       },
+               },
+       },
+       {
+               name:           "VMOVDQUload256",
+               auxType:        auxSymOff,
+               argLen:         2,
+               faultOnNilArg0: true,
+               symEffect:      SymRead,
+               asm:            x86.AVMOVDQU,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:           "VMOVDQUstore256",
+               auxType:        auxSymOff,
+               argLen:         3,
+               faultOnNilArg0: true,
+               symEffect:      SymWrite,
+               asm:            x86.AVMOVDQU,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                       },
+               },
+       },
+       {
+               name:           "VMOVDQUload512",
+               auxType:        auxSymOff,
+               argLen:         2,
+               faultOnNilArg0: true,
+               symEffect:      SymRead,
+               asm:            x86.AVMOVDQU64,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:           "VMOVDQUstore512",
+               auxType:        auxSymOff,
+               argLen:         3,
+               faultOnNilArg0: true,
+               symEffect:      SymWrite,
+               asm:            x86.AVMOVDQU64,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 2147418112},    // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 1099511676927}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                       },
+               },
+       },
+       {
+               name:   "VPMOVMToVec8x16",
+               argLen: 1,
+               asm:    x86.AVPMOVM2B,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "VPMOVMToVec8x32",
+               argLen: 1,
+               asm:    x86.AVPMOVM2B,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "VPMOVMToVec8x64",
+               argLen: 1,
+               asm:    x86.AVPMOVM2B,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "VPMOVMToVec16x8",
+               argLen: 1,
+               asm:    x86.AVPMOVM2W,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "VPMOVMToVec16x16",
+               argLen: 1,
+               asm:    x86.AVPMOVM2W,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "VPMOVMToVec16x32",
+               argLen: 1,
+               asm:    x86.AVPMOVM2W,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "VPMOVMToVec32x4",
+               argLen: 1,
+               asm:    x86.AVPMOVM2D,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "VPMOVMToVec32x8",
+               argLen: 1,
+               asm:    x86.AVPMOVM2D,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "VPMOVMToVec32x16",
+               argLen: 1,
+               asm:    x86.AVPMOVM2D,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "VPMOVMToVec64x2",
+               argLen: 1,
+               asm:    x86.AVPMOVM2Q,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "VPMOVMToVec64x4",
+               argLen: 1,
+               asm:    x86.AVPMOVM2Q,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "VPMOVMToVec64x8",
+               argLen: 1,
+               asm:    x86.AVPMOVM2Q,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "VPMOVVec8x16ToM",
+               argLen: 1,
+               asm:    x86.AVPMOVB2M,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+               },
+       },
+       {
+               name:   "VPMOVVec8x32ToM",
+               argLen: 1,
+               asm:    x86.AVPMOVB2M,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+               },
+       },
+       {
+               name:   "VPMOVVec8x64ToM",
+               argLen: 1,
+               asm:    x86.AVPMOVB2M,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+               },
+       },
+       {
+               name:   "VPMOVVec16x8ToM",
+               argLen: 1,
+               asm:    x86.AVPMOVW2M,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+               },
+       },
+       {
+               name:   "VPMOVVec16x16ToM",
+               argLen: 1,
+               asm:    x86.AVPMOVW2M,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+               },
+       },
+       {
+               name:   "VPMOVVec16x32ToM",
+               argLen: 1,
+               asm:    x86.AVPMOVW2M,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+               },
+       },
+       {
+               name:   "VPMOVVec32x4ToM",
+               argLen: 1,
+               asm:    x86.AVPMOVD2M,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+               },
+       },
+       {
+               name:   "VPMOVVec32x8ToM",
+               argLen: 1,
+               asm:    x86.AVPMOVD2M,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+               },
+       },
+       {
+               name:   "VPMOVVec32x16ToM",
+               argLen: 1,
+               asm:    x86.AVPMOVD2M,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+               },
+       },
+       {
+               name:   "VPMOVVec64x2ToM",
+               argLen: 1,
+               asm:    x86.AVPMOVQ2M,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+               },
+       },
+       {
+               name:   "VPMOVVec64x4ToM",
+               argLen: 1,
+               asm:    x86.AVPMOVQ2M,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+               },
+       },
+       {
+               name:   "VPMOVVec64x8ToM",
+               argLen: 1,
+               asm:    x86.AVPMOVQ2M,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+                       outputs: []outputInfo{
+                               {0, 1090921693184}, // K1 K2 K3 K4 K5 K6 K7
+                       },
+               },
+       },
+       {
+               name:   "Zero128",
+               argLen: 0,
+               asm:    x86.AVPXOR,
+               reg: regInfo{
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "Zero256",
+               argLen: 0,
+               asm:    x86.AVPXOR,
+               reg: regInfo{
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:   "Zero512",
+               argLen: 0,
+               asm:    x86.AVPXORQ,
+               reg: regInfo{
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
 
        {
                name:        "ADD",
@@ -42682,6 +43165,16 @@ var opcodeTable = [...]opInfo{
                hasSideEffects: true,
                generic:        true,
        },
+       {
+               name:    "Add32x4",
+               argLen:  2,
+               generic: true,
+       },
+       {
+               name:    "ZeroSIMD",
+               argLen:  0,
+               generic: true,
+       },
 }
 
 func (o Op) Asm() obj.As          { return opcodeTable[o].asm }
@@ -42753,13 +43246,21 @@ var registersAMD64 = [...]Register{
        {29, x86.REG_X13, "X13"},
        {30, x86.REG_X14, "X14"},
        {31, x86.REG_X15, "X15"},
-       {32, 0, "SB"},
+       {32, x86.REG_K0, "K0"},
+       {33, x86.REG_K1, "K1"},
+       {34, x86.REG_K2, "K2"},
+       {35, x86.REG_K3, "K3"},
+       {36, x86.REG_K4, "K4"},
+       {37, x86.REG_K5, "K5"},
+       {38, x86.REG_K6, "K6"},
+       {39, x86.REG_K7, "K7"},
+       {40, 0, "SB"},
 }
 var paramIntRegAMD64 = []int8{0, 3, 1, 7, 6, 8, 9, 10, 11}
 var paramFloatRegAMD64 = []int8{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}
 var gpRegMaskAMD64 = regMask(49135)
 var fpRegMaskAMD64 = regMask(2147418112)
-var specialRegMaskAMD64 = regMask(2147483648)
+var specialRegMaskAMD64 = regMask(1093069176832)
 var framepointerRegAMD64 = int8(5)
 var linkRegAMD64 = int8(-1)
 var registersARM = [...]Register{

diff --git a/src/cmd/compile/internal/ssa/rewriteAMD64.go b/src/cmd/compile/internal/ssa/rewriteAMD64.go
index 3d7af5f365a116291aee20bc071fb653b40bf0b9..3afcfe153a1654f9187d84520d459af0f574a67e 100644 (file)
--- a/src/cmd/compile/internal/ssa/rewriteAMD64.go
+++ b/src/cmd/compile/internal/ssa/rewriteAMD64.go
@@ -501,6 +501,30 @@ func rewriteValueAMD64(v *Value) bool {
                return rewriteValueAMD64_OpAMD64TESTW(v)
        case OpAMD64TESTWconst:
                return rewriteValueAMD64_OpAMD64TESTWconst(v)
+       case OpAMD64VPMOVVec16x16ToM:
+               return rewriteValueAMD64_OpAMD64VPMOVVec16x16ToM(v)
+       case OpAMD64VPMOVVec16x32ToM:
+               return rewriteValueAMD64_OpAMD64VPMOVVec16x32ToM(v)
+       case OpAMD64VPMOVVec16x8ToM:
+               return rewriteValueAMD64_OpAMD64VPMOVVec16x8ToM(v)
+       case OpAMD64VPMOVVec32x16ToM:
+               return rewriteValueAMD64_OpAMD64VPMOVVec32x16ToM(v)
+       case OpAMD64VPMOVVec32x4ToM:
+               return rewriteValueAMD64_OpAMD64VPMOVVec32x4ToM(v)
+       case OpAMD64VPMOVVec32x8ToM:
+               return rewriteValueAMD64_OpAMD64VPMOVVec32x8ToM(v)
+       case OpAMD64VPMOVVec64x2ToM:
+               return rewriteValueAMD64_OpAMD64VPMOVVec64x2ToM(v)
+       case OpAMD64VPMOVVec64x4ToM:
+               return rewriteValueAMD64_OpAMD64VPMOVVec64x4ToM(v)
+       case OpAMD64VPMOVVec64x8ToM:
+               return rewriteValueAMD64_OpAMD64VPMOVVec64x8ToM(v)
+       case OpAMD64VPMOVVec8x16ToM:
+               return rewriteValueAMD64_OpAMD64VPMOVVec8x16ToM(v)
+       case OpAMD64VPMOVVec8x32ToM:
+               return rewriteValueAMD64_OpAMD64VPMOVVec8x32ToM(v)
+       case OpAMD64VPMOVVec8x64ToM:
+               return rewriteValueAMD64_OpAMD64VPMOVVec8x64ToM(v)
        case OpAMD64XADDLlock:
                return rewriteValueAMD64_OpAMD64XADDLlock(v)
        case OpAMD64XADDQlock:
@@ -1198,6 +1222,8 @@ func rewriteValueAMD64(v *Value) bool {
        case OpZeroExt8to64:
                v.Op = OpAMD64MOVBQZX
                return true
+       case OpZeroSIMD:
+               return rewriteValueAMD64_OpZeroSIMD(v)
        }
        return false
 }
@@ -22812,6 +22838,174 @@ func rewriteValueAMD64_OpAMD64TESTWconst(v *Value) bool {
        }
        return false
 }
+func rewriteValueAMD64_OpAMD64VPMOVVec16x16ToM(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (VPMOVVec16x16ToM (VPMOVMToVec16x16 x))
+       // result: x
+       for {
+               if v_0.Op != OpAMD64VPMOVMToVec16x16 {
+                       break
+               }
+               x := v_0.Args[0]
+               v.copyOf(x)
+               return true
+       }
+       return false
+}
+func rewriteValueAMD64_OpAMD64VPMOVVec16x32ToM(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (VPMOVVec16x32ToM (VPMOVMToVec16x32 x))
+       // result: x
+       for {
+               if v_0.Op != OpAMD64VPMOVMToVec16x32 {
+                       break
+               }
+               x := v_0.Args[0]
+               v.copyOf(x)
+               return true
+       }
+       return false
+}
+func rewriteValueAMD64_OpAMD64VPMOVVec16x8ToM(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (VPMOVVec16x8ToM (VPMOVMToVec16x8 x))
+       // result: x
+       for {
+               if v_0.Op != OpAMD64VPMOVMToVec16x8 {
+                       break
+               }
+               x := v_0.Args[0]
+               v.copyOf(x)
+               return true
+       }
+       return false
+}
+func rewriteValueAMD64_OpAMD64VPMOVVec32x16ToM(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (VPMOVVec32x16ToM (VPMOVMToVec32x16 x))
+       // result: x
+       for {
+               if v_0.Op != OpAMD64VPMOVMToVec32x16 {
+                       break
+               }
+               x := v_0.Args[0]
+               v.copyOf(x)
+               return true
+       }
+       return false
+}
+func rewriteValueAMD64_OpAMD64VPMOVVec32x4ToM(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (VPMOVVec32x4ToM (VPMOVMToVec32x4 x))
+       // result: x
+       for {
+               if v_0.Op != OpAMD64VPMOVMToVec32x4 {
+                       break
+               }
+               x := v_0.Args[0]
+               v.copyOf(x)
+               return true
+       }
+       return false
+}
+func rewriteValueAMD64_OpAMD64VPMOVVec32x8ToM(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (VPMOVVec32x8ToM (VPMOVMToVec32x8 x))
+       // result: x
+       for {
+               if v_0.Op != OpAMD64VPMOVMToVec32x8 {
+                       break
+               }
+               x := v_0.Args[0]
+               v.copyOf(x)
+               return true
+       }
+       return false
+}
+func rewriteValueAMD64_OpAMD64VPMOVVec64x2ToM(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (VPMOVVec64x2ToM (VPMOVMToVec64x2 x))
+       // result: x
+       for {
+               if v_0.Op != OpAMD64VPMOVMToVec64x2 {
+                       break
+               }
+               x := v_0.Args[0]
+               v.copyOf(x)
+               return true
+       }
+       return false
+}
+func rewriteValueAMD64_OpAMD64VPMOVVec64x4ToM(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (VPMOVVec64x4ToM (VPMOVMToVec64x4 x))
+       // result: x
+       for {
+               if v_0.Op != OpAMD64VPMOVMToVec64x4 {
+                       break
+               }
+               x := v_0.Args[0]
+               v.copyOf(x)
+               return true
+       }
+       return false
+}
+func rewriteValueAMD64_OpAMD64VPMOVVec64x8ToM(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (VPMOVVec64x8ToM (VPMOVMToVec64x8 x))
+       // result: x
+       for {
+               if v_0.Op != OpAMD64VPMOVMToVec64x8 {
+                       break
+               }
+               x := v_0.Args[0]
+               v.copyOf(x)
+               return true
+       }
+       return false
+}
+func rewriteValueAMD64_OpAMD64VPMOVVec8x16ToM(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (VPMOVVec8x16ToM (VPMOVMToVec8x16 x))
+       // result: x
+       for {
+               if v_0.Op != OpAMD64VPMOVMToVec8x16 {
+                       break
+               }
+               x := v_0.Args[0]
+               v.copyOf(x)
+               return true
+       }
+       return false
+}
+func rewriteValueAMD64_OpAMD64VPMOVVec8x32ToM(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (VPMOVVec8x32ToM (VPMOVMToVec8x32 x))
+       // result: x
+       for {
+               if v_0.Op != OpAMD64VPMOVMToVec8x32 {
+                       break
+               }
+               x := v_0.Args[0]
+               v.copyOf(x)
+               return true
+       }
+       return false
+}
+func rewriteValueAMD64_OpAMD64VPMOVVec8x64ToM(v *Value) bool {
+       v_0 := v.Args[0]
+       // match: (VPMOVVec8x64ToM (VPMOVMToVec8x64 x))
+       // result: x
+       for {
+               if v_0.Op != OpAMD64VPMOVMToVec8x64 {
+                       break
+               }
+               x := v_0.Args[0]
+               v.copyOf(x)
+               return true
+       }
+       return false
+}
 func rewriteValueAMD64_OpAMD64XADDLlock(v *Value) bool {
        v_2 := v.Args[2]
        v_1 := v.Args[1]
@@ -26215,6 +26409,48 @@ func rewriteValueAMD64_OpLoad(v *Value) bool {
                v.AddArg2(ptr, mem)
                return true
        }
+       // match: (Load <t> ptr mem)
+       // cond: t.Size() == 16
+       // result: (VMOVDQUload128 ptr mem)
+       for {
+               t := v.Type
+               ptr := v_0
+               mem := v_1
+               if !(t.Size() == 16) {
+                       break
+               }
+               v.reset(OpAMD64VMOVDQUload128)
+               v.AddArg2(ptr, mem)
+               return true
+       }
+       // match: (Load <t> ptr mem)
+       // cond: t.Size() == 32
+       // result: (VMOVDQUload256 ptr mem)
+       for {
+               t := v.Type
+               ptr := v_0
+               mem := v_1
+               if !(t.Size() == 32) {
+                       break
+               }
+               v.reset(OpAMD64VMOVDQUload256)
+               v.AddArg2(ptr, mem)
+               return true
+       }
+       // match: (Load <t> ptr mem)
+       // cond: t.Size() == 64
+       // result: (VMOVDQUload512 ptr mem)
+       for {
+               t := v.Type
+               ptr := v_0
+               mem := v_1
+               if !(t.Size() == 64) {
+                       break
+               }
+               v.reset(OpAMD64VMOVDQUload512)
+               v.AddArg2(ptr, mem)
+               return true
+       }
        return false
 }
 func rewriteValueAMD64_OpLocalAddr(v *Value) bool {
@@ -29764,6 +30000,51 @@ func rewriteValueAMD64_OpStore(v *Value) bool {
                v.AddArg3(ptr, val, mem)
                return true
        }
+       // match: (Store {t} ptr val mem)
+       // cond: t.Size() == 16
+       // result: (VMOVDQUstore128 ptr val mem)
+       for {
+               t := auxToType(v.Aux)
+               ptr := v_0
+               val := v_1
+               mem := v_2
+               if !(t.Size() == 16) {
+                       break
+               }
+               v.reset(OpAMD64VMOVDQUstore128)
+               v.AddArg3(ptr, val, mem)
+               return true
+       }
+       // match: (Store {t} ptr val mem)
+       // cond: t.Size() == 32
+       // result: (VMOVDQUstore256 ptr val mem)
+       for {
+               t := auxToType(v.Aux)
+               ptr := v_0
+               val := v_1
+               mem := v_2
+               if !(t.Size() == 32) {
+                       break
+               }
+               v.reset(OpAMD64VMOVDQUstore256)
+               v.AddArg3(ptr, val, mem)
+               return true
+       }
+       // match: (Store {t} ptr val mem)
+       // cond: t.Size() == 64
+       // result: (VMOVDQUstore512 ptr val mem)
+       for {
+               t := auxToType(v.Aux)
+               ptr := v_0
+               val := v_1
+               mem := v_2
+               if !(t.Size() == 64) {
+                       break
+               }
+               v.reset(OpAMD64VMOVDQUstore512)
+               v.AddArg3(ptr, val, mem)
+               return true
+       }
        return false
 }
 func rewriteValueAMD64_OpTrunc(v *Value) bool {
@@ -30117,6 +30398,45 @@ func rewriteValueAMD64_OpZero(v *Value) bool {
        }
        return false
 }
+func rewriteValueAMD64_OpZeroSIMD(v *Value) bool {
+       // match: (ZeroSIMD <t>)
+       // cond: t.Size() == 16
+       // result: (Zero128 <t>)
+       for {
+               t := v.Type
+               if !(t.Size() == 16) {
+                       break
+               }
+               v.reset(OpAMD64Zero128)
+               v.Type = t
+               return true
+       }
+       // match: (ZeroSIMD <t>)
+       // cond: t.Size() == 32
+       // result: (Zero256 <t>)
+       for {
+               t := v.Type
+               if !(t.Size() == 32) {
+                       break
+               }
+               v.reset(OpAMD64Zero256)
+               v.Type = t
+               return true
+       }
+       // match: (ZeroSIMD <t>)
+       // cond: t.Size() == 64
+       // result: (Zero512 <t>)
+       for {
+               t := v.Type
+               if !(t.Size() == 64) {
+                       break
+               }
+               v.reset(OpAMD64Zero512)
+               v.Type = t
+               return true
+       }
+       return false
+}
 func rewriteBlockAMD64(b *Block) bool {
        typ := &b.Func.Config.Types
        switch b.Kind {

diff --git a/src/cmd/compile/internal/ssa/rewritegeneric.go b/src/cmd/compile/internal/ssa/rewritegeneric.go
index bfbd3c8522ed241f91b4d2489546bc89c486b905..b7a4ff95d1af63083e00d016c8e043d51933b9f6 100644 (file)
--- a/src/cmd/compile/internal/ssa/rewritegeneric.go
+++ b/src/cmd/compile/internal/ssa/rewritegeneric.go
@@ -14149,11 +14149,11 @@ func rewriteValuegeneric_OpLoad(v *Value) bool {
                return true
        }
        // match: (Load <t> _ _)
-       // cond: t.IsStruct() && CanSSA(t)
+       // cond: t.IsStruct() && CanSSA(t) && !t.IsSIMD()
        // result: rewriteStructLoad(v)
        for {
                t := v.Type
-               if !(t.IsStruct() && CanSSA(t)) {
+               if !(t.IsStruct() && CanSSA(t) && !t.IsSIMD()) {
                        break
                }
                v.copyOf(rewriteStructLoad(v))

diff --git a/src/cmd/compile/internal/ssa/value.go b/src/cmd/compile/internal/ssa/value.go
index e80b712ddba764fd232ff794c083f9956508efe2..8f921a80037a774ac5ccd4819d40fed25d187474 100644 (file)
--- a/src/cmd/compile/internal/ssa/value.go
+++ b/src/cmd/compile/internal/ssa/value.go
@@ -596,6 +596,9 @@ func AutoVar(v *Value) (*ir.Name, int64) {
 // CanSSA reports whether values of type t can be represented as a Value.
 func CanSSA(t *types.Type) bool {
        types.CalcSize(t)
+       if t.IsSIMD() {
+               return true
+       }
        if t.Size() > int64(4*types.PtrSize) {
                // 4*Widthptr is an arbitrary constant. We want it
                // to be at least 3*Widthptr so slices can be registerized.

diff --git a/src/cmd/compile/internal/ssagen/intrinsics.go b/src/cmd/compile/internal/ssagen/intrinsics.go
index 6b58e7e5914538de18baaf04a507bd925147f888..40b3c41a79e1898ea581a49432fa7a3bcaa6dbed 100644 (file)
--- a/src/cmd/compile/internal/ssagen/intrinsics.go
+++ b/src/cmd/compile/internal/ssagen/intrinsics.go
@@ -1602,6 +1602,104 @@ func initIntrinsics(cfg *intrinsicBuildConfig) {
                        return s.newValue1(ssa.OpZeroExt8to64, types.Types[types.TUINT64], out)
                },
                sys.AMD64)
+
+       if buildcfg.Experiment.SIMD {
+               // Only enable intrinsics, if SIMD experiment.
+               simdIntrinsics(addF)
+       }
+}
+
+// simdLoadSliceMethod does intrinsic for method form of Load-from-slice
+func simdLoadSliceMethod(nElts int64) func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
+       return func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
+               // args[0] is unused except for its type.
+               t := args[0].Type
+               slice := args[1]
+               arrlen := s.constInt(types.Types[types.TINT], nElts)
+               cap := s.newValue1(ssa.OpSliceLen, types.Types[types.TINT], slice)
+               s.boundsCheck(arrlen, cap, ssa.BoundsConvert, false)
+               ptr := s.newValue1(ssa.OpSlicePtr, t.PtrTo(), slice) // is this the right type? Does it need a convert?
+               return s.newValue2(ssa.OpLoad, t, ptr, s.mem())
+       }
+}
+
+// simdLoadSlice does intrinsic for function form of Load-from-slice
+func simdLoadSlice(nElts int64) func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
+       return func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
+               // args[0] is unused except for its type.
+               t := n.Type()
+               slice := args[0]
+               arrlen := s.constInt(types.Types[types.TINT], nElts)
+               cap := s.newValue1(ssa.OpSliceLen, types.Types[types.TINT], slice)
+               s.boundsCheck(arrlen, cap, ssa.BoundsConvert, false)
+               ptr := s.newValue1(ssa.OpSlicePtr, t.PtrTo(), slice) // is this the right type? Does it need a convert?
+               return s.newValue2(ssa.OpLoad, t, ptr, s.mem())
+       }
+}
+
+func simdStoreSlice(nElts int64) func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
+       return func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
+               x := args[0]
+               t := x.Type
+               slice := args[1]
+               arrlen := s.constInt(types.Types[types.TINT], nElts)
+               cap := s.newValue1(ssa.OpSliceLen, types.Types[types.TINT], slice)
+               s.boundsCheck(arrlen, cap, ssa.BoundsConvert, false)
+               ptr := s.newValue1(ssa.OpSlicePtr, t.PtrTo(), slice) // is this the right type? Does it need a convert?
+               s.store(t, ptr, x)
+               return nil
+       }
+}
+
+func simdLoadSliceMethodPart(nElts int64) func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
+       return func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value {
+               // args[0] is unused except for its type.
+               t := args[0].Type
+               slice := args[1]
+               arrLen := s.constInt(types.Types[types.TINT], nElts)
+               cap := s.newValue1(ssa.OpSliceLen, types.Types[types.TINT], slice)
+
+               /*
+                       if off := vec.Len() - len(slice) ; off <= 0 {
+                           plain load
+                       } else {
+                           load mask[off] into a scratch vector
+                           masked load/store
+                       }
+               */
+
+               // TODO SIMD support on a 32-bit processor
+
+               off := s.newValue2(ssa.OpSub64, types.Types[types.TINT], arrLen, cap)
+               cond := s.newValue2(ssa.OpLeq64, types.Types[types.TBOOL], off, s.zeroVal(types.Types[types.TINT]))
+               b := s.endBlock()
+               b.Kind = ssa.BlockIf
+               b.SetControl(cond)
+               bTrue := s.f.NewBlock(ssa.BlockPlain)
+               bFalse := s.f.NewBlock(ssa.BlockPlain)
+               bEnd := s.f.NewBlock(ssa.BlockPlain)
+               b.AddEdgeTo(bTrue)
+               b.AddEdgeTo(bFalse)
+
+               simdRes := ssaMarker("simdload")
+
+               // We have atomic instructions - use it directly.
+               s.startBlock(bTrue)
+               ptr := s.newValue1(ssa.OpSlicePtr, t.PtrTo(), slice)
+               s.vars[simdRes] = s.newValue2(ssa.OpLoad, t, ptr, s.mem())
+               s.endBlock().AddEdgeTo(bEnd)
+
+               // Use original instruction sequence.
+               s.startBlock(bFalse)
+               // NOT IMPLEMENTED, NEED TO ADD GENERIC PARTIAL LOAD/STORE
+               // MASK REGISTER DEPENDS ON ARCH AND ITS SIMD VERSION.
+               s.endBlock().AddEdgeTo(bEnd)
+
+               // Merge results.
+               s.startBlock(bEnd)
+               return s.variable(simdRes, t)
+
+       }
 }
 
 // findIntrinsic returns a function which builds the SSA equivalent of the
@@ -1627,7 +1725,8 @@ func findIntrinsic(sym *types.Sym) intrinsicBuilder {
 
        fn := sym.Name
        if ssa.IntrinsicsDisable {
-               if pkg == "internal/runtime/sys" && (fn == "GetCallerPC" || fn == "GrtCallerSP" || fn == "GetClosurePtr") {
+               if pkg == "internal/runtime/sys" && (fn == "GetCallerPC" || fn == "GrtCallerSP" || fn == "GetClosurePtr") ||
+                       pkg == "internal/simd" || pkg == "simd" { // TODO after simd has been moved to package simd, remove internal/simd
                        // These runtime functions don't have definitions, must be intrinsics.
                } else {
                        return nil

diff --git a/src/cmd/compile/internal/ssagen/simdintrinsics.go b/src/cmd/compile/internal/ssagen/simdintrinsics.go
new file mode 100644 (file)
index 0000000..c185a95
--- /dev/null
+++ b/src/cmd/compile/internal/ssagen/simdintrinsics.go
@@ -0,0 +1,15 @@
+// Code generated by internal/simd/_gen using 'go run .'; DO NOT EDIT.
+
+package ssagen
+
+import (
+       // "cmd/compile/internal/ir"
+       // "cmd/compile/internal/ssa"
+       // "cmd/compile/internal/types"
+       "cmd/internal/sys"
+)
+
+func simdIntrinsics(addF func(pkg, fn string, b intrinsicBuilder, archFamilies ...sys.ArchFamily)) {
+       // addF("internal/simd", "Int32x4.Uint32x4", func(s *state, n *ir.CallExpr, args []*ssa.Value) *ssa.Value { return args[0] }, sys.AMD64)
+       // etc
+}

diff --git a/src/cmd/compile/internal/ssagen/ssa.go b/src/cmd/compile/internal/ssagen/ssa.go
index 542ad823ab80872eb87b57e8342d3cf0d8045220..a10459eed7b1fd77c8c4b9db74928f1478551016 100644 (file)
--- a/src/cmd/compile/internal/ssagen/ssa.go
+++ b/src/cmd/compile/internal/ssagen/ssa.go
@@ -623,6 +623,9 @@ func buildssa(fn *ir.Func, worker int, isPgoHot bool) *ssa.Func {
        // TODO figure out exactly what's unused, don't spill it. Make liveness fine-grained, also.
        for _, p := range params.InParams() {
                typs, offs := p.RegisterTypesAndOffsets()
+               if len(offs) < len(typs) {
+                       s.Fatalf("len(offs)=%d < len(typs)=%d, params=\n%s", len(offs), len(typs), params)
+               }
                for i, t := range typs {
                        o := offs[i]                // offset within parameter
                        fo := p.FrameOffset(params) // offset of parameter in frame
@@ -1399,7 +1402,7 @@ func (s *state) instrument(t *types.Type, addr *ssa.Value, kind instrumentKind)
 // If it is instrumenting for MSAN or ASAN and t is a struct type, it instruments
 // operation for each field, instead of for the whole struct.
 func (s *state) instrumentFields(t *types.Type, addr *ssa.Value, kind instrumentKind) {
-       if !(base.Flag.MSan || base.Flag.ASan) || !t.IsStruct() {
+       if !(base.Flag.MSan || base.Flag.ASan) || !isStructNotSIMD(t) {
                s.instrument(t, addr, kind)
                return
        }
@@ -4335,7 +4338,7 @@ func (s *state) zeroVal(t *types.Type) *ssa.Value {
                return s.constInterface(t)
        case t.IsSlice():
                return s.constSlice(t)
-       case t.IsStruct():
+       case isStructNotSIMD(t):
                n := t.NumFields()
                v := s.entryNewValue0(ssa.OpStructMake, t)
                for i := 0; i < n; i++ {
@@ -4349,6 +4352,8 @@ func (s *state) zeroVal(t *types.Type) *ssa.Value {
                case 1:
                        return s.entryNewValue1(ssa.OpArrayMake1, t, s.zeroVal(t.Elem()))
                }
+       case t.IsSIMD():
+               return s.newValue0(ssa.OpZeroSIMD, t)
        }
        s.Fatalf("zero for type %v not implemented", t)
        return nil
@@ -5328,7 +5333,7 @@ func (s *state) storeType(t *types.Type, left, right *ssa.Value, skip skipMask,
 // do *left = right for all scalar (non-pointer) parts of t.
 func (s *state) storeTypeScalars(t *types.Type, left, right *ssa.Value, skip skipMask) {
        switch {
-       case t.IsBoolean() || t.IsInteger() || t.IsFloat() || t.IsComplex():
+       case t.IsBoolean() || t.IsInteger() || t.IsFloat() || t.IsComplex() || t.IsSIMD():
                s.store(t, left, right)
        case t.IsPtrShaped():
                if t.IsPtr() && t.Elem().NotInHeap() {
@@ -5357,7 +5362,7 @@ func (s *state) storeTypeScalars(t *types.Type, left, right *ssa.Value, skip ski
                // itab field doesn't need a write barrier (even though it is a pointer).
                itab := s.newValue1(ssa.OpITab, s.f.Config.Types.BytePtr, right)
                s.store(types.Types[types.TUINTPTR], left, itab)
-       case t.IsStruct():
+       case isStructNotSIMD(t):
                n := t.NumFields()
                for i := 0; i < n; i++ {
                        ft := t.FieldType(i)
@@ -5394,7 +5399,7 @@ func (s *state) storeTypePtrs(t *types.Type, left, right *ssa.Value) {
                idata := s.newValue1(ssa.OpIData, s.f.Config.Types.BytePtr, right)
                idataAddr := s.newValue1I(ssa.OpOffPtr, s.f.Config.Types.BytePtrPtr, s.config.PtrSize, left)
                s.store(s.f.Config.Types.BytePtr, idataAddr, idata)
-       case t.IsStruct():
+       case isStructNotSIMD(t):
                n := t.NumFields()
                for i := 0; i < n; i++ {
                        ft := t.FieldType(i)
@@ -6477,7 +6482,7 @@ func EmitArgInfo(f *ir.Func, abiInfo *abi.ABIParamResultInfo) *obj.LSym {
        uintptrTyp := types.Types[types.TUINTPTR]
 
        isAggregate := func(t *types.Type) bool {
-               return t.IsStruct() || t.IsArray() || t.IsComplex() || t.IsInterface() || t.IsString() || t.IsSlice()
+               return isStructNotSIMD(t) || t.IsArray() || t.IsComplex() || t.IsInterface() || t.IsString() || t.IsSlice()
        }
 
        wOff := 0
@@ -6537,7 +6542,7 @@ func EmitArgInfo(f *ir.Func, abiInfo *abi.ABIParamResultInfo) *obj.LSym {
                                }
                                baseOffset += t.Elem().Size()
                        }
-               case t.IsStruct():
+               case isStructNotSIMD(t):
                        if t.NumFields() == 0 {
                                n++ // {} counts as a component
                                break
@@ -7554,7 +7559,7 @@ func (s *State) UseArgs(n int64) {
 // fieldIdx finds the index of the field referred to by the ODOT node n.
 func fieldIdx(n *ir.SelectorExpr) int {
        t := n.X.Type()
-       if !t.IsStruct() {
+       if !isStructNotSIMD(t) {
                panic("ODOT's LHS is not a struct")
        }
 
@@ -7762,6 +7767,10 @@ func SpillSlotAddr(spill ssa.Spill, baseReg int16, extraOffset int64) obj.Addr {
        }
 }
 
+func isStructNotSIMD(t *types.Type) bool {
+       return t.IsStruct() && !t.IsSIMD()
+}
+
 var (
        BoundsCheckFunc [ssa.BoundsKindCount]*obj.LSym
        ExtendCheckFunc [ssa.BoundsKindCount]*obj.LSym

diff --git a/src/cmd/compile/internal/types/size.go b/src/cmd/compile/internal/types/size.go
index 72ec4052a808e4fcde59607485e165b144ba73a0..2aa437b56ffe7e26c013e8c7b09aba628aff1041 100644 (file)
--- a/src/cmd/compile/internal/types/size.go
+++ b/src/cmd/compile/internal/types/size.go
@@ -10,6 +10,7 @@ import (
 
        "cmd/compile/internal/base"
        "cmd/internal/src"
+       "internal/buildcfg"
        "internal/types/errors"
 )
 
@@ -410,6 +411,10 @@ func CalcSize(t *Type) {
                }
                CalcStructSize(t)
                w = t.width
+               if t.IsSIMD() { // XXX
+                       t.intRegs = 0
+                       t.floatRegs = 1
+               }
 
        // make fake type to check later to
        // trigger function argument computation.
@@ -452,6 +457,31 @@ func CalcSize(t *Type) {
        ResumeCheckSize()
 }
 
+// simdify marks as type as "SIMD", either as a tag field,
+// or having the SIMD attribute.  The tag field is a marker
+// type used to identify a struct that is not really a struct.
+// A SIMD type is allocated to a vector register (on amd64,
+// xmm, ymm, or zmm).  The fields of a SIMD type are ignored
+// by the compiler except for the space that they reserve.
+func simdify(st *Type, isTag bool) {
+       st.align = 8
+       st.alg = AMEM
+       st.intRegs = 0
+       st.isSIMD = true
+       if isTag {
+               st.width = 0
+               st.isSIMDTag = true
+               st.floatRegs = 0
+       } else {
+               st.floatRegs = 1
+       }
+       // if st.Sym() != nil {
+       //      base.Warn("Simdify %s, %v, %d", st.Sym().Name, isTag, st.width)
+       // } else {
+       //      base.Warn("Simdify %v, %v, %d", st, isTag, st.width)
+       // }
+}
+
 // CalcStructSize calculates the size of t,
 // filling in t.width, t.align, t.intRegs, and t.floatRegs,
 // even if size calculation is otherwise disabled.
@@ -464,10 +494,27 @@ func CalcStructSize(t *Type) {
                switch {
                case sym.Name == "align64" && isAtomicStdPkg(sym.Pkg):
                        maxAlign = 8
+
+               case buildcfg.Experiment.SIMD && (sym.Pkg.Path == "internal/simd" || sym.Pkg.Path == "simd") && len(t.Fields()) >= 1:
+                       // This gates the experiment -- without it, no user-visible types can be "simd".
+                       // The SSA-visible SIMD types remain.
+                       // TODO after simd has been moved to package simd, remove internal/simd.
+                       switch sym.Name {
+                       case "v128":
+                               simdify(t, true)
+                               return
+                       case "v256":
+                               simdify(t, true)
+                               return
+                       case "v512":
+                               simdify(t, true)
+                               return
+                       }
                }
        }
 
        fields := t.Fields()
+
        size := calcStructOffset(t, fields, 0)
 
        // For non-zero-sized structs which end in a zero-sized field, we
@@ -540,6 +587,11 @@ func CalcStructSize(t *Type) {
                        break
                }
        }
+
+       if len(t.Fields()) >= 1 && t.Fields()[0].Type.isSIMDTag {
+               // this catches `type Foo simd.Whatever` -- Foo is also SIMD.
+               simdify(t, false)
+       }
 }
 
 // CalcArraySize calculates the size of t,

diff --git a/src/cmd/compile/internal/types/type.go b/src/cmd/compile/internal/types/type.go
index c4080ed0b526ae34742d62f950d057840ac2e2e2..41217cb2a9b212d39f5539076800aed835c61df0 100644 (file)
--- a/src/cmd/compile/internal/types/type.go
+++ b/src/cmd/compile/internal/types/type.go
@@ -201,8 +201,9 @@ type Type struct {
 
        intRegs, floatRegs uint8 // registers needed for ABIInternal
 
-       flags bitset8
-       alg   AlgKind // valid if Align > 0
+       flags             bitset8
+       alg               AlgKind // valid if Align > 0
+       isSIMDTag, isSIMD bool    // tag is the marker type, isSIMD means has marker type
 
        // size of prefix of object that contains all pointers. valid if Align > 0.
        // Note that for pointers, this is always PtrSize even if the element type
@@ -605,6 +606,12 @@ func newSSA(name string) *Type {
        return t
 }
 
+func newSIMD(name string) *Type {
+       t := newSSA(name)
+       t.isSIMD = true
+       return t
+}
+
 // NewMap returns a new map Type with key type k and element (aka value) type v.
 func NewMap(k, v *Type) *Type {
        t := newType(TMAP)
@@ -995,10 +1002,7 @@ func (t *Type) ArgWidth() int64 {
 
 func (t *Type) Size() int64 {
        if t.kind == TSSA {
-               if t == TypeInt128 {
-                       return 16
-               }
-               return 0
+               return t.width
        }
        CalcSize(t)
        return t.width
@@ -1626,12 +1630,26 @@ var (
        TypeFlags     = newSSA("flags")
        TypeVoid      = newSSA("void")
        TypeInt128    = newSSA("int128")
+       TypeVec128    = newSIMD("vec128")
+       TypeVec256    = newSIMD("vec256")
+       TypeVec512    = newSIMD("vec512")
+       TypeMask      = newSSA("mask") // not a vector, not 100% sure what this should be.
        TypeResultMem = newResults([]*Type{TypeMem})
 )
 
 func init() {
        TypeInt128.width = 16
        TypeInt128.align = 8
+
+       TypeVec128.width = 16
+       TypeVec128.align = 8
+       TypeVec256.width = 32
+       TypeVec256.align = 8
+       TypeVec512.width = 64
+       TypeVec512.align = 8
+
+       TypeMask.width = 8 // This will depend on the architecture; spilling will be "interesting".
+       TypeMask.align = 8
 }
 
 // NewNamed returns a new named type for the given type name. obj should be an
@@ -2017,3 +2035,7 @@ var SimType [NTYPE]Kind
 
 // Fake package for shape types (see typecheck.Shapify()).
 var ShapePkg = NewPkg("go.shape", "go.shape")
+
+func (t *Type) IsSIMD() bool {
+       return t.isSIMD
+}

diff --git a/src/internal/simd/dummy.s b/src/internal/simd/dummy.s
new file mode 100644 (file)
index 0000000..f78313a
--- /dev/null
+++ b/src/internal/simd/dummy.s
@@ -0,0 +1,7 @@
+// Copyright 2025 The Go Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+
+//go:build amd64
+
+// Empty file to allow bodyless functions.

diff --git a/src/internal/simd/testdata/sample.go b/src/internal/simd/testdata/sample.go
new file mode 100644 (file)
index 0000000..0966912
--- /dev/null
+++ b/src/internal/simd/testdata/sample.go
@@ -0,0 +1,145 @@
+package sample
+
+import (
+       "internal/simd"
+       "os"
+       "unsafe"
+)
+
+type S1 = simd.Float64x4
+
+type S2 simd.Float64x4
+
+func (s S2) Len() int {
+       return simd.Float64x4(s).Len()
+}
+
+func (s S2) Load(a []float64) S2 {
+       return S2(simd.LoadFloat64x4FromSlice(a))
+}
+
+func (s S2) Store(a []float64) {
+       simd.Float64x4(s).Store(a)
+}
+
+func (s S2) Add(a S2) S2 {
+       return S2(simd.Float64x4(s).Add(simd.Float64x4(a)))
+}
+
+func (s S2) Mul(a S2) S2 {
+       return S2(simd.Float64x4(s).Mul(simd.Float64x4(a)))
+}
+
+type S3 struct {
+       simd.Float64x4
+}
+
+func ip64_0(a, b []float64) float64 {
+       s := 0.0
+       for i := range a {
+               s += a[i] * b[i]
+       }
+       return s
+}
+
+func ip64_1(a, b []float64) float64 {
+       var z S1
+       sum := z
+       var i int
+       stride := z.Len()
+       for ; i <= len(a)-stride; i += stride {
+               va := simd.LoadFloat64x4FromSlice(a[i:])
+               vb := simd.LoadFloat64x4FromSlice(b[i:])
+               sum = sum.Add(va.Mul(vb))
+       }
+       var tmp [4]float64
+       sum.Store(tmp[:])
+       return tmp[0] + tmp[1] + tmp[2] + tmp[3]
+}
+
+func ip64_1a(a, b []float64) float64 {
+       var z S1
+       sum := z
+       var i int
+       stride := z.Len()
+       for ; i <= len(a)-stride; i += stride {
+               va := simd.LoadFloat64x4FromSlice(a[i:])
+               vb := simd.LoadFloat64x4FromSlice(b[i:])
+               sum = FMA(sum, va, vb)
+       }
+       var tmp [4]float64
+       sum.Store(tmp[:])
+       return tmp[0] + tmp[1] + tmp[2] + tmp[3]
+}
+
+//go:noinline
+func FMA(a, b, c simd.Float64x4) simd.Float64x4 {
+       return a.Add(b.Mul(c))
+}
+
+func ip64_2(a, b []float64) float64 {
+       var z S2
+       sum := z
+       var i int
+       stride := z.Len()
+       for ; i <= len(a)-stride; i += stride {
+               va := z.Load(a[i:])
+               vb := z.Load(b[i:])
+               sum = sum.Add(va.Mul(vb))
+       }
+       var tmp [4]float64
+       sum.Store(tmp[:])
+       return tmp[0] + tmp[1] + tmp[2] + tmp[3]
+}
+
+func ip64_3(a, b []float64) float64 {
+       var z S3
+       sum := z
+       var i int
+       stride := z.Len()
+       for ; i <= len(a)-stride; i += stride {
+               va := simd.LoadFloat64x4FromSlice(a[i:])
+               vb := simd.LoadFloat64x4FromSlice(b[i:])
+               sum = S3{sum.Add(va.Mul(vb))}
+       }
+       var tmp [4]float64
+       sum.Store(tmp[:])
+       return tmp[0] + tmp[1] + tmp[2] + tmp[3]
+}
+
+func main() {
+       a := []float64{1, 2, 3, 4, 5, 6, 7, 8}
+       ip0 := ip64_0(a, a)
+       ip1 := ip64_1(a, a)
+       ip1a := ip64_1a(a, a)
+       ip2 := ip64_2(a, a)
+       ip3 := ip64_3(a, a)
+       fmt.Printf("Test IP    = %f\n", ip0)
+       fmt.Printf("SIMD IP 1  = %f\n", ip1)
+       fmt.Printf("SIMD IP 1a = %f\n", ip1a)
+       fmt.Printf("SIMD IP 2  = %f\n", ip2)
+       fmt.Printf("SIMD IP 3 = %f\n", ip3)
+       var z1 S1
+       var z2 S2
+       var z3 S2
+
+       s1, s2, s3 := unsafe.Sizeof(z1), unsafe.Sizeof(z2), unsafe.Sizeof(z3)
+
+       fmt.Printf("unsafe.Sizeof(z1, z2, z3)=%d, %d, %d\n", s1, s2, s3)
+
+       fail := false
+
+       if s1 != 32 || s2 != 32 || s3 != 32 {
+               fmt.Println("Failed a sizeof check, should all be 32")
+               fail = true
+       }
+
+       if ip1 != ip0 || ip1a != ip0 || ip2 != ip0 || ip3 != ip0 {
+               fmt.Println("Failed an inner product check, should all be", ip0)
+               fail = true
+       }
+
+       if fail {
+               os.Exit(1)
+       }
+}