}
if aux != "" {
-
if !isVariable(aux) {
// code
fmt.Fprintf(w, "if %s.Aux != %s {\nbreak\n}\n", v, aux)
}
}
+ // Access last argument first to minimize bounds checks.
if n := len(args); n > 1 {
- fmt.Fprintf(w, "_ = %s.Args[%d]\n", v, n-1) // combine some bounds checks
+ a := args[n-1]
+ if _, set := m[a]; !set && a != "_" && isVariable(a) {
+ m[a] = struct{}{}
+ fmt.Fprintf(w, "%s := %s.Args[%d]\n", a, v, n-1)
+
+ // delete the last argument so it is not reprocessed
+ args = args[:n-1]
+ } else {
+ fmt.Fprintf(w, "_ = %s.Args[%d]\n", v, n-1)
+ }
}
for i, arg := range args {
if arg == "_" {
// cond:
// result: (ADCLconst [c] x f)
for {
- _ = v.Args[2]
+ f := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVLconst {
break
}
c := v_1.AuxInt
- f := v.Args[2]
v.reset(Op386ADCLconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCLconst [c] x f)
for {
- _ = v.Args[2]
+ f := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386MOVLconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- f := v.Args[2]
v.reset(Op386ADCLconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCLconst [c] x f)
for {
- _ = v.Args[2]
+ f := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386MOVLconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- f := v.Args[2]
v.reset(Op386ADCLconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCLconst [c] x f)
for {
- _ = v.Args[2]
+ f := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVLconst {
break
}
c := v_1.AuxInt
- f := v.Args[2]
v.reset(Op386ADCLconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADDLconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(Op386ADDLconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (LEAL8 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386SHLLconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(Op386LEAL8)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (LEAL4 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386SHLLconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(Op386LEAL4)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (LEAL2 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386SHLLconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(Op386LEAL2)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != Op386ADDL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
- if y != v_1.Args[1] {
+ y := v_1.Args[1]
+ if y != v_1.Args[0] {
break
}
v.reset(Op386LEAL2)
// cond:
// result: (LEAL2 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
- if y != v_0.Args[1] {
+ y := v_0.Args[1]
+ if y != v_0.Args[0] {
break
}
- x := v.Args[1]
v.reset(Op386LEAL2)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != Op386ADDL {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(Op386LEAL2)
v.AddArg(y)
v.AddArg(x)
// cond:
// result: (LEAL2 y x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(Op386LEAL2)
// cond:
// result: (LEAL2 y x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(Op386LEAL2)
// cond:
// result: (LEAL1 [c] x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
c := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
v.reset(Op386LEAL1)
v.AuxInt = c
v.AddArg(x)
// cond: x.Op != OpSB && y.Op != OpSB
// result: (LEAL1 [c] {s} x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
c := v_0.AuxInt
s := v_0.Aux
y := v_0.Args[0]
- x := v.Args[1]
if !(x.Op != OpSB && y.Op != OpSB) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ADDLload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVLload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[2]
+ mem := l.Args[2]
ptr := l.Args[0]
idx := l.Args[1]
- mem := l.Args[2]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ADDLloadidx4 x [off] {sym} ptr idx mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVLloadidx4 {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[2]
+ mem := l.Args[2]
ptr := l.Args[0]
idx := l.Args[1]
- mem := l.Args[2]
- x := v.Args[1]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond:
// result: (SUBL x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386NEGL {
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(Op386SUBL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDLconstcarry [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(Op386ADDLconstcarry)
v.AuxInt = c
v.AddArg(x)
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(Op386LEAL1)
v.AuxInt = c
v.AddArg(x)
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(c + d)) {
break
}
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(c + d)) {
break
}
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(c + d)) {
break
}
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(c + d)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
base := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(ValAndOff(valoff1).canAdd(off2 * 4)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL4 {
}
off2 := v_1.AuxInt
sym2 := v_1.Aux
- _ = v_1.Args[1]
- ptr := v_1.Args[0]
idx := v_1.Args[1]
- mem := v.Args[2]
+ ptr := v_1.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
off2 := v_1.AuxInt
base := v_1.Args[0]
idx := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
base := v.Args[1]
v_2 := v.Args[2]
}
off2 := v_2.AuxInt
idx := v_2.Args[0]
- mem := v.Args[3]
if !(is32Bit(off1 + off2*4)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
sym2 := v_1.Aux
base := v_1.Args[0]
idx := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
base := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
base := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
off2 := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2*4)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
base := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- mem := v.Args[3]
if !(validValAndOff(c, off)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)
// result: (ADDSDload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVSDload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)
// result: (ADDSSload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVSSload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (ANDLconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(Op386ANDLconst)
v.AuxInt = c
v.AddArg(x)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ANDLload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVLload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[2]
+ mem := l.Args[2]
ptr := l.Args[0]
idx := l.Args[1]
- mem := l.Args[2]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ANDLloadidx4 x [off] {sym} ptr idx mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVLloadidx4 {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[2]
+ mem := l.Args[2]
ptr := l.Args[0]
idx := l.Args[1]
- mem := l.Args[2]
- x := v.Args[1]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
base := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(ValAndOff(valoff1).canAdd(off2 * 4)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL4 {
}
off2 := v_1.AuxInt
sym2 := v_1.Aux
- _ = v_1.Args[1]
- ptr := v_1.Args[0]
idx := v_1.Args[1]
- mem := v.Args[2]
+ ptr := v_1.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
off2 := v_1.AuxInt
base := v_1.Args[0]
idx := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
base := v.Args[1]
v_2 := v.Args[2]
}
off2 := v_2.AuxInt
idx := v_2.Args[0]
- mem := v.Args[3]
if !(is32Bit(off1 + off2*4)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
sym2 := v_1.Aux
base := v_1.Args[0]
idx := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
base := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
base := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
off2 := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2*4)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
base := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- mem := v.Args[3]
if !(validValAndOff(c, off)) {
break
}
// cond:
// result: (InvertFlags (CMPBconst x [int64(int8(c))]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(Op386InvertFlags)
v0 := b.NewValue0(v.Pos, Op386CMPBconst, types.TypeFlags)
v0.AuxInt = int64(int8(c))
// cond: canMergeLoad(v, l) && clobber(l)
// result: (CMPBload {sym} [off] ptr x mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVBload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
if l.Op != Op386ANDL {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(l.Uses == 1 && validValAndOff(c, off) && clobber(l)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVLconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validValAndOff(int64(int8(c)), off)) {
break
}
// cond:
// result: (InvertFlags (CMPLconst x [c]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(Op386InvertFlags)
v0 := b.NewValue0(v.Pos, Op386CMPLconst, types.TypeFlags)
v0.AuxInt = c
// cond: canMergeLoad(v, l) && clobber(l)
// result: (CMPLload {sym} [off] ptr x mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVLload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
if l.Op != Op386ANDL {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(l.Uses == 1 && validValAndOff(c, off) && clobber(l)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVLconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validValAndOff(int64(int32(c)), off)) {
break
}
// cond:
// result: (InvertFlags (CMPWconst x [int64(int16(c))]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(Op386InvertFlags)
v0 := b.NewValue0(v.Pos, Op386CMPWconst, types.TypeFlags)
v0.AuxInt = int64(int16(c))
// cond: canMergeLoad(v, l) && clobber(l)
// result: (CMPWload {sym} [off] ptr x mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVWload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
if l.Op != Op386ANDL {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(l.Uses == 1 && validValAndOff(c, off) && clobber(l)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVLconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validValAndOff(int64(int16(c)), off)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(x.Op != OpSB && y.Op != OpSB) {
break
}
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(c+d) && x.Op != OpSB) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386SHLLconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(Op386LEAL2)
v.AuxInt = c
v.Aux = s
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386SHLLconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(Op386LEAL4)
v.AuxInt = c
v.Aux = s
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386SHLLconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(Op386LEAL8)
v.AuxInt = c
v.Aux = s
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(c+d) && x.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(c+d) && x.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(c+d) && x.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVBloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVBloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVBloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVBloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVBLSX {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVBLZX {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVLconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validOff(off)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(sc).canAdd(off)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
x := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
v.reset(Op386MOVBstoreconstidx1)
v.AuxInt = x
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
c := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVBstoreconstidx1)
v.AuxInt = ValAndOff(x).add(c)
v.Aux = sym
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVBstoreconstidx1)
v.AuxInt = ValAndOff(x).add(c)
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if i != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVBstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
d := v_1.AuxInt
ptr := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVBstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVBstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVBstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL4 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386SHLLconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVLloadidx4)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386SHLLconst {
break
}
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVLloadidx4)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVLloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVLloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVLloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVLloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVLloadidx4)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVLloadidx4)
v.AuxInt = int64(int32(c + 4*d))
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVLconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validOff(off)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL4 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386ADDLload {
if ptr != y.Args[1] {
break
}
- mem := y.Args[2]
- if mem != v.Args[2] {
+ if mem != y.Args[2] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386ANDLload {
if ptr != y.Args[1] {
break
}
- mem := y.Args[2]
- if mem != v.Args[2] {
+ if mem != y.Args[2] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386ORLload {
if ptr != y.Args[1] {
break
}
- mem := y.Args[2]
- if mem != v.Args[2] {
+ if mem != y.Args[2] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386XORLload {
if ptr != y.Args[1] {
break
}
- mem := y.Args[2]
- if mem != v.Args[2] {
+ if mem != y.Args[2] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386ADDL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != Op386MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386ADDL {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386SUBL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != Op386MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386ANDL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != Op386MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386ANDL {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386ORL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != Op386MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386ORL {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386XORL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != Op386MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386XORL {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386ADDLconst {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386ANDLconst {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386ORLconst {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != Op386XORLconst {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) {
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(sc).canAdd(off)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
x := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
x := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL4 {
break
}
off := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
v.reset(Op386MOVLstoreconstidx1)
v.AuxInt = x
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386SHLLconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVLstoreconstidx4)
v.AuxInt = c
v.Aux = sym
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
c := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVLstoreconstidx1)
v.AuxInt = ValAndOff(x).add(c)
v.Aux = sym
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVLstoreconstidx1)
v.AuxInt = ValAndOff(x).add(c)
v.Aux = sym
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
c := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVLstoreconstidx4)
v.AuxInt = ValAndOff(x).add(c)
v.Aux = sym
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVLstoreconstidx4)
v.AuxInt = ValAndOff(x).add(4 * c)
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386SHLLconst {
}
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVLstoreidx4)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386SHLLconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVLstoreidx4)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVLstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
d := v_1.AuxInt
ptr := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVLstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVLstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVLstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVLstoreidx4)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVLstoreidx4)
v.AuxInt = int64(int32(c + 4*d))
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if idx != y.Args[2] {
break
}
- mem := y.Args[3]
- if mem != v.Args[3] {
+ if mem != y.Args[3] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if idx != y.Args[2] {
break
}
- mem := y.Args[3]
- if mem != v.Args[3] {
+ if mem != y.Args[3] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if idx != y.Args[2] {
break
}
- mem := y.Args[3]
- if mem != v.Args[3] {
+ if mem != y.Args[3] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if idx != y.Args[2] {
break
}
- mem := y.Args[3]
- if mem != v.Args[3] {
+ if mem != y.Args[3] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if y.Op != Op386ADDL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != Op386MOVLloadidx4 {
break
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- x := y.Args[1]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if y.Op != Op386SUBL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != Op386MOVLloadidx4 {
break
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- x := y.Args[1]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if y.Op != Op386ANDL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != Op386MOVLloadidx4 {
break
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- x := y.Args[1]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if y.Op != Op386ORL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != Op386MOVLloadidx4 {
break
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- x := y.Args[1]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if y.Op != Op386XORL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != Op386MOVLloadidx4 {
break
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- x := y.Args[1]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
y := v.Args[2]
if idx != l.Args[1] {
break
}
- mem := l.Args[2]
- if mem != v.Args[3] {
+ if mem != l.Args[2] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l) && validValAndOff(c, off)) {
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL8 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVSDloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVSDloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVSDloadidx8)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVSDloadidx8)
v.AuxInt = int64(int32(c + 8*d))
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL8 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVSDstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVSDstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVSDstoreidx8)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVSDstoreidx8)
v.AuxInt = int64(int32(c + 8*d))
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL4 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVSSloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVSSloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVSSloadidx4)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVSSloadidx4)
v.AuxInt = int64(int32(c + 4*d))
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL4 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVSSstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVSSstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVSSstoreidx4)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVSSstoreidx4)
v.AuxInt = int64(int32(c + 4*d))
v.Aux = sym
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL2 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386SHLLconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVWloadidx2)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386SHLLconst {
break
}
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVWloadidx2)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVWloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVWloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVWloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVWloadidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVWloadidx2)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVWloadidx2)
v.AuxInt = int64(int32(c + 2*d))
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVWLSX {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVWstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVWLZX {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVWstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVLconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validOff(off)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL2 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(sc).canAdd(off)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
x := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL1 {
break
}
off := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
x := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL2 {
break
}
off := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDL {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
v.reset(Op386MOVWstoreconstidx1)
v.AuxInt = x
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386SHLLconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVWstoreconstidx2)
v.AuxInt = c
v.Aux = sym
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
c := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVWstoreconstidx1)
v.AuxInt = ValAndOff(x).add(c)
v.Aux = sym
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVWstoreconstidx1)
v.AuxInt = ValAndOff(x).add(c)
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if i != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
c := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVWstoreconstidx2)
v.AuxInt = ValAndOff(x).add(c)
v.Aux = sym
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(Op386MOVWstoreconstidx2)
v.AuxInt = ValAndOff(x).add(2 * c)
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if i != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386SHLLconst {
}
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVWstoreidx2)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386SHLLconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVWstoreidx2)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVWstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
d := v_1.AuxInt
ptr := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVWstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVWstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVWstoreidx1)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVWstoreidx2)
v.AuxInt = int64(int32(c + d))
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(Op386MOVWstoreidx2)
v.AuxInt = int64(int32(c + 2*d))
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
// cond:
// result: (MULLconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(Op386MULLconst)
v.AuxInt = c
v.AddArg(x)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (MULLload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVLload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[2]
+ mem := l.Args[2]
ptr := l.Args[0]
idx := l.Args[1]
- mem := l.Args[2]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (MULLloadidx4 x [off] {sym} ptr idx mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVLloadidx4 {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[2]
+ mem := l.Args[2]
ptr := l.Args[0]
idx := l.Args[1]
- mem := l.Args[2]
- x := v.Args[1]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL4 {
}
off2 := v_1.AuxInt
sym2 := v_1.Aux
- _ = v_1.Args[1]
- ptr := v_1.Args[0]
idx := v_1.Args[1]
- mem := v.Args[2]
+ ptr := v_1.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
off2 := v_1.AuxInt
base := v_1.Args[0]
idx := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
base := v.Args[1]
v_2 := v.Args[2]
}
off2 := v_2.AuxInt
idx := v_2.Args[0]
- mem := v.Args[3]
if !(is32Bit(off1 + off2*4)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
sym2 := v_1.Aux
base := v_1.Args[0]
idx := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)
// result: (MULSDload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVSDload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)
// result: (MULSSload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVSSload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (ORLconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(Op386ORLconst)
v.AuxInt = c
v.AddArg(x)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ORLload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVLload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[2]
+ mem := l.Args[2]
ptr := l.Args[0]
idx := l.Args[1]
- mem := l.Args[2]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ORLloadidx4 x [off] {sym} ptr idx mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVLloadidx4 {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[2]
+ mem := l.Args[2]
ptr := l.Args[0]
idx := l.Args[1]
- mem := l.Args[2]
- x := v.Args[1]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s0 := v.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := v.Args[1]
if x0.Op != Op386MOVBload {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s0 := o0.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := o0.Args[1]
if x0.Op != Op386MOVWload {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s0 := v.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s0 := v.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s0 := v.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s0 := v.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != Op386MOVBloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != Op386MOVBloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != Op386MOVBloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != Op386MOVBloadidx1 {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s0 := o0.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s0 := o0.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s0 := o0.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s0 := o0.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := o0.Args[1]
if x0.Op != Op386MOVWloadidx1 {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := o0.Args[1]
if x0.Op != Op386MOVWloadidx1 {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := o0.Args[1]
if x0.Op != Op386MOVWloadidx1 {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := o0.Args[1]
if x0.Op != Op386MOVWloadidx1 {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s0 := o0.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s0 := o0.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s0 := o0.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s0 := o0.Args[1]
if s0.Op != Op386SHLLconst {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := o0.Args[1]
if x0.Op != Op386MOVWloadidx1 {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := o0.Args[1]
if x0.Op != Op386MOVWloadidx1 {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := o0.Args[1]
if x0.Op != Op386MOVWloadidx1 {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := o0.Args[1]
if x0.Op != Op386MOVWloadidx1 {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
p := x2.Args[0]
idx := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
idx := x2.Args[0]
p := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
p := x2.Args[0]
idx := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
idx := x2.Args[0]
p := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
p := x2.Args[0]
idx := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
idx := x2.Args[0]
p := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
p := x2.Args[0]
idx := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
idx := x2.Args[0]
p := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
p := x2.Args[0]
idx := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
idx := x2.Args[0]
p := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
p := x2.Args[0]
idx := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
idx := x2.Args[0]
p := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
p := x2.Args[0]
idx := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
idx := x2.Args[0]
p := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
p := x2.Args[0]
idx := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[2]
+ mem := x2.Args[2]
idx := x2.Args[0]
p := x2.Args[1]
- mem := x2.Args[2]
o0 := v.Args[1]
if o0.Op != Op386ORL {
break
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
base := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(ValAndOff(valoff1).canAdd(off2 * 4)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL4 {
}
off2 := v_1.AuxInt
sym2 := v_1.Aux
- _ = v_1.Args[1]
- ptr := v_1.Args[0]
idx := v_1.Args[1]
- mem := v.Args[2]
+ ptr := v_1.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
off2 := v_1.AuxInt
base := v_1.Args[0]
idx := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
base := v.Args[1]
v_2 := v.Args[2]
}
off2 := v_2.AuxInt
idx := v_2.Args[0]
- mem := v.Args[3]
if !(is32Bit(off1 + off2*4)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
sym2 := v_1.Aux
base := v_1.Args[0]
idx := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
base := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
base := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
off2 := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2*4)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
base := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- mem := v.Args[3]
if !(validValAndOff(c, off)) {
break
}
// cond:
// result: (SBBLconst [c] x f)
for {
- _ = v.Args[2]
+ f := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386MOVLconst {
break
}
c := v_1.AuxInt
- f := v.Args[2]
v.reset(Op386SBBLconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (NEGL (SUBLconst <v.Type> x [c]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(Op386NEGL)
v0 := b.NewValue0(v.Pos, Op386SUBLconst, v.Type)
v0.AuxInt = c
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[2]
+ mem := l.Args[2]
ptr := l.Args[0]
idx := l.Args[1]
- mem := l.Args[2]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond:
// result: (MOVLconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(Op386MOVLconst)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL4 {
}
off2 := v_1.AuxInt
sym2 := v_1.Aux
- _ = v_1.Args[1]
- ptr := v_1.Args[0]
idx := v_1.Args[1]
- mem := v.Args[2]
+ ptr := v_1.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
off2 := v_1.AuxInt
base := v_1.Args[0]
idx := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
base := v.Args[1]
v_2 := v.Args[2]
}
off2 := v_2.AuxInt
idx := v_2.Args[0]
- mem := v.Args[3]
if !(is32Bit(off1 + off2*4)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
sym2 := v_1.Aux
base := v_1.Args[0]
idx := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
base := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
base := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
off2 := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2*4)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
base := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- mem := v.Args[3]
if !(validValAndOff(-c, off)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && !config.use387 && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (XORLconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(Op386XORLconst)
v.AuxInt = c
v.AddArg(x)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (XORLload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVLload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[2]
+ mem := l.Args[2]
ptr := l.Args[0]
idx := l.Args[1]
- mem := l.Args[2]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (XORLloadidx4 x [off] {sym} ptr idx mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != Op386MOVLloadidx4 {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[2]
+ mem := l.Args[2]
ptr := l.Args[0]
idx := l.Args[1]
- mem := l.Args[2]
- x := v.Args[1]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond:
// result: (MOVLconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(Op386MOVLconst)
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
base := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(ValAndOff(valoff1).canAdd(off2 * 4)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL4 {
}
off2 := v_1.AuxInt
sym2 := v_1.Aux
- _ = v_1.Args[1]
- ptr := v_1.Args[0]
idx := v_1.Args[1]
- mem := v.Args[2]
+ ptr := v_1.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
off2 := v_1.AuxInt
base := v_1.Args[0]
idx := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
base := v.Args[1]
v_2 := v.Args[2]
}
off2 := v_2.AuxInt
idx := v_2.Args[0]
- mem := v.Args[3]
if !(is32Bit(off1 + off2*4)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386LEAL {
sym2 := v_1.Aux
base := v_1.Args[0]
idx := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386ADDLconst {
break
base := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
base := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != Op386ADDLconst {
off2 := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2*4)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != Op386LEAL {
break
base := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- mem := v.Args[3]
if !(validValAndOff(c, off)) {
break
}
// cond:
// result: (ADDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ADDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ADDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDSS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ADDSS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDLcarry x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ADDLcarry)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADCL x y c)
for {
- _ = v.Args[2]
+ c := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- c := v.Args[2]
v.reset(Op386ADCL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDSD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ADDSD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ADDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ADDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AVGLU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386AVGLU)
v.AddArg(x)
v.AddArg(y)
// result: (CALLclosure [argwid] entry closure mem)
for {
argwid := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
entry := v.Args[0]
closure := v.Args[1]
- mem := v.Args[2]
v.reset(Op386CALLclosure)
v.AuxInt = argwid
v.AddArg(entry)
// result: (DIVW [a] x y)
for {
a := v.AuxInt
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386DIVW)
v.AuxInt = a
v.AddArg(x)
// cond:
// result: (DIVWU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386DIVWU)
v.AddArg(x)
v.AddArg(y)
// result: (DIVL [a] x y)
for {
a := v.AuxInt
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386DIVL)
v.AuxInt = a
v.AddArg(x)
// cond:
// result: (DIVSS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386DIVSS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (DIVLU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386DIVLU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (DIVSD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386DIVSD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (DIVW (SignExt8to16 x) (SignExt8to16 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386DIVW)
v0 := b.NewValue0(v.Pos, OpSignExt8to16, typ.Int16)
v0.AddArg(x)
// cond:
// result: (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386DIVWU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to16, typ.UInt16)
v0.AddArg(x)
// cond:
// result: (SETEQ (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETEQ)
v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETEQ (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETEQ)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETEQF (UCOMISS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETEQF)
v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETEQF (UCOMISD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETEQF)
v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETEQ (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETEQ)
v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETEQ (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETEQ)
v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETEQ (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETEQ)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGE (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETGE)
v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETAE (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETAE)
v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGE (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETGE)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGEF (UCOMISS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETGEF)
v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETAE (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETAE)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGEF (UCOMISD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETGEF)
v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGE (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETGE)
v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETAE (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETAE)
v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETG (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETG)
v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETA (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETA)
v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETG (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETG)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGF (UCOMISS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETGF)
v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETA (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETA)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGF (UCOMISD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETGF)
v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETG (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETG)
v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETA (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETA)
v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (HMULL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386HMULL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (HMULLU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386HMULLU)
v.AddArg(x)
v.AddArg(y)
// result: (CALLinter [argwid] entry mem)
for {
argwid := v.AuxInt
- _ = v.Args[1]
- entry := v.Args[0]
mem := v.Args[1]
+ entry := v.Args[0]
v.reset(Op386CALLinter)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (SETB (CMPL idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(Op386SETB)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(idx)
// cond:
// result: (SETBE (CMPL idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(Op386SETBE)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(idx)
// cond:
// result: (SETLE (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETLE)
v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETBE (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETBE)
v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETLE (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETLE)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGEF (UCOMISS y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETGEF)
v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (SETBE (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETBE)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGEF (UCOMISD y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETGEF)
v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (SETLE (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETLE)
v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETBE (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETBE)
v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETL (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETL)
v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETB (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETB)
v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETL (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETL)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGF (UCOMISS y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETGF)
v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (SETB (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETB)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGF (UCOMISD y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETGF)
v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (SETL (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETL)
v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETB (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETB)
v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
v0.AddArg(x)
// result: (MOVLload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitInt(t) || isPtr(t)) {
break
}
// result: (MOVWload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t)) {
break
}
// result: (MOVBload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsBoolean() || is8BitInt(t)) {
break
}
// result: (MOVSSload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitFloat(t)) {
break
}
// result: (MOVSDload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitFloat(t)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHLL, t)
v0.AddArg(x)
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHLL, t)
v0.AddArg(x)
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHLL, t)
v0.AddArg(x)
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHLL, t)
v0.AddArg(x)
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHLL, t)
v0.AddArg(x)
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHLL, t)
v0.AddArg(x)
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHLL, t)
v0.AddArg(x)
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHLL, t)
v0.AddArg(x)
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHLL, t)
v0.AddArg(x)
// cond:
// result: (MODW [a] x y)
for {
- a := v.AuxInt
- _ = v.Args[1]
- x := v.Args[0]
+ a := v.AuxInt
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386MODW)
v.AuxInt = a
v.AddArg(x)
// cond:
// result: (MODWU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386MODWU)
v.AddArg(x)
v.AddArg(y)
// result: (MODL [a] x y)
for {
a := v.AuxInt
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386MODL)
v.AuxInt = a
v.AddArg(x)
// cond:
// result: (MODLU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386MODLU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MODW (SignExt8to16 x) (SignExt8to16 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386MODW)
v0 := b.NewValue0(v.Pos, OpSignExt8to16, typ.Int16)
v0.AddArg(x)
// cond:
// result: (MODWU (ZeroExt8to16 x) (ZeroExt8to16 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386MODWU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to16, typ.UInt16)
v0.AddArg(x)
if v.AuxInt != 0 {
break
}
- _ = v.Args[2]
mem := v.Args[2]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVBstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, Op386MOVBload, typ.UInt8)
if v.AuxInt != 2 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVWstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, Op386MOVWload, typ.UInt16)
if v.AuxInt != 4 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVLstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, Op386MOVLload, typ.UInt32)
if v.AuxInt != 3 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVBstore)
v.AuxInt = 2
v.AddArg(dst)
if v.AuxInt != 5 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVBstore)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 6 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVWstore)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 7 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVLstore)
v.AuxInt = 3
v.AddArg(dst)
if v.AuxInt != 8 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(Op386MOVLstore)
v.AuxInt = 4
v.AddArg(dst)
// result: (Move [s-s%4] (ADDLconst <dst.Type> dst [s%4]) (ADDLconst <src.Type> src [s%4]) (MOVLstore dst (MOVLload src mem) mem))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 8 && s%4 != 0) {
break
}
// result: (DUFFCOPY [10*(128-s/4)] dst src mem)
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 8 && s <= 4*128 && s%4 == 0 && !config.noDuffDevice) {
break
}
// result: (REPMOVSL dst src (MOVLconst [s/4]) mem)
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !((s > 4*128 || config.noDuffDevice) && s%4 == 0) {
break
}
// cond:
// result: (MULL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386MULL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386MULL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULSS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386MULSS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULLQU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386MULLQU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULSD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386MULSD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386MULL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SETNE (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETNE)
v0 := b.NewValue0(v.Pos, Op386CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETNE (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETNE)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETNEF (UCOMISS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETNEF)
v0 := b.NewValue0(v.Pos, Op386UCOMISS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETNEF (UCOMISD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETNEF)
v0 := b.NewValue0(v.Pos, Op386UCOMISD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETNE (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETNE)
v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETNE (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETNE)
v0 := b.NewValue0(v.Pos, Op386CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETNE (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SETNE)
v0 := b.NewValue0(v.Pos, Op386CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LoweredNilCheck ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(Op386LoweredNilCheck)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (ORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ORL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ORL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ORL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ORL)
v.AddArg(x)
v.AddArg(y)
// result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPWconst y [16])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHRW, t)
v0.AddArg(x)
// result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPLconst y [16])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHRW, t)
v0.AddArg(x)
// result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPBconst y [16])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHRW, t)
v0.AddArg(x)
// result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [16])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SARW)
v.Type = t
v.AddArg(x)
// result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [16])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SARW)
v.Type = t
v.AddArg(x)
// result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [16])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SARW)
v.Type = t
v.AddArg(x)
// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHRL, t)
v0.AddArg(x)
// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHRL, t)
v0.AddArg(x)
// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHRL, t)
v0.AddArg(x)
// result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [32])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SARL)
v.Type = t
v.AddArg(x)
// result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [32])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SARL)
v.Type = t
v.AddArg(x)
// result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [32])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SARL)
v.Type = t
v.AddArg(x)
// result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPWconst y [8])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHRB, t)
v0.AddArg(x)
// result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPLconst y [8])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHRB, t)
v0.AddArg(x)
// result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPBconst y [8])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386ANDL)
v0 := b.NewValue0(v.Pos, Op386SHRB, t)
v0.AddArg(x)
// result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [8])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SARB)
v.Type = t
v.AddArg(x)
// result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [8])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SARB)
v.Type = t
v.AddArg(x)
// result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [8])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SARB)
v.Type = t
v.AddArg(x)
if v_0.Op != OpMul32uover {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpSelect0)
v.Type = typ.UInt32
v0 := b.NewValue0(v.Pos, Op386MULLU, types.NewTuple(typ.UInt32, types.TypeFlags))
if v_0.Op != OpMul32uover {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(Op386SETO)
v0 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
v1 := b.NewValue0(v.Pos, Op386MULLU, types.NewTuple(typ.UInt32, types.TypeFlags))
// result: (MOVSDstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
break
}
// result: (MOVSSstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
break
}
// result: (MOVLstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4) {
break
}
// result: (MOVWstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 2) {
break
}
// result: (MOVBstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 1) {
break
}
// cond:
// result: (SUBL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SUBL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SUBL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBSS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SUBSS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBLcarry x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SUBLcarry)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SBBL x y c)
for {
- _ = v.Args[2]
+ c := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- c := v.Args[2]
v.reset(Op386SBBL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBSD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SUBSD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SUBL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386SUBL)
v.AddArg(x)
v.AddArg(y)
// result: (LoweredWB {fn} destptr srcptr mem)
for {
fn := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
destptr := v.Args[0]
srcptr := v.Args[1]
- mem := v.Args[2]
v.reset(Op386LoweredWB)
v.Aux = fn
v.AddArg(destptr)
// cond:
// result: (XORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386XORL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386XORL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(Op386XORL)
v.AddArg(x)
v.AddArg(y)
if v.AuxInt != 0 {
break
}
- _ = v.Args[1]
mem := v.Args[1]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(Op386MOVBstoreconst)
v.AuxInt = 0
v.AddArg(destptr)
if v.AuxInt != 2 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(Op386MOVWstoreconst)
v.AuxInt = 0
v.AddArg(destptr)
if v.AuxInt != 4 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(Op386MOVLstoreconst)
v.AuxInt = 0
v.AddArg(destptr)
if v.AuxInt != 3 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(Op386MOVBstoreconst)
v.AuxInt = makeValAndOff(0, 2)
v.AddArg(destptr)
if v.AuxInt != 5 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(Op386MOVBstoreconst)
v.AuxInt = makeValAndOff(0, 4)
v.AddArg(destptr)
if v.AuxInt != 6 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(Op386MOVWstoreconst)
v.AuxInt = makeValAndOff(0, 4)
v.AddArg(destptr)
if v.AuxInt != 7 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(Op386MOVLstoreconst)
v.AuxInt = makeValAndOff(0, 3)
v.AddArg(destptr)
// result: (Zero [s-s%4] (ADDLconst destptr [s%4]) (MOVLstoreconst [0] destptr mem))
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(s%4 != 0 && s > 4) {
break
}
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(Op386MOVLstoreconst)
v.AuxInt = makeValAndOff(0, 4)
v.AddArg(destptr)
if v.AuxInt != 12 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(Op386MOVLstoreconst)
v.AuxInt = makeValAndOff(0, 8)
v.AddArg(destptr)
if v.AuxInt != 16 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(Op386MOVLstoreconst)
v.AuxInt = makeValAndOff(0, 12)
v.AddArg(destptr)
// result: (DUFFZERO [1*(128-s/4)] destptr (MOVLconst [0]) mem)
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(s > 16 && s <= 4*128 && s%4 == 0 && !config.noDuffDevice) {
break
}
// result: (REPSTOSL destptr (MOVLconst [s/4]) (MOVLconst [0]) mem)
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !((s > 4*128 || (config.noDuffDevice && s > 16)) && s%4 == 0) {
break
}
// cond: is32Bit(c)
// result: (ADCQconst x [c] carry)
for {
- _ = v.Args[2]
+ carry := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- carry := v.Args[2]
if !(is32Bit(c)) {
break
}
// cond: is32Bit(c)
// result: (ADCQconst x [c] carry)
for {
- _ = v.Args[2]
+ carry := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- carry := v.Args[2]
if !(is32Bit(c)) {
break
}
// cond:
// result: (ADDLconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpAMD64ADDLconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (LEAL8 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLLconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64LEAL8)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (LEAL4 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLLconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64LEAL4)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (LEAL2 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLLconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64LEAL2)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpAMD64ADDL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
- if y != v_1.Args[1] {
+ y := v_1.Args[1]
+ if y != v_1.Args[0] {
break
}
v.reset(OpAMD64LEAL2)
// cond:
// result: (LEAL2 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
- if y != v_0.Args[1] {
+ y := v_0.Args[1]
+ if y != v_0.Args[0] {
break
}
- x := v.Args[1]
v.reset(OpAMD64LEAL2)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpAMD64ADDL {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpAMD64LEAL2)
v.AddArg(y)
v.AddArg(x)
// cond:
// result: (LEAL2 y x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpAMD64LEAL2)
// cond:
// result: (LEAL2 y x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDL {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpAMD64LEAL2)
// cond:
// result: (LEAL1 [c] x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
c := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpAMD64LEAL1)
v.AuxInt = c
v.AddArg(x)
// cond: x.Op != OpSB && y.Op != OpSB
// result: (LEAL1 [c] {s} x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
c := v_0.AuxInt
s := v_0.Aux
y := v_0.Args[0]
- x := v.Args[1]
if !(x.Op != OpSB && y.Op != OpSB) {
break
}
// cond:
// result: (SUBL x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64NEGL {
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64SUBL)
v.AddArg(x)
v.AddArg(y)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ADDLload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVLload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
if v_0.Op != OpAMD64ADDL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpAMD64LEAL1)
v.AuxInt = c
v.AddArg(x)
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(c + d)) {
break
}
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(c + d)) {
break
}
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(c + d)) {
break
}
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(c + d)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
// cond: is32Bit(c)
// result: (ADDQconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond:
// result: (LEAQ8 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64LEAQ8)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (LEAQ4 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64LEAQ4)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (LEAQ2 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64LEAQ2)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpAMD64ADDQ {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
- if y != v_1.Args[1] {
+ y := v_1.Args[1]
+ if y != v_1.Args[0] {
break
}
v.reset(OpAMD64LEAQ2)
// cond:
// result: (LEAQ2 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
- if y != v_0.Args[1] {
+ y := v_0.Args[1]
+ if y != v_0.Args[0] {
break
}
- x := v.Args[1]
v.reset(OpAMD64LEAQ2)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpAMD64ADDQ {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpAMD64LEAQ2)
v.AddArg(y)
v.AddArg(x)
// cond:
// result: (LEAQ2 y x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpAMD64LEAQ2)
// cond:
// result: (LEAQ2 y x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpAMD64LEAQ2)
// cond:
// result: (LEAQ1 [c] x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
c := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpAMD64LEAQ1)
v.AuxInt = c
v.AddArg(x)
// cond: x.Op != OpSB && y.Op != OpSB
// result: (LEAQ1 [c] {s} x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
c := v_0.AuxInt
s := v_0.Aux
y := v_0.Args[0]
- x := v.Args[1]
if !(x.Op != OpSB && y.Op != OpSB) {
break
}
// cond:
// result: (SUBQ x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64NEGQ {
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64SUBQ)
v.AddArg(x)
v.AddArg(y)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ADDQload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVQload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: is32Bit(c)
// result: (ADDQconstcarry x [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpAMD64LEAQ1)
v.AuxInt = c
v.AddArg(x)
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(c + d)) {
break
}
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(c + d)) {
break
}
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(c + d)) {
break
}
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(c + d)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ADDSDload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVSDload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ADDSSload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVSSload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
// cond: !config.nacl
// result: (BTRL x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64NOTL {
break
if v_0_0.Op != OpAMD64SHLL {
break
}
- _ = v_0_0.Args[1]
+ y := v_0_0.Args[1]
v_0_0_0 := v_0_0.Args[0]
if v_0_0_0.Op != OpAMD64MOVLconst {
break
if v_0_0_0.AuxInt != 1 {
break
}
- y := v_0_0.Args[1]
- x := v.Args[1]
if !(!config.nacl) {
break
}
if v_1_0.Op != OpAMD64SHLL {
break
}
- _ = v_1_0.Args[1]
+ y := v_1_0.Args[1]
v_1_0_0 := v_1_0.Args[0]
if v_1_0_0.Op != OpAMD64MOVLconst {
break
if v_1_0_0.AuxInt != 1 {
break
}
- y := v_1_0.Args[1]
if !(!config.nacl) {
break
}
// cond: isUint32PowerOfTwo(^c) && uint64(^c) >= 128 && !config.nacl
// result: (BTRLconst [log2uint32(^c)] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isUint32PowerOfTwo(^c) && uint64(^c) >= 128 && !config.nacl) {
break
}
// cond:
// result: (ANDLconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpAMD64ANDLconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ANDLload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVLload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
// cond: !config.nacl
// result: (BTRQ x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64NOTQ {
break
if v_0_0.Op != OpAMD64SHLQ {
break
}
- _ = v_0_0.Args[1]
+ y := v_0_0.Args[1]
v_0_0_0 := v_0_0.Args[0]
if v_0_0_0.Op != OpAMD64MOVQconst {
break
if v_0_0_0.AuxInt != 1 {
break
}
- y := v_0_0.Args[1]
- x := v.Args[1]
if !(!config.nacl) {
break
}
if v_1_0.Op != OpAMD64SHLQ {
break
}
- _ = v_1_0.Args[1]
+ y := v_1_0.Args[1]
v_1_0_0 := v_1_0.Args[0]
if v_1_0_0.Op != OpAMD64MOVQconst {
break
if v_1_0_0.AuxInt != 1 {
break
}
- y := v_1_0.Args[1]
if !(!config.nacl) {
break
}
// cond: isUint64PowerOfTwo(^c) && uint64(^c) >= 128 && !config.nacl
// result: (BTRQconst [log2(^c)] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isUint64PowerOfTwo(^c) && uint64(^c) >= 128 && !config.nacl) {
break
}
// cond: is32Bit(c)
// result: (ANDQconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ANDQload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVQload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
if s.Op != OpAMD64SHRQ {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
v.reset(OpAMD64BTQ)
v.AddArg(y)
v.AddArg(x)
if s.Op != OpAMD64SHRL {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
v.reset(OpAMD64BTL)
v.AddArg(y)
v.AddArg(x)
if s.Op != OpAMD64SHRQ {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
v.reset(OpAMD64BTQ)
v.AddArg(y)
v.AddArg(x)
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
// cond:
// result: (InvertFlags (CMPBconst x [int64(int8(c))]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpAMD64InvertFlags)
v0 := b.NewValue0(v.Pos, OpAMD64CMPBconst, types.TypeFlags)
v0.AuxInt = int64(int8(c))
// cond: canMergeLoad(v, l) && clobber(l)
// result: (CMPBload {sym} [off] ptr x mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVBload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
if v_0.Op != OpAMD64ANDL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpAMD64TESTB)
v.AddArg(x)
v.AddArg(y)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(l.Uses == 1 && validValAndOff(c, off) && clobber(l)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVLconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validValAndOff(int64(int8(c)), off)) {
break
}
// cond:
// result: (InvertFlags (CMPLconst x [c]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpAMD64InvertFlags)
v0 := b.NewValue0(v.Pos, OpAMD64CMPLconst, types.TypeFlags)
v0.AuxInt = c
// cond: canMergeLoad(v, l) && clobber(l)
// result: (CMPLload {sym} [off] ptr x mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVLload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
if v_0.Op != OpAMD64ANDL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpAMD64TESTL)
v.AddArg(x)
v.AddArg(y)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(l.Uses == 1 && validValAndOff(c, off) && clobber(l)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVLconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validValAndOff(c, off)) {
break
}
// cond: is32Bit(c)
// result: (InvertFlags (CMPQconst x [c]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond: canMergeLoad(v, l) && clobber(l)
// result: (CMPQload {sym} [off] ptr x mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVQload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
if v_0.Op != OpAMD64ANDQ {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpAMD64TESTQ)
v.AddArg(x)
v.AddArg(y)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(l.Uses == 1 && validValAndOff(c, off) && clobber(l)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validValAndOff(c, off)) {
break
}
// cond:
// result: (InvertFlags (CMPWconst x [int64(int16(c))]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpAMD64InvertFlags)
v0 := b.NewValue0(v.Pos, OpAMD64CMPWconst, types.TypeFlags)
v0.AuxInt = int64(int16(c))
// cond: canMergeLoad(v, l) && clobber(l)
// result: (CMPWload {sym} [off] ptr x mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVWload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoad(v, l) && clobber(l)) {
break
}
if v_0.Op != OpAMD64ANDL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpAMD64TESTW)
v.AddArg(x)
v.AddArg(y)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(l.Uses == 1 && validValAndOff(c, off) && clobber(l)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVLconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validValAndOff(int64(int16(c)), off)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1 + off2)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
// cond: !x.rematerializeable() && y.rematerializeable()
// result: (HMULL y x)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!x.rematerializeable() && y.rematerializeable()) {
break
}
// cond: !x.rematerializeable() && y.rematerializeable()
// result: (HMULLU y x)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!x.rematerializeable() && y.rematerializeable()) {
break
}
// cond: !x.rematerializeable() && y.rematerializeable()
// result: (HMULQ y x)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!x.rematerializeable() && y.rematerializeable()) {
break
}
// cond: !x.rematerializeable() && y.rematerializeable()
// result: (HMULQU y x)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!x.rematerializeable() && y.rematerializeable()) {
break
}
if v_0.Op != OpAMD64ADDL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(x.Op != OpSB && y.Op != OpSB) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(c+d) && x.Op != OpSB) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLLconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64LEAL2)
v.AuxInt = c
v.Aux = s
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLLconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64LEAL4)
v.AuxInt = c
v.Aux = s
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLLconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64LEAL8)
v.AuxInt = c
v.Aux = s
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(c+d) && x.Op != OpSB) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(c+d) && x.Op != OpSB) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(c+d) && x.Op != OpSB) {
break
}
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(x.Op != OpSB && y.Op != OpSB) {
break
}
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(c+d) && x.Op != OpSB) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64LEAQ2)
v.AuxInt = c
v.Aux = s
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64LEAQ4)
v.AuxInt = c
v.Aux = s
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpAMD64LEAQ8)
v.AuxInt = c
v.Aux = s
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(c+d) && x.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(c+d) && x.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(c+d) && x.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(i + c)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
p := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(i + c)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64SETL {
break
}
x := y.Args[0]
- mem := v.Args[2]
if !(y.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64SETLE {
break
}
x := y.Args[0]
- mem := v.Args[2]
if !(y.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64SETG {
break
}
x := y.Args[0]
- mem := v.Args[2]
if !(y.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64SETGE {
break
}
x := y.Args[0]
- mem := v.Args[2]
if !(y.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64SETEQ {
break
}
x := y.Args[0]
- mem := v.Args[2]
if !(y.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64SETNE {
break
}
x := y.Args[0]
- mem := v.Args[2]
if !(y.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64SETB {
break
}
x := y.Args[0]
- mem := v.Args[2]
if !(y.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64SETBE {
break
}
x := y.Args[0]
- mem := v.Args[2]
if !(y.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64SETA {
break
}
x := y.Args[0]
- mem := v.Args[2]
if !(y.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64SETAE {
break
}
x := y.Args[0]
- mem := v.Args[2]
if !(y.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVBQSX {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVBQZX {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVLconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validOff(off)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validOff(off)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
if x0.Aux != s {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
if p != x0.Args[0] {
break
}
if w != x0_1.Args[0] {
break
}
- mem := x0.Args[2]
if !(x0.Uses == 1 && clobber(x0)) {
break
}
if x0.Aux != s {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
if p != x0.Args[0] {
break
}
if w != x0_1.Args[0] {
break
}
- mem := x0.Args[2]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)) {
break
}
if x0.Aux != s {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
if p != x0.Args[0] {
break
}
if w != x0_1.Args[0] {
break
}
- mem := x0.Args[2]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
j := x1.AuxInt
s2 := x1.Aux
- _ = x1.Args[1]
- p2 := x1.Args[0]
mem := x1.Args[1]
+ p2 := x1.Args[0]
mem2 := v.Args[2]
if mem2.Op != OpAMD64MOVBstore {
break
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(sc).canAdd(off)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
break
}
for {
x := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
v.reset(OpAMD64MOVBstoreconstidx1)
v.AuxInt = x
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
break
}
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(sc).canAdd(off)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
c := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(c)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(c)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if i != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
if x0.Aux != s {
break
}
- _ = x0.Args[3]
+ mem := x0.Args[3]
if p != x0.Args[0] {
break
}
if w != x0_2.Args[0] {
break
}
- mem := x0.Args[3]
if !(x0.Uses == 1 && clobber(x0)) {
break
}
if x0.Aux != s {
break
}
- _ = x0.Args[3]
+ mem := x0.Args[3]
if p != x0.Args[0] {
break
}
if w != x0_2.Args[0] {
break
}
- mem := x0.Args[3]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)) {
break
}
if x0.Aux != s {
break
}
- _ = x0.Args[3]
+ mem := x0.Args[3]
if p != x0.Args[0] {
break
}
if w != x0_2.Args[0] {
break
}
- mem := x0.Args[3]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
}
c := v_1.AuxInt
w := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(i + c)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ4 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ8 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVLloadidx4)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQconst {
break
}
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVLloadidx4)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVLloadidx8)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQconst {
break
}
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVLloadidx8)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(i + c)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
p := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(i + c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + 4*d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(i + 4*c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + 8*d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(i + 8*c)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVLQSX {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVLstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVLQZX {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVLstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVLconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validOff(off)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validOff(off)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ4 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ8 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
j := x1.AuxInt
s2 := x1.Aux
- _ = x1.Args[1]
- p2 := x1.Args[0]
mem := x1.Args[1]
+ p2 := x1.Args[0]
mem2 := v.Args[2]
if mem2.Op != OpAMD64MOVLstore {
break
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ADDLload {
if ptr != y.Args[1] {
break
}
- mem := y.Args[2]
- if mem != v.Args[2] {
+ if mem != y.Args[2] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ANDLload {
if ptr != y.Args[1] {
break
}
- mem := y.Args[2]
- if mem != v.Args[2] {
+ if mem != y.Args[2] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ORLload {
if ptr != y.Args[1] {
break
}
- mem := y.Args[2]
- if mem != v.Args[2] {
+ if mem != y.Args[2] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64XORLload {
if ptr != y.Args[1] {
break
}
- mem := y.Args[2]
- if mem != v.Args[2] {
+ if mem != y.Args[2] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ADDL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ADDL {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64SUBL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ANDL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ANDL {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ORL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ORL {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64XORL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64XORL {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64BTCL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64BTRL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64BTSL {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVLload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64ADDLconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64ANDLconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64ORLconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64XORLconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64BTCLconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64BTRLconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64BTSLconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVLf2i {
break
}
val := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVSSstore)
v.AuxInt = off
v.Aux = sym
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(sc).canAdd(off)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
break
}
for {
x := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
x := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ4 {
break
}
off := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
v.reset(OpAMD64MOVLstoreconstidx1)
v.AuxInt = x
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(x.Uses == 1 && ValAndOff(a).Off()+4 == ValAndOff(c).Off() && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(x.Uses == 1 && ValAndOff(a).Off()+4 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
break
}
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(sc).canAdd(off)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVLstoreconstidx4)
v.AuxInt = c
v.Aux = sym
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
c := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(c)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(c)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if i != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && ValAndOff(a).Off()+4 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
c := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(c)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(4 * c)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if i != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && ValAndOff(a).Off()+4 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
}
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpAMD64MOVLstoreidx4)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
}
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpAMD64MOVLstoreidx8)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
}
c := v_1.AuxInt
w := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(i + c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + 4*d)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
}
c := v_1.AuxInt
w := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(i + 4*c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + 8*d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
}
c := v_1.AuxInt
w := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(i + 8*c)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ8 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVQloadidx8)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQconst {
break
}
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVQloadidx8)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(i + c)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
p := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(i + c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + 8*d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(i + 8*c)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validValAndOff(c, off)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ8 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ADDQload {
if ptr != y.Args[1] {
break
}
- mem := y.Args[2]
- if mem != v.Args[2] {
+ if mem != y.Args[2] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ANDQload {
if ptr != y.Args[1] {
break
}
- mem := y.Args[2]
- if mem != v.Args[2] {
+ if mem != y.Args[2] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ORQload {
if ptr != y.Args[1] {
break
}
- mem := y.Args[2]
- if mem != v.Args[2] {
+ if mem != y.Args[2] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64XORQload {
if ptr != y.Args[1] {
break
}
- mem := y.Args[2]
- if mem != v.Args[2] {
+ if mem != y.Args[2] {
break
}
if !(y.Uses == 1 && clobber(y)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ADDQ {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVQload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ADDQ {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64SUBQ {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVQload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ANDQ {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVQload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ANDQ {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ORQ {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVQload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64ORQ {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64XORQ {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVQload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64XORQ {
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64BTCQ {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVQload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64BTRQ {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVQload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
y := v.Args[1]
if y.Op != OpAMD64BTSQ {
break
}
- _ = y.Args[1]
+ x := y.Args[1]
l := y.Args[0]
if l.Op != OpAMD64MOVQload {
break
if ptr != l.Args[0] {
break
}
- mem := l.Args[1]
- x := y.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(y.Uses == 1 && l.Uses == 1 && clobber(y) && clobber(l)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64ADDQconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64ANDQconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64ORQconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64XORQconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64BTCQconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64BTRQconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
a := v.Args[1]
if a.Op != OpAMD64BTSQconst {
}
_ = l.Args[1]
ptr2 := l.Args[0]
- mem := l.Args[1]
- if mem != v.Args[2] {
+ if mem != l.Args[1] {
break
}
if !(isSamePtr(ptr, ptr2) && a.Uses == 1 && l.Uses == 1 && validValAndOff(c, off) && clobber(l) && clobber(a)) {
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQf2i {
break
}
val := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVSDstore)
v.AuxInt = off
v.Aux = sym
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(sc).canAdd(off)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
break
}
for {
x := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
x := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ8 {
break
}
off := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
v.reset(OpAMD64MOVQstoreconstidx1)
v.AuxInt = x
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(config.useSSE && x.Uses == 1 && ValAndOff(c2).Off()+8 == ValAndOff(c).Off() && ValAndOff(c).Val() == 0 && ValAndOff(c2).Val() == 0 && clobber(x)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
break
}
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(sc).canAdd(off)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVQstoreconstidx8)
v.AuxInt = c
v.Aux = sym
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
c := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(c)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(c)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
c := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(c)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(8 * c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
}
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpAMD64MOVQstoreidx8)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
}
c := v_1.AuxInt
w := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(i + c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + 8*d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
}
c := v_1.AuxInt
w := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(i + 8*c)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ8 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVSDloadidx8)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(i + c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + 8*d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(i + 8*c)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ8 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQi2f {
break
}
val := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVQstore)
v.AuxInt = off
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
}
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpAMD64MOVSDstoreidx8)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
}
c := v_1.AuxInt
w := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(i + c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + 8*d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
}
c := v_1.AuxInt
w := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(i + 8*c)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ4 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVSSloadidx4)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(i + c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + 4*d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(i + 4*c)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ4 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVLi2f {
break
}
val := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVLstore)
v.AuxInt = off
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
}
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpAMD64MOVSSstoreidx4)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
}
c := v_1.AuxInt
w := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(i + c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + 4*d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
}
c := v_1.AuxInt
w := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(i + 4*c)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ2 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVWloadidx2)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQconst {
break
}
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVWloadidx2)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(i + c)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
p := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(i + c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(c + 2*d)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(i + 2*c)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVWQSX {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVWstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVWQZX {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVWstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVLconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validOff(off)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(validOff(off)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ2 {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
j := x1.AuxInt
s2 := x1.Aux
- _ = x1.Args[1]
- p2 := x1.Args[0]
mem := x1.Args[1]
+ p2 := x1.Args[0]
mem2 := v.Args[2]
if mem2.Op != OpAMD64MOVWstore {
break
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(sc).canAdd(off)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
break
}
for {
x := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ1 {
break
}
off := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
x := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ2 {
break
}
off := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQ {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
v.reset(OpAMD64MOVWstoreconstidx1)
v.AuxInt = x
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAL {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
break
}
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDLconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(sc).canAdd(off)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64MOVWstoreconstidx2)
v.AuxInt = c
v.Aux = sym
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
c := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(c)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(c)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if i != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
c := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(c)) {
break
}
for {
x := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(ValAndOff(x).canAdd(2 * c)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if i != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64SHLQconst {
}
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpAMD64MOVWstoreidx2)
v.AuxInt = c
v.Aux = sym
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
}
c := v_1.AuxInt
w := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(i + c)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(c + 2*d)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
}
c := v_1.AuxInt
w := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(i + 2*c)) {
break
}
// cond:
// result: (MULLconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpAMD64MULLconst)
v.AuxInt = c
v.AddArg(x)
// cond: is32Bit(c)
// result: (MULQconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (MULSDload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVSDload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (MULSSload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVSSload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
// cond: !config.nacl
// result: (BTSL x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLL {
break
}
- _ = v_0.Args[1]
+ y := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64MOVLconst {
break
if v_0_0.AuxInt != 1 {
break
}
- y := v_0.Args[1]
- x := v.Args[1]
if !(!config.nacl) {
break
}
if v_1.Op != OpAMD64SHLL {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64MOVLconst {
break
if v_1_0.AuxInt != 1 {
break
}
- y := v_1.Args[1]
if !(!config.nacl) {
break
}
// cond: isUint32PowerOfTwo(c) && uint64(c) >= 128 && !config.nacl
// result: (BTSLconst [log2uint32(c)] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isUint32PowerOfTwo(c) && uint64(c) >= 128 && !config.nacl) {
break
}
// cond:
// result: (ORLconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpAMD64ORLconst)
v.AuxInt = c
v.AddArg(x)
if v_0.Op != OpAMD64SHLL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDL {
break
if v_0.Op != OpAMD64SHLL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDL {
break
if v_0.Op != OpAMD64SHLL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDL {
break
if v_0.Op != OpAMD64SHLL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDL {
break
if v_0.Op != OpAMD64SHRL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDL {
break
if v_0.Op != OpAMD64SHRL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDL {
break
if v_0.Op != OpAMD64SHRL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDL {
break
if v_0.Op != OpAMD64SHRL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDL {
break
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVBload {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVWload {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLLconst {
break
if mem != x0.Args[1] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
- y := or.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVBloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVBloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVBloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVBloadidx1 {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVWloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVWloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVWloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVWloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLLconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLLconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLLconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLLconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLLconst {
break
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLLconst {
break
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLLconst {
break
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
x1 := v.Args[1]
if x1.Op != OpAMD64MOVBload {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
r1 := v.Args[1]
if r1.Op != OpAMD64ROLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLLconst {
break
if mem != x1.Args[1] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
- y := or.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpAMD64MOVBloadidx1 {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpAMD64MOVBloadidx1 {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpAMD64MOVBloadidx1 {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpAMD64MOVBloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLLconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
r1 := v.Args[1]
if r1.Op != OpAMD64ROLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
r1 := v.Args[1]
if r1.Op != OpAMD64ROLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
r1 := v.Args[1]
if r1.Op != OpAMD64ROLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
r1 := v.Args[1]
if r1.Op != OpAMD64ROLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLLconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLLconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLLconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLLconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORL {
break
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLLconst {
break
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLLconst {
break
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLLconst {
break
if or.Op != OpAMD64ORL {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLLconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLLconst {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ORLload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVLload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
// cond: !config.nacl
// result: (BTSQ x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQ {
break
}
- _ = v_0.Args[1]
+ y := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64MOVQconst {
break
if v_0_0.AuxInt != 1 {
break
}
- y := v_0.Args[1]
- x := v.Args[1]
if !(!config.nacl) {
break
}
if v_1.Op != OpAMD64SHLQ {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64MOVQconst {
break
if v_1_0.AuxInt != 1 {
break
}
- y := v_1.Args[1]
if !(!config.nacl) {
break
}
// cond: isUint64PowerOfTwo(c) && uint64(c) >= 128 && !config.nacl
// result: (BTSQconst [log2(c)] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isUint64PowerOfTwo(c) && uint64(c) >= 128 && !config.nacl) {
break
}
// cond: is32Bit(c)
// result: (ORQconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
if v_0.Op != OpAMD64SHLQ {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDQ {
break
if v_0.Op != OpAMD64SHLQ {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDQ {
break
if v_0.Op != OpAMD64SHLQ {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDQ {
break
if v_0.Op != OpAMD64SHLQ {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDQ {
break
if v_0.Op != OpAMD64SHRQ {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDQ {
break
if v_0.Op != OpAMD64SHRQ {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDQ {
break
if v_0.Op != OpAMD64SHRQ {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDQ {
break
if v_0.Op != OpAMD64SHRQ {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ANDQ {
break
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVBload {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVWload {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVLload {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
if mem != x0.Args[1] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
- y := or.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
if mem != x0.Args[1] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0+16 && j0%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
- y := or.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVBloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVBloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVBloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVBloadidx1 {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVWloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVWloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVWloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVWloadidx1 {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVLloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVLloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVLloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpAMD64MOVLloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0+16 && j0%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0+16 && j0%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0+16 && j0%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0+16 && j0%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
x1 := v.Args[1]
if x1.Op != OpAMD64MOVBload {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
r1 := v.Args[1]
if r1.Op != OpAMD64ROLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
r1 := v.Args[1]
if r1.Op != OpAMD64BSWAPL {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
if mem != x1.Args[1] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
- y := or.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
if mem != x1.Args[1] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0-16 && j1%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && r0.Uses == 1 && r1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(r0) && clobber(r1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
- y := or.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpAMD64MOVBloadidx1 {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpAMD64MOVBloadidx1 {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpAMD64MOVBloadidx1 {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpAMD64MOVBloadidx1 {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
r1 := v.Args[1]
if r1.Op != OpAMD64ROLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
r1 := v.Args[1]
if r1.Op != OpAMD64ROLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
r1 := v.Args[1]
if r1.Op != OpAMD64ROLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
r1 := v.Args[1]
if r1.Op != OpAMD64ROLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
r1 := v.Args[1]
if r1.Op != OpAMD64BSWAPL {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
r1 := v.Args[1]
if r1.Op != OpAMD64BSWAPL {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
r1 := v.Args[1]
if r1.Op != OpAMD64BSWAPL {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
r1 := v.Args[1]
if r1.Op != OpAMD64BSWAPL {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0-16 && j1%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && r0.Uses == 1 && r1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(r0) && clobber(r1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0-16 && j1%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && r0.Uses == 1 && r1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(r0) && clobber(r1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0-16 && j1%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && r0.Uses == 1 && r1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(r0) && clobber(r1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0-16 && j1%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && r0.Uses == 1 && r1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(r0) && clobber(r1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpAMD64ORQ {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
if or.Op != OpAMD64ORQ {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpAMD64SHLQconst {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (ORQload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVQload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
// cond: is32Bit(c)
// result: (SBBQconst x [c] borrow)
for {
- _ = v.Args[2]
+ borrow := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64MOVQconst {
break
}
c := v_1.AuxInt
- borrow := v.Args[2]
if !(is32Bit(c)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64InvertFlags {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64SETBEstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagEQ {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64InvertFlags {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64SETBstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagEQ {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64InvertFlags {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64SETAEstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagEQ {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64InvertFlags {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64SETAstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagEQ {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
if v_0.Op != OpAMD64TESTL {
break
}
- _ = v_0.Args[1]
+ y := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64SHLL {
break
}
- _ = v_0_0.Args[1]
+ x := v_0_0.Args[1]
v_0_0_0 := v_0_0.Args[0]
if v_0_0_0.Op != OpAMD64MOVLconst {
break
if v_0_0_0.AuxInt != 1 {
break
}
- x := v_0_0.Args[1]
- y := v_0.Args[1]
if !(!config.nacl) {
break
}
if v_0_1.Op != OpAMD64SHLL {
break
}
- _ = v_0_1.Args[1]
+ x := v_0_1.Args[1]
v_0_1_0 := v_0_1.Args[0]
if v_0_1_0.Op != OpAMD64MOVLconst {
break
if v_0_1_0.AuxInt != 1 {
break
}
- x := v_0_1.Args[1]
if !(!config.nacl) {
break
}
if v_0.Op != OpAMD64TESTQ {
break
}
- _ = v_0.Args[1]
+ y := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64SHLQ {
break
}
- _ = v_0_0.Args[1]
+ x := v_0_0.Args[1]
v_0_0_0 := v_0_0.Args[0]
if v_0_0_0.Op != OpAMD64MOVQconst {
break
if v_0_0_0.AuxInt != 1 {
break
}
- x := v_0_0.Args[1]
- y := v_0.Args[1]
if !(!config.nacl) {
break
}
if v_0_1.Op != OpAMD64SHLQ {
break
}
- _ = v_0_1.Args[1]
+ x := v_0_1.Args[1]
v_0_1_0 := v_0_1.Args[0]
if v_0_1_0.Op != OpAMD64MOVQconst {
break
if v_0_1_0.AuxInt != 1 {
break
}
- x := v_0_1.Args[1]
if !(!config.nacl) {
break
}
if v_0.Op != OpAMD64TESTQ {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64MOVQconst {
break
}
c := v_0_0.AuxInt
- x := v_0.Args[1]
if !(isUint64PowerOfTwo(c) && !config.nacl) {
break
}
if v_0.Op != OpAMD64TESTQ {
break
}
- _ = v_0.Args[1]
+ z2 := v_0.Args[1]
z1 := v_0.Args[0]
if z1.Op != OpAMD64SHLQconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_0.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v_0.Op != OpAMD64TESTL {
break
}
- _ = v_0.Args[1]
+ z2 := v_0.Args[1]
z1 := v_0.Args[0]
if z1.Op != OpAMD64SHLLconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_0.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v_0.Op != OpAMD64TESTQ {
break
}
- _ = v_0.Args[1]
+ z2 := v_0.Args[1]
z1 := v_0.Args[0]
if z1.Op != OpAMD64SHRQconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_0.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v_0.Op != OpAMD64TESTL {
break
}
- _ = v_0.Args[1]
+ z2 := v_0.Args[1]
z1 := v_0.Args[0]
if z1.Op != OpAMD64SHRLconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_0.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v_0.Op != OpAMD64TESTQ {
break
}
- _ = v_0.Args[1]
+ z2 := v_0.Args[1]
z1 := v_0.Args[0]
if z1.Op != OpAMD64SHRQconst {
break
break
}
x := z1.Args[0]
- z2 := v_0.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v_0.Op != OpAMD64TESTL {
break
}
- _ = v_0.Args[1]
+ z2 := v_0.Args[1]
z1 := v_0.Args[0]
if z1.Op != OpAMD64SHRLconst {
break
break
}
x := z1.Args[0]
- z2 := v_0.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64SHLL {
break
}
- _ = v_1_0.Args[1]
+ x := v_1_0.Args[1]
v_1_0_0 := v_1_0.Args[0]
if v_1_0_0.Op != OpAMD64MOVLconst {
break
if v_1_0_0.AuxInt != 1 {
break
}
- x := v_1_0.Args[1]
- y := v_1.Args[1]
- mem := v.Args[2]
if !(!config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
if v_1_1.Op != OpAMD64SHLL {
break
}
- _ = v_1_1.Args[1]
+ x := v_1_1.Args[1]
v_1_1_0 := v_1_1.Args[0]
if v_1_1_0.Op != OpAMD64MOVLconst {
break
if v_1_1_0.AuxInt != 1 {
break
}
- x := v_1_1.Args[1]
- mem := v.Args[2]
if !(!config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64SHLQ {
break
}
- _ = v_1_0.Args[1]
+ x := v_1_0.Args[1]
v_1_0_0 := v_1_0.Args[0]
if v_1_0_0.Op != OpAMD64MOVQconst {
break
if v_1_0_0.AuxInt != 1 {
break
}
- x := v_1_0.Args[1]
- y := v_1.Args[1]
- mem := v.Args[2]
if !(!config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
if v_1_1.Op != OpAMD64SHLQ {
break
}
- _ = v_1_1.Args[1]
+ x := v_1_1.Args[1]
v_1_1_0 := v_1_1.Args[0]
if v_1_1_0.Op != OpAMD64MOVQconst {
break
if v_1_1_0.AuxInt != 1 {
break
}
- x := v_1_1.Args[1]
- mem := v.Args[2]
if !(!config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTLconst {
}
c := v_1.AuxInt
x := v_1.Args[0]
- mem := v.Args[2]
if !(isUint32PowerOfTwo(c) && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQconst {
}
c := v_1.AuxInt
x := v_1.Args[0]
- mem := v.Args[2]
if !(isUint64PowerOfTwo(c) && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64MOVQconst {
break
}
c := v_1_0.AuxInt
- x := v_1.Args[1]
- mem := v.Args[2]
if !(isUint64PowerOfTwo(c) && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
c := v_1_1.AuxInt
- mem := v.Args[2]
if !(isUint64PowerOfTwo(c) && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64CMPLconst {
if s.AuxInt != 1 {
break
}
- mem := v.Args[2]
v.reset(OpAMD64SETNEstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64CMPQconst {
if s.AuxInt != 1 {
break
}
- mem := v.Args[2]
v.reset(OpAMD64SETNEstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
- _ = v_1.Args[1]
+ z2 := v_1.Args[1]
z1 := v_1.Args[0]
if z1.Op != OpAMD64SHLQconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_1.Args[1]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
x := z1_0.Args[0]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
- _ = v_1.Args[1]
+ z2 := v_1.Args[1]
z1 := v_1.Args[0]
if z1.Op != OpAMD64SHLLconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_1.Args[1]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
x := z1_0.Args[0]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
- _ = v_1.Args[1]
+ z2 := v_1.Args[1]
z1 := v_1.Args[0]
if z1.Op != OpAMD64SHRQconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_1.Args[1]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
x := z1_0.Args[0]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
- _ = v_1.Args[1]
+ z2 := v_1.Args[1]
z1 := v_1.Args[0]
if z1.Op != OpAMD64SHRLconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_1.Args[1]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
x := z1_0.Args[0]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
- _ = v_1.Args[1]
+ z2 := v_1.Args[1]
z1 := v_1.Args[0]
if z1.Op != OpAMD64SHRQconst {
break
break
}
x := z1.Args[0]
- z2 := v_1.Args[1]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
x := z1.Args[0]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
- _ = v_1.Args[1]
+ z2 := v_1.Args[1]
z1 := v_1.Args[0]
if z1.Op != OpAMD64SHRLconst {
break
break
}
x := z1.Args[0]
- z2 := v_1.Args[1]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
x := z1.Args[0]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64InvertFlags {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64SETEQstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagEQ {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64InvertFlags {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64SETLEstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagEQ {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64InvertFlags {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64SETLstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagEQ {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64InvertFlags {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64SETGEstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagEQ {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64InvertFlags {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64SETGstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagEQ {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
if v_0.Op != OpAMD64TESTL {
break
}
- _ = v_0.Args[1]
+ y := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64SHLL {
break
}
- _ = v_0_0.Args[1]
+ x := v_0_0.Args[1]
v_0_0_0 := v_0_0.Args[0]
if v_0_0_0.Op != OpAMD64MOVLconst {
break
if v_0_0_0.AuxInt != 1 {
break
}
- x := v_0_0.Args[1]
- y := v_0.Args[1]
if !(!config.nacl) {
break
}
if v_0_1.Op != OpAMD64SHLL {
break
}
- _ = v_0_1.Args[1]
+ x := v_0_1.Args[1]
v_0_1_0 := v_0_1.Args[0]
if v_0_1_0.Op != OpAMD64MOVLconst {
break
if v_0_1_0.AuxInt != 1 {
break
}
- x := v_0_1.Args[1]
if !(!config.nacl) {
break
}
if v_0.Op != OpAMD64TESTQ {
break
}
- _ = v_0.Args[1]
+ y := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64SHLQ {
break
}
- _ = v_0_0.Args[1]
+ x := v_0_0.Args[1]
v_0_0_0 := v_0_0.Args[0]
if v_0_0_0.Op != OpAMD64MOVQconst {
break
if v_0_0_0.AuxInt != 1 {
break
}
- x := v_0_0.Args[1]
- y := v_0.Args[1]
if !(!config.nacl) {
break
}
if v_0_1.Op != OpAMD64SHLQ {
break
}
- _ = v_0_1.Args[1]
+ x := v_0_1.Args[1]
v_0_1_0 := v_0_1.Args[0]
if v_0_1_0.Op != OpAMD64MOVQconst {
break
if v_0_1_0.AuxInt != 1 {
break
}
- x := v_0_1.Args[1]
if !(!config.nacl) {
break
}
if v_0.Op != OpAMD64TESTQ {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64MOVQconst {
break
}
c := v_0_0.AuxInt
- x := v_0.Args[1]
if !(isUint64PowerOfTwo(c) && !config.nacl) {
break
}
if v_0.Op != OpAMD64TESTQ {
break
}
- _ = v_0.Args[1]
+ z2 := v_0.Args[1]
z1 := v_0.Args[0]
if z1.Op != OpAMD64SHLQconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_0.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v_0.Op != OpAMD64TESTL {
break
}
- _ = v_0.Args[1]
+ z2 := v_0.Args[1]
z1 := v_0.Args[0]
if z1.Op != OpAMD64SHLLconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_0.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v_0.Op != OpAMD64TESTQ {
break
}
- _ = v_0.Args[1]
+ z2 := v_0.Args[1]
z1 := v_0.Args[0]
if z1.Op != OpAMD64SHRQconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_0.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v_0.Op != OpAMD64TESTL {
break
}
- _ = v_0.Args[1]
+ z2 := v_0.Args[1]
z1 := v_0.Args[0]
if z1.Op != OpAMD64SHRLconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_0.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v_0.Op != OpAMD64TESTQ {
break
}
- _ = v_0.Args[1]
+ z2 := v_0.Args[1]
z1 := v_0.Args[0]
if z1.Op != OpAMD64SHRQconst {
break
break
}
x := z1.Args[0]
- z2 := v_0.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v_0.Op != OpAMD64TESTL {
break
}
- _ = v_0.Args[1]
+ z2 := v_0.Args[1]
z1 := v_0.Args[0]
if z1.Op != OpAMD64SHRLconst {
break
break
}
x := z1.Args[0]
- z2 := v_0.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64SHLL {
break
}
- _ = v_1_0.Args[1]
+ x := v_1_0.Args[1]
v_1_0_0 := v_1_0.Args[0]
if v_1_0_0.Op != OpAMD64MOVLconst {
break
if v_1_0_0.AuxInt != 1 {
break
}
- x := v_1_0.Args[1]
- y := v_1.Args[1]
- mem := v.Args[2]
if !(!config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
if v_1_1.Op != OpAMD64SHLL {
break
}
- _ = v_1_1.Args[1]
+ x := v_1_1.Args[1]
v_1_1_0 := v_1_1.Args[0]
if v_1_1_0.Op != OpAMD64MOVLconst {
break
if v_1_1_0.AuxInt != 1 {
break
}
- x := v_1_1.Args[1]
- mem := v.Args[2]
if !(!config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64SHLQ {
break
}
- _ = v_1_0.Args[1]
+ x := v_1_0.Args[1]
v_1_0_0 := v_1_0.Args[0]
if v_1_0_0.Op != OpAMD64MOVQconst {
break
if v_1_0_0.AuxInt != 1 {
break
}
- x := v_1_0.Args[1]
- y := v_1.Args[1]
- mem := v.Args[2]
if !(!config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
if v_1_1.Op != OpAMD64SHLQ {
break
}
- _ = v_1_1.Args[1]
+ x := v_1_1.Args[1]
v_1_1_0 := v_1_1.Args[0]
if v_1_1_0.Op != OpAMD64MOVQconst {
break
if v_1_1_0.AuxInt != 1 {
break
}
- x := v_1_1.Args[1]
- mem := v.Args[2]
if !(!config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTLconst {
}
c := v_1.AuxInt
x := v_1.Args[0]
- mem := v.Args[2]
if !(isUint32PowerOfTwo(c) && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQconst {
}
c := v_1.AuxInt
x := v_1.Args[0]
- mem := v.Args[2]
if !(isUint64PowerOfTwo(c) && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64MOVQconst {
break
}
c := v_1_0.AuxInt
- x := v_1.Args[1]
- mem := v.Args[2]
if !(isUint64PowerOfTwo(c) && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
c := v_1_1.AuxInt
- mem := v.Args[2]
if !(isUint64PowerOfTwo(c) && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64CMPLconst {
if s.AuxInt != 1 {
break
}
- mem := v.Args[2]
v.reset(OpAMD64SETEQstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64CMPQconst {
if s.AuxInt != 1 {
break
}
- mem := v.Args[2]
v.reset(OpAMD64SETEQstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
- _ = v_1.Args[1]
+ z2 := v_1.Args[1]
z1 := v_1.Args[0]
if z1.Op != OpAMD64SHLQconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_1.Args[1]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
x := z1_0.Args[0]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
- _ = v_1.Args[1]
+ z2 := v_1.Args[1]
z1 := v_1.Args[0]
if z1.Op != OpAMD64SHLLconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_1.Args[1]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
x := z1_0.Args[0]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
- _ = v_1.Args[1]
+ z2 := v_1.Args[1]
z1 := v_1.Args[0]
if z1.Op != OpAMD64SHRQconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_1.Args[1]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
x := z1_0.Args[0]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
- _ = v_1.Args[1]
+ z2 := v_1.Args[1]
z1 := v_1.Args[0]
if z1.Op != OpAMD64SHRLconst {
break
break
}
x := z1_0.Args[0]
- z2 := v_1.Args[1]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
x := z1_0.Args[0]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
- _ = v_1.Args[1]
+ z2 := v_1.Args[1]
z1 := v_1.Args[0]
if z1.Op != OpAMD64SHRQconst {
break
break
}
x := z1.Args[0]
- z2 := v_1.Args[1]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTQ {
break
}
x := z1.Args[0]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
- _ = v_1.Args[1]
+ z2 := v_1.Args[1]
z1 := v_1.Args[0]
if z1.Op != OpAMD64SHRLconst {
break
break
}
x := z1.Args[0]
- z2 := v_1.Args[1]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64TESTL {
break
}
x := z1.Args[0]
- mem := v.Args[2]
if !(z1 == z2 && !config.nacl) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64InvertFlags {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpAMD64SETNEstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagEQ {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagLT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_ULT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
x := v.Args[1]
if x.Op != OpAMD64FlagGT_UGT {
break
}
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = off
v.Aux = sym
// cond:
// result: (NEGL (SUBLconst <v.Type> x [c]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpAMD64NEGL)
v0 := b.NewValue0(v.Pos, OpAMD64SUBLconst, v.Type)
v0.AuxInt = c
// cond:
// result: (MOVLconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpAMD64MOVLconst)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
// cond: is32Bit(c)
// result: (NEGQ (SUBQconst <v.Type> x [c]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond:
// result: (MOVQconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpAMD64MOVQconst)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
// cond:
// result: (TESTBconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpAMD64TESTBconst)
v.AuxInt = c
v.AddArg(x)
// cond: l == l2 && l.Uses == 2 && validValAndOff(0,off) && clobber(l)
// result: @l.Block (CMPBconstload {sym} [makeValAndOff(0,off)] ptr mem)
for {
- _ = v.Args[1]
+ l2 := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVBload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- l2 := v.Args[1]
+ ptr := l.Args[0]
if !(l == l2 && l.Uses == 2 && validValAndOff(0, off) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(l == l2 && l.Uses == 2 && validValAndOff(0, off) && clobber(l)) {
break
}
// cond:
// result: (TESTLconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpAMD64TESTLconst)
v.AuxInt = c
v.AddArg(x)
// cond: l == l2 && l.Uses == 2 && validValAndOff(0,off) && clobber(l)
// result: @l.Block (CMPLconstload {sym} [makeValAndOff(0,off)] ptr mem)
for {
- _ = v.Args[1]
+ l2 := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVLload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- l2 := v.Args[1]
+ ptr := l.Args[0]
if !(l == l2 && l.Uses == 2 && validValAndOff(0, off) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(l == l2 && l.Uses == 2 && validValAndOff(0, off) && clobber(l)) {
break
}
// cond: is32Bit(c)
// result: (TESTQconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond: l == l2 && l.Uses == 2 && validValAndOff(0,off) && clobber(l)
// result: @l.Block (CMPQconstload {sym} [makeValAndOff(0,off)] ptr mem)
for {
- _ = v.Args[1]
+ l2 := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVQload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- l2 := v.Args[1]
+ ptr := l.Args[0]
if !(l == l2 && l.Uses == 2 && validValAndOff(0, off) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(l == l2 && l.Uses == 2 && validValAndOff(0, off) && clobber(l)) {
break
}
// cond:
// result: (TESTWconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpAMD64TESTWconst)
v.AuxInt = c
v.AddArg(x)
// cond: l == l2 && l.Uses == 2 && validValAndOff(0,off) && clobber(l)
// result: @l.Block (CMPWconstload {sym} [makeValAndOff(0,off)] ptr mem)
for {
- _ = v.Args[1]
+ l2 := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVWload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- l2 := v.Args[1]
+ ptr := l.Args[0]
if !(l == l2 && l.Uses == 2 && validValAndOff(0, off) && clobber(l)) {
break
}
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(l == l2 && l.Uses == 2 && validValAndOff(0, off) && clobber(l)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && ptr.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && ptr.Op != OpSB) {
break
}
// cond: !config.nacl
// result: (BTCL x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLL {
break
}
- _ = v_0.Args[1]
+ y := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64MOVLconst {
break
if v_0_0.AuxInt != 1 {
break
}
- y := v_0.Args[1]
- x := v.Args[1]
if !(!config.nacl) {
break
}
if v_1.Op != OpAMD64SHLL {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64MOVLconst {
break
if v_1_0.AuxInt != 1 {
break
}
- y := v_1.Args[1]
if !(!config.nacl) {
break
}
// cond: isUint32PowerOfTwo(c) && uint64(c) >= 128 && !config.nacl
// result: (BTCLconst [log2uint32(c)] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isUint32PowerOfTwo(c) && uint64(c) >= 128 && !config.nacl) {
break
}
// cond:
// result: (XORLconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVLconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpAMD64XORLconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (MOVLconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpAMD64MOVLconst)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (XORLload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVLload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
// cond: !config.nacl
// result: (BTCQ x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQ {
break
}
- _ = v_0.Args[1]
+ y := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64MOVQconst {
break
if v_0_0.AuxInt != 1 {
break
}
- y := v_0.Args[1]
- x := v.Args[1]
if !(!config.nacl) {
break
}
if v_1.Op != OpAMD64SHLQ {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64MOVQconst {
break
if v_1_0.AuxInt != 1 {
break
}
- y := v_1.Args[1]
if !(!config.nacl) {
break
}
// cond: isUint64PowerOfTwo(c) && uint64(c) >= 128 && !config.nacl
// result: (BTCQconst [log2(c)] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isUint64PowerOfTwo(c) && uint64(c) >= 128 && !config.nacl) {
break
}
// cond: is32Bit(c)
// result: (XORQconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond:
// result: (MOVQconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpAMD64MOVQconst)
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
// cond: canMergeLoadClobber(v, l, x) && clobber(l)
// result: (XORQload x [off] {sym} ptr mem)
for {
- _ = v.Args[1]
+ x := v.Args[1]
l := v.Args[0]
if l.Op != OpAMD64MOVQload {
break
}
off := l.AuxInt
sym := l.Aux
- _ = l.Args[1]
- ptr := l.Args[0]
mem := l.Args[1]
- x := v.Args[1]
+ ptr := l.Args[0]
if !(canMergeLoadClobber(v, l, x) && clobber(l)) {
break
}
for {
valoff1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
}
off2 := v_0.AuxInt
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2)) {
break
}
for {
valoff1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(ValAndOff(valoff1).canAdd(off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64ADDQconst {
}
off2 := v_1.AuxInt
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
val := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpAMD64LEAQ {
off2 := v_1.AuxInt
sym2 := v_1.Aux
base := v_1.Args[0]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64ADDQconst {
break
off2 := v_0.AuxInt
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpAMD64LEAQ {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
// cond:
// result: (ADDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ADDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ADDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDSS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ADDSS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ADDQ)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDSD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ADDSD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ADDL)
v.AddArg(x)
v.AddArg(y)
// cond: config.PtrSize == 8
// result: (ADDQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(config.PtrSize == 8) {
break
}
// cond: config.PtrSize == 4
// result: (ADDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(config.PtrSize == 4) {
break
}
// cond:
// result: (ANDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ANDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ANDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ANDQ)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ANDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ANDL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AddTupleFirst32 val (XADDLlock val ptr mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64AddTupleFirst32)
v.AddArg(val)
v0 := b.NewValue0(v.Pos, OpAMD64XADDLlock, types.NewTuple(typ.UInt32, types.TypeMem))
// cond:
// result: (AddTupleFirst64 val (XADDQlock val ptr mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64AddTupleFirst64)
v.AddArg(val)
v0 := b.NewValue0(v.Pos, OpAMD64XADDQlock, types.NewTuple(typ.UInt64, types.TypeMem))
// cond:
// result: (ANDBlock ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64ANDBlock)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (CMPXCHGLlock ptr old new_ mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
v.reset(OpAMD64CMPXCHGLlock)
v.AddArg(ptr)
v.AddArg(old)
// cond:
// result: (CMPXCHGQlock ptr old new_ mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
v.reset(OpAMD64CMPXCHGQlock)
v.AddArg(ptr)
v.AddArg(old)
// cond:
// result: (XCHGL val ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64XCHGL)
v.AddArg(val)
v.AddArg(ptr)
// cond:
// result: (XCHGQ val ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64XCHGQ)
v.AddArg(val)
v.AddArg(ptr)
// cond:
// result: (MOVLatomicload ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpAMD64MOVLatomicload)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (MOVQatomicload ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpAMD64MOVQatomicload)
v.AddArg(ptr)
v.AddArg(mem)
// cond: config.PtrSize == 8
// result: (MOVQatomicload ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(config.PtrSize == 8) {
break
}
// cond: config.PtrSize == 4
// result: (MOVLatomicload ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(config.PtrSize == 4) {
break
}
// cond:
// result: (ORBlock ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64ORBlock)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (Select1 (XCHGL <types.NewTuple(typ.UInt32,types.TypeMem)> val ptr mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpAMD64XCHGL, types.NewTuple(typ.UInt32, types.TypeMem))
v0.AddArg(val)
// cond:
// result: (Select1 (XCHGQ <types.NewTuple(typ.UInt64,types.TypeMem)> val ptr mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpAMD64XCHGQ, types.NewTuple(typ.UInt64, types.TypeMem))
v0.AddArg(val)
// cond: config.PtrSize == 8
// result: (Select1 (XCHGQ <types.NewTuple(typ.BytePtr,types.TypeMem)> val ptr mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(config.PtrSize == 8) {
break
}
// cond: config.PtrSize == 4
// result: (Select1 (XCHGL <types.NewTuple(typ.BytePtr,types.TypeMem)> val ptr mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(config.PtrSize == 4) {
break
}
// cond:
// result: (AVGQU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64AVGQU)
v.AddArg(x)
v.AddArg(y)
// result: (CALLclosure [argwid] entry closure mem)
for {
argwid := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
entry := v.Args[0]
closure := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64CALLclosure)
v.AuxInt = argwid
v.AddArg(entry)
// result: (CondSelect <t> x y (MOVBQZX <typ.UInt64> check))
for {
t := v.Type
- _ = v.Args[2]
+ check := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- check := v.Args[2]
if !(!check.Type.IsFlags() && check.Type.Size() == 1) {
break
}
// result: (CondSelect <t> x y (MOVWQZX <typ.UInt64> check))
for {
t := v.Type
- _ = v.Args[2]
+ check := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- check := v.Args[2]
if !(!check.Type.IsFlags() && check.Type.Size() == 2) {
break
}
// result: (CondSelect <t> x y (MOVLQZX <typ.UInt64> check))
for {
t := v.Type
- _ = v.Args[2]
+ check := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- check := v.Args[2]
if !(!check.Type.IsFlags() && check.Type.Size() == 4) {
break
}
// result: (CMOVQNE y x (CMPQconst [0] check))
for {
t := v.Type
- _ = v.Args[2]
+ check := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- check := v.Args[2]
if !(!check.Type.IsFlags() && check.Type.Size() == 8 && (is64BitInt(t) || isPtr(t))) {
break
}
// result: (CMOVLNE y x (CMPQconst [0] check))
for {
t := v.Type
- _ = v.Args[2]
+ check := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- check := v.Args[2]
if !(!check.Type.IsFlags() && check.Type.Size() == 8 && is32BitInt(t)) {
break
}
// result: (CMOVWNE y x (CMPQconst [0] check))
for {
t := v.Type
- _ = v.Args[2]
+ check := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- check := v.Args[2]
if !(!check.Type.IsFlags() && check.Type.Size() == 8 && is16BitInt(t)) {
break
}
// cond:
// result: (DIVQU2 xhi xlo y)
for {
- _ = v.Args[2]
+ y := v.Args[2]
xhi := v.Args[0]
xlo := v.Args[1]
- y := v.Args[2]
v.reset(OpAMD64DIVQU2)
v.AddArg(xhi)
v.AddArg(xlo)
// result: (Select0 (DIVW [a] x y))
for {
a := v.AuxInt
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpAMD64DIVW, types.NewTuple(typ.Int16, typ.Int16))
v0.AuxInt = a
// cond:
// result: (Select0 (DIVWU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpAMD64DIVWU, types.NewTuple(typ.UInt16, typ.UInt16))
v0.AddArg(x)
// result: (Select0 (DIVL [a] x y))
for {
a := v.AuxInt
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpAMD64DIVL, types.NewTuple(typ.Int32, typ.Int32))
v0.AuxInt = a
// cond:
// result: (DIVSS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64DIVSS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Select0 (DIVLU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpAMD64DIVLU, types.NewTuple(typ.UInt32, typ.UInt32))
v0.AddArg(x)
// result: (Select0 (DIVQ [a] x y))
for {
a := v.AuxInt
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpAMD64DIVQ, types.NewTuple(typ.Int64, typ.Int64))
v0.AuxInt = a
// cond:
// result: (DIVSD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64DIVSD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Select0 (DIVQU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpAMD64DIVQU, types.NewTuple(typ.UInt64, typ.UInt64))
v0.AddArg(x)
// cond:
// result: (Select0 (DIVW (SignExt8to16 x) (SignExt8to16 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpAMD64DIVW, types.NewTuple(typ.Int16, typ.Int16))
v1 := b.NewValue0(v.Pos, OpSignExt8to16, typ.Int16)
// cond:
// result: (Select0 (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpAMD64DIVWU, types.NewTuple(typ.UInt16, typ.UInt16))
v1 := b.NewValue0(v.Pos, OpZeroExt8to16, typ.UInt16)
// cond:
// result: (SETEQ (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETEQ)
v0 := b.NewValue0(v.Pos, OpAMD64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETEQ (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETEQ)
v0 := b.NewValue0(v.Pos, OpAMD64CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETEQF (UCOMISS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETEQF)
v0 := b.NewValue0(v.Pos, OpAMD64UCOMISS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETEQ (CMPQ x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETEQ)
v0 := b.NewValue0(v.Pos, OpAMD64CMPQ, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETEQF (UCOMISD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETEQF)
v0 := b.NewValue0(v.Pos, OpAMD64UCOMISD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETEQ (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETEQ)
v0 := b.NewValue0(v.Pos, OpAMD64CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETEQ (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETEQ)
v0 := b.NewValue0(v.Pos, OpAMD64CMPB, types.TypeFlags)
v0.AddArg(x)
// cond: config.PtrSize == 8
// result: (SETEQ (CMPQ x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(config.PtrSize == 8) {
break
}
// cond: config.PtrSize == 4
// result: (SETEQ (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(config.PtrSize == 4) {
break
}
// cond:
// result: (SETGE (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETGE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETAE (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETAE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGE (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETGE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGEF (UCOMISS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETGEF)
v0 := b.NewValue0(v.Pos, OpAMD64UCOMISS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETAE (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETAE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGE (CMPQ x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETGE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPQ, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGEF (UCOMISD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETGEF)
v0 := b.NewValue0(v.Pos, OpAMD64UCOMISD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETAE (CMPQ x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETAE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPQ, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGE (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETGE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETAE (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETAE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETG (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETG)
v0 := b.NewValue0(v.Pos, OpAMD64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETA (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETA)
v0 := b.NewValue0(v.Pos, OpAMD64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETG (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETG)
v0 := b.NewValue0(v.Pos, OpAMD64CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGF (UCOMISS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETGF)
v0 := b.NewValue0(v.Pos, OpAMD64UCOMISS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETA (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETA)
v0 := b.NewValue0(v.Pos, OpAMD64CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETG (CMPQ x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETG)
v0 := b.NewValue0(v.Pos, OpAMD64CMPQ, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGF (UCOMISD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETGF)
v0 := b.NewValue0(v.Pos, OpAMD64UCOMISD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETA (CMPQ x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETA)
v0 := b.NewValue0(v.Pos, OpAMD64CMPQ, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETG (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETG)
v0 := b.NewValue0(v.Pos, OpAMD64CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETA (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETA)
v0 := b.NewValue0(v.Pos, OpAMD64CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (HMULL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64HMULL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (HMULLU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64HMULLU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (HMULQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64HMULQ)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (HMULQU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64HMULQU)
v.AddArg(x)
v.AddArg(y)
// result: (CALLinter [argwid] entry mem)
for {
argwid := v.AuxInt
- _ = v.Args[1]
- entry := v.Args[0]
mem := v.Args[1]
+ entry := v.Args[0]
v.reset(OpAMD64CALLinter)
v.AuxInt = argwid
v.AddArg(entry)
// cond: config.PtrSize == 8
// result: (SETB (CMPQ idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
if !(config.PtrSize == 8) {
break
}
// cond: config.PtrSize == 4
// result: (SETB (CMPL idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
if !(config.PtrSize == 4) {
break
}
// cond: config.PtrSize == 8
// result: (SETBE (CMPQ idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
if !(config.PtrSize == 8) {
break
}
// cond: config.PtrSize == 4
// result: (SETBE (CMPL idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
if !(config.PtrSize == 4) {
break
}
// cond:
// result: (SETLE (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETLE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETBE (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETBE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETLE (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETLE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGEF (UCOMISS y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETGEF)
v0 := b.NewValue0(v.Pos, OpAMD64UCOMISS, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (SETBE (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETBE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETLE (CMPQ x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETLE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPQ, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGEF (UCOMISD y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETGEF)
v0 := b.NewValue0(v.Pos, OpAMD64UCOMISD, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (SETBE (CMPQ x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETBE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPQ, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETLE (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETLE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETBE (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETBE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETL (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETL)
v0 := b.NewValue0(v.Pos, OpAMD64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETB (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETB)
v0 := b.NewValue0(v.Pos, OpAMD64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETL (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETL)
v0 := b.NewValue0(v.Pos, OpAMD64CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGF (UCOMISS y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETGF)
v0 := b.NewValue0(v.Pos, OpAMD64UCOMISS, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (SETB (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETB)
v0 := b.NewValue0(v.Pos, OpAMD64CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETL (CMPQ x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETL)
v0 := b.NewValue0(v.Pos, OpAMD64CMPQ, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETGF (UCOMISD y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETGF)
v0 := b.NewValue0(v.Pos, OpAMD64UCOMISD, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (SETB (CMPQ x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETB)
v0 := b.NewValue0(v.Pos, OpAMD64CMPQ, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETL (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETL)
v0 := b.NewValue0(v.Pos, OpAMD64CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETB (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETB)
v0 := b.NewValue0(v.Pos, OpAMD64CMPB, types.TypeFlags)
v0.AddArg(x)
// result: (MOVQload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitInt(t) || isPtr(t) && config.PtrSize == 8) {
break
}
// result: (MOVLload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitInt(t) || isPtr(t) && config.PtrSize == 4) {
break
}
// result: (MOVWload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t)) {
break
}
// result: (MOVBload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsBoolean() || is8BitInt(t)) {
break
}
// result: (MOVSSload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitFloat(t)) {
break
}
// result: (MOVSDload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitFloat(t)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPQconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPQconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMPWconst y [64])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMPLconst y [64])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMPQconst y [64])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMPBconst y [64])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPQconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (Select1 (DIVW [a] x y))
for {
a := v.AuxInt
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpAMD64DIVW, types.NewTuple(typ.Int16, typ.Int16))
v0.AuxInt = a
// cond:
// result: (Select1 (DIVWU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpAMD64DIVWU, types.NewTuple(typ.UInt16, typ.UInt16))
v0.AddArg(x)
// result: (Select1 (DIVL [a] x y))
for {
a := v.AuxInt
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpAMD64DIVL, types.NewTuple(typ.Int32, typ.Int32))
v0.AuxInt = a
// cond:
// result: (Select1 (DIVLU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpAMD64DIVLU, types.NewTuple(typ.UInt32, typ.UInt32))
v0.AddArg(x)
// result: (Select1 (DIVQ [a] x y))
for {
a := v.AuxInt
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpAMD64DIVQ, types.NewTuple(typ.Int64, typ.Int64))
v0.AuxInt = a
// cond:
// result: (Select1 (DIVQU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpAMD64DIVQU, types.NewTuple(typ.UInt64, typ.UInt64))
v0.AddArg(x)
// cond:
// result: (Select1 (DIVW (SignExt8to16 x) (SignExt8to16 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpAMD64DIVW, types.NewTuple(typ.Int16, typ.Int16))
v1 := b.NewValue0(v.Pos, OpSignExt8to16, typ.Int16)
// cond:
// result: (Select1 (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpAMD64DIVWU, types.NewTuple(typ.UInt16, typ.UInt16))
v1 := b.NewValue0(v.Pos, OpZeroExt8to16, typ.UInt16)
if v.AuxInt != 0 {
break
}
- _ = v.Args[2]
mem := v.Args[2]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpAMD64MOVBload, typ.UInt8)
if v.AuxInt != 2 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVWstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpAMD64MOVWload, typ.UInt16)
if v.AuxInt != 4 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVLstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpAMD64MOVLload, typ.UInt32)
if v.AuxInt != 8 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVQstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpAMD64MOVQload, typ.UInt64)
if v.AuxInt != 16 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(config.useSSE) {
break
}
if v.AuxInt != 16 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(!config.useSSE) {
break
}
if v.AuxInt != 32 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpMove)
v.AuxInt = 16
v0 := b.NewValue0(v.Pos, OpOffPtr, dst.Type)
if v.AuxInt != 48 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(config.useSSE) {
break
}
if v.AuxInt != 64 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(config.useSSE) {
break
}
if v.AuxInt != 3 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = 2
v.AddArg(dst)
if v.AuxInt != 5 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 6 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVWstore)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 7 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVLstore)
v.AuxInt = 3
v.AddArg(dst)
if v.AuxInt != 9 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVBstore)
v.AuxInt = 8
v.AddArg(dst)
if v.AuxInt != 10 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVWstore)
v.AuxInt = 8
v.AddArg(dst)
if v.AuxInt != 12 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64MOVLstore)
v.AuxInt = 8
v.AddArg(dst)
// result: (MOVQstore [s-8] dst (MOVQload [s-8] src mem) (MOVQstore dst (MOVQload src mem) mem))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s == 11 || s >= 13 && s <= 15) {
break
}
// result: (Move [s-s%16] (OffPtr <dst.Type> dst [s%16]) (OffPtr <src.Type> src [s%16]) (MOVQstore dst (MOVQload src mem) mem))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 16 && s%16 != 0 && s%16 <= 8) {
break
}
// result: (Move [s-s%16] (OffPtr <dst.Type> dst [s%16]) (OffPtr <src.Type> src [s%16]) (MOVOstore dst (MOVOload src mem) mem))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 16 && s%16 != 0 && s%16 > 8 && config.useSSE) {
break
}
// result: (Move [s-s%16] (OffPtr <dst.Type> dst [s%16]) (OffPtr <src.Type> src [s%16]) (MOVQstore [8] dst (MOVQload [8] src mem) (MOVQstore dst (MOVQload src mem) mem)))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 16 && s%16 != 0 && s%16 > 8 && !config.useSSE) {
break
}
// result: (DUFFCOPY [14*(64-s/16)] dst src mem)
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 64 && s <= 16*64 && s%16 == 0 && !config.noDuffDevice) {
break
}
// result: (REPMOVSQ dst src (MOVQconst [s/8]) mem)
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !((s > 16*64 || config.noDuffDevice) && s%8 == 0) {
break
}
// cond:
// result: (MULL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64MULL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64MULL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULSS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64MULSS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64MULQ)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULSD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64MULSD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULQU2 x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64MULQU2)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64MULL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SETNE (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETNE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETNE (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETNE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPL, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETNEF (UCOMISS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETNEF)
v0 := b.NewValue0(v.Pos, OpAMD64UCOMISS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETNE (CMPQ x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETNE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPQ, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETNEF (UCOMISD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETNEF)
v0 := b.NewValue0(v.Pos, OpAMD64UCOMISD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETNE (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETNE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPB, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SETNE (CMPB x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SETNE)
v0 := b.NewValue0(v.Pos, OpAMD64CMPB, types.TypeFlags)
v0.AddArg(x)
// cond: config.PtrSize == 8
// result: (SETNE (CMPQ x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(config.PtrSize == 8) {
break
}
// cond: config.PtrSize == 4
// result: (SETNE (CMPL x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(config.PtrSize == 4) {
break
}
// cond:
// result: (LoweredNilCheck ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpAMD64LoweredNilCheck)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (ORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ORL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ORL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ORQ)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ORL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64ORL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ROLW a b)
for {
- _ = v.Args[1]
- a := v.Args[0]
b := v.Args[1]
+ a := v.Args[0]
v.reset(OpAMD64ROLW)
v.AddArg(a)
v.AddArg(b)
// cond:
// result: (ROLL a b)
for {
- _ = v.Args[1]
- a := v.Args[0]
b := v.Args[1]
+ a := v.Args[0]
v.reset(OpAMD64ROLL)
v.AddArg(a)
v.AddArg(b)
// cond:
// result: (ROLQ a b)
for {
- _ = v.Args[1]
- a := v.Args[0]
b := v.Args[1]
+ a := v.Args[0]
v.reset(OpAMD64ROLQ)
v.AddArg(a)
v.AddArg(b)
// cond:
// result: (ROLB a b)
for {
- _ = v.Args[1]
- a := v.Args[0]
b := v.Args[1]
+ a := v.Args[0]
v.reset(OpAMD64ROLB)
v.AddArg(a)
v.AddArg(b)
// result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPWconst y [16])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPLconst y [16])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPQconst y [16])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHRW <t> x y) (SBBLcarrymask <t> (CMPBconst y [16])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [16])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [16])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARW <t> x (ORQ <y.Type> y (NOTQ <y.Type> (SBBQcarrymask <y.Type> (CMPQconst y [16])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [16])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPQconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [32])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [32])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARL <t> x (ORQ <y.Type> y (NOTQ <y.Type> (SBBQcarrymask <y.Type> (CMPQconst y [32])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [32])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDQ (SHRQ <t> x y) (SBBQcarrymask <t> (CMPWconst y [64])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDQ (SHRQ <t> x y) (SBBQcarrymask <t> (CMPLconst y [64])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDQ (SHRQ <t> x y) (SBBQcarrymask <t> (CMPQconst y [64])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDQ (SHRQ <t> x y) (SBBQcarrymask <t> (CMPBconst y [64])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARQ <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [64])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARQ <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [64])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARQ <t> x (ORQ <y.Type> y (NOTQ <y.Type> (SBBQcarrymask <y.Type> (CMPQconst y [64])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARQ <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [64])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPWconst y [8])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPLconst y [8])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPQconst y [8])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (ANDL (SHRB <t> x y) (SBBLcarrymask <t> (CMPBconst y [8])))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SHRB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [8])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [8])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARB <t> x (ORQ <y.Type> y (NOTQ <y.Type> (SBBQcarrymask <y.Type> (CMPQconst y [8])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [8])))))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(!shiftIsBounded(v)) {
break
}
// cond: shiftIsBounded(v)
// result: (SARB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
if v_0.Op != OpMul64uover {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpSelect0)
v.Type = typ.UInt64
v0 := b.NewValue0(v.Pos, OpAMD64MULQU, types.NewTuple(typ.UInt64, types.TypeFlags))
if v_0.Op != OpMul32uover {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpSelect0)
v.Type = typ.UInt32
v0 := b.NewValue0(v.Pos, OpAMD64MULLU, types.NewTuple(typ.UInt32, types.TypeFlags))
if v_0.Op != OpAdd64carry {
break
}
- _ = v_0.Args[2]
+ c := v_0.Args[2]
x := v_0.Args[0]
y := v_0.Args[1]
- c := v_0.Args[2]
v.reset(OpSelect0)
v.Type = typ.UInt64
v0 := b.NewValue0(v.Pos, OpAMD64ADCQ, types.NewTuple(typ.UInt64, types.TypeFlags))
if v_0.Op != OpSub64borrow {
break
}
- _ = v_0.Args[2]
+ c := v_0.Args[2]
x := v_0.Args[0]
y := v_0.Args[1]
- c := v_0.Args[2]
v.reset(OpSelect0)
v.Type = typ.UInt64
v0 := b.NewValue0(v.Pos, OpAMD64SBBQ, types.NewTuple(typ.UInt64, types.TypeFlags))
if v_0.Op != OpAMD64AddTupleFirst32 {
break
}
- _ = v_0.Args[1]
- val := v_0.Args[0]
tuple := v_0.Args[1]
+ val := v_0.Args[0]
v.reset(OpAMD64ADDL)
v.AddArg(val)
v0 := b.NewValue0(v.Pos, OpSelect0, t)
if v_0.Op != OpAMD64AddTupleFirst64 {
break
}
- _ = v_0.Args[1]
- val := v_0.Args[0]
tuple := v_0.Args[1]
+ val := v_0.Args[0]
v.reset(OpAMD64ADDQ)
v.AddArg(val)
v0 := b.NewValue0(v.Pos, OpSelect0, t)
if v_0.Op != OpMul64uover {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpAMD64SETO)
v0 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpAMD64MULQU, types.NewTuple(typ.UInt64, types.TypeFlags))
if v_0.Op != OpMul32uover {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpAMD64SETO)
v0 := b.NewValue0(v.Pos, OpSelect1, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpAMD64MULLU, types.NewTuple(typ.UInt32, types.TypeFlags))
if v_0.Op != OpAdd64carry {
break
}
- _ = v_0.Args[2]
+ c := v_0.Args[2]
x := v_0.Args[0]
y := v_0.Args[1]
- c := v_0.Args[2]
v.reset(OpAMD64NEGQ)
v.Type = typ.UInt64
v0 := b.NewValue0(v.Pos, OpAMD64SBBQcarrymask, typ.UInt64)
if v_0.Op != OpSub64borrow {
break
}
- _ = v_0.Args[2]
+ c := v_0.Args[2]
x := v_0.Args[0]
y := v_0.Args[1]
- c := v_0.Args[2]
v.reset(OpAMD64NEGQ)
v.Type = typ.UInt64
v0 := b.NewValue0(v.Pos, OpAMD64SBBQcarrymask, typ.UInt64)
if v_0.Op != OpAMD64AddTupleFirst32 {
break
}
- _ = v_0.Args[1]
tuple := v_0.Args[1]
v.reset(OpSelect1)
v.AddArg(tuple)
if v_0.Op != OpAMD64AddTupleFirst64 {
break
}
- _ = v_0.Args[1]
tuple := v_0.Args[1]
v.reset(OpSelect1)
v.AddArg(tuple)
// result: (MOVSDstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
break
}
// result: (MOVSSstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
break
}
// result: (MOVQstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8) {
break
}
// result: (MOVLstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4) {
break
}
// result: (MOVWstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 2) {
break
}
// result: (MOVBstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 1) {
break
}
// cond:
// result: (SUBL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SUBL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SUBL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBSS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SUBSS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SUBQ)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBSD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SUBSD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64SUBL)
v.AddArg(x)
v.AddArg(y)
// cond: config.PtrSize == 8
// result: (SUBQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(config.PtrSize == 8) {
break
}
// cond: config.PtrSize == 4
// result: (SUBL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(config.PtrSize == 4) {
break
}
// result: (LoweredWB {fn} destptr srcptr mem)
for {
fn := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
destptr := v.Args[0]
srcptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpAMD64LoweredWB)
v.Aux = fn
v.AddArg(destptr)
// cond:
// result: (XORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64XORL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64XORL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XORQ x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64XORQ)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XORL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAMD64XORL)
v.AddArg(x)
v.AddArg(y)
if v.AuxInt != 0 {
break
}
- _ = v.Args[1]
mem := v.Args[1]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpAMD64MOVBstoreconst)
v.AuxInt = 0
v.AddArg(destptr)
if v.AuxInt != 2 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpAMD64MOVWstoreconst)
v.AuxInt = 0
v.AddArg(destptr)
if v.AuxInt != 4 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpAMD64MOVLstoreconst)
v.AuxInt = 0
v.AddArg(destptr)
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpAMD64MOVQstoreconst)
v.AuxInt = 0
v.AddArg(destptr)
if v.AuxInt != 3 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpAMD64MOVBstoreconst)
v.AuxInt = makeValAndOff(0, 2)
v.AddArg(destptr)
if v.AuxInt != 5 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpAMD64MOVBstoreconst)
v.AuxInt = makeValAndOff(0, 4)
v.AddArg(destptr)
if v.AuxInt != 6 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpAMD64MOVWstoreconst)
v.AuxInt = makeValAndOff(0, 4)
v.AddArg(destptr)
if v.AuxInt != 7 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpAMD64MOVLstoreconst)
v.AuxInt = makeValAndOff(0, 3)
v.AddArg(destptr)
// result: (Zero [s-s%8] (OffPtr <destptr.Type> destptr [s%8]) (MOVQstoreconst [0] destptr mem))
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(s%8 != 0 && s > 8 && !config.useSSE) {
break
}
if v.AuxInt != 16 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(!config.useSSE) {
break
}
if v.AuxInt != 24 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(!config.useSSE) {
break
}
if v.AuxInt != 32 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(!config.useSSE) {
break
}
// result: (MOVQstoreconst [makeValAndOff(0,s-8)] destptr (MOVQstoreconst [0] destptr mem))
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(s > 8 && s < 16 && config.useSSE) {
break
}
// result: (Zero [s-s%16] (OffPtr <destptr.Type> destptr [s%16]) (MOVOstore destptr (MOVOconst [0]) mem))
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(s%16 != 0 && s > 16 && s%16 > 8 && config.useSSE) {
break
}
// result: (Zero [s-s%16] (OffPtr <destptr.Type> destptr [s%16]) (MOVQstoreconst [0] destptr mem))
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(s%16 != 0 && s > 16 && s%16 <= 8 && config.useSSE) {
break
}
if v.AuxInt != 16 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(config.useSSE) {
break
}
if v.AuxInt != 32 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(config.useSSE) {
break
}
if v.AuxInt != 48 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(config.useSSE) {
break
}
if v.AuxInt != 64 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(config.useSSE) {
break
}
// result: (DUFFZERO [s] destptr (MOVOconst [0]) mem)
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(s > 64 && s <= 1024 && s%16 == 0 && !config.noDuffDevice) {
break
}
// result: (REPSTOSQ destptr (MOVQconst [s/8]) (MOVQconst [0]) mem)
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !((s > 1024 || (config.noDuffDevice && s > 64 || !config.useSSE && s > 32)) && s%8 == 0) {
break
}
if v.Op != OpAMD64TESTL {
break
}
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLL {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64MOVLconst {
break
if v_0_0.AuxInt != 1 {
break
}
- x := v_0.Args[1]
- y := v.Args[1]
if !(!config.nacl) {
break
}
if v_1.Op != OpAMD64SHLL {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64MOVLconst {
break
if v_1_0.AuxInt != 1 {
break
}
- x := v_1.Args[1]
if !(!config.nacl) {
break
}
if v.Op != OpAMD64TESTQ {
break
}
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQ {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64MOVQconst {
break
if v_0_0.AuxInt != 1 {
break
}
- x := v_0.Args[1]
- y := v.Args[1]
if !(!config.nacl) {
break
}
if v_1.Op != OpAMD64SHLQ {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64MOVQconst {
break
if v_1_0.AuxInt != 1 {
break
}
- x := v_1.Args[1]
if !(!config.nacl) {
break
}
if v.Op != OpAMD64TESTQ {
break
}
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isUint64PowerOfTwo(c) && !config.nacl) {
break
}
if v.Op != OpAMD64TESTQ {
break
}
- _ = v.Args[1]
+ z2 := v.Args[1]
z1 := v.Args[0]
if z1.Op != OpAMD64SHLQconst {
break
break
}
x := z1_0.Args[0]
- z2 := v.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v.Op != OpAMD64TESTL {
break
}
- _ = v.Args[1]
+ z2 := v.Args[1]
z1 := v.Args[0]
if z1.Op != OpAMD64SHLLconst {
break
break
}
x := z1_0.Args[0]
- z2 := v.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v.Op != OpAMD64TESTQ {
break
}
- _ = v.Args[1]
+ z2 := v.Args[1]
z1 := v.Args[0]
if z1.Op != OpAMD64SHRQconst {
break
break
}
x := z1_0.Args[0]
- z2 := v.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v.Op != OpAMD64TESTL {
break
}
- _ = v.Args[1]
+ z2 := v.Args[1]
z1 := v.Args[0]
if z1.Op != OpAMD64SHRLconst {
break
break
}
x := z1_0.Args[0]
- z2 := v.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v.Op != OpAMD64TESTQ {
break
}
- _ = v.Args[1]
+ z2 := v.Args[1]
z1 := v.Args[0]
if z1.Op != OpAMD64SHRQconst {
break
break
}
x := z1.Args[0]
- z2 := v.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v.Op != OpAMD64TESTL {
break
}
- _ = v.Args[1]
+ z2 := v.Args[1]
z1 := v.Args[0]
if z1.Op != OpAMD64SHRLconst {
break
break
}
x := z1.Args[0]
- z2 := v.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v.Op != OpAMD64TESTL {
break
}
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLL {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64MOVLconst {
break
if v_0_0.AuxInt != 1 {
break
}
- x := v_0.Args[1]
- y := v.Args[1]
if !(!config.nacl) {
break
}
if v_1.Op != OpAMD64SHLL {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64MOVLconst {
break
if v_1_0.AuxInt != 1 {
break
}
- x := v_1.Args[1]
if !(!config.nacl) {
break
}
if v.Op != OpAMD64TESTQ {
break
}
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64SHLQ {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpAMD64MOVQconst {
break
if v_0_0.AuxInt != 1 {
break
}
- x := v_0.Args[1]
- y := v.Args[1]
if !(!config.nacl) {
break
}
if v_1.Op != OpAMD64SHLQ {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpAMD64MOVQconst {
break
if v_1_0.AuxInt != 1 {
break
}
- x := v_1.Args[1]
if !(!config.nacl) {
break
}
if v.Op != OpAMD64TESTQ {
break
}
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAMD64MOVQconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isUint64PowerOfTwo(c) && !config.nacl) {
break
}
if v.Op != OpAMD64TESTQ {
break
}
- _ = v.Args[1]
+ z2 := v.Args[1]
z1 := v.Args[0]
if z1.Op != OpAMD64SHLQconst {
break
break
}
x := z1_0.Args[0]
- z2 := v.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v.Op != OpAMD64TESTL {
break
}
- _ = v.Args[1]
+ z2 := v.Args[1]
z1 := v.Args[0]
if z1.Op != OpAMD64SHLLconst {
break
break
}
x := z1_0.Args[0]
- z2 := v.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v.Op != OpAMD64TESTQ {
break
}
- _ = v.Args[1]
+ z2 := v.Args[1]
z1 := v.Args[0]
if z1.Op != OpAMD64SHRQconst {
break
break
}
x := z1_0.Args[0]
- z2 := v.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v.Op != OpAMD64TESTL {
break
}
- _ = v.Args[1]
+ z2 := v.Args[1]
z1 := v.Args[0]
if z1.Op != OpAMD64SHRLconst {
break
break
}
x := z1_0.Args[0]
- z2 := v.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v.Op != OpAMD64TESTQ {
break
}
- _ = v.Args[1]
+ z2 := v.Args[1]
z1 := v.Args[0]
if z1.Op != OpAMD64SHRQconst {
break
break
}
x := z1.Args[0]
- z2 := v.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
if v.Op != OpAMD64TESTL {
break
}
- _ = v.Args[1]
+ z2 := v.Args[1]
z1 := v.Args[0]
if z1.Op != OpAMD64SHRLconst {
break
break
}
x := z1.Args[0]
- z2 := v.Args[1]
if !(z1 == z2 && !config.nacl) {
break
}
// cond:
// result: (ADCconst [c] x flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCconst [c] x flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- flags := v.Args[2]
v.reset(OpARMADCconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCconst [c] x flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- flags := v.Args[2]
v.reset(OpARMADCconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCconst [c] x flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftLL x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSLLconst {
}
c := v_1.AuxInt
y := v_1.Args[0]
- flags := v.Args[2]
v.reset(OpARMADCshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftLL x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
c := v_0.AuxInt
y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftLL x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
c := v_0.AuxInt
y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftLL x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSLLconst {
}
c := v_1.AuxInt
y := v_1.Args[0]
- flags := v.Args[2]
v.reset(OpARMADCshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftRL x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRLconst {
}
c := v_1.AuxInt
y := v_1.Args[0]
- flags := v.Args[2]
v.reset(OpARMADCshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftRL x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
c := v_0.AuxInt
y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftRL x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
c := v_0.AuxInt
y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftRL x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRLconst {
}
c := v_1.AuxInt
y := v_1.Args[0]
- flags := v.Args[2]
v.reset(OpARMADCshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftRA x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRAconst {
}
c := v_1.AuxInt
y := v_1.Args[0]
- flags := v.Args[2]
v.reset(OpARMADCshiftRA)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftRA x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
c := v_0.AuxInt
y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCshiftRA)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftRA x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
c := v_0.AuxInt
y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCshiftRA)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftRA x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRAconst {
}
c := v_1.AuxInt
y := v_1.Args[0]
- flags := v.Args[2]
v.reset(OpARMADCshiftRA)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADCshiftLLreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
- flags := v.Args[2]
+ y := v_1.Args[0]
v.reset(OpARMADCshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADCshiftLLreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
+ y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADCshiftLLreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
+ y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADCshiftLLreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
- flags := v.Args[2]
+ y := v_1.Args[0]
v.reset(OpARMADCshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADCshiftRLreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
- flags := v.Args[2]
+ y := v_1.Args[0]
v.reset(OpARMADCshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADCshiftRLreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
+ y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADCshiftRLreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
+ y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADCshiftRLreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
- flags := v.Args[2]
+ y := v_1.Args[0]
v.reset(OpARMADCshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADCshiftRAreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
- flags := v.Args[2]
+ y := v_1.Args[0]
v.reset(OpARMADCshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADCshiftRAreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
+ y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADCshiftRAreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
+ y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADCshiftRAreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
- flags := v.Args[2]
+ y := v_1.Args[0]
v.reset(OpARMADCshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// result: (ADCconst [int64(int32(c+d))] x flags)
for {
c := v.AuxInt
- _ = v.Args[1]
+ flags := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- flags := v.Args[1]
v.reset(OpARMADCconst)
v.AuxInt = int64(int32(c + d))
v.AddArg(x)
// result: (ADCconst [int64(int32(c-d))] x flags)
for {
c := v.AuxInt
- _ = v.Args[1]
+ flags := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- flags := v.Args[1]
v.reset(OpARMADCconst)
v.AuxInt = int64(int32(c - d))
v.AddArg(x)
// result: (ADCconst [c] (SLLconst <x.Type> x [d]) flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// result: (ADCconst x [int64(int32(uint32(c)<<uint64(d)))] flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- flags := v.Args[2]
v.reset(OpARMADCconst)
v.AuxInt = int64(int32(uint32(c) << uint64(d)))
v.AddArg(x)
// cond:
// result: (ADCconst [c] (SLL <x.Type> x y) flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
c := v_0.AuxInt
x := v.Args[1]
y := v.Args[2]
- flags := v.Args[3]
v.reset(OpARMADCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// cond:
// result: (ADCshiftLL x y [c] flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
x := v.Args[0]
y := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- flags := v.Args[3]
v.reset(OpARMADCshiftLL)
v.AuxInt = c
v.AddArg(x)
// result: (ADCconst [c] (SRAconst <x.Type> x [d]) flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// result: (ADCconst x [int64(int32(c)>>uint64(d))] flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- flags := v.Args[2]
v.reset(OpARMADCconst)
v.AuxInt = int64(int32(c) >> uint64(d))
v.AddArg(x)
// cond:
// result: (ADCconst [c] (SRA <x.Type> x y) flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
c := v_0.AuxInt
x := v.Args[1]
y := v.Args[2]
- flags := v.Args[3]
v.reset(OpARMADCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// cond:
// result: (ADCshiftRA x y [c] flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
x := v.Args[0]
y := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- flags := v.Args[3]
v.reset(OpARMADCshiftRA)
v.AuxInt = c
v.AddArg(x)
// result: (ADCconst [c] (SRLconst <x.Type> x [d]) flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMADCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// result: (ADCconst x [int64(int32(uint32(c)>>uint64(d)))] flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- flags := v.Args[2]
v.reset(OpARMADCconst)
v.AuxInt = int64(int32(uint32(c) >> uint64(d)))
v.AddArg(x)
// cond:
// result: (ADCconst [c] (SRL <x.Type> x y) flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
c := v_0.AuxInt
x := v.Args[1]
y := v.Args[2]
- flags := v.Args[3]
v.reset(OpARMADCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (ADCshiftRL x y [c] flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
x := v.Args[0]
y := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- flags := v.Args[3]
v.reset(OpARMADCshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADDconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMADDconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADDshiftLL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMADDshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADDshiftRL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMADDshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADDshiftRA x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMADDshiftRA)
v.AuxInt = c
v.AddArg(x)
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMADDshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDshiftLLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMADDshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMADDshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDshiftRLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMADDshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMADDshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDshiftRAreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMADDshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMRSBconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULA x y a)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMUL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpARMMULA)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMMUL {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
v.reset(OpARMMULA)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMMULD {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
if !(a.Uses == 1 && objabi.GOARM >= 6) {
break
}
// cond: a.Uses == 1 && objabi.GOARM >= 6
// result: (MULAD a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMULD {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
if !(a.Uses == 1 && objabi.GOARM >= 6) {
break
}
if v_1.Op != OpARMNMULD {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
if !(a.Uses == 1 && objabi.GOARM >= 6) {
break
}
// cond: a.Uses == 1 && objabi.GOARM >= 6
// result: (MULSD a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMNMULD {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
if !(a.Uses == 1 && objabi.GOARM >= 6) {
break
}
if v_1.Op != OpARMMULF {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
if !(a.Uses == 1 && objabi.GOARM >= 6) {
break
}
// cond: a.Uses == 1 && objabi.GOARM >= 6
// result: (MULAF a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMULF {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
if !(a.Uses == 1 && objabi.GOARM >= 6) {
break
}
if v_1.Op != OpARMNMULF {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
if !(a.Uses == 1 && objabi.GOARM >= 6) {
break
}
// cond: a.Uses == 1 && objabi.GOARM >= 6
// result: (MULSF a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMNMULF {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
if !(a.Uses == 1 && objabi.GOARM >= 6) {
break
}
// cond:
// result: (ADDSconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMADDSconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADDSshiftLL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMADDSshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADDSshiftRL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMADDSshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ADDSshiftRA x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMADDSshiftRA)
v.AuxInt = c
v.AddArg(x)
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMADDSshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDSshiftLLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMADDSshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMADDSshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDSshiftRLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMADDSshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMADDSshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDSshiftRAreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMADDSshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// result: (ADDSconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMADDSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// cond:
// result: (ADDSconst [c] (SLL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMADDSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// result: (ADDSconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMADDSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// cond:
// result: (ADDSconst [c] (SRA <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMADDSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// result: (ADDSconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMADDSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// cond:
// result: (ADDSconst [c] (SRL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMADDSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// result: (ADDconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// result: (SRRconst [32-c] x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
if v_0.AuxInt != 32-c {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARMSRRconst)
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMBFXU {
break
if v_0.AuxInt != armBFAuxInt(8, 8) {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARMREV16)
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
if v_0_0.AuxInt != 16 {
break
}
- x := v_0_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0_0.Args[0] {
break
}
if !(objabi.GOARM >= 6) {
// cond:
// result: (ADDconst [c] (SLL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// result: (ADDconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// cond:
// result: (ADDconst [c] (SRA <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// result: (ADDconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// result: (SRRconst [ c] x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
if v_0.AuxInt != 32-c {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARMSRRconst)
// cond:
// result: (ADDconst [c] (SRL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (ANDconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMANDconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ANDshiftLL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMANDshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ANDshiftRL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMANDshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ANDshiftRA x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMANDshiftRA)
v.AuxInt = c
v.AddArg(x)
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMANDshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDshiftLLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMANDshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMANDshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDshiftRLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMANDshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMANDshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDshiftRAreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMANDshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: (BIC x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMVN {
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMBIC)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (BICshiftLL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMVNshiftLL {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMBICshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (BICshiftRL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMVNshiftRL {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMBICshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (BICshiftRA x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMVNshiftRA {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMBICshiftRA)
v.AuxInt = c
v.AddArg(x)
// result: (ANDconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMANDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// cond:
// result: (ANDconst [c] (SLL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMANDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// result: (ANDconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMANDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// cond:
// result: (ANDconst [c] (SRA <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMANDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// result: (ANDconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMANDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// cond:
// result: (ANDconst [c] (SRL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMANDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMBICshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMBICshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMBICshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MOVWconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpARMMOVWconst)
// cond:
// result: (CMNconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMCMNconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (CMNshiftLL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMCMNshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (CMNshiftRL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMCMNshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (CMNshiftRA x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMCMNshiftRA)
v.AuxInt = c
v.AddArg(x)
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMCMNshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (CMNshiftLLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMCMNshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMCMNshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (CMNshiftRLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMCMNshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMCMNshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (CMNshiftRAreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMCMNshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (CMP x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMRSBconst {
break
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMCMP)
v.AddArg(x)
v.AddArg(y)
// result: (CMNconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMCMNconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// cond:
// result: (CMNconst [c] (SLL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMCMNconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// result: (CMNconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMCMNconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// cond:
// result: (CMNconst [c] (SRA <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMCMNconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// result: (CMNconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMCMNconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// cond:
// result: (CMNconst [c] (SRL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMCMNconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (InvertFlags (CMPconst [c] x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
v0.AuxInt = c
// cond:
// result: (InvertFlags (CMPshiftLL x y [c]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPshiftLL, types.TypeFlags)
v0.AuxInt = c
// cond:
// result: (InvertFlags (CMPshiftRL x y [c]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPshiftRL, types.TypeFlags)
v0.AuxInt = c
// cond:
// result: (InvertFlags (CMPshiftRA x y [c]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPshiftRA, types.TypeFlags)
v0.AuxInt = c
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMCMPshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (InvertFlags (CMPshiftLLreg x y z))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPshiftLLreg, types.TypeFlags)
v0.AddArg(x)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMCMPshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (InvertFlags (CMPshiftRLreg x y z))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPshiftRLreg, types.TypeFlags)
v0.AddArg(x)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMCMPshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (InvertFlags (CMPshiftRAreg x y z))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPshiftRAreg, types.TypeFlags)
v0.AddArg(x)
// result: (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d])))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
v0.AuxInt = c
// cond:
// result: (InvertFlags (CMPconst [c] (SLL <x.Type> x y)))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
v0.AuxInt = c
// result: (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d])))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
v0.AuxInt = c
// cond:
// result: (InvertFlags (CMPconst [c] (SRA <x.Type> x y)))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
v0.AuxInt = c
// result: (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d])))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
v0.AuxInt = c
// cond:
// result: (InvertFlags (CMPconst [c] (SRL <x.Type> x y)))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMInvertFlags)
v0 := b.NewValue0(v.Pos, OpARMCMPconst, types.TypeFlags)
v0.AuxInt = c
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVBUload)
v.AuxInt = off1 + off2
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVBUload)
v.AuxInt = off1 - off2
v.Aux = sym
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(sym == nil && !config.nacl) {
break
}
// cond:
// result: (MOVBUload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARMMOVBUload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVBUload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVBUload)
v.AuxInt = c
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVBload)
v.AuxInt = off1 + off2
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVBload)
v.AuxInt = off1 - off2
v.Aux = sym
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(sym == nil && !config.nacl) {
break
}
// cond:
// result: (MOVBload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARMMOVBload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVBload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVBload)
v.AuxInt = c
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVBstore)
v.AuxInt = off1 + off2
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVBstore)
v.AuxInt = off1 - off2
v.Aux = sym
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVBreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARMMOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVBUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARMMOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVHreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARMMOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVHUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARMMOVBstore)
v.AuxInt = off
v.Aux = sym
break
}
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(sym == nil && !config.nacl) {
break
}
// cond:
// result: (MOVBstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVBstore)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVBstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
c := v_0.AuxInt
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVBstore)
v.AuxInt = c
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVDload)
v.AuxInt = off1 + off2
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVDload)
v.AuxInt = off1 - off2
v.Aux = sym
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVDstore)
v.AuxInt = off1 + off2
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVDstore)
v.AuxInt = off1 - off2
v.Aux = sym
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVFload)
v.AuxInt = off1 + off2
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVFload)
v.AuxInt = off1 - off2
v.Aux = sym
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVFstore)
v.AuxInt = off1 + off2
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVFstore)
v.AuxInt = off1 - off2
v.Aux = sym
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVHUload)
v.AuxInt = off1 + off2
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVHUload)
v.AuxInt = off1 - off2
v.Aux = sym
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(sym == nil && !config.nacl) {
break
}
// cond:
// result: (MOVHUload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARMMOVHUload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVHUload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVHUload)
v.AuxInt = c
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVHload)
v.AuxInt = off1 + off2
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVHload)
v.AuxInt = off1 - off2
v.Aux = sym
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(sym == nil && !config.nacl) {
break
}
// cond:
// result: (MOVHload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARMMOVHload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVHload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVHload)
v.AuxInt = c
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVHstore)
v.AuxInt = off1 + off2
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVHstore)
v.AuxInt = off1 - off2
v.Aux = sym
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVHreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARMMOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVHUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARMMOVHstore)
v.AuxInt = off
v.Aux = sym
break
}
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(sym == nil && !config.nacl) {
break
}
// cond:
// result: (MOVHstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVHstore)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVHstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
c := v_0.AuxInt
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVHstore)
v.AuxInt = c
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVWload)
v.AuxInt = off1 + off2
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
v.reset(OpARMMOVWload)
v.AuxInt = off1 - off2
v.Aux = sym
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(sym == nil && !config.nacl) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDshiftLL {
break
}
c := v_0.AuxInt
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(sym == nil && !config.nacl) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDshiftRL {
break
}
c := v_0.AuxInt
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(sym == nil && !config.nacl) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDshiftRA {
break
}
c := v_0.AuxInt
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(sym == nil && !config.nacl) {
break
}
// cond:
// result: (MOVWload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARMMOVWload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVWload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWloadshiftLL ptr idx [c] mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSLLconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARMMOVWloadshiftLL)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWloadshiftLL ptr idx [c] mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
c := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVWloadshiftLL)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWloadshiftRL ptr idx [c] mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRLconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARMMOVWloadshiftRL)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWloadshiftRL ptr idx [c] mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
c := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVWloadshiftRL)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWloadshiftRA ptr idx [c] mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRAconst {
}
c := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARMMOVWloadshiftRA)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWloadshiftRA ptr idx [c] mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
c := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVWloadshiftRA)
v.AuxInt = c
v.AddArg(ptr)
// result: (MOVWload [int64(uint32(c)<<uint64(d))] ptr mem)
for {
d := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARMMOVWload)
v.AuxInt = int64(uint32(c) << uint64(d))
v.AddArg(ptr)
// result: (MOVWload [int64(int32(c)>>uint64(d))] ptr mem)
for {
d := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARMMOVWload)
v.AuxInt = int64(int32(c) >> uint64(d))
v.AddArg(ptr)
// result: (MOVWload [int64(uint32(c)>>uint64(d))] ptr mem)
for {
d := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARMMOVWload)
v.AuxInt = int64(uint32(c) >> uint64(d))
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVWstore)
v.AuxInt = off1 + off2
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVWstore)
v.AuxInt = off1 - off2
v.Aux = sym
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) {
break
}
break
}
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(sym == nil && !config.nacl) {
break
}
break
}
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMADDshiftLL {
break
}
c := v_0.AuxInt
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(sym == nil && !config.nacl) {
break
}
break
}
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMADDshiftRL {
break
}
c := v_0.AuxInt
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(sym == nil && !config.nacl) {
break
}
break
}
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMADDshiftRA {
break
}
c := v_0.AuxInt
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(sym == nil && !config.nacl) {
break
}
// cond:
// result: (MOVWstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVWstore)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
c := v_0.AuxInt
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVWstore)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWstoreshiftLL ptr idx [c] val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSLLconst {
c := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVWstoreshiftLL)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWstoreshiftLL ptr idx [c] val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVWstoreshiftLL)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWstoreshiftRL ptr idx [c] val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRLconst {
c := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVWstoreshiftRL)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWstoreshiftRL ptr idx [c] val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVWstoreshiftRL)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWstoreshiftRA ptr idx [c] val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRAconst {
c := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVWstoreshiftRA)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWstoreshiftRA ptr idx [c] val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVWstoreshiftRA)
v.AuxInt = c
v.AddArg(ptr)
// result: (MOVWstore [int64(uint32(c)<<uint64(d))] ptr val mem)
for {
d := v.AuxInt
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVWstore)
v.AuxInt = int64(uint32(c) << uint64(d))
v.AddArg(ptr)
// result: (MOVWstore [int64(int32(c)>>uint64(d))] ptr val mem)
for {
d := v.AuxInt
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVWstore)
v.AuxInt = int64(int32(c) >> uint64(d))
v.AddArg(ptr)
// result: (MOVWstore [int64(uint32(c)>>uint64(d))] ptr val mem)
for {
d := v.AuxInt
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARMMOVWstore)
v.AuxInt = int64(uint32(c) >> uint64(d))
v.AddArg(ptr)
// cond: int32(c) == -1
// result: (RSBconst [0] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(int32(c) == -1) {
break
}
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
if v_0.AuxInt != 1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond: isPowerOfTwo(c)
// result: (SLLconst [log2(c)] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && int32(c) >= 3
// result: (ADDshiftLL x x [log2(c-1)])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && int32(c) >= 7
// result: (RSBshiftLL x x [log2(c+1)])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
// result: (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
// result: (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
// result: (SLLconst [log2(c/7)] (RSBshiftLL <x.Type> x x [3]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
// result: (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
break
}
// cond: int32(c) == -1
// result: (SUB a x)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(int32(c) == -1) {
break
}
// cond:
// result: a
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
if v_1.AuxInt != 0 {
break
}
- a := v.Args[2]
v.reset(OpCopy)
v.Type = a.Type
v.AddArg(a)
// cond:
// result: (ADD x a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
if v_1.AuxInt != 1 {
break
}
- a := v.Args[2]
v.reset(OpARMADD)
v.AddArg(x)
v.AddArg(a)
// cond: isPowerOfTwo(c)
// result: (ADD (SLLconst <x.Type> [log2(c)] x) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && int32(c) >= 3
// result: (ADD (ADDshiftLL <x.Type> x x [log2(c-1)]) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && int32(c) >= 7
// result: (ADD (RSBshiftLL <x.Type> x x [log2(c+1)]) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
// result: (ADD (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
// result: (ADD (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
// result: (ADD (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
// result: (ADD (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
break
}
// cond: int32(c) == -1
// result: (SUB a x)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(int32(c) == -1) {
break
}
// cond:
// result: a
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
if v_0.AuxInt != 0 {
break
}
- a := v.Args[2]
v.reset(OpCopy)
v.Type = a.Type
v.AddArg(a)
// cond:
// result: (ADD x a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
break
}
x := v.Args[1]
- a := v.Args[2]
v.reset(OpARMADD)
v.AddArg(x)
v.AddArg(a)
// cond: isPowerOfTwo(c)
// result: (ADD (SLLconst <x.Type> [log2(c)] x) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && int32(c) >= 3
// result: (ADD (ADDshiftLL <x.Type> x x [log2(c-1)]) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && int32(c) >= 7
// result: (ADD (RSBshiftLL <x.Type> x x [log2(c+1)]) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
// result: (ADD (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
// result: (ADD (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
// result: (ADD (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
// result: (ADD (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
break
}
// cond:
// result: (ADDconst [int64(int32(c*d))] a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
break
}
d := v_1.AuxInt
- a := v.Args[2]
v.reset(OpARMADDconst)
v.AuxInt = int64(int32(c * d))
v.AddArg(a)
// cond: objabi.GOARM >= 6
// result: (NMULD x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMNEGD {
break
}
x := v_0.Args[0]
- y := v.Args[1]
if !(objabi.GOARM >= 6) {
break
}
// cond: objabi.GOARM >= 6
// result: (NMULF x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMNEGF {
break
}
x := v_0.Args[0]
- y := v.Args[1]
if !(objabi.GOARM >= 6) {
break
}
// cond: int32(c) == -1
// result: (ADD a x)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(int32(c) == -1) {
break
}
// cond:
// result: a
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
if v_1.AuxInt != 0 {
break
}
- a := v.Args[2]
v.reset(OpCopy)
v.Type = a.Type
v.AddArg(a)
// cond:
// result: (RSB x a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
if v_1.AuxInt != 1 {
break
}
- a := v.Args[2]
v.reset(OpARMRSB)
v.AddArg(x)
v.AddArg(a)
// cond: isPowerOfTwo(c)
// result: (RSB (SLLconst <x.Type> [log2(c)] x) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && int32(c) >= 3
// result: (RSB (ADDshiftLL <x.Type> x x [log2(c-1)]) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && int32(c) >= 7
// result: (RSB (RSBshiftLL <x.Type> x x [log2(c+1)]) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
// result: (RSB (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
// result: (RSB (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
// result: (RSB (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
// result: (RSB (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- a := v.Args[2]
if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
break
}
// cond: int32(c) == -1
// result: (ADD a x)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(int32(c) == -1) {
break
}
// cond:
// result: a
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
if v_0.AuxInt != 0 {
break
}
- a := v.Args[2]
v.reset(OpCopy)
v.Type = a.Type
v.AddArg(a)
// cond:
// result: (RSB x a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
break
}
x := v.Args[1]
- a := v.Args[2]
v.reset(OpARMRSB)
v.AddArg(x)
v.AddArg(a)
// cond: isPowerOfTwo(c)
// result: (RSB (SLLconst <x.Type> [log2(c)] x) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && int32(c) >= 3
// result: (RSB (ADDshiftLL <x.Type> x x [log2(c-1)]) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && int32(c) >= 7
// result: (RSB (RSBshiftLL <x.Type> x x [log2(c+1)]) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
// result: (RSB (SLLconst <x.Type> [log2(c/3)] (ADDshiftLL <x.Type> x x [1])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
// result: (RSB (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
// result: (RSB (SLLconst <x.Type> [log2(c/7)] (RSBshiftLL <x.Type> x x [3])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
// result: (RSB (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])) a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- a := v.Args[2]
if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
break
}
// cond:
// result: (SUBconst [int64(int32(c*d))] a)
for {
- _ = v.Args[2]
+ a := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
break
}
d := v_1.AuxInt
- a := v.Args[2]
v.reset(OpARMSUBconst)
v.AuxInt = int64(int32(c * d))
v.AddArg(a)
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpARMMVNshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpARMMVNshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpARMMVNshiftRAreg)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpARMMULD {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(objabi.GOARM >= 6) {
break
}
if v_0.Op != OpARMMULF {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(objabi.GOARM >= 6) {
break
}
// cond:
// result: (MULD x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMNEGD {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpARMMULD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULF x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMNEGF {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpARMMULF)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMORconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ORshiftLL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMORshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ORshiftRL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMORshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ORshiftRA x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMORshiftRA)
v.AuxInt = c
v.AddArg(x)
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMORshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORshiftLLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMORshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMORshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORshiftRLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMORshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMORshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORshiftRAreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMORshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// result: (ORconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// result: (SRRconst [32-c] x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
if v_0.AuxInt != 32-c {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARMSRRconst)
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMBFXU {
break
if v_0.AuxInt != armBFAuxInt(8, 8) {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARMREV16)
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
if v_0_0.AuxInt != 16 {
break
}
- x := v_0_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0_0.Args[0] {
break
}
if !(objabi.GOARM >= 6) {
// cond:
// result: (ORconst [c] (SLL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// result: (ORconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// cond:
// result: (ORconst [c] (SRA <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// result: (ORconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// result: (SRRconst [ c] x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
if v_0.AuxInt != 32-c {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARMSRRconst)
// cond:
// result: (ORconst [c] (SRL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (SUBconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMSUBconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (SUBshiftLL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMSUBshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (SUBshiftRL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMSUBshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (SUBshiftRA x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMSUBshiftRA)
v.AuxInt = c
v.AddArg(x)
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMRSBshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBshiftLLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMSUBshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMRSBshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBshiftRLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMSUBshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMRSBshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBshiftRAreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMSUBshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MOVWconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpARMMOVWconst)
// cond: objabi.GOARM == 7
// result: (MULS x y a)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMUL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
if !(objabi.GOARM == 7) {
break
}
// result: (SUBSconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMSUBSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// cond:
// result: (SUBSconst [c] (SLL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMSUBSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// result: (SUBSconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMSUBSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// cond:
// result: (SUBSconst [c] (SRA <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMSUBSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// result: (SUBSconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMSUBSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// cond:
// result: (SUBSconst [c] (SRL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMSUBSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// result: (SUBconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMSUBconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// cond:
// result: (SUBconst [c] (SLL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMSUBconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// result: (SUBconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMSUBconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// cond:
// result: (SUBconst [c] (SRA <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMSUBconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// result: (SUBconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMSUBconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// cond:
// result: (SUBconst [c] (SRL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMSUBconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// result: (RSCconst [int64(int32(c-d))] x flags)
for {
c := v.AuxInt
- _ = v.Args[1]
+ flags := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- flags := v.Args[1]
v.reset(OpARMRSCconst)
v.AuxInt = int64(int32(c - d))
v.AddArg(x)
// result: (RSCconst [int64(int32(c+d))] x flags)
for {
c := v.AuxInt
- _ = v.Args[1]
+ flags := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- flags := v.Args[1]
v.reset(OpARMRSCconst)
v.AuxInt = int64(int32(c + d))
v.AddArg(x)
// result: (SBCconst [c] (SLLconst <x.Type> x [d]) flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMSBCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// result: (RSCconst x [int64(int32(uint32(c)<<uint64(d)))] flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- flags := v.Args[2]
v.reset(OpARMRSCconst)
v.AuxInt = int64(int32(uint32(c) << uint64(d)))
v.AddArg(x)
// cond:
// result: (SBCconst [c] (SLL <x.Type> x y) flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
c := v_0.AuxInt
x := v.Args[1]
y := v.Args[2]
- flags := v.Args[3]
v.reset(OpARMSBCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// cond:
// result: (RSCshiftLL x y [c] flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
x := v.Args[0]
y := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- flags := v.Args[3]
v.reset(OpARMRSCshiftLL)
v.AuxInt = c
v.AddArg(x)
// result: (SBCconst [c] (SRAconst <x.Type> x [d]) flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMSBCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// result: (RSCconst x [int64(int32(c)>>uint64(d))] flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- flags := v.Args[2]
v.reset(OpARMRSCconst)
v.AuxInt = int64(int32(c) >> uint64(d))
v.AddArg(x)
// cond:
// result: (SBCconst [c] (SRA <x.Type> x y) flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
c := v_0.AuxInt
x := v.Args[1]
y := v.Args[2]
- flags := v.Args[3]
v.reset(OpARMSBCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// cond:
// result: (RSCshiftRA x y [c] flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
x := v.Args[0]
y := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- flags := v.Args[3]
v.reset(OpARMRSCshiftRA)
v.AuxInt = c
v.AddArg(x)
// result: (SBCconst [c] (SRLconst <x.Type> x [d]) flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMSBCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// result: (RSCconst x [int64(int32(uint32(c)>>uint64(d)))] flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- flags := v.Args[2]
v.reset(OpARMRSCconst)
v.AuxInt = int64(int32(uint32(c) >> uint64(d)))
v.AddArg(x)
// cond:
// result: (SBCconst [c] (SRL <x.Type> x y) flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
c := v_0.AuxInt
x := v.Args[1]
y := v.Args[2]
- flags := v.Args[3]
v.reset(OpARMSBCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (RSCshiftRL x y [c] flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
x := v.Args[0]
y := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- flags := v.Args[3]
v.reset(OpARMRSCshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (RSCconst [c] x flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMRSCconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (SBCconst [c] x flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- flags := v.Args[2]
v.reset(OpARMSBCconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (SBCshiftLL x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSLLconst {
}
c := v_1.AuxInt
y := v_1.Args[0]
- flags := v.Args[2]
v.reset(OpARMSBCshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (RSCshiftLL x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
c := v_0.AuxInt
y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMRSCshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (SBCshiftRL x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRLconst {
}
c := v_1.AuxInt
y := v_1.Args[0]
- flags := v.Args[2]
v.reset(OpARMSBCshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (RSCshiftRL x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
c := v_0.AuxInt
y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMRSCshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (SBCshiftRA x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRAconst {
}
c := v_1.AuxInt
y := v_1.Args[0]
- flags := v.Args[2]
v.reset(OpARMSBCshiftRA)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (RSCshiftRA x y [c] flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
c := v_0.AuxInt
y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMRSCshiftRA)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (SBCshiftLLreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
- flags := v.Args[2]
+ y := v_1.Args[0]
v.reset(OpARMSBCshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (RSCshiftLLreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
+ y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMRSCshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SBCshiftRLreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
- flags := v.Args[2]
+ y := v_1.Args[0]
v.reset(OpARMSBCshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (RSCshiftRLreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
+ y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMRSCshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SBCshiftRAreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
- flags := v.Args[2]
+ y := v_1.Args[0]
v.reset(OpARMSBCshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (RSCshiftRAreg x y z flags)
for {
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
+ y := v_0.Args[0]
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMRSCshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// result: (SBCconst [int64(int32(c-d))] x flags)
for {
c := v.AuxInt
- _ = v.Args[1]
+ flags := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMADDconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- flags := v.Args[1]
v.reset(OpARMSBCconst)
v.AuxInt = int64(int32(c - d))
v.AddArg(x)
// result: (SBCconst [int64(int32(c+d))] x flags)
for {
c := v.AuxInt
- _ = v.Args[1]
+ flags := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSUBconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- flags := v.Args[1]
v.reset(OpARMSBCconst)
v.AuxInt = int64(int32(c + d))
v.AddArg(x)
// result: (RSCconst [c] (SLLconst <x.Type> x [d]) flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMRSCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// result: (SBCconst x [int64(int32(uint32(c)<<uint64(d)))] flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- flags := v.Args[2]
v.reset(OpARMSBCconst)
v.AuxInt = int64(int32(uint32(c) << uint64(d)))
v.AddArg(x)
// cond:
// result: (RSCconst [c] (SLL <x.Type> x y) flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
c := v_0.AuxInt
x := v.Args[1]
y := v.Args[2]
- flags := v.Args[3]
v.reset(OpARMRSCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// cond:
// result: (SBCshiftLL x y [c] flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
x := v.Args[0]
y := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- flags := v.Args[3]
v.reset(OpARMSBCshiftLL)
v.AuxInt = c
v.AddArg(x)
// result: (RSCconst [c] (SRAconst <x.Type> x [d]) flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMRSCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// result: (SBCconst x [int64(int32(c)>>uint64(d))] flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- flags := v.Args[2]
v.reset(OpARMSBCconst)
v.AuxInt = int64(int32(c) >> uint64(d))
v.AddArg(x)
// cond:
// result: (RSCconst [c] (SRA <x.Type> x y) flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
c := v_0.AuxInt
x := v.Args[1]
y := v.Args[2]
- flags := v.Args[3]
v.reset(OpARMRSCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// cond:
// result: (SBCshiftRA x y [c] flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
x := v.Args[0]
y := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- flags := v.Args[3]
v.reset(OpARMSBCshiftRA)
v.AuxInt = c
v.AddArg(x)
// result: (RSCconst [c] (SRLconst <x.Type> x [d]) flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- flags := v.Args[2]
v.reset(OpARMRSCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// result: (SBCconst x [int64(int32(uint32(c)>>uint64(d)))] flags)
for {
d := v.AuxInt
- _ = v.Args[2]
+ flags := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARMMOVWconst {
break
}
c := v_1.AuxInt
- flags := v.Args[2]
v.reset(OpARMSBCconst)
v.AuxInt = int64(int32(uint32(c) >> uint64(d)))
v.AddArg(x)
// cond:
// result: (RSCconst [c] (SRL <x.Type> x y) flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
c := v_0.AuxInt
x := v.Args[1]
y := v.Args[2]
- flags := v.Args[3]
v.reset(OpARMRSCconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (SBCshiftRL x y [c] flags)
for {
- _ = v.Args[3]
+ flags := v.Args[3]
x := v.Args[0]
y := v.Args[1]
v_2 := v.Args[2]
break
}
c := v_2.AuxInt
- flags := v.Args[3]
v.reset(OpARMSBCshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (RSBconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMRSBconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (RSBshiftLL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMRSBshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (RSBshiftRL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMRSBshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (RSBshiftRA x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMRSBshiftRA)
v.AuxInt = c
v.AddArg(x)
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMSUBshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (RSBshiftLLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMRSBshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMSUBshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (RSBshiftRLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMRSBshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMSUBshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (RSBshiftRAreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMRSBshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MOVWconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpARMMOVWconst)
if v_1.Op != OpARMMUL {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
if !(objabi.GOARM == 7) {
break
}
if v_1.Op != OpARMMULD {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
if !(a.Uses == 1 && objabi.GOARM >= 6) {
break
}
if v_1.Op != OpARMNMULD {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
if !(a.Uses == 1 && objabi.GOARM >= 6) {
break
}
if v_1.Op != OpARMMULF {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
if !(a.Uses == 1 && objabi.GOARM >= 6) {
break
}
if v_1.Op != OpARMNMULF {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
if !(a.Uses == 1 && objabi.GOARM >= 6) {
break
}
// cond:
// result: (RSBSshiftLL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMRSBSshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (RSBSshiftRL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMRSBSshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (RSBSshiftRA x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMRSBSshiftRA)
v.AuxInt = c
v.AddArg(x)
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMSUBSshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (RSBSshiftLLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMRSBSshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMSUBSshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (RSBSshiftRLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMRSBSshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMSUBSshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (RSBSshiftRAreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMRSBSshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// result: (RSBSconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMRSBSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// cond:
// result: (RSBSconst [c] (SLL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMRSBSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// result: (RSBSconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMRSBSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// cond:
// result: (RSBSconst [c] (SRA <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMRSBSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// result: (RSBSconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMRSBSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// cond:
// result: (RSBSconst [c] (SRL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMRSBSconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// result: (RSBconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMRSBconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// cond:
// result: (RSBconst [c] (SLL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMRSBconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// result: (RSBconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMRSBconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// cond:
// result: (RSBconst [c] (SRA <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMRSBconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// result: (RSBconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMRSBconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// cond:
// result: (RSBconst [c] (SRL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMRSBconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (TEQconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMTEQconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (TEQshiftLL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMTEQshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (TEQshiftRL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMTEQshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (TEQshiftRA x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMTEQshiftRA)
v.AuxInt = c
v.AddArg(x)
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMTEQshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (TEQshiftLLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMTEQshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMTEQshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (TEQshiftRLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMTEQshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMTEQshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (TEQshiftRAreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMTEQshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// result: (TEQconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMTEQconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// cond:
// result: (TEQconst [c] (SLL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMTEQconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// result: (TEQconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMTEQconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// cond:
// result: (TEQconst [c] (SRA <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMTEQconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// result: (TEQconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMTEQconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// cond:
// result: (TEQconst [c] (SRL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMTEQconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (TSTconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMTSTconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (TSTshiftLL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMTSTshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (TSTshiftRL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMTSTshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (TSTshiftRA x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMTSTshiftRA)
v.AuxInt = c
v.AddArg(x)
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMTSTshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (TSTshiftLLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMTSTshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMTSTshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (TSTshiftRLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMTSTshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMTSTshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (TSTshiftRAreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMTSTshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// result: (TSTconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMTSTconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// cond:
// result: (TSTconst [c] (SLL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMTSTconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// result: (TSTconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMTSTconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// cond:
// result: (TSTconst [c] (SRA <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMTSTconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// result: (TSTconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMTSTconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// cond:
// result: (TSTconst [c] (SRL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMTSTconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (XORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMXORconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (XORshiftLL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMXORshiftLL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (XORshiftRL x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMXORshiftRL)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (XORshiftRA x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRAconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMXORshiftRA)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (XORshiftRR x y [c])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRRconst {
break
}
c := v_0.AuxInt
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARMXORshiftRR)
v.AuxInt = c
v.AddArg(x)
if v_1.Op != OpARMSLL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMXORshiftLLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XORshiftLLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMXORshiftLLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMXORshiftRLreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XORshiftRLreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMXORshiftRLreg)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARMSRA {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARMXORshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XORshiftRAreg x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRA {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpARMXORshiftRAreg)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MOVWconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpARMMOVWconst)
// result: (XORconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMXORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLLconst, x.Type)
// result: (SRRconst [32-c] x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
if v_0.AuxInt != 32-c {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARMSRRconst)
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMBFXU {
break
if v_0.AuxInt != armBFAuxInt(8, 8) {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARMREV16)
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSRLconst {
break
if v_0_0.AuxInt != 16 {
break
}
- x := v_0_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0_0.Args[0] {
break
}
if !(objabi.GOARM >= 6) {
// cond:
// result: (XORconst [c] (SLL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMXORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// result: (XORconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMXORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRAconst, x.Type)
// cond:
// result: (XORconst [c] (SRA <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMXORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRA, x.Type)
// result: (XORconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMXORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRLconst, x.Type)
// result: (SRRconst [ c] x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMSLLconst {
break
if v_0.AuxInt != 32-c {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARMSRRconst)
// cond:
// result: (XORconst [c] (SRL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARMXORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// result: (XORconst [c] (SRRconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARMMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARMXORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARMSRRconst, x.Type)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDF x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMADDF)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMADDS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADC x y c)
for {
- _ = v.Args[2]
+ c := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- c := v.Args[2]
v.reset(OpARMADC)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMADDD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMAND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMAND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMAND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMAND)
v.AddArg(x)
v.AddArg(y)
// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMADD)
v0 := b.NewValue0(v.Pos, OpARMSRLconst, t)
v0.AuxInt = 1
// result: (CALLclosure [argwid] entry closure mem)
for {
argwid := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
entry := v.Args[0]
closure := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMCALLclosure)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (Div32 (SignExt16to32 x) (SignExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpDiv32)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (Div32u (ZeroExt16to32 x) (ZeroExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpDiv32u)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (SUB (XOR <typ.UInt32> (Select0 <typ.UInt32> (CALLudiv (SUB <typ.UInt32> (XOR x <typ.UInt32> (Signmask x)) (Signmask x)) (SUB <typ.UInt32> (XOR y <typ.UInt32> (Signmask y)) (Signmask y)))) (Signmask (XOR <typ.UInt32> x y))) (Signmask (XOR <typ.UInt32> x y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSUB)
v0 := b.NewValue0(v.Pos, OpARMXOR, typ.UInt32)
v1 := b.NewValue0(v.Pos, OpSelect0, typ.UInt32)
// cond:
// result: (DIVF x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMDIVF)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Select0 <typ.UInt32> (CALLudiv x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v.Type = typ.UInt32
v0 := b.NewValue0(v.Pos, OpARMCALLudiv, types.NewTuple(typ.UInt32, typ.UInt32))
// cond:
// result: (DIVD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMDIVD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Div32 (SignExt8to32 x) (SignExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpDiv32)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (Div32u (ZeroExt8to32 x) (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpDiv32u)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (Equal (CMP (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (Equal (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (Equal (CMPF x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMEqual)
v0 := b.NewValue0(v.Pos, OpARMCMPF, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (Equal (CMPD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMEqual)
v0 := b.NewValue0(v.Pos, OpARMCMPD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (Equal (CMP (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (XORconst [1] (XOR <typ.Bool> x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpARMXOR, typ.Bool)
// cond:
// result: (Equal (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMP (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (GreaterEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterEqualU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (GreaterEqual (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMPF x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterEqual)
v0 := b.NewValue0(v.Pos, OpARMCMPF, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqualU (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterEqualU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMPD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterEqual)
v0 := b.NewValue0(v.Pos, OpARMCMPD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMP (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (GreaterEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterEqualU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (GreaterThan (CMP (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterThan)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (GreaterThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterThanU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (GreaterThan (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterThan)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThan (CMPF x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterThan)
v0 := b.NewValue0(v.Pos, OpARMCMPF, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThanU (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterThanU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThan (CMPD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterThan)
v0 := b.NewValue0(v.Pos, OpARMCMPD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThan (CMP (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterThan)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (GreaterThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterThanU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (HMUL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMHMUL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (HMULU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMHMULU)
v.AddArg(x)
v.AddArg(y)
// result: (CALLinter [argwid] entry mem)
for {
argwid := v.AuxInt
- _ = v.Args[1]
- entry := v.Args[0]
mem := v.Args[1]
+ entry := v.Args[0]
v.reset(OpARMCALLinter)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (LessThanU (CMP idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpARMLessThanU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(idx)
// cond:
// result: (LessEqualU (CMP idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpARMLessEqualU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(idx)
// cond:
// result: (LessEqual (CMP (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMLessEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (LessEqualU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMLessEqualU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (LessEqual (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMLessEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMPF y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterEqual)
v0 := b.NewValue0(v.Pos, OpARMCMPF, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (LessEqualU (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMLessEqualU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMPD y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterEqual)
v0 := b.NewValue0(v.Pos, OpARMCMPD, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (LessEqual (CMP (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMLessEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (LessEqualU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMLessEqualU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (LessThan (CMP (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMLessThan)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (LessThanU (CMP (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMLessThanU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (LessThan (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMLessThan)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThan (CMPF y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterThan)
v0 := b.NewValue0(v.Pos, OpARMCMPF, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (LessThanU (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMLessThanU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThan (CMPD y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMGreaterThan)
v0 := b.NewValue0(v.Pos, OpARMCMPD, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (LessThan (CMP (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMLessThan)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (LessThanU (CMP (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMLessThanU)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// result: (MOVBUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsBoolean()) {
break
}
// result: (MOVBload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is8BitInt(t) && isSigned(t)) {
break
}
// result: (MOVBUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is8BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVHload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t) && isSigned(t)) {
break
}
// result: (MOVHUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVWload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitInt(t) || isPtr(t)) {
break
}
// result: (MOVFload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitFloat(t)) {
break
}
// result: (MOVDload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitFloat(t)) {
break
}
// cond:
// result: (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMCMOVWHSconst)
v.AuxInt = 0
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// cond:
// result: (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMCMOVWHSconst)
v.AuxInt = 0
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// cond:
// result: (SLL x (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSLL)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMCMOVWHSconst)
v.AuxInt = 0
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// cond:
// result: (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMCMOVWHSconst)
v.AuxInt = 0
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// cond:
// result: (SLL x (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSLL)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (CMOVWHSconst (SLL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMCMOVWHSconst)
v.AuxInt = 0
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// cond:
// result: (CMOVWHSconst (SLL <x.Type> x y) (CMPconst [256] y) [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMCMOVWHSconst)
v.AuxInt = 0
v0 := b.NewValue0(v.Pos, OpARMSLL, x.Type)
// cond:
// result: (SLL x (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSLL)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (Mod32 (SignExt16to32 x) (SignExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMod32)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMod32u)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (SUB (XOR <typ.UInt32> (Select1 <typ.UInt32> (CALLudiv (SUB <typ.UInt32> (XOR <typ.UInt32> x (Signmask x)) (Signmask x)) (SUB <typ.UInt32> (XOR <typ.UInt32> y (Signmask y)) (Signmask y)))) (Signmask x)) (Signmask x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSUB)
v0 := b.NewValue0(v.Pos, OpARMXOR, typ.UInt32)
v1 := b.NewValue0(v.Pos, OpSelect1, typ.UInt32)
// cond:
// result: (Select1 <typ.UInt32> (CALLudiv x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v.Type = typ.UInt32
v0 := b.NewValue0(v.Pos, OpARMCALLudiv, types.NewTuple(typ.UInt32, typ.UInt32))
// cond:
// result: (Mod32 (SignExt8to32 x) (SignExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMod32)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMod32u)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(x)
if v.AuxInt != 0 {
break
}
- _ = v.Args[2]
mem := v.Args[2]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVBstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpARMMOVBUload, typ.UInt8)
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 2 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVBstore)
v.AuxInt = 1
v.AddArg(dst)
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 4 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVBstore)
v.AuxInt = 3
v.AddArg(dst)
if v.AuxInt != 3 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMMOVBstore)
v.AuxInt = 2
v.AddArg(dst)
for {
s := v.AuxInt
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s%4 == 0 && s > 4 && s <= 512 && t.(*types.Type).Alignment()%4 == 0 && !config.noDuffDevice) {
break
}
for {
s := v.AuxInt
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !((s > 512 || config.noDuffDevice) || t.(*types.Type).Alignment()%4 != 0) {
break
}
// cond:
// result: (MUL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMMUL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MUL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMMUL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULF x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMMULF)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULLU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMMULLU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMMULD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MUL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMMUL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (NotEqual (CMP (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMNotEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (NotEqual (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMNotEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (NotEqual (CMPF x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMNotEqual)
v0 := b.NewValue0(v.Pos, OpARMCMPF, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (NotEqual (CMPD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMNotEqual)
v0 := b.NewValue0(v.Pos, OpARMCMPD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (NotEqual (CMP (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMNotEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMXOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (NotEqual (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMNotEqual)
v0 := b.NewValue0(v.Pos, OpARMCMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LoweredNilCheck ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARMLoweredNilCheck)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMCMOVWHSconst)
v.AuxInt = 0
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (CMOVWHSconst (SRL <x.Type> (ZeroExt16to32 x) y) (CMPconst [256] y) [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMCMOVWHSconst)
v.AuxInt = 0
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (SRL (ZeroExt16to32 x) (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSRL)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (SRAcond (SignExt16to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSRAcond)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (SRAcond (SignExt16to32 x) y (CMPconst [256] y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSRAcond)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt16to32 x) (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSRA)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (CMOVWHSconst (SRL <x.Type> x (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMCMOVWHSconst)
v.AuxInt = 0
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (CMOVWHSconst (SRL <x.Type> x y) (CMPconst [256] y) [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMCMOVWHSconst)
v.AuxInt = 0
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (SRL x (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSRL)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (SRAcond x (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSRAcond)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (SRAcond x y (CMPconst [256] y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSRAcond)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SRA x (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSRA)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) (ZeroExt16to32 y)) (CMPconst [256] (ZeroExt16to32 y)) [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMCMOVWHSconst)
v.AuxInt = 0
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (CMOVWHSconst (SRL <x.Type> (ZeroExt8to32 x) y) (CMPconst [256] y) [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMCMOVWHSconst)
v.AuxInt = 0
v0 := b.NewValue0(v.Pos, OpARMSRL, x.Type)
// cond:
// result: (SRL (ZeroExt8to32 x) (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSRL)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (SRAcond (SignExt8to32 x) (ZeroExt16to32 y) (CMPconst [256] (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSRAcond)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (SRAcond (SignExt8to32 x) y (CMPconst [256] y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSRAcond)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt8to32 x) (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSRA)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// result: (MOVBstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 1) {
break
}
// result: (MOVHstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 2) {
break
}
// result: (MOVWstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && !is32BitFloat(val.Type)) {
break
}
// result: (MOVFstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
break
}
// result: (MOVDstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
break
}
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBF x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSUBF)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSUBS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SBC x y c)
for {
- _ = v.Args[2]
+ c := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- c := v.Args[2]
v.reset(OpARMSBC)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSUBD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMSUB)
v.AddArg(x)
v.AddArg(y)
// result: (LoweredWB {fn} destptr srcptr mem)
for {
fn := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
destptr := v.Args[0]
srcptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARMLoweredWB)
v.Aux = fn
v.AddArg(destptr)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMXOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMXOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARMXOR)
v.AddArg(x)
v.AddArg(y)
if v.AuxInt != 0 {
break
}
- _ = v.Args[1]
mem := v.Args[1]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARMMOVBstore)
v.AddArg(ptr)
v0 := b.NewValue0(v.Pos, OpARMMOVWconst, typ.UInt32)
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 2 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARMMOVBstore)
v.AuxInt = 1
v.AddArg(ptr)
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 4 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARMMOVBstore)
v.AuxInt = 3
v.AddArg(ptr)
if v.AuxInt != 3 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARMMOVBstore)
v.AuxInt = 2
v.AddArg(ptr)
for {
s := v.AuxInt
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(s%4 == 0 && s > 4 && s <= 512 && t.(*types.Type).Alignment()%4 == 0 && !config.noDuffDevice) {
break
}
for {
s := v.AuxInt
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !((s > 512 || config.noDuffDevice) || t.(*types.Type).Alignment()%4 != 0) {
break
}
if l.Op != OpARMSUB {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMMULS {
break
}
- _ = l.Args[2]
+ a := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- a := l.Args[2]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADD {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMMULA {
break
}
- _ = l.Args[2]
+ a := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- a := l.Args[2]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMAND {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXOR {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUB {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMMULS {
break
}
- _ = l.Args[2]
+ a := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- a := l.Args[2]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADD {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMMULA {
break
}
- _ = l.Args[2]
+ a := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- a := l.Args[2]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMAND {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXOR {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUB {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMMULS {
break
}
- _ = l.Args[2]
+ a := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- a := l.Args[2]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADD {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMAND {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMMULA {
break
}
- _ = l.Args[2]
+ a := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- a := l.Args[2]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXOR {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUB {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMMULS {
break
}
- _ = l.Args[2]
+ a := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- a := l.Args[2]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADD {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMMULA {
break
}
- _ = l.Args[2]
+ a := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- a := l.Args[2]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMAND {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXOR {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUB {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMMULS {
break
}
- _ = l.Args[2]
+ a := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- a := l.Args[2]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADD {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMMULA {
break
}
- _ = l.Args[2]
+ a := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- a := l.Args[2]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMAND {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXOR {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUB {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMMULS {
break
}
- _ = l.Args[2]
+ a := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- a := l.Args[2]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMSUBshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADD {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMMULA {
break
}
- _ = l.Args[2]
+ a := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- a := l.Args[2]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMADDshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMAND {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMANDshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXOR {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
break
}
c := l.AuxInt
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftLLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftRLreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
if l.Op != OpARMXORshiftRAreg {
break
}
- _ = l.Args[2]
+ z := l.Args[2]
x := l.Args[0]
y := l.Args[1]
- z := l.Args[2]
if !(l.Uses == 1) {
break
}
// cond:
// result: (ADDconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64ADDconst)
v.AuxInt = c
v.AddArg(x)
if l.Op != OpARM64MUL {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1 && clobber(l)) {
break
}
// cond: l.Uses==1 && clobber(l)
// result: (MADD a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
l := v.Args[0]
if l.Op != OpARM64MUL {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
- a := v.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1 && clobber(l)) {
break
}
if l.Op != OpARM64MNEG {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1 && clobber(l)) {
break
}
// cond: l.Uses==1 && clobber(l)
// result: (MSUB a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
l := v.Args[0]
if l.Op != OpARM64MNEG {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
- a := v.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1 && clobber(l)) {
break
}
if l.Op != OpARM64MULW {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(a.Type.Size() != 8 && l.Uses == 1 && clobber(l)) {
break
}
// cond: a.Type.Size() != 8 && l.Uses==1 && clobber(l)
// result: (MADDW a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
l := v.Args[0]
if l.Op != OpARM64MULW {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
- a := v.Args[1]
+ x := l.Args[0]
if !(a.Type.Size() != 8 && l.Uses == 1 && clobber(l)) {
break
}
if l.Op != OpARM64MNEGW {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(a.Type.Size() != 8 && l.Uses == 1 && clobber(l)) {
break
}
// cond: a.Type.Size() != 8 && l.Uses==1 && clobber(l)
// result: (MSUBW a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
l := v.Args[0]
if l.Op != OpARM64MNEGW {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
- a := v.Args[1]
+ x := l.Args[0]
if !(a.Type.Size() != 8 && l.Uses == 1 && clobber(l)) {
break
}
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64NEG {
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARM64SUB)
v.AddArg(x)
v.AddArg(y)
// cond: clobberIfDead(x1)
// result: (ADDshiftLL x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SLLconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond: clobberIfDead(x1)
// result: (ADDshiftRL x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SRLconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond: clobberIfDead(x1)
// result: (ADDshiftRA x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SRAconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// result: (ADDconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64ADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
// result: (RORconst [64-c] x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64SRLconst {
break
if v_0.AuxInt != 64-c {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARM64RORconst)
for {
t := v.Type
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64UBFX {
break
}
bfc := v_0.AuxInt
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
if !(c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)) {
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64UBFX {
break
if v_0.AuxInt != armBFAuxInt(8, 8) {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARM64REV16W)
// result: (EXTRconst [64-c] x2 x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x2 := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64SRLconst {
break
break
}
x := v_0.Args[0]
- x2 := v.Args[1]
v.reset(OpARM64EXTRconst)
v.AuxInt = 64 - c
v.AddArg(x2)
for {
t := v.Type
c := v.AuxInt
- _ = v.Args[1]
+ x2 := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64UBFX {
break
}
bfc := v_0.AuxInt
x := v_0.Args[0]
- x2 := v.Args[1]
if !(c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)) {
break
}
// result: (ADDconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64ADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
// result: (ADDconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64ADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
// result: (RORconst [ c] x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64SLLconst {
break
if v_0.AuxInt != 64-c {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARM64RORconst)
// cond:
// result: (ANDconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64ANDconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: (BIC x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MVN {
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARM64BIC)
v.AddArg(x)
v.AddArg(y)
// cond: clobberIfDead(x1)
// result: (ANDshiftLL x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SLLconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond: clobberIfDead(x1)
// result: (ANDshiftRL x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SRLconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond: clobberIfDead(x1)
// result: (ANDshiftRA x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SRAconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// result: (ANDconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64ANDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
// result: (ANDconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64ANDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
// result: (ANDconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64ANDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
// cond:
// result: (MOVDconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpARM64MOVDconst)
// cond:
// result: (CMNconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64CMNconst)
v.AuxInt = c
v.AddArg(x)
// cond: clobberIfDead(x1)
// result: (CMNshiftLL x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SLLconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond: clobberIfDead(x1)
// result: (CMNshiftRL x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SRLconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond: clobberIfDead(x1)
// result: (CMNshiftRA x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SRAconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond:
// result: (CMNWconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64CMNWconst)
v.AuxInt = c
v.AddArg(x)
// result: (CMNconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64CMNconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
// result: (CMNconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64CMNconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
// result: (CMNconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64CMNconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
// cond:
// result: (InvertFlags (CMPconst [c] x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64InvertFlags)
v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
v0.AuxInt = c
// cond: clobberIfDead(x0)
// result: (InvertFlags (CMPshiftLL x1 y [c]))
for {
- _ = v.Args[1]
+ x1 := v.Args[1]
x0 := v.Args[0]
if x0.Op != OpARM64SLLconst {
break
}
c := x0.AuxInt
y := x0.Args[0]
- x1 := v.Args[1]
if !(clobberIfDead(x0)) {
break
}
// cond: clobberIfDead(x0)
// result: (InvertFlags (CMPshiftRL x1 y [c]))
for {
- _ = v.Args[1]
+ x1 := v.Args[1]
x0 := v.Args[0]
if x0.Op != OpARM64SRLconst {
break
}
c := x0.AuxInt
y := x0.Args[0]
- x1 := v.Args[1]
if !(clobberIfDead(x0)) {
break
}
// cond: clobberIfDead(x0)
// result: (InvertFlags (CMPshiftRA x1 y [c]))
for {
- _ = v.Args[1]
+ x1 := v.Args[1]
x0 := v.Args[0]
if x0.Op != OpARM64SRAconst {
break
}
c := x0.AuxInt
y := x0.Args[0]
- x1 := v.Args[1]
if !(clobberIfDead(x0)) {
break
}
// cond:
// result: (InvertFlags (CMPWconst [int64(int32(c))] x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64InvertFlags)
v0 := b.NewValue0(v.Pos, OpARM64CMPWconst, types.TypeFlags)
v0.AuxInt = int64(int32(c))
// result: (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d])))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64InvertFlags)
v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
v0.AuxInt = c
// result: (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d])))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64InvertFlags)
v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
v0.AuxInt = c
// result: (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d])))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64InvertFlags)
v0 := b.NewValue0(v.Pos, OpARM64CMPconst, types.TypeFlags)
v0.AuxInt = c
// result: (CSEL0 {cc} x flag)
for {
cc := v.Aux
- _ = v.Args[2]
+ flag := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
if v_1.AuxInt != 0 {
break
}
- flag := v.Args[2]
v.reset(OpARM64CSEL0)
v.Aux = cc
v.AddArg(x)
// result: (CSEL0 {arm64Negate(cc.(Op))} y flag)
for {
cc := v.Aux
- _ = v.Args[2]
+ flag := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
break
}
y := v.Args[1]
- flag := v.Args[2]
v.reset(OpARM64CSEL0)
v.Aux = arm64Negate(cc.(Op))
v.AddArg(y)
// result: x
for {
cc := v.Aux
- _ = v.Args[2]
- x := v.Args[0]
flag := v.Args[2]
+ x := v.Args[0]
if !(ccARM64Eval(cc, flag) > 0) {
break
}
// result: y
for {
cc := v.Aux
- _ = v.Args[2]
- y := v.Args[1]
flag := v.Args[2]
+ y := v.Args[1]
if !(ccARM64Eval(cc, flag) < 0) {
break
}
// result: x
for {
cc := v.Aux
- _ = v.Args[1]
- x := v.Args[0]
flag := v.Args[1]
+ x := v.Args[0]
if !(ccARM64Eval(cc, flag) > 0) {
break
}
// result: (MOVDconst [0])
for {
cc := v.Aux
- _ = v.Args[1]
flag := v.Args[1]
if !(ccARM64Eval(cc, flag) < 0) {
break
// cond:
// result: (MOVDconst [-1])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpARM64MOVDconst)
if v_1.Op != OpARM64FMULD {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
v.reset(OpARM64FMADDD)
v.AddArg(a)
v.AddArg(x)
// cond:
// result: (FMADDD a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FMULD {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64FMADDD)
v.AddArg(a)
v.AddArg(x)
if v_1.Op != OpARM64FNMULD {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
v.reset(OpARM64FMSUBD)
v.AddArg(a)
v.AddArg(x)
// cond:
// result: (FMSUBD a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FNMULD {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64FMSUBD)
v.AddArg(a)
v.AddArg(x)
if v_1.Op != OpARM64FMULS {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
v.reset(OpARM64FMADDS)
v.AddArg(a)
v.AddArg(x)
// cond:
// result: (FMADDS a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FMULS {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64FMADDS)
v.AddArg(a)
v.AddArg(x)
if v_1.Op != OpARM64FNMULS {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
v.reset(OpARM64FMSUBS)
v.AddArg(a)
v.AddArg(x)
// cond:
// result: (FMSUBS a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FNMULS {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64FMSUBS)
v.AddArg(a)
v.AddArg(x)
// cond:
// result: (InvertFlags (FCMPD0 x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FMOVDconst {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpARM64InvertFlags)
v0 := b.NewValue0(v.Pos, OpARM64FCMPD0, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (InvertFlags (FCMPS0 x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FMOVSconst {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpARM64InvertFlags)
v0 := b.NewValue0(v.Pos, OpARM64FCMPS0, types.TypeFlags)
v0.AddArg(x)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (FMOVDload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64FMOVDload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (FMOVDload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64FMOVDload)
v.AuxInt = c
v.AddArg(ptr)
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64FMOVDgpfp {
break
}
val := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVDstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (FMOVDstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64FMOVDstore)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (FMOVDstore [c] idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
c := v_0.AuxInt
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64FMOVDstore)
v.AuxInt = c
v.AddArg(idx)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (FMOVSload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64FMOVSload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (FMOVSload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64FMOVSload)
v.AuxInt = c
v.AddArg(ptr)
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64FMOVSgpfp {
break
}
val := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVWstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (FMOVSstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64FMOVSstore)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (FMOVSstore [c] idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
c := v_0.AuxInt
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64FMOVSstore)
v.AuxInt = c
v.AddArg(idx)
// cond:
// result: (FNMULD x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FNEGD {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpARM64FNMULD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FNMULS x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FNEGS {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpARM64FNMULS)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpARM64FMULD {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64FNMULD)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpARM64FNMULD {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64FMULD)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpARM64FMULS {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64FNMULS)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpARM64FNMULS {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64FMULS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMULD x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FNEGD {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpARM64FMULD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMULS x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FNEGS {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpARM64FMULS)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpARM64FMULD {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
v.reset(OpARM64FMSUBD)
v.AddArg(a)
v.AddArg(x)
// cond:
// result: (FNMSUBD a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FMULD {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64FNMSUBD)
v.AddArg(a)
v.AddArg(x)
if v_1.Op != OpARM64FNMULD {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
v.reset(OpARM64FMADDD)
v.AddArg(a)
v.AddArg(x)
// cond:
// result: (FNMADDD a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FNMULD {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64FNMADDD)
v.AddArg(a)
v.AddArg(x)
if v_1.Op != OpARM64FMULS {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
v.reset(OpARM64FMSUBS)
v.AddArg(a)
v.AddArg(x)
// cond:
// result: (FNMSUBS a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FMULS {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64FNMSUBS)
v.AddArg(a)
v.AddArg(x)
if v_1.Op != OpARM64FNMULS {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
v.reset(OpARM64FMADDS)
v.AddArg(a)
v.AddArg(x)
// cond:
// result: (FNMADDS a x y)
for {
- _ = v.Args[1]
+ a := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64FNMULS {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- a := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64FNMADDS)
v.AddArg(a)
v.AddArg(x)
// cond:
// result: (SUB a x)
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
if v_1.AuxInt != -1 {
break
}
- x := v.Args[2]
v.reset(OpARM64SUB)
v.AddArg(a)
v.AddArg(x)
// cond:
// result: (ADD a x)
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
if v_1.AuxInt != 1 {
break
}
- x := v.Args[2]
v.reset(OpARM64ADD)
v.AddArg(a)
v.AddArg(x)
// cond: isPowerOfTwo(c)
// result: (ADDshiftLL a x [log2(c)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && c>=3
// result: (ADD a (ADDshiftLL <x.Type> x x [log2(c-1)]))
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(isPowerOfTwo(c-1) && c >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && c>=7
// result: (SUB a (SUBshiftLL <x.Type> x x [log2(c+1)]))
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(isPowerOfTwo(c+1) && c >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3)
// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%3 == 0 && isPowerOfTwo(c/3)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5)
// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%5 == 0 && isPowerOfTwo(c/5)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7)
// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%7 == 0 && isPowerOfTwo(c/7)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9)
// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%9 == 0 && isPowerOfTwo(c/9)) {
break
}
// cond:
// result: (ADDconst [c] (MUL <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARM64ADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64MUL, x.Type)
// cond: int32(c)==-1
// result: (SUB a x)
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(int32(c) == -1) {
break
}
// cond: int32(c)==1
// result: (ADD a x)
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(int32(c) == 1) {
break
}
// cond: isPowerOfTwo(c)
// result: (ADDshiftLL a x [log2(c)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && int32(c)>=3
// result: (ADD a (ADDshiftLL <x.Type> x x [log2(c-1)]))
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && int32(c)>=7
// result: (SUB a (SUBshiftLL <x.Type> x x [log2(c+1)]))
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
break
}
// cond:
// result: (ADDconst [c] (MULW <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARM64ADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64MULW, x.Type)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
if v_0.AuxInt != -1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond:
// result: (NEG x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
if v_0.AuxInt != 1 {
break
}
- x := v.Args[1]
v.reset(OpARM64NEG)
v.AddArg(x)
return true
// cond: isPowerOfTwo(c)
// result: (NEG (SLLconst <x.Type> [log2(c)] x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && c >= 3
// result: (NEG (ADDshiftLL <x.Type> x x [log2(c-1)]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c-1) && c >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && c >= 7
// result: (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log2(c+1)]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c+1) && c >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3)
// result: (SLLconst <x.Type> [log2(c/3)] (SUBshiftLL <x.Type> x x [2]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%3 == 0 && isPowerOfTwo(c/3)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5)
// result: (NEG (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%5 == 0 && isPowerOfTwo(c/5)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7)
// result: (SLLconst <x.Type> [log2(c/7)] (SUBshiftLL <x.Type> x x [3]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%7 == 0 && isPowerOfTwo(c/7)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9)
// result: (NEG (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%9 == 0 && isPowerOfTwo(c/9)) {
break
}
// cond: int32(c)==-1
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(int32(c) == -1) {
break
}
// cond: int32(c)==1
// result: (NEG x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(int32(c) == 1) {
break
}
// cond: isPowerOfTwo(c)
// result: (NEG (SLLconst <x.Type> [log2(c)] x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && int32(c) >= 3
// result: (NEG (ADDshiftLL <x.Type> x x [log2(c-1)]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && int32(c) >= 7
// result: (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log2(c+1)]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
// result: (SLLconst <x.Type> [log2(c/3)] (SUBshiftLL <x.Type> x x [2]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
// result: (NEG (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
// result: (SLLconst <x.Type> [log2(c/7)] (SUBshiftLL <x.Type> x x [3]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
// result: (NEG (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (MOVBUload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVBUload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVBUload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVBUload)
v.AuxInt = c
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (MOVBload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVBload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVBload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVBload)
v.AuxInt = c
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpARM64MOVBstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVBreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVBUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVHreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVHUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVWUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVBstore)
v.AuxInt = off
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64UBFX {
break
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64UBFX {
break
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
w0 := x.Args[1]
if w0.Op != OpARM64SRLconst {
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
w0 := x.Args[2]
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
w0 := x.Args[1]
if w0.Op != OpARM64UBFX {
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && getARM64BFwidth(bfc) == 32-getARM64BFlsb(bfc) && getARM64BFwidth(bfc2) == 32-getARM64BFlsb(bfc2) && getARM64BFlsb(bfc2) == getARM64BFlsb(bfc)-8 && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64UBFX {
break
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
w0 := x.Args[2]
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && getARM64BFwidth(bfc) == 32-getARM64BFlsb(bfc) && getARM64BFwidth(bfc2) == 32-getARM64BFlsb(bfc2) && getARM64BFlsb(bfc2) == getARM64BFlsb(bfc)-8 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
w0 := x.Args[1]
if w0.Op != OpARM64SRLconst {
if w != w0_0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
w0 := x.Args[2]
if w != w0_0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if x6.Aux != s {
break
}
- _ = x6.Args[2]
+ mem := x6.Args[2]
if ptr != x6.Args[0] {
break
}
if w != x6_1.Args[0] {
break
}
- mem := x6.Args[2]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)) {
break
}
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
x5_1 := x5.Args[1]
if x5_1.Op != OpARM64SRLconst {
break
if x6.Op != OpARM64MOVBstoreidx {
break
}
- _ = x6.Args[3]
+ mem := x6.Args[3]
ptr0 := x6.Args[0]
idx0 := x6.Args[1]
x6_2 := x6.Args[2]
if w != x6_2.Args[0] {
break
}
- mem := x6.Args[3]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)) {
break
}
if x2.Aux != s {
break
}
- _ = x2.Args[2]
+ mem := x2.Args[2]
if ptr != x2.Args[0] {
break
}
if w != x2_1.Args[0] {
break
}
- mem := x2.Args[2]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)) {
break
}
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
x1_1 := x1.Args[1]
if x1_1.Op != OpARM64UBFX {
break
if x2.Op != OpARM64MOVBstoreidx {
break
}
- _ = x2.Args[3]
+ mem := x2.Args[3]
ptr0 := x2.Args[0]
idx0 := x2.Args[1]
x2_2 := x2.Args[2]
if w != x2_2.Args[0] {
break
}
- mem := x2.Args[3]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2)) {
break
}
if x2.Aux != s {
break
}
- _ = x2.Args[2]
+ mem := x2.Args[2]
if ptr != x2.Args[0] {
break
}
if w != x2_1_0.Args[0] {
break
}
- mem := x2.Args[2]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)) {
break
}
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
x1_1 := x1.Args[1]
if x1_1.Op != OpARM64SRLconst {
break
if x2.Op != OpARM64MOVBstoreidx {
break
}
- _ = x2.Args[3]
+ mem := x2.Args[3]
ptr0 := x2.Args[0]
idx0 := x2.Args[1]
x2_2 := x2.Args[2]
if w != x2_2_0.Args[0] {
break
}
- mem := x2.Args[3]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2)) {
break
}
if x2.Aux != s {
break
}
- _ = x2.Args[2]
+ mem := x2.Args[2]
if ptr != x2.Args[0] {
break
}
if w != x2_1.Args[0] {
break
}
- mem := x2.Args[2]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)) {
break
}
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
x1_1 := x1.Args[1]
if x1_1.Op != OpARM64SRLconst {
break
if x2.Op != OpARM64MOVBstoreidx {
break
}
- _ = x2.Args[3]
+ mem := x2.Args[3]
ptr0 := x2.Args[0]
idx0 := x2.Args[1]
x2_2 := x2.Args[2]
if w != x2_2.Args[0] {
break
}
- mem := x2.Args[3]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if ptr != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr1 := v_0.Args[0]
idx1 := v_0.Args[1]
+ ptr1 := v_0.Args[0]
w := v.Args[1]
x := v.Args[2]
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr0 := x.Args[0]
idx0 := x.Args[1]
x_2 := x.Args[2]
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if ptr != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr1 := v_0.Args[0]
idx1 := v_0.Args[1]
+ ptr1 := v_0.Args[0]
w := v.Args[1]
x := v.Args[2]
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr0 := x.Args[0]
idx0 := x.Args[1]
x_2 := x.Args[2]
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if ptr != x.Args[0] {
break
}
if w != x_1_0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr1 := v_0.Args[0]
idx1 := v_0.Args[1]
+ ptr1 := v_0.Args[0]
w := v.Args[1]
x := v.Args[2]
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr0 := x.Args[0]
idx0 := x.Args[1]
x_2 := x.Args[2]
if w != x_2_0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if ptr != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr1 := v_0.Args[0]
idx1 := v_0.Args[1]
+ ptr1 := v_0.Args[0]
w := v.Args[1]
x := v.Args[2]
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr0 := x.Args[0]
idx0 := x.Args[1]
x_2 := x.Args[2]
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if ptr != x.Args[0] {
break
}
if w != x_1_0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr1 := v_0.Args[0]
idx1 := v_0.Args[1]
+ ptr1 := v_0.Args[0]
w := v.Args[1]
x := v.Args[2]
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr0 := x.Args[0]
idx0 := x.Args[1]
x_2 := x.Args[2]
if w != x_2_0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
// cond:
// result: (MOVBstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVBstore)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVBstore [c] idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
c := v_0.AuxInt
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVBstore)
v.AuxInt = c
v.AddArg(idx)
// cond:
// result: (MOVBstorezeroidx ptr idx mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
if v_2.AuxInt != 0 {
break
}
- mem := v.Args[3]
v.reset(OpARM64MOVBstorezeroidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVBstoreidx ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVBstoreidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVBstoreidx ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVBstoreidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVBstoreidx ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVBstoreidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVBstoreidx ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVBstoreidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVBstoreidx ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVBstoreidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVBstoreidx ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVBstoreidx)
v.AddArg(ptr)
v.AddArg(idx)
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if ptr != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x2.Op != OpARM64MOVBstoreidx {
break
}
- _ = x2.Args[3]
+ mem := x2.Args[3]
if ptr != x2.Args[0] {
break
}
if w != x2_2.Args[0] {
break
}
- mem := x2.Args[3]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)) {
break
}
if x2.Op != OpARM64MOVBstoreidx {
break
}
- _ = x2.Args[3]
+ mem := x2.Args[3]
if ptr != x2.Args[0] {
break
}
if w != x2_2.Args[0] {
break
}
- mem := x2.Args[3]
if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)) {
break
}
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if ptr != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if ptr != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[1]
- ptr1 := x.Args[0]
mem := x.Args[1]
+ ptr1 := x.Args[0]
if !(x.Uses == 1 && areAdjacentOffsets(i, j, 1) && is32Bit(min(i, j)) && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
x := v.Args[1]
if x.Op != OpARM64MOVBstorezeroidx {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
idx1 := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
// cond:
// result: (MOVBstorezero [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVBstorezero)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVBstorezero [c] idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
idx := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVBstorezero)
v.AuxInt = c
v.AddArg(idx)
if x.Op != OpARM64MOVBstorezeroidx {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if ptr != x.Args[0] {
break
}
if idx != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDshiftLL {
break
if v_0.AuxInt != 3 {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (MOVDload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVDload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVDload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVDload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVDloadidx8 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SLLconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVDloadidx8)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVDloadidx8 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64SLLconst {
break
}
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVDloadidx8)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVDload [c<<3] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVDload)
v.AuxInt = c << 3
v.AddArg(ptr)
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64FMOVDfpgp {
break
}
val := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64FMOVDstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDshiftLL {
break
if v_0.AuxInt != 3 {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpARM64MOVDstorezero)
v.AuxInt = off
v.Aux = sym
// cond:
// result: (MOVDstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVDstore)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVDstore [c] idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
c := v_0.AuxInt
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVDstore)
v.AuxInt = c
v.AddArg(idx)
// cond:
// result: (MOVDstoreidx8 ptr idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SLLconst {
}
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVDstoreidx8)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVDstoreidx8 ptr idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARM64SLLconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVDstoreidx8)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVDstorezeroidx ptr idx mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
if v_2.AuxInt != 0 {
break
}
- mem := v.Args[3]
v.reset(OpARM64MOVDstorezeroidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVDstore [c<<3] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVDstore)
v.AuxInt = c << 3
v.AddArg(ptr)
// cond:
// result: (MOVDstorezeroidx8 ptr idx mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
if v_2.AuxInt != 0 {
break
}
- mem := v.Args[3]
v.reset(OpARM64MOVDstorezeroidx8)
v.AddArg(ptr)
v.AddArg(idx)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDshiftLL {
break
if v_0.AuxInt != 3 {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[1]
- ptr1 := x.Args[0]
mem := x.Args[1]
+ ptr1 := x.Args[0]
if !(x.Uses == 1 && areAdjacentOffsets(i, j, 8) && is32Bit(min(i, j)) && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if p0.Op != OpARM64ADD {
break
}
- _ = p0.Args[1]
- ptr0 := p0.Args[0]
idx0 := p0.Args[1]
+ ptr0 := p0.Args[0]
x := v.Args[1]
if x.Op != OpARM64MOVDstorezeroidx {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
idx1 := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if p0.AuxInt != 3 {
break
}
- _ = p0.Args[1]
- ptr0 := p0.Args[0]
idx0 := p0.Args[1]
+ ptr0 := p0.Args[0]
x := v.Args[1]
if x.Op != OpARM64MOVDstorezeroidx8 {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
idx1 := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
break
}
// cond:
// result: (MOVDstorezero [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVDstorezero)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVDstorezero [c] idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
idx := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVDstorezero)
v.AuxInt = c
v.AddArg(idx)
// cond:
// result: (MOVDstorezeroidx8 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SLLconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVDstorezeroidx8)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVDstorezeroidx8 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64SLLconst {
break
}
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVDstorezeroidx8)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVDstorezero [c<<3] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVDstorezero)
v.AuxInt = c << 3
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDshiftLL {
break
if v_0.AuxInt != 1 {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (MOVHUload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVHUload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVHUload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVHUload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVHUloadidx2 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SLLconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVHUloadidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHUloadidx2 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64ADD {
break
}
- _ = v_1.Args[1]
- idx := v_1.Args[0]
- if idx != v_1.Args[1] {
+ idx := v_1.Args[1]
+ if idx != v_1.Args[0] {
break
}
- mem := v.Args[2]
v.reset(OpARM64MOVHUloadidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHUloadidx2 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- idx := v_0.Args[0]
- if idx != v_0.Args[1] {
+ idx := v_0.Args[1]
+ if idx != v_0.Args[0] {
break
}
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVHUloadidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHUload [c<<1] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVHUload)
v.AuxInt = c << 1
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDshiftLL {
break
if v_0.AuxInt != 1 {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (MOVHload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVHload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVHload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVHload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVHloadidx2 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SLLconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVHloadidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHloadidx2 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64ADD {
break
}
- _ = v_1.Args[1]
- idx := v_1.Args[0]
- if idx != v_1.Args[1] {
+ idx := v_1.Args[1]
+ if idx != v_1.Args[0] {
break
}
- mem := v.Args[2]
v.reset(OpARM64MOVHloadidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHloadidx2 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- idx := v_0.Args[0]
- if idx != v_0.Args[1] {
+ idx := v_0.Args[1]
+ if idx != v_0.Args[0] {
break
}
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVHloadidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHload [c<<1] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVHload)
v.AuxInt = c << 1
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDshiftLL {
break
if v_0.AuxInt != 1 {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpARM64MOVHstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVHreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVHUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVWUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVHstore)
v.AuxInt = off
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVHstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if v_0.AuxInt != 1 {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVHstoreidx2 {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64UBFX {
break
if x.Op != OpARM64MOVHstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if v_0.AuxInt != 1 {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64UBFX {
break
if x.Op != OpARM64MOVHstoreidx2 {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVHstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if v_0.AuxInt != 1 {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVHstoreidx2 {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
w0 := x.Args[1]
if w0.Op != OpARM64SRLconst {
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVHstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
w0 := x.Args[2]
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if v_0.AuxInt != 1 {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVHstoreidx2 {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
w0 := x.Args[2]
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
break
}
// cond:
// result: (MOVHstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVHstore)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVHstore [c] idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
c := v_0.AuxInt
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVHstore)
v.AuxInt = c
v.AddArg(idx)
// cond:
// result: (MOVHstoreidx2 ptr idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SLLconst {
}
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVHstoreidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstoreidx2 ptr idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64ADD {
break
}
- _ = v_1.Args[1]
- idx := v_1.Args[0]
- if idx != v_1.Args[1] {
+ idx := v_1.Args[1]
+ if idx != v_1.Args[0] {
break
}
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVHstoreidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstoreidx2 ptr idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARM64SLLconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVHstoreidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstoreidx2 ptr idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- idx := v_0.Args[0]
- if idx != v_0.Args[1] {
+ idx := v_0.Args[1]
+ if idx != v_0.Args[0] {
break
}
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVHstoreidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstorezeroidx ptr idx mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
if v_2.AuxInt != 0 {
break
}
- mem := v.Args[3]
v.reset(OpARM64MOVHstorezeroidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstoreidx ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVHstoreidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstoreidx ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVHstoreidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstoreidx ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVHstoreidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstoreidx ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVHstoreidx)
v.AddArg(ptr)
v.AddArg(idx)
if x.Op != OpARM64MOVHstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if ptr != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
// cond:
// result: (MOVHstore [c<<1] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVHstore)
v.AuxInt = c << 1
v.AddArg(ptr)
// cond:
// result: (MOVHstorezeroidx2 ptr idx mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
if v_2.AuxInt != 0 {
break
}
- mem := v.Args[3]
v.reset(OpARM64MOVHstorezeroidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstoreidx2 ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVHstoreidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstoreidx2 ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVHstoreidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstoreidx2 ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVHstoreidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstoreidx2 ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVHstoreidx2)
v.AddArg(ptr)
v.AddArg(idx)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDshiftLL {
break
if v_0.AuxInt != 1 {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[1]
- ptr1 := x.Args[0]
mem := x.Args[1]
+ ptr1 := x.Args[0]
if !(x.Uses == 1 && areAdjacentOffsets(i, j, 2) && is32Bit(min(i, j)) && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
x := v.Args[1]
if x.Op != OpARM64MOVHstorezeroidx {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
idx1 := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if v_0.AuxInt != 1 {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
x := v.Args[1]
if x.Op != OpARM64MOVHstorezeroidx2 {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
idx1 := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
break
}
// cond:
// result: (MOVHstorezero [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVHstorezero)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVHstorezero [c] idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
idx := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVHstorezero)
v.AuxInt = c
v.AddArg(idx)
// cond:
// result: (MOVHstorezeroidx2 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SLLconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVHstorezeroidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstorezeroidx2 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64ADD {
break
}
- _ = v_1.Args[1]
- idx := v_1.Args[0]
- if idx != v_1.Args[1] {
+ idx := v_1.Args[1]
+ if idx != v_1.Args[0] {
break
}
- mem := v.Args[2]
v.reset(OpARM64MOVHstorezeroidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstorezeroidx2 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64SLLconst {
break
}
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVHstorezeroidx2)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVHstorezeroidx2 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- idx := v_0.Args[0]
- if idx != v_0.Args[1] {
+ idx := v_0.Args[1]
+ if idx != v_0.Args[0] {
break
}
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVHstorezeroidx2)
v.AddArg(ptr)
v.AddArg(idx)
if x.Op != OpARM64MOVHstorezeroidx {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if ptr != x.Args[0] {
break
}
if idx != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
// cond:
// result: (MOVHstorezero [c<<1] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVHstorezero)
v.AuxInt = c << 1
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDshiftLL {
break
if v_0.AuxInt != 2 {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (MOVWUload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVWUload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWUload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVWUload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWUloadidx4 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SLLconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVWUloadidx4)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVWUloadidx4 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64SLLconst {
break
}
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVWUloadidx4)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVWUload [c<<2] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVWUload)
v.AuxInt = c << 2
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDshiftLL {
break
if v_0.AuxInt != 2 {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
// cond:
// result: (MOVWload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVWload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVWload)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWloadidx4 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SLLconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVWloadidx4)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVWloadidx4 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64SLLconst {
break
}
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVWloadidx4)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVWload [c<<2] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVWload)
v.AuxInt = c << 2
v.AddArg(ptr)
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64FMOVSfpgp {
break
}
val := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64FMOVSstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDshiftLL {
break
if v_0.AuxInt != 2 {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpARM64MOVWstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVWstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVWUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVWstore)
v.AuxInt = off
v.Aux = sym
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVWstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if v_0.AuxInt != 2 {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVWstoreidx4 {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
w0 := x.Args[1]
if w0.Op != OpARM64SRLconst {
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVWstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
w0 := x.Args[2]
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if v_0.AuxInt != 2 {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SRLconst {
break
if x.Op != OpARM64MOVWstoreidx4 {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
ptr1 := x.Args[0]
idx1 := x.Args[1]
w0 := x.Args[2]
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
break
}
// cond:
// result: (MOVWstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVWstore)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWstore [c] idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
c := v_0.AuxInt
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVWstore)
v.AuxInt = c
v.AddArg(idx)
// cond:
// result: (MOVWstoreidx4 ptr idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SLLconst {
}
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVWstoreidx4)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVWstoreidx4 ptr idx val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARM64SLLconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVWstoreidx4)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVWstorezeroidx ptr idx mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
if v_2.AuxInt != 0 {
break
}
- mem := v.Args[3]
v.reset(OpARM64MOVWstorezeroidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVWstoreidx ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVWstoreidx)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVWstoreidx ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVWstoreidx)
v.AddArg(ptr)
v.AddArg(idx)
if x.Op != OpARM64MOVWstoreidx {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if ptr != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
// cond:
// result: (MOVWstore [c<<2] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64MOVWstore)
v.AuxInt = c << 2
v.AddArg(ptr)
// cond:
// result: (MOVWstorezeroidx4 ptr idx mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
if v_2.AuxInt != 0 {
break
}
- mem := v.Args[3]
v.reset(OpARM64MOVWstorezeroidx4)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVWstoreidx4 ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVWstoreidx4)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVWstoreidx4 ptr idx x mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpARM64MOVWstoreidx4)
v.AddArg(ptr)
v.AddArg(idx)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDshiftLL {
break
if v_0.AuxInt != 2 {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(off == 0 && sym == nil) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[1]
- ptr1 := x.Args[0]
mem := x.Args[1]
+ ptr1 := x.Args[0]
if !(x.Uses == 1 && areAdjacentOffsets(i, j, 4) && is32Bit(min(i, j)) && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
if v_0.Op != OpARM64ADD {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
x := v.Args[1]
if x.Op != OpARM64MOVWstorezeroidx {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
idx1 := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
if v_0.AuxInt != 2 {
break
}
- _ = v_0.Args[1]
- ptr0 := v_0.Args[0]
idx0 := v_0.Args[1]
+ ptr0 := v_0.Args[0]
x := v.Args[1]
if x.Op != OpARM64MOVWstorezeroidx4 {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
ptr1 := x.Args[0]
idx1 := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && s == nil && isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) && clobber(x)) {
break
}
// cond:
// result: (MOVWstorezero [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVWstorezero)
v.AuxInt = c
v.AddArg(ptr)
// cond:
// result: (MOVWstorezero [c] idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
idx := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVWstorezero)
v.AuxInt = c
v.AddArg(idx)
// cond:
// result: (MOVWstorezeroidx4 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64SLLconst {
break
}
idx := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpARM64MOVWstorezeroidx4)
v.AddArg(ptr)
v.AddArg(idx)
// cond:
// result: (MOVWstorezeroidx4 ptr idx mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64SLLconst {
break
}
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVWstorezeroidx4)
v.AddArg(ptr)
v.AddArg(idx)
if x.Op != OpARM64MOVWstorezeroidx {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if ptr != x.Args[0] {
break
}
if idx != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
// cond:
// result: (MOVWstorezero [c<<2] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
v.reset(OpARM64MOVWstorezero)
v.AuxInt = c << 2
v.AddArg(ptr)
// cond:
// result: (ADD a x)
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
if v_1.AuxInt != -1 {
break
}
- x := v.Args[2]
v.reset(OpARM64ADD)
v.AddArg(a)
v.AddArg(x)
// cond:
// result: (SUB a x)
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
if v_1.AuxInt != 1 {
break
}
- x := v.Args[2]
v.reset(OpARM64SUB)
v.AddArg(a)
v.AddArg(x)
// cond: isPowerOfTwo(c)
// result: (SUBshiftLL a x [log2(c)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && c>=3
// result: (SUB a (ADDshiftLL <x.Type> x x [log2(c-1)]))
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(isPowerOfTwo(c-1) && c >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && c>=7
// result: (ADD a (SUBshiftLL <x.Type> x x [log2(c+1)]))
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(isPowerOfTwo(c+1) && c >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3)
// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%3 == 0 && isPowerOfTwo(c/3)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5)
// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%5 == 0 && isPowerOfTwo(c/5)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7)
// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%7 == 0 && isPowerOfTwo(c/7)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9)
// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%9 == 0 && isPowerOfTwo(c/9)) {
break
}
// cond:
// result: (ADDconst [c] (MNEG <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARM64ADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64MNEG, x.Type)
// cond: int32(c)==-1
// result: (ADD a x)
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(int32(c) == -1) {
break
}
// cond: int32(c)==1
// result: (SUB a x)
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(int32(c) == 1) {
break
}
// cond: isPowerOfTwo(c)
// result: (SUBshiftLL a x [log2(c)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && int32(c)>=3
// result: (SUB a (ADDshiftLL <x.Type> x x [log2(c-1)]))
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && int32(c)>=7
// result: (ADD a (SUBshiftLL <x.Type> x x [log2(c+1)]))
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
for {
- _ = v.Args[2]
+ x := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- x := v.Args[2]
if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
break
}
// cond:
// result: (ADDconst [c] (MNEGW <x.Type> x y))
for {
- _ = v.Args[2]
+ y := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
x := v.Args[1]
- y := v.Args[2]
v.reset(OpARM64ADDconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64MNEGW, x.Type)
// cond:
// result: (MNEG x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64NEG {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpARM64MNEG)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (NEG x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
if v_0.AuxInt != -1 {
break
}
- x := v.Args[1]
v.reset(OpARM64NEG)
v.AddArg(x)
return true
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
if v_0.AuxInt != 1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond: isPowerOfTwo(c)
// result: (SLLconst [log2(c)] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && c >= 3
// result: (ADDshiftLL x x [log2(c-1)])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c-1) && c >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && c >= 7
// result: (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c+1) && c >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3)
// result: (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%3 == 0 && isPowerOfTwo(c/3)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5)
// result: (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%5 == 0 && isPowerOfTwo(c/5)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7)
// result: (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%7 == 0 && isPowerOfTwo(c/7)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9)
// result: (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%9 == 0 && isPowerOfTwo(c/9)) {
break
}
// cond:
// result: (MNEGW x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64NEG {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpARM64MNEGW)
v.AddArg(x)
v.AddArg(y)
// cond: int32(c)==-1
// result: (NEG x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(int32(c) == -1) {
break
}
// cond: int32(c)==1
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(int32(c) == 1) {
break
}
// cond: isPowerOfTwo(c)
// result: (SLLconst [log2(c)] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c)) {
break
}
// cond: isPowerOfTwo(c-1) && int32(c) >= 3
// result: (ADDshiftLL x x [log2(c-1)])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
break
}
// cond: isPowerOfTwo(c+1) && int32(c) >= 7
// result: (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
break
}
// cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
// result: (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
break
}
// cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
// result: (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
break
}
// cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
// result: (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
break
}
// cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
// result: (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
break
}
if v_0.Op != OpARM64MUL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64MNEG)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpARM64MULW {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64MNEGW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64ORconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: (ORN x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MVN {
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARM64ORN)
v.AddArg(x)
v.AddArg(y)
// cond: clobberIfDead(x1)
// result: (ORshiftLL x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SLLconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond: clobberIfDead(x1)
// result: (ORshiftRL x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SRLconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond: clobberIfDead(x1)
// result: (ORshiftRA x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SRAconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
}
i3 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := o1.Args[1]
if y1.Op != OpARM64MOVDnop {
break
}
i0 := x3.AuxInt
s := x3.Aux
- _ = x3.Args[1]
- p := x3.Args[0]
mem := x3.Args[1]
+ p := x3.Args[0]
o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
break
}
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := o1.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x2.Args[1] {
break
}
if x3.Op != OpARM64MOVBUloadidx {
break
}
- _ = x3.Args[2]
+ mem := x3.Args[2]
ptr0 := x3.Args[0]
idx0 := x3.Args[1]
- mem := x3.Args[2]
o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x2.Args[1] {
break
}
if x0.Op != OpARM64MOVBUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr := x0.Args[0]
x0_1 := x0.Args[1]
if x0_1.Op != OpARM64ADDconst {
break
}
idx := x0_1.Args[0]
- mem := x0.Args[2]
y1 := o1.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if x3.Op != OpARM64MOVBUloadidx {
break
}
- _ = x3.Args[2]
+ mem := x3.Args[2]
ptr := x3.Args[0]
idx := x3.Args[1]
- mem := x3.Args[2]
o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
}
i7 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := o5.Args[1]
if y1.Op != OpARM64MOVDnop {
break
}
i0 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
break
}
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := o5.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x6.Args[1] {
break
}
if x7.Op != OpARM64MOVBUloadidx {
break
}
- _ = x7.Args[2]
+ mem := x7.Args[2]
ptr0 := x7.Args[0]
idx0 := x7.Args[1]
- mem := x7.Args[2]
o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x6.Args[1] {
break
}
if x0.Op != OpARM64MOVBUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr := x0.Args[0]
x0_1 := x0.Args[1]
if x0_1.Op != OpARM64ADDconst {
break
}
idx := x0_1.Args[0]
- mem := x0.Args[2]
y1 := o5.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if x7.Op != OpARM64MOVBUloadidx {
break
}
- _ = x7.Args[2]
+ mem := x7.Args[2]
ptr := x7.Args[0]
idx := x7.Args[1]
- mem := x7.Args[2]
o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := o1.Args[1]
if y1.Op != OpARM64MOVDnop {
break
}
i3 := x3.AuxInt
s := x3.Aux
- _ = x3.Args[1]
- p := x3.Args[0]
mem := x3.Args[1]
+ p := x3.Args[0]
o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
if x0.Op != OpARM64MOVBUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr0 := x0.Args[0]
idx0 := x0.Args[1]
- mem := x0.Args[2]
y1 := o1.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x1.Args[1] {
break
}
break
}
s := x3.Aux
- _ = x3.Args[1]
- p := x3.Args[0]
mem := x3.Args[1]
+ p := x3.Args[0]
o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x1.Args[1] {
break
}
if x0.Op != OpARM64MOVBUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
y1 := o1.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if x3.Op != OpARM64MOVBUloadidx {
break
}
- _ = x3.Args[2]
+ mem := x3.Args[2]
ptr := x3.Args[0]
x3_1 := x3.Args[1]
if x3_1.Op != OpARM64ADDconst {
break
}
idx := x3_1.Args[0]
- mem := x3.Args[2]
o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := o5.Args[1]
if y1.Op != OpARM64MOVDnop {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
if x0.Op != OpARM64MOVBUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr0 := x0.Args[0]
idx0 := x0.Args[1]
- mem := x0.Args[2]
y1 := o5.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x1.Args[1] {
break
}
break
}
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x1.Args[1] {
break
}
if x0.Op != OpARM64MOVBUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
y1 := o5.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if x7.Op != OpARM64MOVBUloadidx {
break
}
- _ = x7.Args[2]
+ mem := x7.Args[2]
ptr := x7.Args[0]
x7_1 := x7.Args[1]
if x7_1.Op != OpARM64ADDconst {
break
}
idx := x7_1.Args[0]
- mem := x7.Args[2]
o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
// cond:
// result: (MOVDconst [-1])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpARM64MOVDconst)
// result: (ORconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64ORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
// result: (RORconst [64-c] x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64SRLconst {
break
if v_0.AuxInt != 64-c {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARM64RORconst)
for {
t := v.Type
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64UBFX {
break
}
bfc := v_0.AuxInt
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
if !(c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)) {
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64UBFX {
break
if v_0.AuxInt != armBFAuxInt(8, 8) {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARM64REV16W)
// result: (EXTRconst [64-c] x2 x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x2 := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64SRLconst {
break
break
}
x := v_0.Args[0]
- x2 := v.Args[1]
v.reset(OpARM64EXTRconst)
v.AuxInt = 64 - c
v.AddArg(x2)
for {
t := v.Type
c := v.AuxInt
- _ = v.Args[1]
+ x2 := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64UBFX {
break
}
bfc := v_0.AuxInt
x := v_0.Args[0]
- x2 := v.Args[1]
if !(c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := v.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if x0.Op != OpARM64MOVBUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr0 := x0.Args[0]
idx0 := x0.Args[1]
- mem := x0.Args[2]
y1 := v.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x1.Args[1] {
break
}
if x0.Op != OpARM64MOVBUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
y1 := v.Args[1]
if y1.Op != OpARM64MOVDnop {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := o0.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if x0.Op != OpARM64MOVHUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr0 := x0.Args[0]
idx0 := x0.Args[1]
- mem := x0.Args[2]
y1 := o0.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x1.Args[1] {
break
}
if x0.Op != OpARM64MOVHUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
y1 := o0.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if x0.Op != OpARM64MOVHUloadidx2 {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr0 := x0.Args[0]
idx0 := x0.Args[1]
- mem := x0.Args[2]
y1 := o0.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if p1.AuxInt != 1 {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x1.Args[1] {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := o2.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if x0.Op != OpARM64MOVWUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr0 := x0.Args[0]
idx0 := x0.Args[1]
- mem := x0.Args[2]
y1 := o2.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x1.Args[1] {
break
}
if x0.Op != OpARM64MOVWUloadidx4 {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr0 := x0.Args[0]
idx0 := x0.Args[1]
- mem := x0.Args[2]
y1 := o2.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if p1.AuxInt != 2 {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x1.Args[1] {
break
}
if x0.Op != OpARM64MOVWUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
y1 := o2.Args[1]
if y1.Op != OpARM64MOVDnop {
break
}
i1 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := v.Args[1]
if y1.Op != OpARM64MOVDnop {
break
break
}
s := x0.Aux
- _ = x0.Args[1]
+ mem := x0.Args[1]
p1 := x0.Args[0]
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
- mem := x0.Args[1]
+ ptr1 := p1.Args[0]
y1 := v.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if x0.Op != OpARM64MOVBUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr := x0.Args[0]
x0_1 := x0.Args[1]
if x0_1.Op != OpARM64ADDconst {
break
}
idx := x0_1.Args[0]
- mem := x0.Args[2]
y1 := v.Args[1]
if y1.Op != OpARM64MOVDnop {
break
}
i2 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := o0.Args[1]
if y1.Op != OpARM64MOVDnop {
break
break
}
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := o0.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x1.Args[1] {
break
}
if x0.Op != OpARM64MOVHUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr := x0.Args[0]
x0_1 := x0.Args[1]
if x0_1.Op != OpARM64ADDconst {
break
}
idx := x0_1.Args[0]
- mem := x0.Args[2]
y1 := o0.Args[1]
if y1.Op != OpARM64MOVDnop {
break
}
i4 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := o2.Args[1]
if y1.Op != OpARM64MOVDnop {
break
break
}
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
y1 := o2.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if p1.Op != OpARM64ADD {
break
}
- _ = p1.Args[1]
- ptr1 := p1.Args[0]
idx1 := p1.Args[1]
+ ptr1 := p1.Args[0]
if mem != x3.Args[1] {
break
}
if x0.Op != OpARM64MOVWUloadidx {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
ptr := x0.Args[0]
x0_1 := x0.Args[1]
if x0_1.Op != OpARM64ADDconst {
break
}
idx := x0_1.Args[0]
- mem := x0.Args[2]
y1 := o2.Args[1]
if y1.Op != OpARM64MOVDnop {
break
// result: (ORconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64ORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
// result: (ORconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64ORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
// result: (RORconst [ c] x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64SLLconst {
break
if v_0.AuxInt != 64-c {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARM64RORconst)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARM64ADDconst {
break
ptr := v_0.Args[0]
val1 := v.Args[1]
val2 := v.Args[2]
- mem := v.Args[3]
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDaddr {
break
ptr := v_0.Args[0]
val1 := v.Args[1]
val2 := v.Args[2]
- mem := v.Args[3]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
if v_2.AuxInt != 0 {
break
}
- mem := v.Args[3]
v.reset(OpARM64MOVQstorezero)
v.AuxInt = off
v.Aux = sym
if l.Op != OpARM64MUL {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1 && clobber(l)) {
break
}
if l.Op != OpARM64MNEG {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(l.Uses == 1 && clobber(l)) {
break
}
if l.Op != OpARM64MULW {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(a.Type.Size() != 8 && l.Uses == 1 && clobber(l)) {
break
}
if l.Op != OpARM64MNEGW {
break
}
- _ = l.Args[1]
- x := l.Args[0]
y := l.Args[1]
+ x := l.Args[0]
if !(a.Type.Size() != 8 && l.Uses == 1 && clobber(l)) {
break
}
// cond:
// result: (MOVDconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpARM64MOVDconst)
if v_1.Op != OpARM64SUB {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpARM64SUB)
v0 := b.NewValue0(v.Pos, OpARM64ADD, v.Type)
v0.AddArg(x)
// cond:
// result: (SUB x (ADD <y.Type> y z))
for {
- _ = v.Args[1]
+ z := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64SUB {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- z := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpARM64SUB)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpARM64ADD, y.Type)
// cond:
// result: (TSTconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64TSTconst)
v.AuxInt = c
v.AddArg(x)
// cond: clobberIfDead(x1)
// result: (TSTshiftLL x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SLLconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond: clobberIfDead(x1)
// result: (TSTshiftRL x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SRLconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond: clobberIfDead(x1)
// result: (TSTshiftRA x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SRAconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond:
// result: (TSTWconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64TSTWconst)
v.AuxInt = c
v.AddArg(x)
// result: (TSTconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64TSTconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
// result: (TSTconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64TSTconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
// result: (TSTconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64TSTconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
if v.Type != typ.UInt64 {
break
}
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64MSUB)
v.Type = typ.UInt64
v.AddArg(x)
if v.Type != typ.UInt32 {
break
}
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64MSUBW)
v.Type = typ.UInt32
v.AddArg(x)
// cond:
// result: (XORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64XORconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (MOVDconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpARM64MOVDconst)
// cond:
// result: (EON x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MVN {
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpARM64EON)
v.AddArg(x)
v.AddArg(y)
// cond: clobberIfDead(x1)
// result: (XORshiftLL x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SLLconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond: clobberIfDead(x1)
// result: (XORshiftRL x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SRLconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// cond: clobberIfDead(x1)
// result: (XORshiftRA x0 y [c])
for {
- _ = v.Args[1]
+ x0 := v.Args[1]
x1 := v.Args[0]
if x1.Op != OpARM64SRAconst {
break
}
c := x1.AuxInt
y := x1.Args[0]
- x0 := v.Args[1]
if !(clobberIfDead(x1)) {
break
}
// result: (XORconst [c] (SLLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64XORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SLLconst, x.Type)
// result: (RORconst [64-c] x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64SRLconst {
break
if v_0.AuxInt != 64-c {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARM64RORconst)
for {
t := v.Type
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64UBFX {
break
}
bfc := v_0.AuxInt
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
if !(c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)) {
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64UBFX {
break
if v_0.AuxInt != armBFAuxInt(8, 8) {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARM64REV16W)
// result: (EXTRconst [64-c] x2 x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x2 := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64SRLconst {
break
break
}
x := v_0.Args[0]
- x2 := v.Args[1]
v.reset(OpARM64EXTRconst)
v.AuxInt = 64 - c
v.AddArg(x2)
for {
t := v.Type
c := v.AuxInt
- _ = v.Args[1]
+ x2 := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64UBFX {
break
}
bfc := v_0.AuxInt
x := v_0.Args[0]
- x2 := v.Args[1]
if !(c < 32 && t.Size() == 4 && bfc == armBFAuxInt(32-c, c)) {
break
}
// result: (XORconst [c] (SRAconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64XORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SRAconst, x.Type)
// result: (XORconst [c] (SRLconst <x.Type> x [d]))
for {
d := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpARM64XORconst)
v.AuxInt = c
v0 := b.NewValue0(v.Pos, OpARM64SRLconst, x.Type)
// result: (RORconst [ c] x)
for {
c := v.AuxInt
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64SLLconst {
break
if v_0.AuxInt != 64-c {
break
}
- x := v_0.Args[0]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpARM64RORconst)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64ADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64ADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FADDS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64FADDS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64ADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FADDD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64FADDD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64ADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64ADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (LoweredAtomicAdd32 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64LoweredAtomicAdd32)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicAdd32Variant ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64LoweredAtomicAdd32Variant)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicAdd64 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64LoweredAtomicAdd64)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicAdd64Variant ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64LoweredAtomicAdd64Variant)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (Select1 (LoweredAtomicAnd8 ptr val mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpARM64LoweredAtomicAnd8, types.NewTuple(typ.UInt8, types.TypeMem))
v0.AddArg(ptr)
// cond:
// result: (LoweredAtomicCas32 ptr old new_ mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64LoweredAtomicCas32)
v.AddArg(ptr)
v.AddArg(old)
// cond:
// result: (LoweredAtomicCas64 ptr old new_ mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
v.reset(OpARM64LoweredAtomicCas64)
v.AddArg(ptr)
v.AddArg(old)
// cond:
// result: (LoweredAtomicExchange32 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64LoweredAtomicExchange32)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicExchange64 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64LoweredAtomicExchange64)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LDARW ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64LDARW)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (LDAR ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64LDAR)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (LDAR ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64LDAR)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (Select1 (LoweredAtomicOr8 ptr val mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpARM64LoweredAtomicOr8, types.NewTuple(typ.UInt8, types.TypeMem))
v0.AddArg(ptr)
// cond:
// result: (STLRW ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64STLRW)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (STLR ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64STLR)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (STLR ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64STLR)
v.AddArg(ptr)
v.AddArg(val)
// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64ADD)
v0 := b.NewValue0(v.Pos, OpARM64SRLconst, t)
v0.AuxInt = 1
// result: (CALLclosure [argwid] entry closure mem)
for {
argwid := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
entry := v.Args[0]
closure := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64CALLclosure)
v.AuxInt = argwid
v.AddArg(entry)
// cond: flagArg(bool) != nil
// result: (CSEL {bool.Op} x y flagArg(bool))
for {
- _ = v.Args[2]
+ bool := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- bool := v.Args[2]
if !(flagArg(bool) != nil) {
break
}
// cond: flagArg(bool) == nil
// result: (CSEL {OpARM64NotEqual} x y (CMPWconst [0] bool))
for {
- _ = v.Args[2]
+ bool := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- bool := v.Args[2]
if !(flagArg(bool) == nil) {
break
}
// cond:
// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64DIVW)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (UDIVW (ZeroExt16to32 x) (ZeroExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64UDIVW)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (DIVW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64DIVW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FDIVS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64FDIVS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (UDIVW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64UDIVW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (DIV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64DIV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FDIVD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64FDIVD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (UDIV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64UDIV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64DIVW)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (UDIVW (ZeroExt8to32 x) (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64UDIVW)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64Equal)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (Equal (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64Equal)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (Equal (FCMPS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64Equal)
v0 := b.NewValue0(v.Pos, OpARM64FCMPS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (Equal (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64Equal)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (Equal (FCMPD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64Equal)
v0 := b.NewValue0(v.Pos, OpARM64FCMPD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64Equal)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (XOR (MOVDconst [1]) (XOR <typ.Bool> x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64XOR)
v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (Equal (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64Equal)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (GreaterEqualU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterEqualU)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (GreaterEqual (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqualF (FCMPS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterEqualF)
v0 := b.NewValue0(v.Pos, OpARM64FCMPS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqualU (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterEqualU)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqualF (FCMPD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterEqualF)
v0 := b.NewValue0(v.Pos, OpARM64FCMPD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqualU (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterEqualU)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (GreaterEqualU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterEqualU)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (GreaterThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterThan)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (GreaterThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterThanU)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (GreaterThan (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterThan)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThanF (FCMPS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterThanF)
v0 := b.NewValue0(v.Pos, OpARM64FCMPS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThanU (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterThanU)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThan (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterThan)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThanF (FCMPD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterThanF)
v0 := b.NewValue0(v.Pos, OpARM64FCMPD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThanU (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterThanU)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterThan)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (GreaterThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64GreaterThanU)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (SRAconst (MULL <typ.Int64> x y) [32])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRAconst)
v.AuxInt = 32
v0 := b.NewValue0(v.Pos, OpARM64MULL, typ.Int64)
// cond:
// result: (SRAconst (UMULL <typ.UInt64> x y) [32])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRAconst)
v.AuxInt = 32
v0 := b.NewValue0(v.Pos, OpARM64UMULL, typ.UInt64)
// cond:
// result: (MULH x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64MULH)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (UMULH x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64UMULH)
v.AddArg(x)
v.AddArg(y)
// result: (CALLinter [argwid] entry mem)
for {
argwid := v.AuxInt
- _ = v.Args[1]
- entry := v.Args[0]
mem := v.Args[1]
+ entry := v.Args[0]
v.reset(OpARM64CALLinter)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (LessThanU (CMP idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpARM64LessThanU)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(idx)
// cond:
// result: (LessEqualU (CMP idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpARM64LessEqualU)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(idx)
// cond:
// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (LessEqualU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessEqualU)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (LessEqual (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessEqualF (FCMPS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessEqualF)
v0 := b.NewValue0(v.Pos, OpARM64FCMPS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessEqualU (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessEqualU)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessEqual (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessEqualF (FCMPD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessEqualF)
v0 := b.NewValue0(v.Pos, OpARM64FCMPD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessEqualU (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessEqualU)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (LessEqualU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessEqualU)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessThan)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (LessThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessThanU)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (LessThan (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessThan)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessThanF (FCMPS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessThanF)
v0 := b.NewValue0(v.Pos, OpARM64FCMPS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessThanU (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessThanU)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessThan (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessThan)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessThanF (FCMPD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessThanF)
v0 := b.NewValue0(v.Pos, OpARM64FCMPD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessThanU (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessThanU)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessThan)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (LessThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LessThanU)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// result: (MOVBUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsBoolean()) {
break
}
// result: (MOVBload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is8BitInt(t) && isSigned(t)) {
break
}
// result: (MOVBUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is8BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVHload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t) && isSigned(t)) {
break
}
// result: (MOVHUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVWload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitInt(t) && isSigned(t)) {
break
}
// result: (MOVWUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVDload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitInt(t) || isPtr(t)) {
break
}
// result: (FMOVSload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitFloat(t)) {
break
}
// result: (FMOVDload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitFloat(t)) {
break
}
// result: (CSEL {OpARM64LessThanU} (SLL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// result: (CSEL {OpARM64LessThanU} (SLL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SLL, t)
// cond:
// result: (MODW (SignExt16to32 x) (SignExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64MODW)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (UMODW (ZeroExt16to32 x) (ZeroExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64UMODW)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (MODW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64MODW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (UMODW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64UMODW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MOD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64MOD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (UMOD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64UMOD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MODW (SignExt8to32 x) (SignExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64MODW)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (UMODW (ZeroExt8to32 x) (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64UMODW)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(x)
if v.AuxInt != 0 {
break
}
- _ = v.Args[2]
mem := v.Args[2]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVBstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpARM64MOVBUload, typ.UInt8)
if v.AuxInt != 2 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVHstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpARM64MOVHUload, typ.UInt16)
if v.AuxInt != 4 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVWstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpARM64MOVWUload, typ.UInt32)
if v.AuxInt != 8 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVDstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpARM64MOVDload, typ.UInt64)
if v.AuxInt != 3 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVBstore)
v.AuxInt = 2
v.AddArg(dst)
if v.AuxInt != 5 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVBstore)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 6 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVHstore)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 7 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVBstore)
v.AuxInt = 6
v.AddArg(dst)
if v.AuxInt != 12 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVWstore)
v.AuxInt = 8
v.AddArg(dst)
if v.AuxInt != 16 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVDstore)
v.AuxInt = 8
v.AddArg(dst)
if v.AuxInt != 24 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64MOVDstore)
v.AuxInt = 16
v.AddArg(dst)
// result: (Move [s%8] (OffPtr <dst.Type> dst [s-s%8]) (OffPtr <src.Type> src [s-s%8]) (Move [s-s%8] dst src mem))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s%8 != 0 && s > 8) {
break
}
// result: (MOVDstore [s-8] dst (MOVDload [s-8] src mem) (DUFFCOPY <types.TypeMem> [8*(64-(s-8)/16)] dst src mem))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 32 && s <= 16*64 && s%16 == 8 && !config.noDuffDevice) {
break
}
// result: (DUFFCOPY [8 * (64 - s/16)] dst src mem)
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 32 && s <= 16*64 && s%16 == 0 && !config.noDuffDevice) {
break
}
// result: (LoweredMove dst src (ADDconst <src.Type> src [s-8]) mem)
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 24 && s%8 == 0) {
break
}
// cond:
// result: (MULW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64MULW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64MULW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMULS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64FMULS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MUL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64MUL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMULD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64FMULD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (LoweredMuluhilo x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64LoweredMuluhilo)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64MULW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64NotEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (NotEqual (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64NotEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (NotEqual (FCMPS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64NotEqual)
v0 := b.NewValue0(v.Pos, OpARM64FCMPS, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (NotEqual (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64NotEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (NotEqual (FCMPD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64NotEqual)
v0 := b.NewValue0(v.Pos, OpARM64FCMPD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64NotEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (NotEqual (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64NotEqual)
v0 := b.NewValue0(v.Pos, OpARM64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LoweredNilCheck ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64LoweredNilCheck)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (RORW x (NEG <y.Type> y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64RORW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpARM64NEG, y.Type)
// cond:
// result: (ROR x (NEG <y.Type> y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64ROR)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpARM64NEG, y.Type)
// result: (CSEL {OpARM64LessThanU} (SRL <t> (ZeroExt16to64 x) (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// result: (CSEL {OpARM64LessThanU} (SRL <t> (ZeroExt16to64 x) (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// result: (CSEL {OpARM64LessThanU} (SRL <t> (ZeroExt16to64 x) y) (Const64 <t> [0]) (CMPconst [64] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// result: (CSEL {OpARM64LessThanU} (SRL <t> (ZeroExt16to64 x) (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// cond:
// result: (SRA (SignExt16to64 x) (CSEL {OpARM64LessThanU} <y.Type> (ZeroExt16to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt16to64 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt16to64 x) (CSEL {OpARM64LessThanU} <y.Type> (ZeroExt32to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt32to64 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt16to64 x) (CSEL {OpARM64LessThanU} <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt16to64 x) (CSEL {OpARM64LessThanU} <y.Type> (ZeroExt8to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt8to64 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// result: (CSEL {OpARM64LessThanU} (SRL <t> (ZeroExt32to64 x) (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// result: (CSEL {OpARM64LessThanU} (SRL <t> (ZeroExt32to64 x) (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// result: (CSEL {OpARM64LessThanU} (SRL <t> (ZeroExt32to64 x) y) (Const64 <t> [0]) (CMPconst [64] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// result: (CSEL {OpARM64LessThanU} (SRL <t> (ZeroExt32to64 x) (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// cond:
// result: (SRA (SignExt32to64 x) (CSEL {OpARM64LessThanU} <y.Type> (ZeroExt16to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt16to64 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt32to64 x) (CSEL {OpARM64LessThanU} <y.Type> (ZeroExt32to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt32to64 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt32to64 x) (CSEL {OpARM64LessThanU} <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt32to64 x) (CSEL {OpARM64LessThanU} <y.Type> (ZeroExt8to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt8to64 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// result: (CSEL {OpARM64LessThanU} (SRL <t> x (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// result: (CSEL {OpARM64LessThanU} (SRL <t> x (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// result: (CSEL {OpARM64LessThanU} (SRL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// result: (CSEL {OpARM64LessThanU} (SRL <t> x (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// cond:
// result: (SRA x (CSEL {OpARM64LessThanU} <y.Type> (ZeroExt16to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt16to64 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpARM64CSEL, y.Type)
// cond:
// result: (SRA x (CSEL {OpARM64LessThanU} <y.Type> (ZeroExt32to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt32to64 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpARM64CSEL, y.Type)
// cond:
// result: (SRA x (CSEL {OpARM64LessThanU} <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpARM64CSEL, y.Type)
// cond:
// result: (SRA x (CSEL {OpARM64LessThanU} <y.Type> (ZeroExt8to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt8to64 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpARM64CSEL, y.Type)
// result: (CSEL {OpARM64LessThanU} (SRL <t> (ZeroExt8to64 x) (ZeroExt16to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// result: (CSEL {OpARM64LessThanU} (SRL <t> (ZeroExt8to64 x) (ZeroExt32to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// result: (CSEL {OpARM64LessThanU} (SRL <t> (ZeroExt8to64 x) y) (Const64 <t> [0]) (CMPconst [64] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// result: (CSEL {OpARM64LessThanU} (SRL <t> (ZeroExt8to64 x) (ZeroExt8to64 y)) (Const64 <t> [0]) (CMPconst [64] (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64CSEL)
v.Aux = OpARM64LessThanU
v0 := b.NewValue0(v.Pos, OpARM64SRL, t)
// cond:
// result: (SRA (SignExt8to64 x) (CSEL {OpARM64LessThanU} <y.Type> (ZeroExt16to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt16to64 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt8to64 x) (CSEL {OpARM64LessThanU} <y.Type> (ZeroExt32to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt32to64 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt8to64 x) (CSEL {OpARM64LessThanU} <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt8to64 x) (CSEL {OpARM64LessThanU} <y.Type> (ZeroExt8to64 y) (Const64 <y.Type> [63]) (CMPconst [64] (ZeroExt8to64 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SRA)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// result: (MOVBstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 1) {
break
}
// result: (MOVHstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 2) {
break
}
// result: (MOVWstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && !is32BitFloat(val.Type)) {
break
}
// result: (MOVDstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8 && !is64BitFloat(val.Type)) {
break
}
// result: (FMOVSstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
break
}
// result: (FMOVDstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
break
}
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FSUBS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64FSUBS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FSUBD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64FSUBD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64SUB)
v.AddArg(x)
v.AddArg(y)
// result: (LoweredWB {fn} destptr srcptr mem)
for {
fn := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
destptr := v.Args[0]
srcptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpARM64LoweredWB)
v.Aux = fn
v.AddArg(destptr)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpARM64XOR)
v.AddArg(x)
v.AddArg(y)
if v.AuxInt != 0 {
break
}
- _ = v.Args[1]
mem := v.Args[1]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVBstore)
v.AddArg(ptr)
v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
if v.AuxInt != 2 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVHstore)
v.AddArg(ptr)
v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
if v.AuxInt != 4 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVWstore)
v.AddArg(ptr)
v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVDstore)
v.AddArg(ptr)
v0 := b.NewValue0(v.Pos, OpARM64MOVDconst, typ.UInt64)
if v.AuxInt != 3 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVBstore)
v.AuxInt = 2
v.AddArg(ptr)
if v.AuxInt != 5 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVBstore)
v.AuxInt = 4
v.AddArg(ptr)
if v.AuxInt != 6 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVHstore)
v.AuxInt = 4
v.AddArg(ptr)
if v.AuxInt != 7 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVBstore)
v.AuxInt = 6
v.AddArg(ptr)
if v.AuxInt != 9 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVBstore)
v.AuxInt = 8
v.AddArg(ptr)
if v.AuxInt != 10 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVHstore)
v.AuxInt = 8
v.AddArg(ptr)
if v.AuxInt != 11 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVBstore)
v.AuxInt = 10
v.AddArg(ptr)
if v.AuxInt != 12 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVWstore)
v.AuxInt = 8
v.AddArg(ptr)
if v.AuxInt != 13 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVBstore)
v.AuxInt = 12
v.AddArg(ptr)
if v.AuxInt != 14 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVHstore)
v.AuxInt = 12
v.AddArg(ptr)
if v.AuxInt != 15 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64MOVBstore)
v.AuxInt = 14
v.AddArg(ptr)
if v.AuxInt != 16 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64STP)
v.AuxInt = 0
v.AddArg(ptr)
if v.AuxInt != 32 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64STP)
v.AuxInt = 16
v.AddArg(ptr)
if v.AuxInt != 48 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64STP)
v.AuxInt = 32
v.AddArg(ptr)
if v.AuxInt != 64 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpARM64STP)
v.AuxInt = 48
v.AddArg(ptr)
// result: (Zero [8] (OffPtr <ptr.Type> ptr [s-8]) (Zero [s-s%16] ptr mem))
for {
s := v.AuxInt
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(s%16 != 0 && s%16 <= 8 && s > 16) {
break
}
// result: (Zero [16] (OffPtr <ptr.Type> ptr [s-16]) (Zero [s-s%16] ptr mem))
for {
s := v.AuxInt
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(s%16 != 0 && s%16 > 8 && s > 16) {
break
}
// result: (DUFFZERO [4 * (64 - s/16)] ptr mem)
for {
s := v.AuxInt
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(s%16 == 0 && s > 64 && s <= 16*64 && !config.noDuffDevice) {
break
}
// result: (LoweredZero ptr (ADDconst <ptr.Type> [s-16] ptr) mem)
for {
s := v.AuxInt
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(s%16 == 0 && (s > 16*64 || config.noDuffDevice)) {
break
}
if z.Op != OpARM64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64ADD {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64ADD {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MADD {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MSUB {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MADDW {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MSUBW {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64ADD {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64ADD {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MADD {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MSUB {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MADDW {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MSUBW {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64ADD {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64ADD {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MADD {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MSUB {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MADDW {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MSUBW {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64ADD {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64ADD {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MADD {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MSUB {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MADDW {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MSUBW {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64ADD {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64ADD {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MADD {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MSUB {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MADDW {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MSUBW {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64ADD {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64ADD {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MADD {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MSUB {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MADDW {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
if z.Op != OpARM64MSUBW {
break
}
- _ = z.Args[2]
+ y := z.Args[2]
a := z.Args[0]
x := z.Args[1]
- y := z.Args[2]
if !(z.Uses == 1) {
break
}
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDF x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSADDF)
v.AddArg(x)
v.AddArg(y)
// result: (ADD c (ADD <t> x y))
for {
t := v.Type
- _ = v.Args[2]
+ c := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- c := v.Args[2]
v.reset(OpMIPSADD)
v.AddArg(c)
v0 := b.NewValue0(v.Pos, OpMIPSADD, t)
// cond:
// result: (ADDD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSADDD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSAND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSAND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSAND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSAND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (LoweredAtomicAdd ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPSLoweredAtomicAdd)
v.AddArg(ptr)
v.AddArg(val)
// cond: !config.BigEndian
// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))))) mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(!config.BigEndian) {
break
}
// cond: config.BigEndian
// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))))) mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(config.BigEndian) {
break
}
// cond:
// result: (LoweredAtomicCas ptr old new_ mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
v.reset(OpMIPSLoweredAtomicCas)
v.AddArg(ptr)
v.AddArg(old)
// cond:
// result: (LoweredAtomicExchange ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPSLoweredAtomicExchange)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicLoad ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPSLoweredAtomicLoad)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (LoweredAtomicLoad ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPSLoweredAtomicLoad)
v.AddArg(ptr)
v.AddArg(mem)
// cond: !config.BigEndian
// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(!config.BigEndian) {
break
}
// cond: config.BigEndian
// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(config.BigEndian) {
break
}
// cond:
// result: (LoweredAtomicStore ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPSLoweredAtomicStore)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicStore ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPSLoweredAtomicStore)
v.AddArg(ptr)
v.AddArg(val)
// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSADD)
v0 := b.NewValue0(v.Pos, OpMIPSSRLconst, t)
v0.AuxInt = 1
// result: (CALLclosure [argwid] entry closure mem)
for {
argwid := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
entry := v.Args[0]
closure := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPSCALLclosure)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (Select1 (DIV x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
v0.AddArg(x)
// cond:
// result: (DIVF x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSDIVF)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Select1 (DIVU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
v0.AddArg(x)
// cond:
// result: (DIVD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSDIVD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (SGTUconst [1] (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTUconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
// cond:
// result: (SGTUconst [1] (XOR x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTUconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
// cond:
// result: (FPFlagTrue (CMPEQF x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSFPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (FPFlagTrue (CMPEQD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSFPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SGTUconst [1] (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTUconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
// cond:
// result: (XORconst [1] (XOR <typ.Bool> x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.Bool)
// cond:
// result: (SGTUconst [1] (XOR x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTUconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
// cond:
// result: (XORconst [1] (SGT (SignExt16to32 y) (SignExt16to32 x)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
// cond:
// result: (XORconst [1] (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
// cond:
// result: (XORconst [1] (SGT y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
// cond:
// result: (FPFlagTrue (CMPGEF x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSFPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPSCMPGEF, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (XORconst [1] (SGTU y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
// cond:
// result: (FPFlagTrue (CMPGED x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSFPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPSCMPGED, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (XORconst [1] (SGT (SignExt8to32 y) (SignExt8to32 x)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
// cond:
// result: (XORconst [1] (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
// cond:
// result: (SGT (SignExt16to32 x) (SignExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGT)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTU)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (SGT x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGT)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FPFlagTrue (CMPGTF x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSFPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPSCMPGTF, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SGTU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FPFlagTrue (CMPGTD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSFPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPSCMPGTD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SGT (SignExt8to32 x) (SignExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGT)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (Select0 (MULT x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPSMULT, types.NewTuple(typ.Int32, typ.Int32))
v0.AddArg(x)
// cond:
// result: (Select0 (MULTU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPSMULTU, types.NewTuple(typ.UInt32, typ.UInt32))
v0.AddArg(x)
// result: (CALLinter [argwid] entry mem)
for {
argwid := v.AuxInt
- _ = v.Args[1]
- entry := v.Args[0]
mem := v.Args[1]
+ entry := v.Args[0]
v.reset(OpMIPSCALLinter)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (SGTU len idx)
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpMIPSSGTU)
v.AddArg(len)
v.AddArg(idx)
// cond:
// result: (XORconst [1] (SGTU idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
// cond:
// result: (XORconst [1] (SGT (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
// cond:
// result: (XORconst [1] (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
// cond:
// result: (XORconst [1] (SGT x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
// cond:
// result: (FPFlagTrue (CMPGEF y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSFPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPSCMPGEF, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (XORconst [1] (SGTU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
// cond:
// result: (FPFlagTrue (CMPGED y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSFPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPSCMPGED, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (XORconst [1] (SGT (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
// cond:
// result: (XORconst [1] (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXORconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
// cond:
// result: (SGT (SignExt16to32 y) (SignExt16to32 x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGT)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(y)
// cond:
// result: (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTU)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(y)
// cond:
// result: (SGT y x)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGT)
v.AddArg(y)
v.AddArg(x)
// cond:
// result: (FPFlagTrue (CMPGTF y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSFPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPSCMPGTF, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (SGTU y x)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTU)
v.AddArg(y)
v.AddArg(x)
// cond:
// result: (FPFlagTrue (CMPGTD y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSFPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPSCMPGTD, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (SGT (SignExt8to32 y) (SignExt8to32 x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGT)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(y)
// cond:
// result: (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(y)
// result: (MOVBUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsBoolean()) {
break
}
// result: (MOVBload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is8BitInt(t) && isSigned(t)) {
break
}
// result: (MOVBUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is8BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVHload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t) && isSigned(t)) {
break
}
// result: (MOVHUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVWload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitInt(t) || isPtr(t)) {
break
}
// result: (MOVFload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitFloat(t)) {
break
}
// result: (MOVDload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitFloat(t)) {
break
}
// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
v0.AddArg(x)
// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
v0.AddArg(x)
// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
v0.AddArg(x)
// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
v0.AddArg(x)
// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
v0.AddArg(x)
// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
v0.AddArg(x)
// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
v0.AddArg(x)
// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
v0.AddArg(x)
// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
v0.AddArg(x)
// cond:
// result: (ADDconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpMIPSADDconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSNEG {
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpMIPSSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpMIPSANDconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: (CMOVZzero a c)
for {
- _ = v.Args[2]
+ c := v.Args[2]
a := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVWconst {
if v_1.AuxInt != 0 {
break
}
- c := v.Args[2]
v.reset(OpMIPSCMOVZzero)
v.AddArg(a)
v.AddArg(c)
// cond: is16Bit(c)
// result: (LoweredAtomicAddconst [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVWconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
// cond:
// result: (LoweredAtomicStorezero ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVWconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpMIPSLoweredAtomicStorezero)
v.AddArg(ptr)
v.AddArg(mem)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
}
off2 := x.AuxInt
ptr := x.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
}
off2 := x.AuxInt
ptr := x.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
off2 := x.AuxInt
ptr := x.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVWconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpMIPSMOVBstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVBreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPSMOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVBUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPSMOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVHreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPSMOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVHUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPSMOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPSMOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
}
off2 := x.AuxInt
ptr := x.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
}
off2 := x.AuxInt
ptr := x.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
off2 := x.AuxInt
ptr := x.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
}
off2 := x.AuxInt
ptr := x.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
off2 := x.AuxInt
ptr := x.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
}
off2 := x.AuxInt
ptr := x.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
}
off2 := x.AuxInt
ptr := x.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
off2 := x.AuxInt
ptr := x.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVWconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpMIPSMOVHstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVHreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPSMOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVHUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPSMOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPSMOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
}
off2 := x.AuxInt
ptr := x.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
}
off2 := x.AuxInt
ptr := x.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
off2 := x.AuxInt
ptr := x.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVWconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpMIPSMOVWstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPSMOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPSMOVWstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
x := v.Args[0]
if x.Op != OpMIPSADDconst {
break
}
off2 := x.AuxInt
ptr := x.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1+off2) || x.Uses == 1) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2)) {
break
}
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWconst {
break
if v_0.AuxInt != 1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond:
// result: (NEG x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWconst {
break
if v_0.AuxInt != -1 {
break
}
- x := v.Args[1]
v.reset(OpMIPSNEG)
v.AddArg(x)
return true
// cond: isPowerOfTwo(int64(uint32(c)))
// result: (SLLconst [log2(int64(uint32(c)))] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isPowerOfTwo(int64(uint32(c)))) {
break
}
// cond:
// result: (NORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpMIPSNORconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (ORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpMIPSORconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: (SGTconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpMIPSSGTconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (SGTUconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpMIPSSGTUconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (MOVWconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpMIPSMOVWconst)
// cond:
// result: (NEG x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWconst {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpMIPSNEG)
v.AddArg(x)
return true
// cond:
// result: (XORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPSMOVWconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpMIPSXORconst)
v.AuxInt = c
v.AddArg(x)
// cond:
// result: (MOVWconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpMIPSMOVWconst)
// cond:
// result: (Select0 (DIV (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (Select0 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (Select0 (DIV x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
v0.AddArg(x)
// cond:
// result: (Select0 (DIVU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
v0.AddArg(x)
// cond:
// result: (Select0 (DIV (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (Select0 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
if v.AuxInt != 0 {
break
}
- _ = v.Args[2]
mem := v.Args[2]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPSMOVBstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 2 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPSMOVBstore)
v.AuxInt = 1
v.AddArg(dst)
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 4 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPSMOVBstore)
v.AuxInt = 3
v.AddArg(dst)
if v.AuxInt != 3 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPSMOVBstore)
v.AuxInt = 2
v.AddArg(dst)
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
for {
s := v.AuxInt
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 16 || t.(*types.Type).Alignment()%4 != 0) {
break
}
// cond:
// result: (MUL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSMUL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MUL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSMUL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULF x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSMULF)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULTU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSMULTU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSMULD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MUL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSMUL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)) (MOVWconst [0]))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTU)
v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (SGTU (XOR x y) (MOVWconst [0]))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTU)
v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (FPFlagFalse (CMPEQF x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSFPFlagFalse)
v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (FPFlagFalse (CMPEQD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSFPFlagFalse)
v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SGTU (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)) (MOVWconst [0]))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTU)
v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SGTU (XOR x y) (MOVWconst [0]))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSGTU)
v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (LoweredNilCheck ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPSLoweredNilCheck)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSOR)
v.AddArg(x)
v.AddArg(y)
// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt16to32 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSRA)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [-1]) (SGTUconst [32] y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSRA)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt8to32 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSRA)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// result: (CMOVZ (SRL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
v0.AddArg(x)
// result: (CMOVZ (SRL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
v0.AddArg(x)
// result: (CMOVZ (SRL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
v0.AddArg(x)
// cond:
// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt16to32 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSRA)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
// cond:
// result: (SRA x ( CMOVZ <typ.UInt32> y (MOVWconst [-1]) (SGTUconst [32] y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSRA)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
// cond:
// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt8to32 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSRA)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt16to32 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSRA)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [-1]) (SGTUconst [32] y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSRA)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt8to32 y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSRA)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
break
}
t := v_0.Type
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpMIPSADD)
v.Type = t.FieldType(0)
v.AddArg(x)
break
}
t := v_0.Type
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpMIPSSUB)
v.Type = t.FieldType(0)
v.AddArg(x)
if v_0.Op != OpMIPSMULTU {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpMIPSMOVWconst {
break
if v_0_0.AuxInt != -1 {
break
}
- x := v_0.Args[1]
v.reset(OpMIPSCMOVZ)
v0 := b.NewValue0(v.Pos, OpMIPSADDconst, x.Type)
v0.AuxInt = -1
if v_0.Op != OpMIPSMULTU {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpMIPSMOVWconst {
break
}
c := v_0_0.AuxInt
- x := v_0.Args[1]
if !(isPowerOfTwo(int64(uint32(c)))) {
break
}
break
}
t := v_0.Type
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpMIPSSGTU)
v.Type = typ.Bool
v.AddArg(x)
break
}
t := v_0.Type
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpMIPSSGTU)
v.Type = typ.Bool
v0 := b.NewValue0(v.Pos, OpMIPSSUB, t.FieldType(0))
if v_0.Op != OpMIPSMULTU {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpMIPSMOVWconst {
break
if v_0_0.AuxInt != 1 {
break
}
- x := v_0.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_0.Op != OpMIPSMULTU {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpMIPSMOVWconst {
break
if v_0_0.AuxInt != -1 {
break
}
- x := v_0.Args[1]
v.reset(OpMIPSNEG)
v.Type = x.Type
v.AddArg(x)
if v_0.Op != OpMIPSMULTU {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpMIPSMOVWconst {
break
}
c := v_0_0.AuxInt
- x := v_0.Args[1]
if !(isPowerOfTwo(int64(uint32(c)))) {
break
}
// result: (MOVBstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 1) {
break
}
// result: (MOVHstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 2) {
break
}
// result: (MOVWstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && !is32BitFloat(val.Type)) {
break
}
// result: (MOVFstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
break
}
// result: (MOVDstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
break
}
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBF x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSUBF)
v.AddArg(x)
v.AddArg(y)
// result: (SUB (SUB <t> x y) c)
for {
t := v.Type
- _ = v.Args[2]
+ c := v.Args[2]
x := v.Args[0]
y := v.Args[1]
- c := v.Args[2]
v.reset(OpMIPSSUB)
v0 := b.NewValue0(v.Pos, OpMIPSSUB, t)
v0.AddArg(x)
// cond:
// result: (SUBD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSUBD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSSUB)
v.AddArg(x)
v.AddArg(y)
// result: (LoweredWB {fn} destptr srcptr mem)
for {
fn := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
destptr := v.Args[0]
srcptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPSLoweredWB)
v.Aux = fn
v.AddArg(destptr)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPSXOR)
v.AddArg(x)
v.AddArg(y)
if v.AuxInt != 0 {
break
}
- _ = v.Args[1]
mem := v.Args[1]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPSMOVBstore)
v.AddArg(ptr)
v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 2 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPSMOVBstore)
v.AuxInt = 1
v.AddArg(ptr)
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 4 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPSMOVBstore)
v.AuxInt = 3
v.AddArg(ptr)
if v.AuxInt != 3 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPSMOVBstore)
v.AuxInt = 2
v.AddArg(ptr)
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
for {
s := v.AuxInt
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(s > 16 || t.(*types.Type).Alignment()%4 != 0) {
break
}
// cond:
// result: (ADDV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64ADDV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64ADDV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDF x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64ADDF)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64ADDV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64ADDD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64ADDV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64ADDV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (LoweredAtomicAdd32 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64LoweredAtomicAdd32)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicAdd64 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64LoweredAtomicAdd64)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicCas32 ptr old new_ mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
v.reset(OpMIPS64LoweredAtomicCas32)
v.AddArg(ptr)
v.AddArg(old)
// cond:
// result: (LoweredAtomicCas64 ptr old new_ mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
v.reset(OpMIPS64LoweredAtomicCas64)
v.AddArg(ptr)
v.AddArg(old)
// cond:
// result: (LoweredAtomicExchange32 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64LoweredAtomicExchange32)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicExchange64 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64LoweredAtomicExchange64)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicLoad32 ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPS64LoweredAtomicLoad32)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (LoweredAtomicLoad64 ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPS64LoweredAtomicLoad64)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (LoweredAtomicLoad64 ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPS64LoweredAtomicLoad64)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (LoweredAtomicStore32 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64LoweredAtomicStore32)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicStore64 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64LoweredAtomicStore64)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicStore64 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64LoweredAtomicStore64)
v.AddArg(ptr)
v.AddArg(val)
// result: (ADDV (SRLVconst <t> (SUBV <t> x y) [1]) y)
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64ADDV)
v0 := b.NewValue0(v.Pos, OpMIPS64SRLVconst, t)
v0.AuxInt = 1
// result: (CALLclosure [argwid] entry closure mem)
for {
argwid := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
entry := v.Args[0]
closure := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64CALLclosure)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (Select1 (DIVV (SignExt16to64 x) (SignExt16to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
v1 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
// cond:
// result: (Select1 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
v1 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
// cond:
// result: (Select1 (DIVV (SignExt32to64 x) (SignExt32to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
// cond:
// result: (DIVF x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64DIVF)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Select1 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
v1 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
// cond:
// result: (Select1 (DIVV x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
v0.AddArg(x)
// cond:
// result: (DIVD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64DIVD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Select1 (DIVVU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
v0.AddArg(x)
// cond:
// result: (Select1 (DIVV (SignExt8to64 x) (SignExt8to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
v1 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
// cond:
// result: (Select1 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
v1 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
// cond:
// result: (SGTU (MOVVconst [1]) (XOR (ZeroExt16to64 x) (ZeroExt16to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (SGTU (MOVVconst [1]) (XOR (ZeroExt32to64 x) (ZeroExt32to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (FPFlagTrue (CMPEQF x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64FPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPS64CMPEQF, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SGTU (MOVVconst [1]) (XOR x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (FPFlagTrue (CMPEQD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64FPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPS64CMPEQD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SGTU (MOVVconst [1]) (XOR (ZeroExt8to64 x) (ZeroExt8to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (XOR <typ.Bool> x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (SGTU (MOVVconst [1]) (XOR x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (SGT (SignExt16to64 y) (SignExt16to64 x)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt16to64 y) (ZeroExt16to64 x)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (SGT (SignExt32to64 y) (SignExt32to64 x)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (FPFlagTrue (CMPGEF x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64FPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPS64CMPGEF, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt32to64 y) (ZeroExt32to64 x)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (SGT y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (FPFlagTrue (CMPGED x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64FPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPS64CMPGED, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (XOR (MOVVconst [1]) (SGTU y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (SGT (SignExt8to64 y) (SignExt8to64 x)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt8to64 y) (ZeroExt8to64 x)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (SGT (SignExt16to64 x) (SignExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGT)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (SGTU (ZeroExt16to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (SGT (SignExt32to64 x) (SignExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGT)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (FPFlagTrue (CMPGTF x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64FPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPS64CMPGTF, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SGTU (ZeroExt32to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (SGT x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGT)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FPFlagTrue (CMPGTD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64FPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPS64CMPGTD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SGTU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SGT (SignExt8to64 x) (SignExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGT)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (SGTU (ZeroExt8to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (SRAVconst (Select1 <typ.Int64> (MULV (SignExt32to64 x) (SignExt32to64 y))) [32])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAVconst)
v.AuxInt = 32
v0 := b.NewValue0(v.Pos, OpSelect1, typ.Int64)
// cond:
// result: (SRLVconst (Select1 <typ.UInt64> (MULVU (ZeroExt32to64 x) (ZeroExt32to64 y))) [32])
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRLVconst)
v.AuxInt = 32
v0 := b.NewValue0(v.Pos, OpSelect1, typ.UInt64)
// cond:
// result: (Select0 (MULV x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPS64MULV, types.NewTuple(typ.Int64, typ.Int64))
v0.AddArg(x)
// cond:
// result: (Select0 (MULVU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
v0.AddArg(x)
// result: (CALLinter [argwid] entry mem)
for {
argwid := v.AuxInt
- _ = v.Args[1]
- entry := v.Args[0]
mem := v.Args[1]
+ entry := v.Args[0]
v.reset(OpMIPS64CALLinter)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (SGTU len idx)
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpMIPS64SGTU)
v.AddArg(len)
v.AddArg(idx)
// cond:
// result: (XOR (MOVVconst [1]) (SGTU idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (SGT (SignExt16to64 x) (SignExt16to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt16to64 x) (ZeroExt16to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (SGT (SignExt32to64 x) (SignExt32to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (FPFlagTrue (CMPGEF y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64FPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPS64CMPGEF, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt32to64 x) (ZeroExt32to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (SGT x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (FPFlagTrue (CMPGED y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64FPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPS64CMPGED, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (XOR (MOVVconst [1]) (SGTU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (SGT (SignExt8to64 x) (SignExt8to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (XOR (MOVVconst [1]) (SGTU (ZeroExt8to64 x) (ZeroExt8to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
v0.AuxInt = 1
// cond:
// result: (SGT (SignExt16to64 y) (SignExt16to64 x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGT)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(y)
// cond:
// result: (SGTU (ZeroExt16to64 y) (ZeroExt16to64 x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(y)
// cond:
// result: (SGT (SignExt32to64 y) (SignExt32to64 x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGT)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(y)
// cond:
// result: (FPFlagTrue (CMPGTF y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64FPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPS64CMPGTF, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (SGTU (ZeroExt32to64 y) (ZeroExt32to64 x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(y)
// cond:
// result: (SGT y x)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGT)
v.AddArg(y)
v.AddArg(x)
// cond:
// result: (FPFlagTrue (CMPGTD y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64FPFlagTrue)
v0 := b.NewValue0(v.Pos, OpMIPS64CMPGTD, types.TypeFlags)
v0.AddArg(y)
// cond:
// result: (SGTU y x)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v.AddArg(y)
v.AddArg(x)
// cond:
// result: (SGT (SignExt8to64 y) (SignExt8to64 x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGT)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(y)
// cond:
// result: (SGTU (ZeroExt8to64 y) (ZeroExt8to64 x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(y)
// result: (MOVBUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsBoolean()) {
break
}
// result: (MOVBload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is8BitInt(t) && isSigned(t)) {
break
}
// result: (MOVBUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is8BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVHload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t) && isSigned(t)) {
break
}
// result: (MOVHUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVWload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitInt(t) && isSigned(t)) {
break
}
// result: (MOVWUload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVVload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitInt(t) || isPtr(t)) {
break
}
// result: (MOVFload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitFloat(t)) {
break
}
// result: (MOVDload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitFloat(t)) {
break
}
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SLLV <t> x (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SLLV <t> x (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SLLV <t> x y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SLLV <t> x (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// cond: is32Bit(c)
// result: (ADDVconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond:
// result: (SUBV x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64NEGV {
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpMIPS64SUBV)
v.AddArg(x)
v.AddArg(y)
// cond: is32Bit(c)
// result: (ANDconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond: is32Bit(c)
// result: (LoweredAtomicAddconst32 [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVVconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(c)) {
break
}
// cond: is32Bit(c)
// result: (LoweredAtomicAddconst64 [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVVconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is32Bit(c)) {
break
}
// cond:
// result: (LoweredAtomicStorezero32 ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVVconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpMIPS64LoweredAtomicStorezero32)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (LoweredAtomicStorezero64 ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVVconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpMIPS64LoweredAtomicStorezero64)
v.AddArg(ptr)
v.AddArg(mem)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVVconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpMIPS64MOVBstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVBreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPS64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVBUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPS64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVHreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPS64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVHUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPS64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPS64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVWUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPS64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVVconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpMIPS64MOVHstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVHreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPS64MOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVHUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPS64MOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPS64MOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVWUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPS64MOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVVconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpMIPS64MOVVstorezero)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
sym2 := v_0.Aux
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVVconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpMIPS64MOVWstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPS64MOVWstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMIPS64MOVWUreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpMIPS64MOVWstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64ADDVconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2)) {
break
}
// cond: is32Bit(c)
// result: (NORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond: is32Bit(c)
// result: (ORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond: is32Bit(c)
// result: (SGTconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond: is32Bit(c)
// result: (SGTUconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond:
// result: (MOVVconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpMIPS64MOVVconst)
// cond:
// result: (NEGV x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVconst {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpMIPS64NEGV)
v.AddArg(x)
return true
// cond: is32Bit(c)
// result: (XORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMIPS64MOVVconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond:
// result: (MOVVconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpMIPS64MOVVconst)
// cond:
// result: (Select0 (DIVV (SignExt16to64 x) (SignExt16to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
v1 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
// cond:
// result: (Select0 (DIVVU (ZeroExt16to64 x) (ZeroExt16to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
v1 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
// cond:
// result: (Select0 (DIVV (SignExt32to64 x) (SignExt32to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
v1 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
// cond:
// result: (Select0 (DIVVU (ZeroExt32to64 x) (ZeroExt32to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
v1 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
// cond:
// result: (Select0 (DIVV x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
v0.AddArg(x)
// cond:
// result: (Select0 (DIVVU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
v0.AddArg(x)
// cond:
// result: (Select0 (DIVV (SignExt8to64 x) (SignExt8to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVV, types.NewTuple(typ.Int64, typ.Int64))
v1 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
// cond:
// result: (Select0 (DIVVU (ZeroExt8to64 x) (ZeroExt8to64 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect0)
v0 := b.NewValue0(v.Pos, OpMIPS64DIVVU, types.NewTuple(typ.UInt64, typ.UInt64))
v1 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
if v.AuxInt != 0 {
break
}
- _ = v.Args[2]
mem := v.Args[2]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64MOVBstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVBload, typ.Int8)
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 2 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64MOVBstore)
v.AuxInt = 1
v.AddArg(dst)
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 4 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64MOVBstore)
v.AuxInt = 3
v.AddArg(dst)
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%8 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 3 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64MOVBstore)
v.AuxInt = 2
v.AddArg(dst)
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%8 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%8 == 0) {
break
}
for {
s := v.AuxInt
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 24 || t.(*types.Type).Alignment()%8 != 0) {
break
}
// cond:
// result: (Select1 (MULVU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
v0.AddArg(x)
// cond:
// result: (Select1 (MULVU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
v0.AddArg(x)
// cond:
// result: (MULF x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64MULF)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Select1 (MULVU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
v0.AddArg(x)
// cond:
// result: (MULD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64MULD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Select1 (MULVU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpSelect1)
v0 := b.NewValue0(v.Pos, OpMIPS64MULVU, types.NewTuple(typ.UInt64, typ.UInt64))
v0.AddArg(x)
// cond:
// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to64 y)) (MOVVconst [0]))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (SGTU (XOR (ZeroExt32to64 x) (ZeroExt32to64 y)) (MOVVconst [0]))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
v1 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
// cond:
// result: (FPFlagFalse (CMPEQF x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64FPFlagFalse)
v0 := b.NewValue0(v.Pos, OpMIPS64CMPEQF, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SGTU (XOR x y) (MOVVconst [0]))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (FPFlagFalse (CMPEQD x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64FPFlagFalse)
v0 := b.NewValue0(v.Pos, OpMIPS64CMPEQD, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (SGTU (XOR (ZeroExt8to64 x) (ZeroExt8to64 y)) (MOVVconst [0]))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
v1 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SGTU (XOR x y) (MOVVconst [0]))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SGTU)
v0 := b.NewValue0(v.Pos, OpMIPS64XOR, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (LoweredNilCheck ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPS64LoweredNilCheck)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64OR)
v.AddArg(x)
v.AddArg(y)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> (ZeroExt16to64 x) y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt16to64 x) (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// result: (SRAV (SignExt16to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> (ZeroExt32to64 x) y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt32to64 x) (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// result: (SRAV (SignExt32to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> x (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> x (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> x y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> x (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpMIPS64OR, t)
// result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpMIPS64OR, t)
// result: (SRAV x (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpMIPS64OR, t)
// result: (SRAV x (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpMIPS64OR, t)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt16to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt32to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) y)) (SRLV <t> (ZeroExt8to64 x) y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (AND (NEGV <t> (SGTU (MOVVconst <typ.UInt64> [64]) (ZeroExt8to64 y))) (SRLV <t> (ZeroExt8to64 x) (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64AND)
v0 := b.NewValue0(v.Pos, OpMIPS64NEGV, t)
v1 := b.NewValue0(v.Pos, OpMIPS64SGTU, typ.Bool)
// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt16to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt16to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt32to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt32to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU y (MOVVconst <typ.UInt64> [63]))) y))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// result: (SRAV (SignExt8to64 x) (OR <t> (NEGV <t> (SGTU (ZeroExt8to64 y) (MOVVconst <typ.UInt64> [63]))) (ZeroExt8to64 y)))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SRAV)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
if v_0.Op != OpMIPS64MULVU {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpMIPS64MOVVconst {
break
if v_0_0.AuxInt != -1 {
break
}
- x := v_0.Args[1]
v.reset(OpMIPS64NEGV)
v.AddArg(x)
return true
if v_0.Op != OpMIPS64MULVU {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpMIPS64MOVVconst {
break
if v_0_0.AuxInt != 1 {
break
}
- x := v_0.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_0.Op != OpMIPS64MULVU {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpMIPS64MOVVconst {
break
}
c := v_0_0.AuxInt
- x := v_0.Args[1]
if !(isPowerOfTwo(c)) {
break
}
if v_0.Op != OpMIPS64MULVU {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpMIPS64MOVVconst {
break
if v_0_0.AuxInt != -1 {
break
}
- x := v_0.Args[1]
v.reset(OpMIPS64NEGV)
v.AddArg(x)
return true
if v_0.Op != OpMIPS64MULVU {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpMIPS64MOVVconst {
break
if v_0_0.AuxInt != 1 {
break
}
- x := v_0.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_0.Op != OpMIPS64MULVU {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpMIPS64MOVVconst {
break
}
c := v_0_0.AuxInt
- x := v_0.Args[1]
if !(isPowerOfTwo(c)) {
break
}
// result: (MOVBstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 1) {
break
}
// result: (MOVHstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 2) {
break
}
// result: (MOVWstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && !is32BitFloat(val.Type)) {
break
}
// result: (MOVVstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8 && !is64BitFloat(val.Type)) {
break
}
// result: (MOVFstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
break
}
// result: (MOVDstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
break
}
// cond:
// result: (SUBV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SUBV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SUBV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBF x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SUBF)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SUBV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SUBD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SUBV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64SUBV)
v.AddArg(x)
v.AddArg(y)
// result: (LoweredWB {fn} destptr srcptr mem)
for {
fn := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
destptr := v.Args[0]
srcptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpMIPS64LoweredWB)
v.Aux = fn
v.AddArg(destptr)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMIPS64XOR)
v.AddArg(x)
v.AddArg(y)
if v.AuxInt != 0 {
break
}
- _ = v.Args[1]
mem := v.Args[1]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPS64MOVBstore)
v.AddArg(ptr)
v0 := b.NewValue0(v.Pos, OpMIPS64MOVVconst, typ.UInt64)
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 2 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPS64MOVBstore)
v.AuxInt = 1
v.AddArg(ptr)
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 4 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPS64MOVBstore)
v.AuxInt = 3
v.AddArg(ptr)
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%8 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
if v.AuxInt != 3 {
break
}
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpMIPS64MOVBstore)
v.AuxInt = 2
v.AddArg(ptr)
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%2 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%8 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.(*types.Type).Alignment()%8 == 0) {
break
}
for {
s := v.AuxInt
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(s%8 == 0 && s > 24 && s <= 8*128 && t.(*types.Type).Alignment()%8 == 0 && !config.noDuffDevice) {
break
}
for {
s := v.AuxInt
t := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !((s > 8*128 || config.noDuffDevice) || t.(*types.Type).Alignment()%8 != 0) {
break
}
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64ADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64ADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FADDS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FADDS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64ADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64ADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64ADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64AND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (LoweredAtomicAdd32 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64LoweredAtomicAdd32)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicAdd64 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64LoweredAtomicAdd64)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicAnd8 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64LoweredAtomicAnd8)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicCas32 [1] ptr old new_ mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
v.reset(OpPPC64LoweredAtomicCas32)
v.AuxInt = 1
v.AddArg(ptr)
// cond:
// result: (LoweredAtomicCas64 [1] ptr old new_ mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
v.reset(OpPPC64LoweredAtomicCas64)
v.AuxInt = 1
v.AddArg(ptr)
// cond:
// result: (LoweredAtomicCas32 [0] ptr old new_ mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
v.reset(OpPPC64LoweredAtomicCas32)
v.AuxInt = 0
v.AddArg(ptr)
// cond:
// result: (LoweredAtomicExchange32 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64LoweredAtomicExchange32)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicExchange64 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64LoweredAtomicExchange64)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicLoad32 [1] ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpPPC64LoweredAtomicLoad32)
v.AuxInt = 1
v.AddArg(ptr)
// cond:
// result: (LoweredAtomicLoad64 [1] ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpPPC64LoweredAtomicLoad64)
v.AuxInt = 1
v.AddArg(ptr)
// cond:
// result: (LoweredAtomicLoad32 [0] ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpPPC64LoweredAtomicLoad32)
v.AuxInt = 0
v.AddArg(ptr)
// cond:
// result: (LoweredAtomicLoadPtr [1] ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpPPC64LoweredAtomicLoadPtr)
v.AuxInt = 1
v.AddArg(ptr)
// cond:
// result: (LoweredAtomicOr8 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64LoweredAtomicOr8)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicStore32 [1] ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64LoweredAtomicStore32)
v.AuxInt = 1
v.AddArg(ptr)
// cond:
// result: (LoweredAtomicStore64 [1] ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64LoweredAtomicStore64)
v.AuxInt = 1
v.AddArg(ptr)
// cond:
// result: (LoweredAtomicStore32 [0] ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64LoweredAtomicStore32)
v.AuxInt = 0
v.AddArg(ptr)
// result: (ADD (SRDconst <t> (SUB <t> x y) [1]) y)
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64ADD)
v0 := b.NewValue0(v.Pos, OpPPC64SRDconst, t)
v0.AuxInt = 1
// result: (CALLclosure [argwid] entry closure mem)
for {
argwid := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
entry := v.Args[0]
closure := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64CALLclosure)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (FCPSGN y x)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FCPSGN)
v.AddArg(y)
v.AddArg(x)
// cond:
// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64DIVW)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (DIVWU (ZeroExt16to32 x) (ZeroExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64DIVWU)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (DIVW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64DIVW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FDIVS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FDIVS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (DIVWU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64DIVWU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (DIVD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64DIVD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FDIV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FDIV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (DIVDU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64DIVDU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64DIVW)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (DIVWU (ZeroExt8to32 x) (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64DIVWU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(x)
// cond: isSigned(x.Type) && isSigned(y.Type)
// result: (Equal (CMPW (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(isSigned(x.Type) && isSigned(y.Type)) {
break
}
// cond:
// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64Equal)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (Equal (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64Equal)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (Equal (FCMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64Equal)
v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (Equal (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64Equal)
v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (Equal (FCMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64Equal)
v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
v0.AddArg(x)
// cond: isSigned(x.Type) && isSigned(y.Type)
// result: (Equal (CMPW (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(isSigned(x.Type) && isSigned(y.Type)) {
break
}
// cond:
// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64Equal)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (ANDconst [1] (EQV x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64ANDconst)
v.AuxInt = 1
v0 := b.NewValue0(v.Pos, OpPPC64EQV, typ.Int64)
// cond:
// result: (Equal (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64Equal)
v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (GreaterEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (GreaterEqual (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (FGreaterEqual (FCMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FGreaterEqual)
v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMPWU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (FGreaterEqual (FCMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FGreaterEqual)
v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (GreaterEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (GreaterThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (GreaterThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (GreaterThan (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (FGreaterThan (FCMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FGreaterThan)
v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThan (CMPWU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThan (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (FGreaterThan (FCMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FGreaterThan)
v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThan (CMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (GreaterThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (GreaterThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64GreaterThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (MULHW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64MULHW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULHWU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64MULHWU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULHD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64MULHD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULHDU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64MULHDU)
v.AddArg(x)
v.AddArg(y)
// result: (CALLinter [argwid] entry mem)
for {
argwid := v.AuxInt
- _ = v.Args[1]
- entry := v.Args[0]
mem := v.Args[1]
+ entry := v.Args[0]
v.reset(OpPPC64CALLinter)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (LessThan (CMPU idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpPPC64LessThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
v0.AddArg(idx)
// cond:
// result: (LessEqual (CMPU idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpPPC64LessEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
v0.AddArg(idx)
// cond:
// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (LessEqual (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (LessEqual (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (FLessEqual (FCMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FLessEqual)
v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessEqual (CMPWU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessEqual (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (FLessEqual (FCMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FLessEqual)
v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessEqual (CMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (LessEqual (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
// cond:
// result: (LessThan (CMPWU (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (LessThan (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (FLessThan (FCMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FLessThan)
v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessThan (CMPWU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessThan (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (FLessThan (FCMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FLessThan)
v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessThan (CMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
// cond:
// result: (LessThan (CMPWU (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LessThan)
v0 := b.NewValue0(v.Pos, OpPPC64CMPWU, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// result: (MOVDload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitInt(t) || isPtr(t)) {
break
}
// result: (MOVWload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitInt(t) && isSigned(t)) {
break
}
// result: (MOVWZload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVHload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t) && isSigned(t)) {
break
}
// result: (MOVHZload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVBZload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsBoolean()) {
break
}
// result: (MOVBreg (MOVBZload ptr mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is8BitInt(t) && isSigned(t)) {
break
}
// result: (MOVBZload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is8BitInt(t) && !isSigned(t)) {
break
}
// result: (FMOVSload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitFloat(t)) {
break
}
// result: (FMOVDload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitFloat(t)) {
break
}
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
if v_1.Op != OpPPC64AND {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpPPC64MOVDconst {
break
if v_1_0.AuxInt != 31 {
break
}
- y := v_1.Args[1]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
// cond:
// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
if v_1.Op != OpPPC64AND {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpPPC64MOVDconst {
break
if v_1_0.AuxInt != 63 {
break
}
- y := v_1.Args[1]
v.reset(OpPPC64SLD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
// cond:
// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SLW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond:
// result: (Mod32 (SignExt16to32 x) (SignExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMod32)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (Mod32u (ZeroExt16to32 x) (ZeroExt16to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMod32u)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(x)
// cond:
// result: (SUB x (MULLW y (DIVW x y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SUB)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
// cond:
// result: (SUB x (MULLW y (DIVWU x y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SUB)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64MULLW, typ.Int32)
// cond:
// result: (SUB x (MULLD y (DIVD x y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SUB)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
// cond:
// result: (SUB x (MULLD y (DIVDU x y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SUB)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64MULLD, typ.Int64)
// cond:
// result: (Mod32 (SignExt8to32 x) (SignExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMod32)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// cond:
// result: (Mod32u (ZeroExt8to32 x) (ZeroExt8to32 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpMod32u)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(x)
if v.AuxInt != 0 {
break
}
- _ = v.Args[2]
mem := v.Args[2]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64MOVBstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpPPC64MOVBZload, typ.UInt8)
if v.AuxInt != 2 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64MOVHstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpPPC64MOVHZload, typ.UInt16)
if v.AuxInt != 4 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64MOVWstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpPPC64MOVWZload, typ.UInt32)
break
}
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
if v.AuxInt != 8 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64MOVWstore)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 3 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64MOVBstore)
v.AuxInt = 2
v.AddArg(dst)
if v.AuxInt != 5 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64MOVBstore)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 6 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64MOVHstore)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 7 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64MOVBstore)
v.AuxInt = 6
v.AddArg(dst)
// result: (LoweredMove [s] dst src mem)
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 8) {
break
}
// cond:
// result: (MULLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64MULLW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64MULLW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMULS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FMULS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULLD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64MULLD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMUL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FMUL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (LoweredMuluhilo x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64LoweredMuluhilo)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64MULLW)
v.AddArg(x)
v.AddArg(y)
// cond: isSigned(x.Type) && isSigned(y.Type)
// result: (NotEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(isSigned(x.Type) && isSigned(y.Type)) {
break
}
// cond:
// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64NotEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
// cond:
// result: (NotEqual (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64NotEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (NotEqual (FCMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64NotEqual)
v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (NotEqual (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64NotEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (NotEqual (FCMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64NotEqual)
v0 := b.NewValue0(v.Pos, OpPPC64FCMPU, types.TypeFlags)
v0.AddArg(x)
// cond: isSigned(x.Type) && isSigned(y.Type)
// result: (NotEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(isSigned(x.Type) && isSigned(y.Type)) {
break
}
// cond:
// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64NotEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMPW, types.TypeFlags)
v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (NotEqual (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64NotEqual)
v0 := b.NewValue0(v.Pos, OpPPC64CMP, types.TypeFlags)
v0.AddArg(x)
// cond:
// result: (LoweredNilCheck ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpPPC64LoweredNilCheck)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64OR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64OR)
v.AddArg(x)
v.AddArg(y)
// cond: is32Bit(c)
// result: (ADDconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
if v_1.Op != OpPPC64NOR {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
- if y != v_1.Args[1] {
+ y := v_1.Args[1]
+ if y != v_1.Args[0] {
break
}
v.reset(OpPPC64ANDN)
// cond:
// result: (ANDN x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64NOR {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
- if y != v_0.Args[1] {
+ y := v_0.Args[1]
+ if y != v_0.Args[0] {
break
}
- x := v.Args[1]
v.reset(OpPPC64ANDN)
v.AddArg(x)
v.AddArg(y)
// cond: isU16Bit(c)
// result: (ANDconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isU16Bit(c)) {
break
}
// cond: is16Bit(c)
// result: (InvertFlags (CMPconst y [c]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
- y := v.Args[1]
if !(is16Bit(c)) {
break
}
// cond: isU16Bit(c)
// result: (InvertFlags (CMPUconst y [c]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
- y := v.Args[1]
if !(isU16Bit(c)) {
break
}
// cond:
// result: (CMPW x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVWreg {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpPPC64CMPW)
v.AddArg(x)
v.AddArg(y)
// cond: is16Bit(c)
// result: (InvertFlags (CMPWconst y [c]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
- y := v.Args[1]
if !(is16Bit(c)) {
break
}
// cond:
// result: (CMPWU x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVWZreg {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpPPC64CMPWU)
v.AddArg(x)
v.AddArg(y)
// cond: isU16Bit(c)
// result: (InvertFlags (CMPWUconst y [c]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
- y := v.Args[1]
if !(isU16Bit(c)) {
break
}
// cond:
// result: (FMADD x y z)
for {
- _ = v.Args[1]
+ z := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64FMUL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- z := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpPPC64FMADD)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpPPC64FMUL {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
v.reset(OpPPC64FMADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMADDS x y z)
for {
- _ = v.Args[1]
+ z := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64FMULS {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- z := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpPPC64FMADDS)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpPPC64FMULS {
break
}
- _ = v_1.Args[1]
- x := v_1.Args[0]
y := v_1.Args[1]
+ x := v_1.Args[0]
v.reset(OpPPC64FMADDS)
v.AddArg(x)
v.AddArg(y)
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
off2 := p.AuxInt
sym2 := p.Aux
ptr := p.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MTVSRD {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVDstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
sym2 := p.Aux
ptr := p.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
off2 := p.AuxInt
sym2 := p.Aux
ptr := p.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
sym2 := p.Aux
ptr := p.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
// cond:
// result: (FMSUB x y z)
for {
- _ = v.Args[1]
+ z := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64FMUL {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- z := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpPPC64FMSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMSUBS x y z)
for {
- _ = v.Args[1]
+ z := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64FMULS {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- z := v.Args[1]
+ x := v_0.Args[0]
v.reset(OpPPC64FMSUBS)
v.AddArg(x)
v.AddArg(y)
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
off2 := p.AuxInt
sym2 := p.Aux
ptr := p.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
}
off2 := v_0.AuxInt
x := v_0.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1 + off2)) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64ADD {
break
}
- _ = p.Args[1]
- ptr := p.Args[0]
idx := p.Args[1]
- mem := v.Args[1]
+ ptr := p.Args[0]
if !(sym == nil && p.Uses == 1) {
break
}
// cond: is16Bit(c)
// result: (MOVBZload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
// cond: is16Bit(c)
// result: (MOVBZload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
off2 := v_0.AuxInt
x := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
sym2 := p.Aux
ptr := p.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpPPC64MOVBstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
if p.Op != OpPPC64ADD {
break
}
- _ = p.Args[1]
- ptr := p.Args[0]
idx := p.Args[1]
+ ptr := p.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil && p.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVBreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVBZreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVHreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVHZreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVWZreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64SRWconst {
break
}
x := v_1_0.Args[0]
- mem := v.Args[2]
if !(c <= 8) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64SRWconst {
break
}
x := v_1_0.Args[0]
- mem := v.Args[2]
if !(c <= 8) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64SRWconst {
break
}
x := v_1_0.Args[0]
- mem := v.Args[2]
if !(c <= 24) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64SRWconst {
break
}
x := v_1_0.Args[0]
- mem := v.Args[2]
if !(c <= 24) {
break
}
if x0.Aux != s {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
if p != x0.Args[0] {
break
}
if w != x0_1.Args[0] {
break
}
- mem := x0.Args[2]
if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
break
}
if x0.Aux != s {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
if p != x0.Args[0] {
break
}
if w != x0_1.Args[0] {
break
}
- mem := x0.Args[2]
if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
break
}
if x0.Aux != s {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
if p != x0.Args[0] {
break
}
if w != x0.Args[1] {
break
}
- mem := x0.Args[2]
if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
break
}
if x0.Aux != s {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
if p != x0.Args[0] {
break
}
if w != x0.Args[1] {
break
}
- mem := x0.Args[2]
if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
break
}
if x2.Aux != s {
break
}
- _ = x2.Args[2]
+ mem := x2.Args[2]
if p != x2.Args[0] {
break
}
if w != x2_1.Args[0] {
break
}
- mem := x2.Args[2]
if !(!config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && clobber(x0) && clobber(x1) && clobber(x2)) {
break
}
if x0.Aux != s {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
if p != x0.Args[0] {
break
}
if w != x0_1.Args[0] {
break
}
- mem := x0.Args[2]
if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+1 && clobber(x0)) {
break
}
if x3.Aux != s {
break
}
- _ = x3.Args[2]
+ mem := x3.Args[2]
if p != x3.Args[0] {
break
}
if w != x3.Args[1] {
break
}
- mem := x3.Args[2]
if !(!config.BigEndian && i0%4 == 0 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3)) {
break
}
if x6.Aux != s {
break
}
- _ = x6.Args[2]
+ mem := x6.Args[2]
if p != x6.Args[0] {
break
}
if w != x6_1.Args[0] {
break
}
- mem := x6.Args[2]
if !(!config.BigEndian && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)) {
break
}
// cond: is16Bit(c)
// result: (MOVBstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
if !(is16Bit(c)) {
break
}
// cond: is16Bit(c)
// result: (MOVBstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
c := v_0.AuxInt
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is16Bit(c)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpPPC64MOVBstoreidx)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpPPC64MOVBstoreidx)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpPPC64MOVBstoreidx)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpPPC64MOVBstoreidx)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpPPC64MOVBstoreidx)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpPPC64MOVBstoreidx)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2_0.Args[0]
- mem := v.Args[3]
if !(c <= 8) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2_0.Args[0]
- mem := v.Args[3]
if !(c <= 8) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2_0.Args[0]
- mem := v.Args[3]
if !(c <= 24) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2_0.Args[0]
- mem := v.Args[3]
if !(c <= 24) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
}
off2 := v_0.AuxInt
x := v_0.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
off2 := p.AuxInt
sym2 := p.Aux
x := p.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
off2 := p.AuxInt
sym2 := p.Aux
ptr := p.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
}
off2 := v_0.AuxInt
x := v_0.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1 + off2)) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64ADD {
break
}
- _ = p.Args[1]
- ptr := p.Args[0]
idx := p.Args[1]
- mem := v.Args[1]
+ ptr := p.Args[0]
if !(sym == nil && p.Uses == 1) {
break
}
// cond: is16Bit(c)
// result: (MOVDload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
// cond: is16Bit(c)
// result: (MOVDload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MFVSRD {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64FMOVDstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
off2 := v_0.AuxInt
x := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
sym2 := p.Aux
ptr := p.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpPPC64MOVDstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
if p.Op != OpPPC64ADD {
break
}
- _ = p.Args[1]
- ptr := p.Args[0]
idx := p.Args[1]
+ ptr := p.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil && p.Uses == 1) {
break
}
// cond: is16Bit(c)
// result: (MOVDstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
if !(is16Bit(c)) {
break
}
// cond: is16Bit(c)
// result: (MOVDstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
c := v_0.AuxInt
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is16Bit(c)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
}
off2 := v_0.AuxInt
x := v_0.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
off2 := p.AuxInt
sym2 := p.Aux
x := p.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
break
}
// result: (MOVHBRstore {sym} ptr x mem)
for {
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVHreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVHBRstore)
v.Aux = sym
v.AddArg(ptr)
// result: (MOVHBRstore {sym} ptr x mem)
for {
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVHZreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVHBRstore)
v.Aux = sym
v.AddArg(ptr)
// result: (MOVHBRstore {sym} ptr x mem)
for {
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVHBRstore)
v.Aux = sym
v.AddArg(ptr)
// result: (MOVHBRstore {sym} ptr x mem)
for {
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVWZreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVHBRstore)
v.Aux = sym
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
off2 := p.AuxInt
sym2 := p.Aux
ptr := p.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
}
off2 := v_0.AuxInt
x := v_0.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1 + off2)) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64ADD {
break
}
- _ = p.Args[1]
- ptr := p.Args[0]
idx := p.Args[1]
- mem := v.Args[1]
+ ptr := p.Args[0]
if !(sym == nil && p.Uses == 1) {
break
}
// cond: is16Bit(c)
// result: (MOVHZload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
// cond: is16Bit(c)
// result: (MOVHZload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
off2 := p.AuxInt
sym2 := p.Aux
ptr := p.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
}
off2 := v_0.AuxInt
x := v_0.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1 + off2)) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64ADD {
break
}
- _ = p.Args[1]
- ptr := p.Args[0]
idx := p.Args[1]
- mem := v.Args[1]
+ ptr := p.Args[0]
if !(sym == nil && p.Uses == 1) {
break
}
// cond: is16Bit(c)
// result: (MOVHload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
// cond: is16Bit(c)
// result: (MOVHload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
off2 := v_0.AuxInt
x := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
sym2 := p.Aux
ptr := p.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpPPC64MOVHstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
if p.Op != OpPPC64ADD {
break
}
- _ = p.Args[1]
- ptr := p.Args[0]
idx := p.Args[1]
+ ptr := p.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil && p.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVHreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVHZreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVWZreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVHstore)
v.AuxInt = off
v.Aux = sym
if x0.Aux != s {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
if p != x0.Args[0] {
break
}
if w != x0.Args[1] {
break
}
- mem := x0.Args[2]
if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)) {
break
}
if x0.Aux != s {
break
}
- _ = x0.Args[2]
+ mem := x0.Args[2]
if p != x0.Args[0] {
break
}
if w != x0.Args[1] {
break
}
- mem := x0.Args[2]
if !(!config.BigEndian && x0.Uses == 1 && i1 == i0+2 && clobber(x0)) {
break
}
// cond: is16Bit(c)
// result: (MOVHstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
if !(is16Bit(c)) {
break
}
// cond: is16Bit(c)
// result: (MOVHstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
c := v_0.AuxInt
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is16Bit(c)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpPPC64MOVHstoreidx)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpPPC64MOVHstoreidx)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpPPC64MOVHstoreidx)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpPPC64MOVHstoreidx)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
}
off2 := v_0.AuxInt
x := v_0.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
off2 := p.AuxInt
sym2 := p.Aux
x := p.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
break
}
// result: (MOVWBRstore {sym} ptr x mem)
for {
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVWBRstore)
v.Aux = sym
v.AddArg(ptr)
// result: (MOVWBRstore {sym} ptr x mem)
for {
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVWZreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVWBRstore)
v.Aux = sym
v.AddArg(ptr)
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
off2 := p.AuxInt
sym2 := p.Aux
ptr := p.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
}
off2 := v_0.AuxInt
x := v_0.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1 + off2)) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64ADD {
break
}
- _ = p.Args[1]
- ptr := p.Args[0]
idx := p.Args[1]
- mem := v.Args[1]
+ ptr := p.Args[0]
if !(sym == nil && p.Uses == 1) {
break
}
// cond: is16Bit(c)
// result: (MOVWZload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
// cond: is16Bit(c)
// result: (MOVWZload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
off2 := p.AuxInt
sym2 := p.Aux
ptr := p.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
}
off2 := v_0.AuxInt
x := v_0.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1 + off2)) {
break
}
break
}
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64ADD {
break
}
- _ = p.Args[1]
- ptr := p.Args[0]
idx := p.Args[1]
- mem := v.Args[1]
+ ptr := p.Args[0]
if !(sym == nil && p.Uses == 1) {
break
}
// cond: is16Bit(c)
// result: (MOVWload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
// cond: is16Bit(c)
// result: (MOVWload [c] ptr mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
ptr := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(c)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
off2 := v_0.AuxInt
x := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is16Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
sym2 := p.Aux
ptr := p.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(canMergeSym(sym1, sym2) && (ptr.Op != OpSB || p.Uses == 1)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
if v_1.AuxInt != 0 {
break
}
- mem := v.Args[2]
v.reset(OpPPC64MOVWstorezero)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p := v.Args[0]
if p.Op != OpPPC64ADD {
break
}
- _ = p.Args[1]
- ptr := p.Args[0]
idx := p.Args[1]
+ ptr := p.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(off == 0 && sym == nil && p.Uses == 1) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVWstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVWZreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpPPC64MOVWstore)
v.AuxInt = off
v.Aux = sym
// cond: is16Bit(c)
// result: (MOVWstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpPPC64MOVDconst {
}
c := v_1.AuxInt
val := v.Args[2]
- mem := v.Args[3]
if !(is16Bit(c)) {
break
}
// cond: is16Bit(c)
// result: (MOVWstore [c] ptr val mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
c := v_0.AuxInt
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is16Bit(c)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpPPC64MOVWstoreidx)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
idx := v.Args[1]
v_2 := v.Args[2]
break
}
x := v_2.Args[0]
- mem := v.Args[3]
v.reset(OpPPC64MOVWstoreidx)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64ADDconst {
break
}
off2 := v_0.AuxInt
x := v_0.Args[0]
- mem := v.Args[1]
if !(is16Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
p := v.Args[0]
if p.Op != OpPPC64MOVDaddr {
break
off2 := p.AuxInt
sym2 := p.Aux
x := p.Args[0]
- mem := v.Args[1]
if !(canMergeSym(sym1, sym2) && (x.Op != OpSB || p.Uses == 1)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
// cond: isU32Bit(c)
// result: (ORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isU32Bit(c)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o1 := v.Args[1]
if o1.Op != OpPPC64SLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := v.Args[1]
if x0.Op != OpPPC64MOVBZload {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o1 := v.Args[1]
if o1.Op != OpPPC64SLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := v.Args[1]
if x0.Op != OpPPC64MOVBZload {
break
}
i1 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o1 := v.Args[1]
if o1.Op != OpPPC64SLWconst {
break
}
i0 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := v.Args[1]
if x0.Op != OpPPC64MOVBZload {
break
}
i1 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o1 := v.Args[1]
if o1.Op != OpPPC64SLDconst {
break
}
i0 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := v.Args[1]
if x0.Op != OpPPC64MOVBZload {
break
}
i1 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpPPC64SLWconst {
break
}
i0 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpPPC64SLWconst {
break
}
i1 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpPPC64SLDconst {
break
}
i0 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpPPC64SLDconst {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := o0.Args[1]
if x0.Op != OpPPC64MOVHZload {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s0 := o0.Args[1]
if s0.Op != OpPPC64SLWconst {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := o0.Args[1]
if x0.Op != OpPPC64MOVHZload {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s0 := o0.Args[1]
if s0.Op != OpPPC64SLDconst {
break
}
i0 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i0 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := o0.Args[1]
if x0.Op != OpPPC64MOVHBRload {
break
if x0.Type != t {
break
}
- _ = x0.Args[1]
+ mem := x0.Args[1]
x0_0 := x0.Args[0]
if x0_0.Op != OpPPC64MOVDaddr {
break
i2 := x0_0.AuxInt
s := x0_0.Aux
p := x0_0.Args[0]
- mem := x0.Args[1]
s0 := o0.Args[1]
if s0.Op != OpPPC64SLWconst {
break
}
i0 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i0 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := o0.Args[1]
if x0.Op != OpPPC64MOVHBRload {
break
if x0.Type != t {
break
}
- _ = x0.Args[1]
+ mem := x0.Args[1]
x0_0 := x0.Args[0]
if x0_0.Op != OpPPC64MOVDaddr {
break
i2 := x0_0.AuxInt
s := x0_0.Aux
p := x0_0.Args[0]
- mem := x0.Args[1]
s0 := o0.Args[1]
if s0.Op != OpPPC64SLDconst {
break
}
i3 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i3 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
s1 := o0.Args[1]
if s1.Op != OpPPC64SLWconst {
break
if x2.Type != t {
break
}
- _ = x2.Args[1]
+ mem := x2.Args[1]
x2_0 := x2.Args[0]
if x2_0.Op != OpPPC64MOVDaddr {
break
i0 := x2_0.AuxInt
s := x2_0.Aux
p := x2_0.Args[0]
- mem := x2.Args[1]
s0 := o0.Args[1]
if s0.Op != OpPPC64SLWconst {
break
}
i3 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i3 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
s1 := o0.Args[1]
if s1.Op != OpPPC64SLDconst {
break
if x2.Type != t {
break
}
- _ = x2.Args[1]
+ mem := x2.Args[1]
x2_0 := x2.Args[0]
if x2_0.Op != OpPPC64MOVDaddr {
break
i0 := x2_0.AuxInt
s := x2_0.Aux
p := x2_0.Args[0]
- mem := x2.Args[1]
s0 := o0.Args[1]
if s0.Op != OpPPC64SLDconst {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i3 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i2 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
s0 := o0.Args[1]
if s0.Op != OpPPC64SLDconst {
break
if x0.Type != t {
break
}
- _ = x0.Args[1]
+ mem := x0.Args[1]
x0_0 := x0.Args[0]
if x0_0.Op != OpPPC64MOVDaddr {
break
i0 := x0_0.AuxInt
s := x0_0.Aux
p := x0_0.Args[0]
- mem := x0.Args[1]
s1 := o0.Args[1]
if s1.Op != OpPPC64SLDconst {
break
}
i0 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i0 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
s0 := o0.Args[1]
if s0.Op != OpPPC64SLDconst {
break
if x0.Type != t {
break
}
- _ = x0.Args[1]
+ mem := x0.Args[1]
x0_0 := x0.Args[0]
if x0_0.Op != OpPPC64MOVDaddr {
break
i2 := x0_0.AuxInt
s := x0_0.Aux
p := x0_0.Args[0]
- mem := x0.Args[1]
s1 := o0.Args[1]
if s1.Op != OpPPC64SLDconst {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i6 := x6.AuxInt
s := x6.Aux
- _ = x6.Args[1]
- p := x6.Args[0]
mem := x6.Args[1]
+ p := x6.Args[0]
o4 := o5.Args[1]
if o4.Op != OpPPC64OR {
break
}
i6 := x6.AuxInt
s := x6.Aux
- _ = x6.Args[1]
- p := x6.Args[0]
mem := x6.Args[1]
+ p := x6.Args[0]
o4 := o5.Args[1]
if o4.Op != OpPPC64OR {
break
}
i6 := x6.AuxInt
s := x6.Aux
- _ = x6.Args[1]
- p := x6.Args[0]
mem := x6.Args[1]
+ p := x6.Args[0]
o4 := o5.Args[1]
if o4.Op != OpPPC64OR {
break
}
i6 := x6.AuxInt
s := x6.Aux
- _ = x6.Args[1]
- p := x6.Args[0]
mem := x6.Args[1]
+ p := x6.Args[0]
o4 := o5.Args[1]
if o4.Op != OpPPC64OR {
break
}
i5 := x5.AuxInt
s := x5.Aux
- _ = x5.Args[1]
- p := x5.Args[0]
mem := x5.Args[1]
+ p := x5.Args[0]
o3 := o4.Args[1]
if o3.Op != OpPPC64OR {
break
}
i5 := x5.AuxInt
s := x5.Aux
- _ = x5.Args[1]
- p := x5.Args[0]
mem := x5.Args[1]
+ p := x5.Args[0]
o3 := o4.Args[1]
if o3.Op != OpPPC64OR {
break
}
i4 := x4.AuxInt
s := x4.Aux
- _ = x4.Args[1]
- p := x4.Args[0]
mem := x4.Args[1]
+ p := x4.Args[0]
x0 := o3.Args[1]
if x0.Op != OpPPC64MOVWZload {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s3 := o3.Args[1]
if s3.Op != OpPPC64SLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
o0 := v.Args[1]
if o0.Op != OpPPC64OR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
o1 := o0.Args[1]
if o1.Op != OpPPC64OR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
o1 := o0.Args[1]
if o1.Op != OpPPC64OR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
o1 := o0.Args[1]
if o1.Op != OpPPC64OR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
o1 := o0.Args[1]
if o1.Op != OpPPC64OR {
break
}
i2 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o2 := o1.Args[1]
if o2.Op != OpPPC64OR {
break
}
i2 := x2.AuxInt
s := x2.Aux
- _ = x2.Args[1]
- p := x2.Args[0]
mem := x2.Args[1]
+ p := x2.Args[0]
o2 := o1.Args[1]
if o2.Op != OpPPC64OR {
break
}
i3 := x3.AuxInt
s := x3.Aux
- _ = x3.Args[1]
- p := x3.Args[0]
mem := x3.Args[1]
+ p := x3.Args[0]
x4 := o2.Args[1]
if x4.Op != OpPPC64MOVWBRload {
break
if x4.Type != t {
break
}
- _ = x4.Args[1]
+ mem := x4.Args[1]
x4_0 := x4.Args[0]
if x4_0.Op != OpPPC64MOVDaddr {
break
}
i4 := x4_0.AuxInt
p := x4_0.Args[0]
- mem := x4.Args[1]
s3 := o2.Args[1]
if s3.Op != OpPPC64SLDconst {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i6 := x6.AuxInt
s := x6.Aux
- _ = x6.Args[1]
- p := x6.Args[0]
mem := x6.Args[1]
+ p := x6.Args[0]
o4 := o5.Args[1]
if o4.Op != OpPPC64OR {
break
}
i6 := x6.AuxInt
s := x6.Aux
- _ = x6.Args[1]
- p := x6.Args[0]
mem := x6.Args[1]
+ p := x6.Args[0]
o4 := o5.Args[1]
if o4.Op != OpPPC64OR {
break
}
i6 := x6.AuxInt
s := x6.Aux
- _ = x6.Args[1]
- p := x6.Args[0]
mem := x6.Args[1]
+ p := x6.Args[0]
o4 := o5.Args[1]
if o4.Op != OpPPC64OR {
break
}
i6 := x6.AuxInt
s := x6.Aux
- _ = x6.Args[1]
- p := x6.Args[0]
mem := x6.Args[1]
+ p := x6.Args[0]
o4 := o5.Args[1]
if o4.Op != OpPPC64OR {
break
}
i5 := x5.AuxInt
s := x5.Aux
- _ = x5.Args[1]
- p := x5.Args[0]
mem := x5.Args[1]
+ p := x5.Args[0]
o3 := o4.Args[1]
if o3.Op != OpPPC64OR {
break
}
i5 := x5.AuxInt
s := x5.Aux
- _ = x5.Args[1]
- p := x5.Args[0]
mem := x5.Args[1]
+ p := x5.Args[0]
o3 := o4.Args[1]
if o3.Op != OpPPC64OR {
break
}
i4 := x4.AuxInt
s := x4.Aux
- _ = x4.Args[1]
- p := x4.Args[0]
mem := x4.Args[1]
+ p := x4.Args[0]
s0 := o3.Args[1]
if s0.Op != OpPPC64SLWconst {
break
if x3.Type != t {
break
}
- _ = x3.Args[1]
+ mem := x3.Args[1]
x3_0 := x3.Args[0]
if x3_0.Op != OpPPC64MOVDaddr {
break
i0 := x3_0.AuxInt
s := x3_0.Aux
p := x3_0.Args[0]
- mem := x3.Args[1]
s4 := o3.Args[1]
if s4.Op != OpPPC64SLDconst {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i7 := x7.AuxInt
s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
mem := x7.Args[1]
+ p := x7.Args[0]
o5 := v.Args[1]
if o5.Op != OpPPC64OR {
break
}
i6 := x6.AuxInt
s := x6.Aux
- _ = x6.Args[1]
- p := x6.Args[0]
mem := x6.Args[1]
+ p := x6.Args[0]
o4 := o5.Args[1]
if o4.Op != OpPPC64OR {
break
}
i6 := x6.AuxInt
s := x6.Aux
- _ = x6.Args[1]
- p := x6.Args[0]
mem := x6.Args[1]
+ p := x6.Args[0]
o4 := o5.Args[1]
if o4.Op != OpPPC64OR {
break
}
i6 := x6.AuxInt
s := x6.Aux
- _ = x6.Args[1]
- p := x6.Args[0]
mem := x6.Args[1]
+ p := x6.Args[0]
o4 := o5.Args[1]
if o4.Op != OpPPC64OR {
break
}
i6 := x6.AuxInt
s := x6.Aux
- _ = x6.Args[1]
- p := x6.Args[0]
mem := x6.Args[1]
+ p := x6.Args[0]
o4 := o5.Args[1]
if o4.Op != OpPPC64OR {
break
}
i5 := x5.AuxInt
s := x5.Aux
- _ = x5.Args[1]
- p := x5.Args[0]
mem := x5.Args[1]
+ p := x5.Args[0]
o3 := o4.Args[1]
if o3.Op != OpPPC64OR {
break
}
i5 := x5.AuxInt
s := x5.Aux
- _ = x5.Args[1]
- p := x5.Args[0]
mem := x5.Args[1]
+ p := x5.Args[0]
o3 := o4.Args[1]
if o3.Op != OpPPC64OR {
break
}
i4 := x4.AuxInt
s := x4.Aux
- _ = x4.Args[1]
- p := x4.Args[0]
mem := x4.Args[1]
+ p := x4.Args[0]
s0 := o3.Args[1]
if s0.Op != OpPPC64SLDconst {
break
if x3.Type != t {
break
}
- _ = x3.Args[1]
+ mem := x3.Args[1]
x3_0 := x3.Args[0]
if x3_0.Op != OpPPC64MOVDaddr {
break
i0 := x3_0.AuxInt
s := x3_0.Aux
p := x3_0.Args[0]
- mem := x3.Args[1]
s4 := o3.Args[1]
if s4.Op != OpPPC64SLDconst {
break
// cond: isU32Bit(c)
// result: (XORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpPPC64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isU32Bit(c)) {
break
}
// cond: shiftIsBounded(v)
// result: (SRW (MOVHZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRW)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRW (MOVHZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRW)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRW (MOVHZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRW)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRW (MOVHZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRW (ZeroExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRW)
v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVHreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt16to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAW)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVHreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt32to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAW)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVHreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAW)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVHreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (SignExt16to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-16] (ZeroExt8to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAW)
v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
if v_1.Op != OpPPC64AND {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpPPC64MOVDconst {
break
if v_1_0.AuxInt != 31 {
break
}
- y := v_1.Args[1]
v.reset(OpPPC64SRW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
if v_1_1.Type != typ.UInt {
break
}
- _ = v_1_1.Args[1]
+ y := v_1_1.Args[1]
v_1_1_0 := v_1_1.Args[0]
if v_1_1_0.Op != OpPPC64MOVDconst {
break
if v_1_1_0.AuxInt != 31 {
break
}
- y := v_1_1.Args[1]
v.reset(OpPPC64SRW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
// cond:
// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRAW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt16to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRAW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt32to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRAW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
if v_1.Op != OpPPC64AND {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpPPC64MOVDconst {
break
if v_1_0.AuxInt != 31 {
break
}
- y := v_1.Args[1]
v.reset(OpPPC64SRAW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int32)
if v_1_1.Type != typ.UInt {
break
}
- _ = v_1_1.Args[1]
+ y := v_1_1.Args[1]
v_1_1_0 := v_1_1.Args[0]
if v_1_1_0.Op != OpPPC64MOVDconst {
break
if v_1_1_0.AuxInt != 31 {
break
}
- y := v_1_1.Args[1]
v.reset(OpPPC64SRAW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
// cond:
// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRAW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-32] (ZeroExt8to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
if v_1.Op != OpPPC64AND {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpPPC64MOVDconst {
break
if v_1_0.AuxInt != 63 {
break
}
- y := v_1.Args[1]
v.reset(OpPPC64SRD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
if v_1_1.Type != typ.UInt {
break
}
- _ = v_1_1.Args[1]
+ y := v_1_1.Args[1]
v_1_1_0 := v_1_1.Args[0]
if v_1_1_0.Op != OpPPC64MOVDconst {
break
if v_1_1_0.AuxInt != 63 {
break
}
- y := v_1_1.Args[1]
v.reset(OpPPC64SRD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
// cond:
// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRAD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt16to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRAD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt32to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRAD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
if v_1.Op != OpPPC64AND {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpPPC64MOVDconst {
break
if v_1_0.AuxInt != 63 {
break
}
- y := v_1.Args[1]
v.reset(OpPPC64SRAD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ANDconst, typ.Int64)
if v_1_1.Type != typ.UInt {
break
}
- _ = v_1_1.Args[1]
+ y := v_1_1.Args[1]
v_1_1_0 := v_1_1.Args[0]
if v_1_1_0.Op != OpPPC64MOVDconst {
break
if v_1_1_0.AuxInt != 63 {
break
}
- y := v_1_1.Args[1]
v.reset(OpPPC64SRAD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64SUB, typ.UInt)
// cond:
// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRAD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAD x (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-64] (ZeroExt8to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpPPC64ORN, typ.Int64)
// cond: shiftIsBounded(v)
// result: (SRW (MOVBZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRW)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRW (MOVBZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRW)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRW (MOVBZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRW)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRW (MOVBZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRW (ZeroExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRW)
v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVBreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt16to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAW)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVBreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt32to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAW)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVBreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAW)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVBreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (SignExt8to32 x) (ORN y <typ.Int64> (MaskIfNotCarry (ADDconstForCarry [-8] (ZeroExt8to64 y)))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SRAW)
v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
v0.AddArg(x)
// result: (FMOVDstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
break
}
// result: (FMOVDstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8 && is32BitFloat(val.Type)) {
break
}
// result: (FMOVSstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
break
}
// result: (MOVDstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8 && (is64BitInt(val.Type) || isPtr(val.Type))) {
break
}
// result: (MOVWstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && is32BitInt(val.Type)) {
break
}
// result: (MOVHstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 2) {
break
}
// result: (MOVBstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 1) {
break
}
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FSUBS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FSUBS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FSUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64FSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64SUB)
v.AddArg(x)
v.AddArg(y)
// result: (LoweredWB {fn} destptr srcptr mem)
for {
fn := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
destptr := v.Args[0]
srcptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpPPC64LoweredWB)
v.Aux = fn
v.AddArg(destptr)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpPPC64XOR)
v.AddArg(x)
v.AddArg(y)
if v.AuxInt != 0 {
break
}
- _ = v.Args[1]
mem := v.Args[1]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpPPC64MOVBstorezero)
v.AddArg(destptr)
v.AddArg(mem)
if v.AuxInt != 2 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpPPC64MOVHstorezero)
v.AddArg(destptr)
v.AddArg(mem)
if v.AuxInt != 3 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpPPC64MOVBstorezero)
v.AuxInt = 2
v.AddArg(destptr)
if v.AuxInt != 4 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpPPC64MOVWstorezero)
v.AddArg(destptr)
v.AddArg(mem)
if v.AuxInt != 5 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpPPC64MOVBstorezero)
v.AuxInt = 4
v.AddArg(destptr)
if v.AuxInt != 6 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpPPC64MOVHstorezero)
v.AuxInt = 4
v.AddArg(destptr)
if v.AuxInt != 7 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpPPC64MOVBstorezero)
v.AuxInt = 6
v.AddArg(destptr)
break
}
t := v.Aux
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpPPC64MOVWstorezero)
v.AuxInt = 4
v.AddArg(destptr)
break
}
t := v.Aux
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
break
}
t := v.Aux
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(t.(*types.Type).Alignment()%4 == 0) {
break
}
// result: (LoweredZero [s] ptr mem)
for {
s := v.AuxInt
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpPPC64LoweredZero)
v.AuxInt = s
v.AddArg(ptr)
if z.Op != OpPPC64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64OR {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64XOR {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64OR {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64XOR {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64OR {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64XOR {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64OR {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64XOR {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64OR {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64XOR {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64AND {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64OR {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
if z.Op != OpPPC64XOR {
break
}
- _ = z.Args[1]
- x := z.Args[0]
y := z.Args[1]
+ x := z.Args[0]
if !(z.Uses == 1) {
break
}
// cond:
// result: (ADDW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XADDW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XADDW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FADDS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XFADDS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XFADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADDW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XADDW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ADD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XANDW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XANDW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AND x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XAND)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XANDW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ANDW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XANDW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (AddTupleFirst32 val (LAA ptr val mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XAddTupleFirst32)
v.AddArg(val)
v0 := b.NewValue0(v.Pos, OpS390XLAA, types.NewTuple(typ.UInt32, types.TypeMem))
// cond:
// result: (AddTupleFirst64 val (LAAG ptr val mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XAddTupleFirst64)
v.AddArg(val)
v0 := b.NewValue0(v.Pos, OpS390XLAAG, types.NewTuple(typ.UInt64, types.TypeMem))
// cond:
// result: (LoweredAtomicCas32 ptr old new_ mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
v.reset(OpS390XLoweredAtomicCas32)
v.AddArg(ptr)
v.AddArg(old)
// cond:
// result: (LoweredAtomicCas64 ptr old new_ mem)
for {
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
- mem := v.Args[3]
v.reset(OpS390XLoweredAtomicCas64)
v.AddArg(ptr)
v.AddArg(old)
// cond:
// result: (LoweredAtomicExchange32 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XLoweredAtomicExchange32)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (LoweredAtomicExchange64 ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XLoweredAtomicExchange64)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (MOVWZatomicload ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpS390XMOVWZatomicload)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (MOVDatomicload ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpS390XMOVDatomicload)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (MOVDatomicload ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpS390XMOVDatomicload)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (MOVWatomicstore ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVWatomicstore)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (MOVDatomicstore ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVDatomicstore)
v.AddArg(ptr)
v.AddArg(val)
// cond:
// result: (MOVDatomicstore ptr val mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVDatomicstore)
v.AddArg(ptr)
v.AddArg(val)
// result: (ADD (SRDconst <t> (SUB <t> x y) [1]) y)
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XADD)
v0 := b.NewValue0(v.Pos, OpS390XSRDconst, t)
v0.AuxInt = 1
// result: (CALLclosure [argwid] entry closure mem)
for {
argwid := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
entry := v.Args[0]
closure := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XCALLclosure)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (DIVW (MOVHreg x) (MOVHreg y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XDIVW)
v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, typ.Int64)
v0.AddArg(x)
// cond:
// result: (DIVWU (MOVHZreg x) (MOVHZreg y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XDIVWU)
v0 := b.NewValue0(v.Pos, OpS390XMOVHZreg, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (DIVW (MOVWreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XDIVW)
v0 := b.NewValue0(v.Pos, OpS390XMOVWreg, typ.Int64)
v0.AddArg(x)
// cond:
// result: (FDIVS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XFDIVS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (DIVWU (MOVWZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XDIVWU)
v0 := b.NewValue0(v.Pos, OpS390XMOVWZreg, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (DIVD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XDIVD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FDIV x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XFDIV)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (DIVDU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XDIVDU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (DIVW (MOVBreg x) (MOVBreg y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XDIVW)
v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v0.AddArg(x)
// cond:
// result: (DIVWU (MOVBZreg x) (MOVBZreg y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XDIVWU)
v0 := b.NewValue0(v.Pos, OpS390XMOVBZreg, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDEQ)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDEQ)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDEQ)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDEQ)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDEQ)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDEQ)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDEQ)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDEQ)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVHZreg x) (MOVHZreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGEnoinv)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGEnoinv)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVBZreg x) (MOVBZreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVHZreg x) (MOVHZreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGTnoinv)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGTnoinv)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVBZreg x) (MOVBZreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (SRDconst [32] (MULLD (MOVWreg x) (MOVWreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRDconst)
v.AuxInt = 32
v0 := b.NewValue0(v.Pos, OpS390XMULLD, typ.Int64)
// cond:
// result: (SRDconst [32] (MULLD (MOVWZreg x) (MOVWZreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRDconst)
v.AuxInt = 32
v0 := b.NewValue0(v.Pos, OpS390XMULLD, typ.Int64)
// cond:
// result: (MULHD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMULHD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULHDU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMULHDU)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLoad {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
mem := v_0.Args[1]
+ ptr := v_0.Args[0]
v.reset(OpS390XMOVDload)
v.AddArg(ptr)
v.AddArg(mem)
// result: (CALLinter [argwid] entry mem)
for {
argwid := v.AuxInt
- _ = v.Args[1]
- entry := v.Args[0]
mem := v.Args[1]
+ entry := v.Args[0]
v.reset(OpS390XCALLinter)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpS390XMOVDLT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len))
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpS390XMOVDLE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVHZreg x) (MOVHZreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGEnoinv)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGEnoinv)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVBZreg x) (MOVBZreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVHZreg x) (MOVHZreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGTnoinv)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGTnoinv)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVBZreg x) (MOVBZreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDLT)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// result: (MOVDload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitInt(t) || isPtr(t)) {
break
}
// result: (MOVWload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitInt(t) && isSigned(t)) {
break
}
// result: (MOVWZload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVHload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t) && isSigned(t)) {
break
}
// result: (MOVHZload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is16BitInt(t) && !isSigned(t)) {
break
}
// result: (MOVBload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is8BitInt(t) && isSigned(t)) {
break
}
// result: (MOVBZload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsBoolean() || (is8BitInt(t) && !isSigned(t))) {
break
}
// result: (FMOVSload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitFloat(t)) {
break
}
// result: (FMOVDload ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitFloat(t)) {
break
}
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLW <t> x y) (MOVDconst [0]) (CMPWUconst (MOVHZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLW, t)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLW <t> x y) (MOVDconst [0]) (CMPWUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLW, t)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLW <t> x y) (MOVDconst [0]) (CMPUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLW, t)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLW <t> x y) (MOVDconst [0]) (CMPWUconst (MOVBZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLW, t)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLW <t> x y) (MOVDconst [0]) (CMPWUconst (MOVHZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLW, t)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLW <t> x y) (MOVDconst [0]) (CMPWUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLW, t)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLW <t> x y) (MOVDconst [0]) (CMPUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLW, t)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLW <t> x y) (MOVDconst [0]) (CMPWUconst (MOVBZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLW, t)
// cond: shiftIsBounded(v)
// result: (SLD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLD <t> x y) (MOVDconst [0]) (CMPWUconst (MOVHZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLD, t)
// cond: shiftIsBounded(v)
// result: (SLD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLD <t> x y) (MOVDconst [0]) (CMPWUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLD, t)
// cond: shiftIsBounded(v)
// result: (SLD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLD <t> x y) (MOVDconst [0]) (CMPUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLD, t)
// cond: shiftIsBounded(v)
// result: (SLD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLD <t> x y) (MOVDconst [0]) (CMPWUconst (MOVBZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLD, t)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLW <t> x y) (MOVDconst [0]) (CMPWUconst (MOVHZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLW, t)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLW <t> x y) (MOVDconst [0]) (CMPWUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLW, t)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLW <t> x y) (MOVDconst [0]) (CMPUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLW, t)
// cond: shiftIsBounded(v)
// result: (SLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SLW <t> x y) (MOVDconst [0]) (CMPWUconst (MOVBZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSLW, t)
// cond:
// result: (MODW (MOVHreg x) (MOVHreg y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMODW)
v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, typ.Int64)
v0.AddArg(x)
// cond:
// result: (MODWU (MOVHZreg x) (MOVHZreg y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMODWU)
v0 := b.NewValue0(v.Pos, OpS390XMOVHZreg, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (MODW (MOVWreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMODW)
v0 := b.NewValue0(v.Pos, OpS390XMOVWreg, typ.Int64)
v0.AddArg(x)
// cond:
// result: (MODWU (MOVWZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMODWU)
v0 := b.NewValue0(v.Pos, OpS390XMOVWZreg, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (MODD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMODD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MODDU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMODDU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MODW (MOVBreg x) (MOVBreg y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMODW)
v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v0.AddArg(x)
// cond:
// result: (MODWU (MOVBZreg x) (MOVBZreg y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMODWU)
v0 := b.NewValue0(v.Pos, OpS390XMOVBZreg, typ.UInt64)
v0.AddArg(x)
if v.AuxInt != 0 {
break
}
- _ = v.Args[2]
mem := v.Args[2]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVBstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpS390XMOVBZload, typ.UInt8)
if v.AuxInt != 2 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVHstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpS390XMOVHZload, typ.UInt16)
if v.AuxInt != 4 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVWstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpS390XMOVWZload, typ.UInt32)
if v.AuxInt != 8 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVDstore)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpS390XMOVDload, typ.UInt64)
if v.AuxInt != 16 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVDstore)
v.AuxInt = 8
v.AddArg(dst)
if v.AuxInt != 24 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVDstore)
v.AuxInt = 16
v.AddArg(dst)
if v.AuxInt != 3 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVBstore)
v.AuxInt = 2
v.AddArg(dst)
if v.AuxInt != 5 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVBstore)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 6 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVHstore)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 7 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XMOVBstore)
v.AuxInt = 6
v.AddArg(dst)
// result: (MVC [makeValAndOff(s, 0)] dst src mem)
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 0 && s <= 256) {
break
}
// result: (MVC [makeValAndOff(s-256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 256 && s <= 512) {
break
}
// result: (MVC [makeValAndOff(s-512, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 512 && s <= 768) {
break
}
// result: (MVC [makeValAndOff(s-768, 768)] dst src (MVC [makeValAndOff(256, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem))))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 768 && s <= 1024) {
break
}
// result: (LoweredMove [s%256] dst src (ADD <src.Type> src (MOVDconst [(s/256)*256])) mem)
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 1024) {
break
}
// cond:
// result: (MULLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMULLW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMULLW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMULS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XFMULS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULLD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMULLD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMUL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XFMUL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MULLW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMULLW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDNE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDNE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDNE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDNE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDNE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDNE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDNE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDNE)
v0 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v0.AuxInt = 0
// cond:
// result: (LoweredNilCheck ptr mem)
for {
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpS390XLoweredNilCheck)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (ORW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XORW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XORW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (OR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XORW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (ORW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XORW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (RLL x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XRLL)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (RLLG x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XRLLG)
v.AddArg(x)
v.AddArg(y)
// cond: shiftIsBounded(v)
// result: (SRW (MOVHZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRW <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPWUconst (MOVHZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRW, t)
// cond: shiftIsBounded(v)
// result: (SRW (MOVHZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRW <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPWUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRW, t)
// cond: shiftIsBounded(v)
// result: (SRW (MOVHZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRW <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRW, t)
// cond: shiftIsBounded(v)
// result: (SRW (MOVHZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRW <t> (MOVHZreg x) y) (MOVDconst [0]) (CMPWUconst (MOVBZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRW, t)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVHreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (MOVHreg x) (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPWUconst (MOVHZreg y) [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAW)
v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, typ.Int64)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVHreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (MOVHreg x) (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPWUconst y [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAW)
v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, typ.Int64)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVHreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (MOVHreg x) (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPUconst y [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAW)
v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, typ.Int64)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVHreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (MOVHreg x) (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPWUconst (MOVBZreg y) [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAW)
v0 := b.NewValue0(v.Pos, OpS390XMOVHreg, typ.Int64)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRW <t> x y) (MOVDconst [0]) (CMPWUconst (MOVHZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRW, t)
// cond: shiftIsBounded(v)
// result: (SRW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRW <t> x y) (MOVDconst [0]) (CMPWUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRW, t)
// cond: shiftIsBounded(v)
// result: (SRW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRW <t> x y) (MOVDconst [0]) (CMPUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRW, t)
// cond: shiftIsBounded(v)
// result: (SRW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRW <t> x y) (MOVDconst [0]) (CMPWUconst (MOVBZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRW, t)
// cond: shiftIsBounded(v)
// result: (SRAW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW x (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPWUconst (MOVHZreg y) [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XMOVDGE, y.Type)
// cond: shiftIsBounded(v)
// result: (SRAW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW x (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPWUconst y [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XMOVDGE, y.Type)
// cond: shiftIsBounded(v)
// result: (SRAW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW x (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPUconst y [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XMOVDGE, y.Type)
// cond: shiftIsBounded(v)
// result: (SRAW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW x (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPWUconst (MOVBZreg y) [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XMOVDGE, y.Type)
// cond: shiftIsBounded(v)
// result: (SRD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRD <t> x y) (MOVDconst [0]) (CMPWUconst (MOVHZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRD, t)
// cond: shiftIsBounded(v)
// result: (SRD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRD <t> x y) (MOVDconst [0]) (CMPWUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRD, t)
// cond: shiftIsBounded(v)
// result: (SRD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRD <t> x y) (MOVDconst [0]) (CMPUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRD, t)
// cond: shiftIsBounded(v)
// result: (SRD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRD <t> x y) (MOVDconst [0]) (CMPWUconst (MOVBZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRD, t)
// cond: shiftIsBounded(v)
// result: (SRAD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAD x (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPWUconst (MOVHZreg y) [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XMOVDGE, y.Type)
// cond: shiftIsBounded(v)
// result: (SRAD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAD x (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPWUconst y [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XMOVDGE, y.Type)
// cond: shiftIsBounded(v)
// result: (SRAD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAD x (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPUconst y [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XMOVDGE, y.Type)
// cond: shiftIsBounded(v)
// result: (SRAD x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAD x (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPWUconst (MOVBZreg y) [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XMOVDGE, y.Type)
// cond: shiftIsBounded(v)
// result: (SRW (MOVBZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRW <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPWUconst (MOVHZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRW, t)
// cond: shiftIsBounded(v)
// result: (SRW (MOVBZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRW <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPWUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRW, t)
// cond: shiftIsBounded(v)
// result: (SRW (MOVBZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRW <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPUconst y [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRW, t)
// cond: shiftIsBounded(v)
// result: (SRW (MOVBZreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// result: (MOVDGE <t> (SRW <t> (MOVBZreg x) y) (MOVDconst [0]) (CMPWUconst (MOVBZreg y) [64]))
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XMOVDGE)
v.Type = t
v0 := b.NewValue0(v.Pos, OpS390XSRW, t)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVBreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (MOVBreg x) (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPWUconst (MOVHZreg y) [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAW)
v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVBreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (MOVBreg x) (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPWUconst y [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAW)
v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVBreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (MOVBreg x) (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPUconst y [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAW)
v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v0.AddArg(x)
// cond: shiftIsBounded(v)
// result: (SRAW (MOVBreg x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
if !(shiftIsBounded(v)) {
break
}
// cond:
// result: (SRAW (MOVBreg x) (MOVDGE <y.Type> y (MOVDconst <y.Type> [63]) (CMPWUconst (MOVBZreg y) [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSRAW)
v0 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v0.AddArg(x)
// cond: is32Bit(c)
// result: (ADDconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond: ptr.Op != OpSB && idx.Op != OpSB
// result: (MOVDaddridx [c] {s} ptr idx)
for {
- _ = v.Args[1]
+ idx := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
c := v_0.AuxInt
s := v_0.Aux
ptr := v_0.Args[0]
- idx := v.Args[1]
if !(ptr.Op != OpSB && idx.Op != OpSB) {
break
}
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XNEG {
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpS390XSUB)
v.AddArg(x)
v.AddArg(y)
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ADDload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVDload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ADDload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVDload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// cond:
// result: (ADDWconst [int64(int32(c))] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpS390XADDWconst)
v.AuxInt = int64(int32(c))
v.AddArg(x)
// cond:
// result: (SUBW x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XNEGW {
break
}
y := v_0.Args[0]
- x := v.Args[1]
v.reset(OpS390XSUBW)
v.AddArg(x)
v.AddArg(y)
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ADDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ADDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ADDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWZload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ADDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWZload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(off1+off2)) {
break
}
for {
o1 := v.AuxInt
s1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDaddr {
o2 := v_1.AuxInt
s2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(o1+o2) && canMergeSym(s1, s2)) {
break
}
}
d := v_0.AuxInt
s := v_0.Aux
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
if !(is20Bit(c + d)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(off1+off2)) {
break
}
for {
o1 := v.AuxInt
s1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDaddr {
o2 := v_1.AuxInt
s2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(o1+o2) && canMergeSym(s1, s2)) {
break
}
// cond: is32Bit(c) && c < 0
// result: (ANDconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c) && c < 0) {
break
}
// cond: is32Bit(c) && c >= 0
// result: (MOVWZreg (ANDWconst <typ.UInt32> [int64(int32(c))] x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c) && c >= 0) {
break
}
// cond:
// result: (MOVBZreg x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
if v_0.AuxInt != 0xFF {
break
}
- x := v.Args[1]
v.reset(OpS390XMOVBZreg)
v.AddArg(x)
return true
// cond:
// result: (MOVHZreg x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
if v_0.AuxInt != 0xFFFF {
break
}
- x := v.Args[1]
v.reset(OpS390XMOVHZreg)
v.AddArg(x)
return true
// cond:
// result: (MOVWZreg x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
if v_0.AuxInt != 0xFFFFFFFF {
break
}
- x := v.Args[1]
v.reset(OpS390XMOVWZreg)
v.AddArg(x)
return true
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ANDload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVDload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ANDload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVDload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// cond:
// result: (ANDWconst [int64(int32(c))] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpS390XANDWconst)
v.AuxInt = int64(int32(c))
v.AddArg(x)
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ANDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ANDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ANDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWZload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ANDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWZload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(off1+off2)) {
break
}
for {
o1 := v.AuxInt
s1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDaddr {
o2 := v_1.AuxInt
s2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(o1+o2) && canMergeSym(s1, s2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(off1+off2)) {
break
}
for {
o1 := v.AuxInt
s1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDaddr {
o2 := v_1.AuxInt
s2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(o1+o2) && canMergeSym(s1, s2)) {
break
}
// cond: is32Bit(c)
// result: (InvertFlags (CMPconst x [c]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond: isU32Bit(c)
// result: (InvertFlags (CMPUconst x [int64(int32(c))]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isU32Bit(c)) {
break
}
// cond:
// result: (InvertFlags (CMPWconst x [int64(int32(c))]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpS390XInvertFlags)
v0 := b.NewValue0(v.Pos, OpS390XCMPWconst, types.TypeFlags)
v0.AuxInt = int64(int32(c))
// cond:
// result: (CMPW x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVWreg {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpS390XCMPW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (CMPW x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVWZreg {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpS390XCMPW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (InvertFlags (CMPWUconst x [int64(int32(c))]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpS390XInvertFlags)
v0 := b.NewValue0(v.Pos, OpS390XCMPWUconst, types.TypeFlags)
v0.AuxInt = int64(int32(c))
// cond:
// result: (CMPWU x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVWreg {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpS390XCMPWU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (CMPWU x y)
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVWZreg {
break
}
x := v_0.Args[0]
- y := v.Args[1]
v.reset(OpS390XCMPWU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMADD x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XFMUL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpS390XFMADD)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpS390XFMUL {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpS390XFMADD)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMADDS x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XFMULS {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpS390XFMADDS)
v.AddArg(x)
v.AddArg(y)
if v_1.Op != OpS390XFMULS {
break
}
- _ = v_1.Args[1]
- y := v_1.Args[0]
z := v_1.Args[1]
+ y := v_1.Args[0]
v.reset(OpS390XFMADDS)
v.AddArg(x)
v.AddArg(y)
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is20Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is20Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
// cond:
// result: (FMSUB x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XFMUL {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpS390XFMSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FMSUBS x y z)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XFMULS {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
z := v_0.Args[1]
- x := v.Args[1]
+ y := v_0.Args[0]
v.reset(OpS390XFMSUBS)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpS390XOR {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpS390XMOVDconst {
break
if v_0_0.AuxInt != -1<<63 {
break
}
- x := v_0.Args[1]
v.reset(OpS390XLNDFR)
v0 := b.NewValue0(v.Pos, OpS390XLDGR, t)
v0.AddArg(x)
t1 := x.Type
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
x_0 := x.Args[0]
if x_0.Op != OpS390XMOVDconst {
break
break
}
ptr := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is20Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is20Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVBreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpS390XMOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVBZreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpS390XMOVBstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is20Bit(off) && ptr.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is20Bit(ValAndOff(sc).Off() + off)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ptr.Op != OpSB && canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
d := v_1.AuxInt
ptr := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
c := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
d := v_0.AuxInt
x := v_0.Args[0]
- y := v.Args[1]
if !(is20Bit(c+d) && x.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
x := v_0.Args[0]
- y := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is20Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || (t.IsPtr() && t.Elem().Alignment()%8 == 0 && (off1+off2)%8 == 0))) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is16Bit(c) && isU12Bit(off) && ptr.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || (t.IsPtr() && t.Elem().Alignment()%8 == 0 && (off1+off2)%8 == 0))) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
w0 := x.Args[1]
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
w0 := x.Args[1]
w1 := x.Args[2]
- mem := x.Args[3]
if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[4]
+ mem := x.Args[4]
if p != x.Args[0] {
break
}
w0 := x.Args[1]
w1 := x.Args[2]
w2 := x.Args[3]
- mem := x.Args[4]
if !(x.Uses == 1 && is20Bit(i-24) && clobber(x)) {
break
}
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(isU12Bit(ValAndOff(sc).Off() + off)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ptr.Op != OpSB && canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
d := v_1.AuxInt
ptr := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is20Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || (t.IsPtr() && t.Elem().Alignment()%2 == 0 && (off1+off2)%2 == 0))) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is20Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || (t.IsPtr() && t.Elem().Alignment()%2 == 0 && (off1+off2)%2 == 0))) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVHreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpS390XMOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVHZreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpS390XMOVHstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(isU12Bit(off) && ptr.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || (t.IsPtr() && t.Elem().Alignment()%2 == 0 && (off1+off2)%2 == 0))) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(isU12Bit(ValAndOff(sc).Off() + off)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ptr.Op != OpSB && canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
d := v_1.AuxInt
ptr := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x.Args[2] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != w0.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is20Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || (t.IsPtr() && t.Elem().Alignment()%4 == 0 && (off1+off2)%4 == 0))) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(is20Bit(off1 + off2)) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off2 := v_0.AuxInt
sym2 := v_0.Aux
base := v_0.Args[0]
- mem := v.Args[1]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || (t.IsPtr() && t.Elem().Alignment()%4 == 0 && (off1+off2)%4 == 0))) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
- mem := v.Args[1]
+ ptr := v_0.Args[0]
if !(ptr.Op != OpSB) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
ptr := v_0.Args[0]
idx := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
d := v_1.AuxInt
idx := v_1.Args[0]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
d := v_0.AuxInt
idx := v_0.Args[0]
ptr := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(c + d)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
}
off := x.AuxInt
sym := x.Aux
- _ = x.Args[2]
+ mem := x.Args[2]
ptr := x.Args[0]
idx := x.Args[1]
- mem := x.Args[2]
if !(x.Uses == 1 && clobber(x)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVWreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpS390XMOVWstore)
v.AuxInt = off
v.Aux = sym
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVWZreg {
break
}
x := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpS390XMOVWstore)
v.AuxInt = off
v.Aux = sym
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is20Bit(off1 + off2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDconst {
break
}
c := v_1.AuxInt
- mem := v.Args[2]
if !(is16Bit(c) && isU12Bit(off) && ptr.Op != OpSB) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
sym2 := v_0.Aux
base := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && (base.Op != OpSB || (t.IsPtr() && t.Elem().Alignment()%4 == 0 && (off1+off2)%4 == 0))) {
break
}
for {
off1 := v.AuxInt
sym1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddridx {
break
}
off2 := v_0.AuxInt
sym2 := v_0.Aux
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
break
}
for {
off := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XADD {
break
}
- _ = v_0.Args[1]
- ptr := v_0.Args[0]
idx := v_0.Args[1]
+ ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(ptr.Op != OpSB) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x.Args[1] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
if w != x_1.Args[0] {
break
}
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[2]
+ mem := x.Args[2]
if p != x.Args[0] {
break
}
w0 := x.Args[1]
- mem := x.Args[2]
if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
w0 := x.Args[1]
w1 := x.Args[2]
- mem := x.Args[3]
if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[4]
+ mem := x.Args[4]
if p != x.Args[0] {
break
}
w0 := x.Args[1]
w1 := x.Args[2]
w2 := x.Args[3]
- mem := x.Args[4]
if !(x.Uses == 1 && is20Bit(i-12) && clobber(x)) {
break
}
for {
sc := v.AuxInt
s := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
}
off := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(isU12Bit(ValAndOff(sc).Off() + off)) {
break
}
for {
sc := v.AuxInt
sym1 := v.Aux
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDaddr {
break
off := v_0.AuxInt
sym2 := v_0.Aux
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(ptr.Op != OpSB && canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[1]
+ mem := x.Args[1]
if p != x.Args[0] {
break
}
- mem := x.Args[1]
if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+4 == ValAndOff(c).Off() && clobber(x)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
ptr := v_0.Args[0]
idx := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
idx := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
d := v_1.AuxInt
ptr := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
d := v_1.AuxInt
idx := v_1.Args[0]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
for {
c := v.AuxInt
sym := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
v_0 := v.Args[0]
if v_0.Op != OpS390XADDconst {
break
idx := v_0.Args[0]
ptr := v.Args[1]
val := v.Args[2]
- mem := v.Args[3]
if !(is20Bit(c + d)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if idx != x.Args[0] {
break
}
if w != x_2.Args[0] {
break
}
- mem := x.Args[3]
if !(x.Uses == 1 && clobber(x)) {
break
}
// cond: is32Bit(c)
// result: (MULLDconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (MULLDload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVDload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (MULLDload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVDload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(off1+off2)) {
break
}
for {
o1 := v.AuxInt
s1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDaddr {
o2 := v_1.AuxInt
s2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(o1+o2) && canMergeSym(s1, s2)) {
break
}
// cond:
// result: (MULLWconst [int64(int32(c))] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpS390XMULLWconst)
v.AuxInt = int64(int32(c))
v.AddArg(x)
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (MULLWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (MULLWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (MULLWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWZload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (MULLWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWZload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(off1+off2)) {
break
}
for {
o1 := v.AuxInt
s1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDaddr {
o2 := v_1.AuxInt
s2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(o1+o2) && canMergeSym(s1, s2)) {
break
}
// cond: isU32Bit(c)
// result: (ORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isU32Bit(c)) {
break
}
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ORload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVDload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ORload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVDload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
x1 := v.Args[1]
if x1.Op != OpS390XMOVBZload {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
x1 := v.Args[1]
if x1.Op != OpS390XMOVHZload {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
x1 := v.Args[1]
if x1.Op != OpS390XMOVWZload {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
if mem != x1.Args[1] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
or := v.Args[1]
if or.Op != OpS390XOR {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
- y := or.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
if mem != x1.Args[1] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0-16 && j1%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
or := v.Args[1]
if or.Op != OpS390XOR {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
- y := or.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVBZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVBZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVBZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVBZloadidx {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVHZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVHZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVHZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVHZloadidx {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVWZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVWZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVWZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVWZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0-16 && j1%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0-16 && j1%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0-16 && j1%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0-16 && j1%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := v.Args[1]
if x0.Op != OpS390XMOVBZload {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
r0 := v.Args[1]
if r0.Op != OpS390XMOVHZreg {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
r0 := v.Args[1]
if r0.Op != OpS390XMOVWZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
if mem != x0.Args[1] {
break
}
- y := or.Args[1]
if !(p.Op != OpSB && i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
or := v.Args[1]
if or.Op != OpS390XOR {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
- y := or.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
if mem != x0.Args[1] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0+16 && j0%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && r0.Uses == 1 && r1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(r0) && clobber(r1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
or := v.Args[1]
if or.Op != OpS390XOR {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
- y := or.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpS390XMOVBZloadidx {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpS390XMOVBZloadidx {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpS390XMOVBZloadidx {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpS390XMOVBZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
r0 := v.Args[1]
if r0.Op != OpS390XMOVHZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
r0 := v.Args[1]
if r0.Op != OpS390XMOVHZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
r0 := v.Args[1]
if r0.Op != OpS390XMOVHZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
r0 := v.Args[1]
if r0.Op != OpS390XMOVHZreg {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
r0 := v.Args[1]
if r0.Op != OpS390XMOVWZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
r0 := v.Args[1]
if r0.Op != OpS390XMOVWZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
r0 := v.Args[1]
if r0.Op != OpS390XMOVWZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
r0 := v.Args[1]
if r0.Op != OpS390XMOVWZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(p.Op != OpSB && i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(p.Op != OpSB && i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(p.Op != OpSB && i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(p.Op != OpSB && i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0+16 && j0%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && r0.Uses == 1 && r1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(r0) && clobber(r1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0+16 && j0%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && r0.Uses == 1 && r1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(r0) && clobber(r1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0+16 && j0%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && r0.Uses == 1 && r1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(r0) && clobber(r1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+2 && j1 == j0+16 && j0%32 == 0 && x0.Uses == 1 && x1.Uses == 1 && r0.Uses == 1 && r1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(r0) && clobber(r1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XOR {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
if or.Op != OpS390XOR {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpS390XSLDconst {
break
// cond:
// result: (ORWconst [int64(int32(c))] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpS390XORWconst)
v.AuxInt = int64(int32(c))
v.AddArg(x)
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWZload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (ORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWZload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
x1 := v.Args[1]
if x1.Op != OpS390XMOVBZload {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
x1 := v.Args[1]
if x1.Op != OpS390XMOVHZload {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLWconst {
break
if mem != x1.Args[1] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
or := v.Args[1]
if or.Op != OpS390XORW {
break
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
- y := or.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
s0 := v.Args[1]
if s0.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVBZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVBZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVBZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVBZloadidx {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVHZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVHZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVHZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
x1 := v.Args[1]
if x1.Op != OpS390XMOVHZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLWconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLWconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLWconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLWconst {
break
if mem != x1.Args[2] {
break
}
- y := or.Args[1]
if !(i1 == i0+1 && j1 == j0-8 && j1%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpS390XSLWconst {
break
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpS390XSLWconst {
break
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpS390XSLWconst {
break
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s1 := or.Args[0]
if s1.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
- y := or.Args[1]
s0 := v.Args[1]
if s0.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
s0 := v.Args[1]
if s0.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
x0 := v.Args[1]
if x0.Op != OpS390XMOVBZload {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
r0 := v.Args[1]
if r0.Op != OpS390XMOVHZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLWconst {
break
if mem != x0.Args[1] {
break
}
- y := or.Args[1]
if !(p.Op != OpSB && i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[1]
- p := x1.Args[0]
mem := x1.Args[1]
+ p := x1.Args[0]
or := v.Args[1]
if or.Op != OpS390XORW {
break
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
- y := or.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
mem := x0.Args[1]
+ p := x0.Args[0]
s1 := v.Args[1]
if s1.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpS390XMOVBZloadidx {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpS390XMOVBZloadidx {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpS390XMOVBZloadidx {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
x0 := v.Args[1]
if x0.Op != OpS390XMOVBZloadidx {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
sh := v.Args[1]
if sh.Op != OpS390XSLWconst {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
r0 := v.Args[1]
if r0.Op != OpS390XMOVHZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
r0 := v.Args[1]
if r0.Op != OpS390XMOVHZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
r0 := v.Args[1]
if r0.Op != OpS390XMOVHZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
r0 := v.Args[1]
if r0.Op != OpS390XMOVHZreg {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLWconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(p.Op != OpSB && i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLWconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(p.Op != OpSB && i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLWconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(p.Op != OpSB && i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLWconst {
break
if mem != x0.Args[2] {
break
}
- y := or.Args[1]
if !(p.Op != OpSB && i1 == i0+1 && j1 == j0+8 && j0%16 == 0 && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && or.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) && clobber(s1) && clobber(or)) {
break
}
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
p := x1.Args[0]
idx := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
}
i1 := x1.AuxInt
s := x1.Aux
- _ = x1.Args[2]
+ mem := x1.Args[2]
idx := x1.Args[0]
p := x1.Args[1]
- mem := x1.Args[2]
or := v.Args[1]
if or.Op != OpS390XORW {
break
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpS390XSLWconst {
break
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpS390XSLWconst {
break
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpS390XSLWconst {
break
if or.Op != OpS390XORW {
break
}
- _ = or.Args[1]
+ y := or.Args[1]
s0 := or.Args[0]
if s0.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
- y := or.Args[1]
s1 := v.Args[1]
if s1.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
p := x0.Args[0]
idx := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpS390XSLWconst {
break
}
i0 := x0.AuxInt
s := x0.Aux
- _ = x0.Args[2]
+ mem := x0.Args[2]
idx := x0.Args[0]
p := x0.Args[1]
- mem := x0.Args[2]
s1 := v.Args[1]
if s1.Op != OpS390XSLWconst {
break
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(off1+off2)) {
break
}
for {
o1 := v.AuxInt
s1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDaddr {
o2 := v_1.AuxInt
s2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(o1+o2) && canMergeSym(s1, s2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(off1+off2)) {
break
}
for {
o1 := v.AuxInt
s1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDaddr {
o2 := v_1.AuxInt
s2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(o1+o2) && canMergeSym(s1, s2)) {
break
}
if v_1.Op != OpS390XAND {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpS390XMOVDconst {
break
}
c := v_1_0.AuxInt
- y := v_1.Args[1]
v.reset(OpS390XSLD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XANDWconst, typ.UInt32)
if v_1.Op != OpS390XAND {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpS390XMOVDconst {
break
}
c := v_1_0.AuxInt
- y := v_1.Args[1]
v.reset(OpS390XSLW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XANDWconst, typ.UInt32)
if v_1.Op != OpS390XAND {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpS390XMOVDconst {
break
}
c := v_1_0.AuxInt
- y := v_1.Args[1]
v.reset(OpS390XSRAD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XANDWconst, typ.UInt32)
if v_1.Op != OpS390XAND {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpS390XMOVDconst {
break
}
c := v_1_0.AuxInt
- y := v_1.Args[1]
v.reset(OpS390XSRAW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XANDWconst, typ.UInt32)
if v_1.Op != OpS390XAND {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpS390XMOVDconst {
break
}
c := v_1_0.AuxInt
- y := v_1.Args[1]
v.reset(OpS390XSRD)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XANDWconst, typ.UInt32)
if v_1.Op != OpS390XAND {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpS390XMOVDconst {
break
}
c := v_1_0.AuxInt
- y := v_1.Args[1]
v.reset(OpS390XSRW)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpS390XANDWconst, typ.UInt32)
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
w0 := x.Args[1]
w1 := x.Args[2]
- mem := x.Args[3]
if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) {
break
}
for {
i := v.AuxInt
s := v.Aux
- _ = v.Args[3]
+ mem := v.Args[3]
p := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XSRDconst {
if x != v.Args[2] {
break
}
- mem := v.Args[3]
v.reset(OpS390XMOVDstore)
v.AuxInt = i
v.Aux = s
if x.Aux != s {
break
}
- _ = x.Args[3]
+ mem := x.Args[3]
if p != x.Args[0] {
break
}
w0 := x.Args[1]
w1 := x.Args[2]
- mem := x.Args[3]
if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) {
break
}
// cond: is32Bit(c)
// result: (NEG (SUBconst <v.Type> x [c]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(is32Bit(c)) {
break
}
// cond:
// result: (MOVDconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpS390XMOVDconst)
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// cond:
// result: (NEGW (SUBWconst <v.Type> x [int64(int32(c))]))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpS390XNEGW)
v0 := b.NewValue0(v.Pos, OpS390XSUBWconst, v.Type)
v0.AuxInt = int64(int32(c))
// cond:
// result: (MOVDconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpS390XMOVDconst)
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(off1+off2)) {
break
}
for {
o1 := v.AuxInt
s1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDaddr {
o2 := v_1.AuxInt
s2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(o1+o2) && canMergeSym(s1, s2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(off1+off2)) {
break
}
for {
o1 := v.AuxInt
s1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDaddr {
o2 := v_1.AuxInt
s2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(o1+o2) && canMergeSym(s1, s2)) {
break
}
// cond: isU32Bit(c)
// result: (XORconst [c] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
if !(isU32Bit(c)) {
break
}
// cond:
// result: (MOVDconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpS390XMOVDconst)
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (XORload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVDload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (XORload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVDload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// cond:
// result: (XORWconst [int64(int32(c))] x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
v.reset(OpS390XXORWconst)
v.AuxInt = int64(int32(c))
v.AddArg(x)
// cond:
// result: (MOVDconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpS390XMOVDconst)
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (XORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (XORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (XORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWZload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
// result: (XORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
g := v.Args[0]
if g.Op != OpS390XMOVWZload {
break
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
- x := v.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
}
off := g.AuxInt
sym := g.Aux
- _ = g.Args[1]
- ptr := g.Args[0]
mem := g.Args[1]
+ ptr := g.Args[0]
if !(ptr.Op != OpSB && is20Bit(off) && canMergeLoadClobber(v, g, x) && clobber(g)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(off1+off2)) {
break
}
for {
o1 := v.AuxInt
s1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDaddr {
o2 := v_1.AuxInt
s2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(o1+o2) && canMergeSym(s1, s2)) {
break
}
for {
off1 := v.AuxInt
sym := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XADDconst {
}
off2 := v_1.AuxInt
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(off1+off2)) {
break
}
for {
o1 := v.AuxInt
s1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
x := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpS390XMOVDaddr {
o2 := v_1.AuxInt
s2 := v_1.Aux
ptr := v_1.Args[0]
- mem := v.Args[2]
if !(ptr.Op != OpSB && is20Bit(o1+o2) && canMergeSym(s1, s2)) {
break
}
if v_0.Op != OpS390XAddTupleFirst32 {
break
}
- _ = v_0.Args[1]
- val := v_0.Args[0]
tuple := v_0.Args[1]
+ val := v_0.Args[0]
v.reset(OpS390XADDW)
v.AddArg(val)
v0 := b.NewValue0(v.Pos, OpSelect0, t)
if v_0.Op != OpS390XAddTupleFirst64 {
break
}
- _ = v_0.Args[1]
- val := v_0.Args[0]
tuple := v_0.Args[1]
+ val := v_0.Args[0]
v.reset(OpS390XADD)
v.AddArg(val)
v0 := b.NewValue0(v.Pos, OpSelect0, t)
if v_0.Op != OpS390XAddTupleFirst32 {
break
}
- _ = v_0.Args[1]
tuple := v_0.Args[1]
v.reset(OpSelect1)
v.AddArg(tuple)
if v_0.Op != OpS390XAddTupleFirst64 {
break
}
- _ = v_0.Args[1]
tuple := v_0.Args[1]
v.reset(OpSelect1)
v.AddArg(tuple)
// result: (FMOVDstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8 && is64BitFloat(val.Type)) {
break
}
// result: (FMOVSstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4 && is32BitFloat(val.Type)) {
break
}
// result: (MOVDstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8) {
break
}
// result: (MOVWstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4) {
break
}
// result: (MOVHstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 2) {
break
}
// result: (MOVBstore ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 1) {
break
}
// cond:
// result: (SUBW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSUBW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSUBW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FSUBS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XFSUBS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (FSUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XFSUB)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUBW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSUBW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (SUB x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XSUB)
v.AddArg(x)
v.AddArg(y)
// result: (LoweredWB {fn} destptr srcptr mem)
for {
fn := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
destptr := v.Args[0]
srcptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpS390XLoweredWB)
v.Aux = fn
v.AddArg(destptr)
// cond:
// result: (XORW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XXORW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XORW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XXORW)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XOR x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XXOR)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (XORW x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpS390XXORW)
v.AddArg(x)
v.AddArg(y)
if v.AuxInt != 0 {
break
}
- _ = v.Args[1]
mem := v.Args[1]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpS390XMOVBstoreconst)
v.AuxInt = 0
v.AddArg(destptr)
if v.AuxInt != 2 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpS390XMOVHstoreconst)
v.AuxInt = 0
v.AddArg(destptr)
if v.AuxInt != 4 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpS390XMOVWstoreconst)
v.AuxInt = 0
v.AddArg(destptr)
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpS390XMOVDstoreconst)
v.AuxInt = 0
v.AddArg(destptr)
if v.AuxInt != 3 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpS390XMOVBstoreconst)
v.AuxInt = makeValAndOff(0, 2)
v.AddArg(destptr)
if v.AuxInt != 5 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpS390XMOVBstoreconst)
v.AuxInt = makeValAndOff(0, 4)
v.AddArg(destptr)
if v.AuxInt != 6 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpS390XMOVHstoreconst)
v.AuxInt = makeValAndOff(0, 4)
v.AddArg(destptr)
if v.AuxInt != 7 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpS390XMOVWstoreconst)
v.AuxInt = makeValAndOff(0, 3)
v.AddArg(destptr)
// result: (CLEAR [makeValAndOff(s, 0)] destptr mem)
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(s > 0 && s <= 1024) {
break
}
// result: (LoweredZero [s%256] destptr (ADDconst <destptr.Type> destptr [(s/256)*256]) mem)
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(s > 1024) {
break
}
if v.Op != OpS390XMOVDLT {
break
}
- _ = v.Args[2]
+ cmp := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
if v_1.AuxInt != 1 {
break
}
- cmp := v.Args[2]
b.Kind = BlockS390XLT
b.SetControl(cmp)
b.Aux = nil
if v.Op != OpS390XMOVDLE {
break
}
- _ = v.Args[2]
+ cmp := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
if v_1.AuxInt != 1 {
break
}
- cmp := v.Args[2]
b.Kind = BlockS390XLE
b.SetControl(cmp)
b.Aux = nil
if v.Op != OpS390XMOVDGT {
break
}
- _ = v.Args[2]
+ cmp := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
if v_1.AuxInt != 1 {
break
}
- cmp := v.Args[2]
b.Kind = BlockS390XGT
b.SetControl(cmp)
b.Aux = nil
if v.Op != OpS390XMOVDGE {
break
}
- _ = v.Args[2]
+ cmp := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
if v_1.AuxInt != 1 {
break
}
- cmp := v.Args[2]
b.Kind = BlockS390XGE
b.SetControl(cmp)
b.Aux = nil
if v.Op != OpS390XMOVDEQ {
break
}
- _ = v.Args[2]
+ cmp := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
if v_1.AuxInt != 1 {
break
}
- cmp := v.Args[2]
b.Kind = BlockS390XEQ
b.SetControl(cmp)
b.Aux = nil
if v.Op != OpS390XMOVDNE {
break
}
- _ = v.Args[2]
+ cmp := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
if v_1.AuxInt != 1 {
break
}
- cmp := v.Args[2]
b.Kind = BlockS390XNE
b.SetControl(cmp)
b.Aux = nil
if v.Op != OpS390XMOVDGTnoinv {
break
}
- _ = v.Args[2]
+ cmp := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
if v_1.AuxInt != 1 {
break
}
- cmp := v.Args[2]
b.Kind = BlockS390XGTF
b.SetControl(cmp)
b.Aux = nil
if v.Op != OpS390XMOVDGEnoinv {
break
}
- _ = v.Args[2]
+ cmp := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpS390XMOVDconst {
break
if v_1.AuxInt != 1 {
break
}
- cmp := v.Args[2]
b.Kind = BlockS390XGEF
b.SetControl(cmp)
b.Aux = nil
if v_0.Op != OpS390XMOVDLT {
break
}
- _ = v_0.Args[2]
+ cmp := v_0.Args[2]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpS390XMOVDconst {
break
if v_0_1.AuxInt != 1 {
break
}
- cmp := v_0.Args[2]
b.Kind = BlockS390XLT
b.SetControl(cmp)
b.Aux = nil
if v_0.Op != OpS390XMOVDLE {
break
}
- _ = v_0.Args[2]
+ cmp := v_0.Args[2]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpS390XMOVDconst {
break
if v_0_1.AuxInt != 1 {
break
}
- cmp := v_0.Args[2]
b.Kind = BlockS390XLE
b.SetControl(cmp)
b.Aux = nil
if v_0.Op != OpS390XMOVDGT {
break
}
- _ = v_0.Args[2]
+ cmp := v_0.Args[2]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpS390XMOVDconst {
break
if v_0_1.AuxInt != 1 {
break
}
- cmp := v_0.Args[2]
b.Kind = BlockS390XGT
b.SetControl(cmp)
b.Aux = nil
if v_0.Op != OpS390XMOVDGE {
break
}
- _ = v_0.Args[2]
+ cmp := v_0.Args[2]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpS390XMOVDconst {
break
if v_0_1.AuxInt != 1 {
break
}
- cmp := v_0.Args[2]
b.Kind = BlockS390XGE
b.SetControl(cmp)
b.Aux = nil
if v_0.Op != OpS390XMOVDEQ {
break
}
- _ = v_0.Args[2]
+ cmp := v_0.Args[2]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpS390XMOVDconst {
break
if v_0_1.AuxInt != 1 {
break
}
- cmp := v_0.Args[2]
b.Kind = BlockS390XEQ
b.SetControl(cmp)
b.Aux = nil
if v_0.Op != OpS390XMOVDNE {
break
}
- _ = v_0.Args[2]
+ cmp := v_0.Args[2]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpS390XMOVDconst {
break
if v_0_1.AuxInt != 1 {
break
}
- cmp := v_0.Args[2]
b.Kind = BlockS390XNE
b.SetControl(cmp)
b.Aux = nil
if v_0.Op != OpS390XMOVDGTnoinv {
break
}
- _ = v_0.Args[2]
+ cmp := v_0.Args[2]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpS390XMOVDconst {
break
if v_0_1.AuxInt != 1 {
break
}
- cmp := v_0.Args[2]
b.Kind = BlockS390XGTF
b.SetControl(cmp)
b.Aux = nil
if v_0.Op != OpS390XMOVDGEnoinv {
break
}
- _ = v_0.Args[2]
+ cmp := v_0.Args[2]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpS390XMOVDconst {
break
if v_0_1.AuxInt != 1 {
break
}
- cmp := v_0.Args[2]
b.Kind = BlockS390XGEF
b.SetControl(cmp)
b.Aux = nil
// cond:
// result: (I64Add x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Add)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Add x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Add)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Add x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Add)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Add x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Add)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Add x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Add)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Add x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Add)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Add x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Add)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64And x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64And)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64And x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64And)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64And x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64And)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64And x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64And)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64And x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64And)
v.AddArg(x)
v.AddArg(y)
// result: (LoweredClosureCall [argwid] entry closure mem)
for {
argwid := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
entry := v.Args[0]
closure := v.Args[1]
- mem := v.Args[2]
v.reset(OpWasmLoweredClosureCall)
v.AuxInt = argwid
v.AddArg(entry)
// result: (LoweredConvert <t> x mem)
for {
t := v.Type
- _ = v.Args[1]
- x := v.Args[0]
mem := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmLoweredConvert)
v.Type = t
v.AddArg(x)
// cond:
// result: (I64DivS (SignExt16to64 x) (SignExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64DivS)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64DivU (ZeroExt16to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64DivU)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64DivS (SignExt32to64 x) (SignExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64DivS)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (F64Div x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Div)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64DivU (ZeroExt32to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64DivU)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64DivS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64DivS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Div x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Div)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64DivU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64DivU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64DivS (SignExt8to64 x) (SignExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64DivS)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64DivU (ZeroExt8to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64DivU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64Eq (ZeroExt16to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Eq)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64Eq (ZeroExt32to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Eq)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (F64Eq (LoweredRound32F x) (LoweredRound32F y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Eq)
v0 := b.NewValue0(v.Pos, OpWasmLoweredRound32F, typ.Float32)
v0.AddArg(x)
// cond:
// result: (I64Eq x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Eq)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Eq x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Eq)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Eq (ZeroExt8to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Eq)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64Eq x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Eq)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Eq x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Eq)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64GeS (SignExt16to64 x) (SignExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GeS)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64GeU (ZeroExt16to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GeU)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64GeS (SignExt32to64 x) (SignExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GeS)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (F64Ge (LoweredRound32F x) (LoweredRound32F y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Ge)
v0 := b.NewValue0(v.Pos, OpWasmLoweredRound32F, typ.Float32)
v0.AddArg(x)
// cond:
// result: (I64GeU (ZeroExt32to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GeU)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64GeS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GeS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Ge x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Ge)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64GeU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GeU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64GeS (SignExt8to64 x) (SignExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GeS)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64GeU (ZeroExt8to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GeU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64GtS (SignExt16to64 x) (SignExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GtS)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64GtU (ZeroExt16to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GtU)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64GtS (SignExt32to64 x) (SignExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GtS)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (F64Gt (LoweredRound32F x) (LoweredRound32F y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Gt)
v0 := b.NewValue0(v.Pos, OpWasmLoweredRound32F, typ.Float32)
v0.AddArg(x)
// cond:
// result: (I64GtU (ZeroExt32to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GtU)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64GtS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GtS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Gt x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Gt)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64GtU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GtU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64GtS (SignExt8to64 x) (SignExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GtS)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64GtU (ZeroExt8to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64GtU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
// result: (LoweredInterCall [argwid] entry mem)
for {
argwid := v.AuxInt
- _ = v.Args[1]
- entry := v.Args[0]
mem := v.Args[1]
+ entry := v.Args[0]
v.reset(OpWasmLoweredInterCall)
v.AuxInt = argwid
v.AddArg(entry)
// cond:
// result: (I64LtU idx len)
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpWasmI64LtU)
v.AddArg(idx)
v.AddArg(len)
// cond:
// result: (I64LeU idx len)
for {
- _ = v.Args[1]
- idx := v.Args[0]
len := v.Args[1]
+ idx := v.Args[0]
v.reset(OpWasmI64LeU)
v.AddArg(idx)
v.AddArg(len)
// cond:
// result: (I64LeS (SignExt16to64 x) (SignExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LeS)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64LeU (ZeroExt16to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LeU)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64LeS (SignExt32to64 x) (SignExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LeS)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (F64Le (LoweredRound32F x) (LoweredRound32F y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Le)
v0 := b.NewValue0(v.Pos, OpWasmLoweredRound32F, typ.Float32)
v0.AddArg(x)
// cond:
// result: (I64LeU (ZeroExt32to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LeU)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64LeS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LeS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Le x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Le)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64LeU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LeU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64LeS (SignExt8to64 x) (SignExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LeS)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64LeU (ZeroExt8to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LeU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64LtS (SignExt16to64 x) (SignExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LtS)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64LtU (ZeroExt16to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LtU)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64LtS (SignExt32to64 x) (SignExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LtS)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (F64Lt (LoweredRound32F x) (LoweredRound32F y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Lt)
v0 := b.NewValue0(v.Pos, OpWasmLoweredRound32F, typ.Float32)
v0.AddArg(x)
// cond:
// result: (I64LtU (ZeroExt32to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LtU)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64LtS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LtS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Lt x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Lt)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64LtU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LtU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64LtS (SignExt8to64 x) (SignExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LtS)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64LtU (ZeroExt8to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64LtU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
// result: (F32Load ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is32BitFloat(t)) {
break
}
// result: (F64Load ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitFloat(t)) {
break
}
// result: (I64Load ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.Size() == 8) {
break
}
// result: (I64Load32U ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.Size() == 4 && !t.IsSigned()) {
break
}
// result: (I64Load32S ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.Size() == 4 && t.IsSigned()) {
break
}
// result: (I64Load16U ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.Size() == 2 && !t.IsSigned()) {
break
}
// result: (I64Load16S ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.Size() == 2 && t.IsSigned()) {
break
}
// result: (I64Load8U ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.Size() == 1 && !t.IsSigned()) {
break
}
// result: (I64Load8S ptr mem)
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.Size() == 1 && t.IsSigned()) {
break
}
// cond:
// result: (Lsh64x64 x (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
// cond:
// result: (Lsh64x64 x (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
// cond:
// result: (Lsh64x64 x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Lsh64x64 x (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
// cond:
// result: (Lsh64x64 x (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
// cond:
// result: (Lsh64x64 x (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
// cond:
// result: (Lsh64x64 x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Lsh64x64 x (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
// cond:
// result: (Lsh64x64 x (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
// cond:
// result: (Lsh64x64 x (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
// cond:
// result: (Select (I64Shl x y) (I64Const [0]) (I64LtU y (I64Const [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmSelect)
v0 := b.NewValue0(v.Pos, OpWasmI64Shl, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Lsh64x64 x (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
// cond:
// result: (Lsh64x64 x (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
// cond:
// result: (Lsh64x64 x (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
// cond:
// result: (Lsh64x64 x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Lsh64x64 x (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpLsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
// cond:
// result: (I64RemS (SignExt16to64 x) (SignExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64RemS)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64RemU (ZeroExt16to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64RemU)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64RemS (SignExt32to64 x) (SignExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64RemS)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64RemU (ZeroExt32to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64RemU)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64RemS x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64RemS)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64RemU x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64RemU)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64RemS (SignExt8to64 x) (SignExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64RemS)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (I64RemU (ZeroExt8to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64RemU)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
if v.AuxInt != 0 {
break
}
- _ = v.Args[2]
mem := v.Args[2]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpWasmI64Store8)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpWasmI64Load8U, typ.UInt8)
if v.AuxInt != 2 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpWasmI64Store16)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpWasmI64Load16U, typ.UInt16)
if v.AuxInt != 4 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpWasmI64Store32)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpWasmI64Load32U, typ.UInt32)
if v.AuxInt != 8 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpWasmI64Store)
v.AddArg(dst)
v0 := b.NewValue0(v.Pos, OpWasmI64Load, typ.UInt64)
if v.AuxInt != 16 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpWasmI64Store)
v.AuxInt = 8
v.AddArg(dst)
if v.AuxInt != 3 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpWasmI64Store8)
v.AuxInt = 2
v.AddArg(dst)
if v.AuxInt != 5 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpWasmI64Store8)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 6 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpWasmI64Store16)
v.AuxInt = 4
v.AddArg(dst)
if v.AuxInt != 7 {
break
}
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
v.reset(OpWasmI64Store32)
v.AuxInt = 3
v.AddArg(dst)
// result: (I64Store [s-8] dst (I64Load [s-8] src mem) (I64Store dst (I64Load src mem) mem))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 8 && s < 16) {
break
}
// result: (Move [s-s%16] (OffPtr <dst.Type> dst [s%16]) (OffPtr <src.Type> src [s%16]) (I64Store dst (I64Load src mem) mem))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 16 && s%16 != 0 && s%16 <= 8) {
break
}
// result: (Move [s-s%16] (OffPtr <dst.Type> dst [s%16]) (OffPtr <src.Type> src [s%16]) (I64Store [8] dst (I64Load [8] src mem) (I64Store dst (I64Load src mem) mem)))
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s > 16 && s%16 != 0 && s%16 > 8) {
break
}
// result: (LoweredMove [s/8] dst src mem)
for {
s := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(s%8 == 0) {
break
}
// cond:
// result: (I64Mul x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Mul)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Mul x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Mul)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Mul x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Mul)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Mul x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Mul)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Mul x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Mul)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Mul x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Mul)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Ne (ZeroExt16to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Ne)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64Ne (ZeroExt32to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Ne)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (F64Ne (LoweredRound32F x) (LoweredRound32F y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Ne)
v0 := b.NewValue0(v.Pos, OpWasmLoweredRound32F, typ.Float32)
v0.AddArg(x)
// cond:
// result: (I64Ne x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Ne)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Ne x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Ne)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Ne (ZeroExt8to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Ne)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (I64Ne x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Ne)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Ne x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Ne)
v.AddArg(x)
v.AddArg(y)
// match: (NilCheck ptr mem)
// cond:
// result: (LoweredNilCheck ptr mem)
- for {
- _ = v.Args[1]
- ptr := v.Args[0]
+ for {
mem := v.Args[1]
+ ptr := v.Args[0]
v.reset(OpWasmLoweredNilCheck)
v.AddArg(ptr)
v.AddArg(mem)
// cond:
// result: (I64Or x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Or)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Or x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Or)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Or x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Or)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Or x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Or)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Or x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Or)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Rsh64Ux64 (ZeroExt16to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (Rsh64Ux64 (ZeroExt16to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (Rsh64Ux64 (ZeroExt16to64 x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (Rsh64Ux64 (ZeroExt16to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (Rsh64x64 (SignExt16to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Rsh64x64 (SignExt16to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Rsh64x64 (SignExt16to64 x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Rsh64x64 (SignExt16to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v0 := b.NewValue0(v.Pos, OpSignExt16to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Rsh64Ux64 (ZeroExt32to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (Rsh64Ux64 (ZeroExt32to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (Rsh64Ux64 (ZeroExt32to64 x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (Rsh64Ux64 (ZeroExt32to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (Rsh64x64 (SignExt32to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Rsh64x64 (SignExt32to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Rsh64x64 (SignExt32to64 x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Rsh64x64 (SignExt32to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v0 := b.NewValue0(v.Pos, OpSignExt32to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Rsh64Ux64 x (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
// cond:
// result: (Rsh64Ux64 x (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
// cond:
// result: (Select (I64ShrU x y) (I64Const [0]) (I64LtU y (I64Const [64])))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmSelect)
v0 := b.NewValue0(v.Pos, OpWasmI64ShrU, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Rsh64Ux64 x (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
// cond:
// result: (Rsh64x64 x (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt16to64, typ.UInt64)
// cond:
// result: (Rsh64x64 x (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt32to64, typ.UInt64)
// cond:
// result: (I64ShrS x (Select <typ.Int64> y (I64Const [63]) (I64LtU y (I64Const [64]))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64ShrS)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpWasmSelect, typ.Int64)
// cond:
// result: (Rsh64x64 x (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
// cond:
// result: (Rsh64Ux64 (ZeroExt8to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (Rsh64Ux64 (ZeroExt8to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (Rsh64Ux64 (ZeroExt8to64 x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (Rsh64Ux64 (ZeroExt8to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64Ux64)
v0 := b.NewValue0(v.Pos, OpZeroExt8to64, typ.UInt64)
v0.AddArg(x)
// cond:
// result: (Rsh64x64 (SignExt8to64 x) (ZeroExt16to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Rsh64x64 (SignExt8to64 x) (ZeroExt32to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Rsh64x64 (SignExt8to64 x) y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// cond:
// result: (Rsh64x64 (SignExt8to64 x) (ZeroExt8to64 y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpRsh64x64)
v0 := b.NewValue0(v.Pos, OpSignExt8to64, typ.Int64)
v0.AddArg(x)
// result: (F64Store ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is64BitFloat(t.(*types.Type))) {
break
}
// result: (F32Store ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(is32BitFloat(t.(*types.Type))) {
break
}
// result: (I64Store ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 8) {
break
}
// result: (I64Store32 ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 4) {
break
}
// result: (I64Store16 ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 2) {
break
}
// result: (I64Store8 ptr val mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
ptr := v.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(t.(*types.Type).Size() == 1) {
break
}
// cond:
// result: (I64Sub x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Sub)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Sub x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Sub)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Sub x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Sub)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Sub x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Sub)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (F64Sub x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmF64Sub)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Sub x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Sub)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Sub x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Sub)
v.AddArg(x)
v.AddArg(y)
// result: (LoweredWB {fn} destptr srcptr mem)
for {
fn := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
destptr := v.Args[0]
srcptr := v.Args[1]
- mem := v.Args[2]
v.reset(OpWasmLoweredWB)
v.Aux = fn
v.AddArg(destptr)
// cond:
// result: (F64Add y (F64Const [x]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmF64Const {
break
}
x := v_0.AuxInt
- y := v.Args[1]
v.reset(OpWasmF64Add)
v.AddArg(y)
v0 := b.NewValue0(v.Pos, OpWasmF64Const, typ.Float64)
// cond:
// result: (F64Mul y (F64Const [x]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmF64Const {
break
}
x := v_0.AuxInt
- y := v.Args[1]
v.reset(OpWasmF64Mul)
v.AddArg(y)
v0 := b.NewValue0(v.Pos, OpWasmF64Const, typ.Float64)
// cond:
// result: (I64Add y (I64Const [x]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64Const {
break
}
x := v_0.AuxInt
- y := v.Args[1]
v.reset(OpWasmI64Add)
v.AddArg(y)
v0 := b.NewValue0(v.Pos, OpWasmI64Const, typ.Int64)
// cond:
// result: (I64And y (I64Const [x]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64Const {
break
}
x := v_0.AuxInt
- y := v.Args[1]
v.reset(OpWasmI64And)
v.AddArg(y)
v0 := b.NewValue0(v.Pos, OpWasmI64Const, typ.Int64)
// cond:
// result: (I64Eq y (I64Const [x]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64Const {
break
}
x := v_0.AuxInt
- y := v.Args[1]
v.reset(OpWasmI64Eq)
v.AddArg(y)
v0 := b.NewValue0(v.Pos, OpWasmI64Const, typ.Int64)
// result: (I64Load [off+off2] ptr mem)
for {
off := v.AuxInt
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64AddConst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(isU32Bit(off + off2)) {
break
}
// result: (I64Load16S [off+off2] ptr mem)
for {
off := v.AuxInt
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64AddConst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(isU32Bit(off + off2)) {
break
}
// result: (I64Load16U [off+off2] ptr mem)
for {
off := v.AuxInt
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64AddConst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(isU32Bit(off + off2)) {
break
}
// result: (I64Load32S [off+off2] ptr mem)
for {
off := v.AuxInt
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64AddConst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(isU32Bit(off + off2)) {
break
}
// result: (I64Load32U [off+off2] ptr mem)
for {
off := v.AuxInt
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64AddConst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(isU32Bit(off + off2)) {
break
}
// result: (I64Load8S [off+off2] ptr mem)
for {
off := v.AuxInt
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64AddConst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(isU32Bit(off + off2)) {
break
}
// result: (I64Load8U [off+off2] ptr mem)
for {
off := v.AuxInt
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64AddConst {
break
}
off2 := v_0.AuxInt
ptr := v_0.Args[0]
- mem := v.Args[1]
if !(isU32Bit(off + off2)) {
break
}
// cond:
// result: (I64Mul y (I64Const [x]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64Const {
break
}
x := v_0.AuxInt
- y := v.Args[1]
v.reset(OpWasmI64Mul)
v.AddArg(y)
v0 := b.NewValue0(v.Pos, OpWasmI64Const, typ.Int64)
// cond:
// result: (I64Ne y (I64Const [x]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64Const {
break
}
x := v_0.AuxInt
- y := v.Args[1]
v.reset(OpWasmI64Ne)
v.AddArg(y)
v0 := b.NewValue0(v.Pos, OpWasmI64Const, typ.Int64)
// cond:
// result: (I64Or y (I64Const [x]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64Const {
break
}
x := v_0.AuxInt
- y := v.Args[1]
v.reset(OpWasmI64Or)
v.AddArg(y)
v0 := b.NewValue0(v.Pos, OpWasmI64Const, typ.Int64)
// result: (I64Store [off+off2] ptr val mem)
for {
off := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64AddConst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(isU32Bit(off + off2)) {
break
}
// result: (I64Store16 [off+off2] ptr val mem)
for {
off := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64AddConst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(isU32Bit(off + off2)) {
break
}
// result: (I64Store32 [off+off2] ptr val mem)
for {
off := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64AddConst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(isU32Bit(off + off2)) {
break
}
// result: (I64Store8 [off+off2] ptr val mem)
for {
off := v.AuxInt
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64AddConst {
break
off2 := v_0.AuxInt
ptr := v_0.Args[0]
val := v.Args[1]
- mem := v.Args[2]
if !(isU32Bit(off + off2)) {
break
}
// cond:
// result: (I64Xor y (I64Const [x]))
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpWasmI64Const {
break
}
x := v_0.AuxInt
- y := v.Args[1]
v.reset(OpWasmI64Xor)
v.AddArg(y)
v0 := b.NewValue0(v.Pos, OpWasmI64Const, typ.Int64)
// cond:
// result: (I64Xor x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Xor)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Xor x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Xor)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Xor x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Xor)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (I64Xor x y)
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpWasmI64Xor)
v.AddArg(x)
v.AddArg(y)
if v.AuxInt != 0 {
break
}
- _ = v.Args[1]
mem := v.Args[1]
v.reset(OpCopy)
v.Type = mem.Type
if v.AuxInt != 1 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpWasmI64Store8)
v.AddArg(destptr)
v0 := b.NewValue0(v.Pos, OpWasmI64Const, typ.Int64)
if v.AuxInt != 2 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpWasmI64Store16)
v.AddArg(destptr)
v0 := b.NewValue0(v.Pos, OpWasmI64Const, typ.Int64)
if v.AuxInt != 4 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpWasmI64Store32)
v.AddArg(destptr)
v0 := b.NewValue0(v.Pos, OpWasmI64Const, typ.Int64)
if v.AuxInt != 8 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpWasmI64Store)
v.AddArg(destptr)
v0 := b.NewValue0(v.Pos, OpWasmI64Const, typ.Int64)
if v.AuxInt != 3 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpWasmI64Store8)
v.AuxInt = 2
v.AddArg(destptr)
if v.AuxInt != 5 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpWasmI64Store8)
v.AuxInt = 4
v.AddArg(destptr)
if v.AuxInt != 6 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpWasmI64Store16)
v.AuxInt = 4
v.AddArg(destptr)
if v.AuxInt != 7 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpWasmI64Store32)
v.AuxInt = 3
v.AddArg(destptr)
// result: (Zero [s-s%8] (OffPtr <destptr.Type> destptr [s%8]) (I64Store destptr (I64Const [0]) mem))
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(s%8 != 0 && s > 8) {
break
}
if v.AuxInt != 16 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpWasmI64Store)
v.AuxInt = 8
v.AddArg(destptr)
if v.AuxInt != 24 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpWasmI64Store)
v.AuxInt = 16
v.AddArg(destptr)
if v.AuxInt != 32 {
break
}
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
v.reset(OpWasmI64Store)
v.AuxInt = 24
v.AddArg(destptr)
// result: (LoweredZero [s/8] destptr mem)
for {
s := v.AuxInt
- _ = v.Args[1]
- destptr := v.Args[0]
mem := v.Args[1]
+ destptr := v.Args[0]
if !(s%8 == 0 && s > 32) {
break
}
if v_0.Op != OpComplexMake {
break
}
- _ = v_0.Args[1]
imag := v_0.Args[1]
v.reset(OpCopy)
v.Type = imag.Type
if v_0.Op != OpIMake {
break
}
- _ = v_0.Args[1]
data := v_0.Args[1]
v.reset(OpCopy)
v.Type = data.Type
// result: (ComplexMake (Load <typ.Float32> ptr mem) (Load <typ.Float32> (OffPtr <typ.Float32Ptr> [4] ptr) mem) )
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsComplex() && t.Size() == 8) {
break
}
// result: (ComplexMake (Load <typ.Float64> ptr mem) (Load <typ.Float64> (OffPtr <typ.Float64Ptr> [8] ptr) mem) )
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsComplex() && t.Size() == 16) {
break
}
// result: (StringMake (Load <typ.BytePtr> ptr mem) (Load <typ.Int> (OffPtr <typ.IntPtr> [config.PtrSize] ptr) mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsString()) {
break
}
// result: (SliceMake (Load <t.Elem().PtrTo()> ptr mem) (Load <typ.Int> (OffPtr <typ.IntPtr> [config.PtrSize] ptr) mem) (Load <typ.Int> (OffPtr <typ.IntPtr> [2*config.PtrSize] ptr) mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsSlice()) {
break
}
// result: (IMake (Load <typ.Uintptr> ptr mem) (Load <typ.BytePtr> (OffPtr <typ.BytePtrPtr> [config.PtrSize] ptr) mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsInterface()) {
break
}
if v_0.Op != OpSliceMake {
break
}
- _ = v_0.Args[2]
cap := v_0.Args[2]
v.reset(OpCopy)
v.Type = cap.Type
// result: (Store {typ.Float32} (OffPtr <typ.Float32Ptr> [4] dst) imag (Store {typ.Float32} dst real mem))
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpComplexMake {
break
}
- _ = v_1.Args[1]
- real := v_1.Args[0]
imag := v_1.Args[1]
- mem := v.Args[2]
+ real := v_1.Args[0]
if !(t.(*types.Type).Size() == 8) {
break
}
// result: (Store {typ.Float64} (OffPtr <typ.Float64Ptr> [8] dst) imag (Store {typ.Float64} dst real mem))
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpComplexMake {
break
}
- _ = v_1.Args[1]
- real := v_1.Args[0]
imag := v_1.Args[1]
- mem := v.Args[2]
+ real := v_1.Args[0]
if !(t.(*types.Type).Size() == 16) {
break
}
// cond:
// result: (Store {typ.Int} (OffPtr <typ.IntPtr> [config.PtrSize] dst) len (Store {typ.BytePtr} dst ptr mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpStringMake {
break
}
- _ = v_1.Args[1]
- ptr := v_1.Args[0]
len := v_1.Args[1]
- mem := v.Args[2]
+ ptr := v_1.Args[0]
v.reset(OpStore)
v.Aux = typ.Int
v0 := b.NewValue0(v.Pos, OpOffPtr, typ.IntPtr)
// cond:
// result: (Store {typ.Int} (OffPtr <typ.IntPtr> [2*config.PtrSize] dst) cap (Store {typ.Int} (OffPtr <typ.IntPtr> [config.PtrSize] dst) len (Store {typ.BytePtr} dst ptr mem)))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpSliceMake {
break
}
- _ = v_1.Args[2]
+ cap := v_1.Args[2]
ptr := v_1.Args[0]
len := v_1.Args[1]
- cap := v_1.Args[2]
- mem := v.Args[2]
v.reset(OpStore)
v.Aux = typ.Int
v0 := b.NewValue0(v.Pos, OpOffPtr, typ.IntPtr)
// cond:
// result: (Store {typ.BytePtr} (OffPtr <typ.BytePtrPtr> [config.PtrSize] dst) data (Store {typ.Uintptr} dst itab mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpIMake {
break
}
- _ = v_1.Args[1]
- itab := v_1.Args[0]
data := v_1.Args[1]
- mem := v.Args[2]
+ itab := v_1.Args[0]
v.reset(OpStore)
v.Aux = typ.BytePtr
v0 := b.NewValue0(v.Pos, OpOffPtr, typ.BytePtrPtr)
if v_0.Op != OpStringMake {
break
}
- _ = v_0.Args[1]
len := v_0.Args[1]
v.reset(OpCopy)
v.Type = len.Type
// cond:
// result: (Int64Make (Add32withcarry <typ.Int32> (Int64Hi x) (Int64Hi y) (Select1 <types.TypeFlags> (Add32carry (Int64Lo x) (Int64Lo y)))) (Select0 <typ.UInt32> (Add32carry (Int64Lo x) (Int64Lo y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpAdd32withcarry, typ.Int32)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
// cond:
// result: (Int64Make (And32 <typ.UInt32> (Int64Hi x) (Int64Hi y)) (And32 <typ.UInt32> (Int64Lo x) (Int64Lo y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpAnd32, typ.UInt32)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
// cond:
// result: (AndB (Eq32 (Int64Hi x) (Int64Hi y)) (Eq32 (Int64Lo x) (Int64Lo y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpAndB)
v0 := b.NewValue0(v.Pos, OpEq32, typ.Bool)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
// cond:
// result: (OrB (Greater32 (Int64Hi x) (Int64Hi y)) (AndB (Eq32 (Int64Hi x) (Int64Hi y)) (Geq32U (Int64Lo x) (Int64Lo y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpOrB)
v0 := b.NewValue0(v.Pos, OpGreater32, typ.Bool)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
// cond:
// result: (OrB (Greater32U (Int64Hi x) (Int64Hi y)) (AndB (Eq32 (Int64Hi x) (Int64Hi y)) (Geq32U (Int64Lo x) (Int64Lo y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpOrB)
v0 := b.NewValue0(v.Pos, OpGreater32U, typ.Bool)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
// cond:
// result: (OrB (Greater32 (Int64Hi x) (Int64Hi y)) (AndB (Eq32 (Int64Hi x) (Int64Hi y)) (Greater32U (Int64Lo x) (Int64Lo y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpOrB)
v0 := b.NewValue0(v.Pos, OpGreater32, typ.Bool)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
// cond:
// result: (OrB (Greater32U (Int64Hi x) (Int64Hi y)) (AndB (Eq32 (Int64Hi x) (Int64Hi y)) (Greater32U (Int64Lo x) (Int64Lo y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpOrB)
v0 := b.NewValue0(v.Pos, OpGreater32U, typ.Bool)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
lo := v_0.Args[1]
v.reset(OpCopy)
v.Type = lo.Type
// cond:
// result: (OrB (Less32 (Int64Hi x) (Int64Hi y)) (AndB (Eq32 (Int64Hi x) (Int64Hi y)) (Leq32U (Int64Lo x) (Int64Lo y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpOrB)
v0 := b.NewValue0(v.Pos, OpLess32, typ.Bool)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
// cond:
// result: (OrB (Less32U (Int64Hi x) (Int64Hi y)) (AndB (Eq32 (Int64Hi x) (Int64Hi y)) (Leq32U (Int64Lo x) (Int64Lo y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpOrB)
v0 := b.NewValue0(v.Pos, OpLess32U, typ.Bool)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
// cond:
// result: (OrB (Less32 (Int64Hi x) (Int64Hi y)) (AndB (Eq32 (Int64Hi x) (Int64Hi y)) (Less32U (Int64Lo x) (Int64Lo y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpOrB)
v0 := b.NewValue0(v.Pos, OpLess32, typ.Bool)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
// cond:
// result: (OrB (Less32U (Int64Hi x) (Int64Hi y)) (AndB (Eq32 (Int64Hi x) (Int64Hi y)) (Less32U (Int64Lo x) (Int64Lo y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpOrB)
v0 := b.NewValue0(v.Pos, OpLess32U, typ.Bool)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
// result: (Int64Make (Load <typ.Int32> (OffPtr <typ.Int32Ptr> [4] ptr) mem) (Load <typ.UInt32> ptr mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitInt(t) && !config.BigEndian && t.IsSigned()) {
break
}
// result: (Int64Make (Load <typ.UInt32> (OffPtr <typ.UInt32Ptr> [4] ptr) mem) (Load <typ.UInt32> ptr mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitInt(t) && !config.BigEndian && !t.IsSigned()) {
break
}
// result: (Int64Make (Load <typ.Int32> ptr mem) (Load <typ.UInt32> (OffPtr <typ.UInt32Ptr> [4] ptr) mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitInt(t) && config.BigEndian && t.IsSigned()) {
break
}
// result: (Int64Make (Load <typ.UInt32> ptr mem) (Load <typ.UInt32> (OffPtr <typ.UInt32Ptr> [4] ptr) mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(is64BitInt(t) && config.BigEndian && !t.IsSigned()) {
break
}
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
+ lo := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
if v_1_0.AuxInt != 0 {
break
}
- lo := v_1.Args[1]
v.reset(OpLsh16x32)
v.AddArg(x)
v.AddArg(lo)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
+ hi := v_1.Args[0]
if !(hi.Op != OpConst32) {
break
}
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
+ lo := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
if v_1_0.AuxInt != 0 {
break
}
- lo := v_1.Args[1]
v.reset(OpLsh32x32)
v.AddArg(x)
v.AddArg(lo)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
+ hi := v_1.Args[0]
if !(hi.Op != OpConst32) {
break
}
// cond:
// result: (Int64Make (Or32 <typ.UInt32> (Or32 <typ.UInt32> (Lsh32x16 <typ.UInt32> hi s) (Rsh32Ux16 <typ.UInt32> lo (Sub16 <typ.UInt16> (Const16 <typ.UInt16> [32]) s))) (Lsh32x16 <typ.UInt32> lo (Sub16 <typ.UInt16> s (Const16 <typ.UInt16> [32])))) (Lsh32x16 <typ.UInt32> lo s))
for {
- _ = v.Args[1]
+ s := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
- hi := v_0.Args[0]
lo := v_0.Args[1]
- s := v.Args[1]
+ hi := v_0.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
v1 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
// cond:
// result: (Int64Make (Or32 <typ.UInt32> (Or32 <typ.UInt32> (Lsh32x32 <typ.UInt32> hi s) (Rsh32Ux32 <typ.UInt32> lo (Sub32 <typ.UInt32> (Const32 <typ.UInt32> [32]) s))) (Lsh32x32 <typ.UInt32> lo (Sub32 <typ.UInt32> s (Const32 <typ.UInt32> [32])))) (Lsh32x32 <typ.UInt32> lo s))
for {
- _ = v.Args[1]
+ s := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
- hi := v_0.Args[0]
lo := v_0.Args[1]
- s := v.Args[1]
+ hi := v_0.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
v1 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
+ lo := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
if v_1_0.AuxInt != 0 {
break
}
- lo := v_1.Args[1]
v.reset(OpLsh64x32)
v.AddArg(x)
v.AddArg(lo)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
+ hi := v_1.Args[0]
if !(hi.Op != OpConst32) {
break
}
// cond:
// result: (Int64Make (Or32 <typ.UInt32> (Or32 <typ.UInt32> (Lsh32x8 <typ.UInt32> hi s) (Rsh32Ux8 <typ.UInt32> lo (Sub8 <typ.UInt8> (Const8 <typ.UInt8> [32]) s))) (Lsh32x8 <typ.UInt32> lo (Sub8 <typ.UInt8> s (Const8 <typ.UInt8> [32])))) (Lsh32x8 <typ.UInt32> lo s))
for {
- _ = v.Args[1]
+ s := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
- hi := v_0.Args[0]
lo := v_0.Args[1]
- s := v.Args[1]
+ hi := v_0.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
v1 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
+ lo := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
if v_1_0.AuxInt != 0 {
break
}
- lo := v_1.Args[1]
v.reset(OpLsh8x32)
v.AddArg(x)
v.AddArg(lo)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
+ hi := v_1.Args[0]
if !(hi.Op != OpConst32) {
break
}
// cond:
// result: (Int64Make (Add32 <typ.UInt32> (Mul32 <typ.UInt32> (Int64Lo x) (Int64Hi y)) (Add32 <typ.UInt32> (Mul32 <typ.UInt32> (Int64Hi x) (Int64Lo y)) (Select0 <typ.UInt32> (Mul32uhilo (Int64Lo x) (Int64Lo y))))) (Select1 <typ.UInt32> (Mul32uhilo (Int64Lo x) (Int64Lo y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpAdd32, typ.UInt32)
v1 := b.NewValue0(v.Pos, OpMul32, typ.UInt32)
// cond:
// result: (OrB (Neq32 (Int64Hi x) (Int64Hi y)) (Neq32 (Int64Lo x) (Int64Lo y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpOrB)
v0 := b.NewValue0(v.Pos, OpNeq32, typ.Bool)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
// cond:
// result: (Int64Make (Or32 <typ.UInt32> (Int64Hi x) (Int64Hi y)) (Or32 <typ.UInt32> (Int64Lo x) (Int64Lo y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
+ lo := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
if v_1_0.AuxInt != 0 {
break
}
- lo := v_1.Args[1]
v.reset(OpRsh16Ux32)
v.AddArg(x)
v.AddArg(lo)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
+ hi := v_1.Args[0]
if !(hi.Op != OpConst32) {
break
}
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
+ lo := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
if v_1_0.AuxInt != 0 {
break
}
- lo := v_1.Args[1]
v.reset(OpRsh16x32)
v.AddArg(x)
v.AddArg(lo)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
+ hi := v_1.Args[0]
if !(hi.Op != OpConst32) {
break
}
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
+ lo := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
if v_1_0.AuxInt != 0 {
break
}
- lo := v_1.Args[1]
v.reset(OpRsh32Ux32)
v.AddArg(x)
v.AddArg(lo)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
+ hi := v_1.Args[0]
if !(hi.Op != OpConst32) {
break
}
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
+ lo := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
if v_1_0.AuxInt != 0 {
break
}
- lo := v_1.Args[1]
v.reset(OpRsh32x32)
v.AddArg(x)
v.AddArg(lo)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
+ hi := v_1.Args[0]
if !(hi.Op != OpConst32) {
break
}
// cond:
// result: (Int64Make (Rsh32Ux16 <typ.UInt32> hi s) (Or32 <typ.UInt32> (Or32 <typ.UInt32> (Rsh32Ux16 <typ.UInt32> lo s) (Lsh32x16 <typ.UInt32> hi (Sub16 <typ.UInt16> (Const16 <typ.UInt16> [32]) s))) (Rsh32Ux16 <typ.UInt32> hi (Sub16 <typ.UInt16> s (Const16 <typ.UInt16> [32])))))
for {
- _ = v.Args[1]
+ s := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
- hi := v_0.Args[0]
lo := v_0.Args[1]
- s := v.Args[1]
+ hi := v_0.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpRsh32Ux16, typ.UInt32)
v0.AddArg(hi)
// cond:
// result: (Int64Make (Rsh32Ux32 <typ.UInt32> hi s) (Or32 <typ.UInt32> (Or32 <typ.UInt32> (Rsh32Ux32 <typ.UInt32> lo s) (Lsh32x32 <typ.UInt32> hi (Sub32 <typ.UInt32> (Const32 <typ.UInt32> [32]) s))) (Rsh32Ux32 <typ.UInt32> hi (Sub32 <typ.UInt32> s (Const32 <typ.UInt32> [32])))))
for {
- _ = v.Args[1]
+ s := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
- hi := v_0.Args[0]
lo := v_0.Args[1]
- s := v.Args[1]
+ hi := v_0.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpRsh32Ux32, typ.UInt32)
v0.AddArg(hi)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
+ lo := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
if v_1_0.AuxInt != 0 {
break
}
- lo := v_1.Args[1]
v.reset(OpRsh64Ux32)
v.AddArg(x)
v.AddArg(lo)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
+ hi := v_1.Args[0]
if !(hi.Op != OpConst32) {
break
}
// cond:
// result: (Int64Make (Rsh32Ux8 <typ.UInt32> hi s) (Or32 <typ.UInt32> (Or32 <typ.UInt32> (Rsh32Ux8 <typ.UInt32> lo s) (Lsh32x8 <typ.UInt32> hi (Sub8 <typ.UInt8> (Const8 <typ.UInt8> [32]) s))) (Rsh32Ux8 <typ.UInt32> hi (Sub8 <typ.UInt8> s (Const8 <typ.UInt8> [32])))))
for {
- _ = v.Args[1]
+ s := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
- hi := v_0.Args[0]
lo := v_0.Args[1]
- s := v.Args[1]
+ hi := v_0.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpRsh32Ux8, typ.UInt32)
v0.AddArg(hi)
// cond:
// result: (Int64Make (Rsh32x16 <typ.UInt32> hi s) (Or32 <typ.UInt32> (Or32 <typ.UInt32> (Rsh32Ux16 <typ.UInt32> lo s) (Lsh32x16 <typ.UInt32> hi (Sub16 <typ.UInt16> (Const16 <typ.UInt16> [32]) s))) (And32 <typ.UInt32> (Rsh32x16 <typ.UInt32> hi (Sub16 <typ.UInt16> s (Const16 <typ.UInt16> [32]))) (Zeromask (ZeroExt16to32 (Rsh16Ux32 <typ.UInt16> s (Const32 <typ.UInt32> [5])))))))
for {
- _ = v.Args[1]
+ s := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
- hi := v_0.Args[0]
lo := v_0.Args[1]
- s := v.Args[1]
+ hi := v_0.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpRsh32x16, typ.UInt32)
v0.AddArg(hi)
// cond:
// result: (Int64Make (Rsh32x32 <typ.UInt32> hi s) (Or32 <typ.UInt32> (Or32 <typ.UInt32> (Rsh32Ux32 <typ.UInt32> lo s) (Lsh32x32 <typ.UInt32> hi (Sub32 <typ.UInt32> (Const32 <typ.UInt32> [32]) s))) (And32 <typ.UInt32> (Rsh32x32 <typ.UInt32> hi (Sub32 <typ.UInt32> s (Const32 <typ.UInt32> [32]))) (Zeromask (Rsh32Ux32 <typ.UInt32> s (Const32 <typ.UInt32> [5]))))))
for {
- _ = v.Args[1]
+ s := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
- hi := v_0.Args[0]
lo := v_0.Args[1]
- s := v.Args[1]
+ hi := v_0.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpRsh32x32, typ.UInt32)
v0.AddArg(hi)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
+ lo := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
if v_1_0.AuxInt != 0 {
break
}
- lo := v_1.Args[1]
v.reset(OpRsh64x32)
v.AddArg(x)
v.AddArg(lo)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
+ hi := v_1.Args[0]
if !(hi.Op != OpConst32) {
break
}
// cond:
// result: (Int64Make (Rsh32x8 <typ.UInt32> hi s) (Or32 <typ.UInt32> (Or32 <typ.UInt32> (Rsh32Ux8 <typ.UInt32> lo s) (Lsh32x8 <typ.UInt32> hi (Sub8 <typ.UInt8> (Const8 <typ.UInt8> [32]) s))) (And32 <typ.UInt32> (Rsh32x8 <typ.UInt32> hi (Sub8 <typ.UInt8> s (Const8 <typ.UInt8> [32]))) (Zeromask (ZeroExt8to32 (Rsh8Ux32 <typ.UInt8> s (Const32 <typ.UInt32> [5])))))))
for {
- _ = v.Args[1]
+ s := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
- hi := v_0.Args[0]
lo := v_0.Args[1]
- s := v.Args[1]
+ hi := v_0.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpRsh32x8, typ.UInt32)
v0.AddArg(hi)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
+ lo := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
if v_1_0.AuxInt != 0 {
break
}
- lo := v_1.Args[1]
v.reset(OpRsh8Ux32)
v.AddArg(x)
v.AddArg(lo)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
+ hi := v_1.Args[0]
if !(hi.Op != OpConst32) {
break
}
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
+ lo := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
if v_1_0.AuxInt != 0 {
break
}
- lo := v_1.Args[1]
v.reset(OpRsh8x32)
v.AddArg(x)
v.AddArg(lo)
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
+ hi := v_1.Args[0]
if !(hi.Op != OpConst32) {
break
}
// result: (Store {hi.Type} (OffPtr <hi.Type.PtrTo()> [4] dst) hi (Store {lo.Type} dst lo mem))
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
- mem := v.Args[2]
+ hi := v_1.Args[0]
if !(t.(*types.Type).Size() == 8 && !config.BigEndian) {
break
}
// result: (Store {lo.Type} (OffPtr <lo.Type.PtrTo()> [4] dst) lo (Store {hi.Type} dst hi mem))
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpInt64Make {
break
}
- _ = v_1.Args[1]
- hi := v_1.Args[0]
lo := v_1.Args[1]
- mem := v.Args[2]
+ hi := v_1.Args[0]
if !(t.(*types.Type).Size() == 8 && config.BigEndian) {
break
}
// cond:
// result: (Int64Make (Sub32withcarry <typ.Int32> (Int64Hi x) (Int64Hi y) (Select1 <types.TypeFlags> (Sub32carry (Int64Lo x) (Int64Lo y)))) (Select0 <typ.UInt32> (Sub32carry (Int64Lo x) (Int64Lo y))))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpSub32withcarry, typ.Int32)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
lo := v_0.Args[1]
v.reset(OpTrunc32to16)
v.AddArg(lo)
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
lo := v_0.Args[1]
v.reset(OpCopy)
v.Type = lo.Type
if v_0.Op != OpInt64Make {
break
}
- _ = v_0.Args[1]
lo := v_0.Args[1]
v.reset(OpTrunc32to8)
v.AddArg(lo)
// cond:
// result: (Int64Make (Xor32 <typ.UInt32> (Int64Hi x) (Int64Hi y)) (Xor32 <typ.UInt32> (Int64Lo x) (Int64Lo y)))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpInt64Make)
v0 := b.NewValue0(v.Pos, OpXor32, typ.UInt32)
v1 := b.NewValue0(v.Pos, OpInt64Hi, typ.UInt32)
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul16 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul16)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd16, t)
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul16 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul16)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd16, t)
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul16 {
break
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul16 {
break
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
z := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul16 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpMul16)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd16, t)
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
- z := v_0.Args[0]
x := v_0.Args[1]
+ z := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul16 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpMul16)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd16, t)
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
z := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul16 {
break
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
- z := v_0.Args[0]
x := v_0.Args[1]
+ z := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul16 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst16 {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond: (z.Op != OpConst16 && x.Op != OpConst16)
// result: (Add16 i (Add16 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd16 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
// cond: (z.Op != OpConst16 && x.Op != OpConst16)
// result: (Add16 i (Add16 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd16 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
if v_1.Op != OpAdd16 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
// cond: (z.Op != OpConst16 && x.Op != OpConst16)
// result: (Add16 i (Sub16 <t> x z))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub16 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
if v_1.Op != OpSub16 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
if v_1.Op != OpSub16 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
// cond: (z.Op != OpConst16 && x.Op != OpConst16)
// result: (Add16 i (Sub16 <t> x z))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub16 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
// cond: (z.Op != OpConst16 && x.Op != OpConst16)
// result: (Sub16 (Add16 <t> x z) i)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub16 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
// cond: (z.Op != OpConst16 && x.Op != OpConst16)
// result: (Sub16 (Add16 <t> x z) i)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub16 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
if v_1.Op != OpAdd16 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst16 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAdd16)
v0 := b.NewValue0(v.Pos, OpConst16, t)
v0.AuxInt = int64(int16(c + d))
if v_0.Op != OpAdd16 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst16 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst16 {
break
if v_1.Op != OpSub16 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst16 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpSub16)
v0 := b.NewValue0(v.Pos, OpConst16, t)
v0.AuxInt = int64(int16(c + d))
if v_0.Op != OpSub16 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst16 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst16 {
break
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul32 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul32)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd32, t)
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul32 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul32)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd32, t)
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul32 {
break
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul32 {
break
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
z := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul32 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpMul32)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd32, t)
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
- z := v_0.Args[0]
x := v_0.Args[1]
+ z := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul32 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpMul32)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd32, t)
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
z := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul32 {
break
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
- z := v_0.Args[0]
x := v_0.Args[1]
+ z := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul32 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32 {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond: (z.Op != OpConst32 && x.Op != OpConst32)
// result: (Add32 i (Add32 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd32 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
// cond: (z.Op != OpConst32 && x.Op != OpConst32)
// result: (Add32 i (Add32 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd32 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
if v_1.Op != OpAdd32 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
// cond: (z.Op != OpConst32 && x.Op != OpConst32)
// result: (Add32 i (Sub32 <t> x z))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub32 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
if v_1.Op != OpSub32 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
if v_1.Op != OpSub32 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
// cond: (z.Op != OpConst32 && x.Op != OpConst32)
// result: (Add32 i (Sub32 <t> x z))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub32 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
// cond: (z.Op != OpConst32 && x.Op != OpConst32)
// result: (Sub32 (Add32 <t> x z) i)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub32 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
// cond: (z.Op != OpConst32 && x.Op != OpConst32)
// result: (Sub32 (Add32 <t> x z) i)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub32 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
if v_1.Op != OpAdd32 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAdd32)
v0 := b.NewValue0(v.Pos, OpConst32, t)
v0.AuxInt = int64(int32(c + d))
if v_0.Op != OpAdd32 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst32 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst32 {
break
if v_1.Op != OpSub32 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpSub32)
v0 := b.NewValue0(v.Pos, OpConst32, t)
v0.AuxInt = int64(int32(c + d))
if v_0.Op != OpSub32 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst32 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst32 {
break
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul64 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd64, t)
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul64 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd64, t)
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul64 {
break
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul64 {
break
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
z := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul64 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpMul64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd64, t)
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
- z := v_0.Args[0]
x := v_0.Args[1]
+ z := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul64 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpMul64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd64, t)
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
z := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul64 {
break
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
- z := v_0.Args[0]
x := v_0.Args[1]
+ z := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul64 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64 {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond: (z.Op != OpConst64 && x.Op != OpConst64)
// result: (Add64 i (Add64 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd64 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
// cond: (z.Op != OpConst64 && x.Op != OpConst64)
// result: (Add64 i (Add64 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd64 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
if v_1.Op != OpAdd64 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
// cond: (z.Op != OpConst64 && x.Op != OpConst64)
// result: (Add64 i (Sub64 <t> x z))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub64 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
if v_1.Op != OpSub64 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
if v_1.Op != OpSub64 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
// cond: (z.Op != OpConst64 && x.Op != OpConst64)
// result: (Add64 i (Sub64 <t> x z))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub64 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
// cond: (z.Op != OpConst64 && x.Op != OpConst64)
// result: (Sub64 (Add64 <t> x z) i)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub64 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
// cond: (z.Op != OpConst64 && x.Op != OpConst64)
// result: (Sub64 (Add64 <t> x z) i)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub64 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
if v_1.Op != OpAdd64 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst64 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAdd64)
v0 := b.NewValue0(v.Pos, OpConst64, t)
v0.AuxInt = c + d
if v_0.Op != OpAdd64 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst64 {
break
if v_1.Op != OpSub64 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst64 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpSub64)
v0 := b.NewValue0(v.Pos, OpConst64, t)
v0.AuxInt = c + d
if v_0.Op != OpSub64 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst64 {
break
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul8 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul8)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd8, t)
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul8 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul8)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd8, t)
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul8 {
break
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul8 {
break
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
z := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul8 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpMul8)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd8, t)
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
- z := v_0.Args[0]
x := v_0.Args[1]
+ z := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul8 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpMul8)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpAdd8, t)
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
z := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul8 {
break
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
- z := v_0.Args[0]
x := v_0.Args[1]
+ z := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul8 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst8 {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond: (z.Op != OpConst8 && x.Op != OpConst8)
// result: (Add8 i (Add8 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd8 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
// cond: (z.Op != OpConst8 && x.Op != OpConst8)
// result: (Add8 i (Add8 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd8 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
if v_1.Op != OpAdd8 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
// cond: (z.Op != OpConst8 && x.Op != OpConst8)
// result: (Add8 i (Sub8 <t> x z))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub8 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
if v_1.Op != OpSub8 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
if v_1.Op != OpSub8 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
// cond: (z.Op != OpConst8 && x.Op != OpConst8)
// result: (Add8 i (Sub8 <t> x z))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub8 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
// cond: (z.Op != OpConst8 && x.Op != OpConst8)
// result: (Sub8 (Add8 <t> x z) i)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub8 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
// cond: (z.Op != OpConst8 && x.Op != OpConst8)
// result: (Sub8 (Add8 <t> x z) i)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpSub8 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
if v_1.Op != OpAdd8 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst8 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAdd8)
v0 := b.NewValue0(v.Pos, OpConst8, t)
v0.AuxInt = int64(int8(c + d))
if v_0.Op != OpAdd8 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst8 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst8 {
break
if v_1.Op != OpSub8 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst8 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpSub8)
v0 := b.NewValue0(v.Pos, OpConst8, t)
v0.AuxInt = int64(int8(c + d))
if v_0.Op != OpSub8 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst8 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst8 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst16 {
break
if v_0.AuxInt != -1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_1.Op != OpAnd16 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpAnd16)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (And16 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpAnd16)
// cond:
// result: (And16 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd16 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpAnd16)
// cond: (z.Op != OpConst16 && x.Op != OpConst16)
// result: (And16 i (And16 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd16 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
// cond: (z.Op != OpConst16 && x.Op != OpConst16)
// result: (And16 i (And16 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd16 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
if v_1.Op != OpAnd16 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
if v_1.Op != OpAnd16 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst16 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAnd16)
v0 := b.NewValue0(v.Pos, OpConst16, t)
v0.AuxInt = int64(int16(c & d))
if v_0.Op != OpAnd16 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst16 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst16 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32 {
break
if v_0.AuxInt != -1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_1.Op != OpAnd32 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpAnd32)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (And32 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpAnd32)
// cond:
// result: (And32 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd32 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpAnd32)
// cond: (z.Op != OpConst32 && x.Op != OpConst32)
// result: (And32 i (And32 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd32 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
// cond: (z.Op != OpConst32 && x.Op != OpConst32)
// result: (And32 i (And32 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd32 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
if v_1.Op != OpAnd32 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
if v_1.Op != OpAnd32 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAnd32)
v0 := b.NewValue0(v.Pos, OpConst32, t)
v0.AuxInt = int64(int32(c & d))
if v_0.Op != OpAnd32 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst32 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst32 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64 {
break
if v_0.AuxInt != -1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_1.Op != OpAnd64 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpAnd64)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (And64 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpAnd64)
// cond:
// result: (And64 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd64 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpAnd64)
// result: (Rsh64Ux64 (Lsh64x64 <t> x (Const64 <t> [nlz(y)])) (Const64 <t> [nlz(y)]))
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64 {
break
}
y := v_0.AuxInt
- x := v.Args[1]
if !(nlz(y)+nto(y) == 64 && nto(y) >= 32) {
break
}
// result: (Lsh64x64 (Rsh64Ux64 <t> x (Const64 <t> [ntz(y)])) (Const64 <t> [ntz(y)]))
for {
t := v.Type
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64 {
break
}
y := v_0.AuxInt
- x := v.Args[1]
if !(nlo(y)+ntz(y) == 64 && ntz(y) >= 32) {
break
}
// cond: (z.Op != OpConst64 && x.Op != OpConst64)
// result: (And64 i (And64 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd64 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
// cond: (z.Op != OpConst64 && x.Op != OpConst64)
// result: (And64 i (And64 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd64 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
if v_1.Op != OpAnd64 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
if v_1.Op != OpAnd64 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst64 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAnd64)
v0 := b.NewValue0(v.Pos, OpConst64, t)
v0.AuxInt = c & d
if v_0.Op != OpAnd64 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst64 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst8 {
break
if v_0.AuxInt != -1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_1.Op != OpAnd8 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpAnd8)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (And8 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpAnd8)
// cond:
// result: (And8 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd8 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpAnd8)
// cond: (z.Op != OpConst8 && x.Op != OpConst8)
// result: (And8 i (And8 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd8 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
// cond: (z.Op != OpConst8 && x.Op != OpConst8)
// result: (And8 i (And8 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAnd8 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
if v_1.Op != OpAnd8 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
if v_1.Op != OpAnd8 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst8 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAnd8)
v0 := b.NewValue0(v.Pos, OpConst8, t)
v0.AuxInt = int64(int8(c & d))
if v_0.Op != OpAnd8 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst8 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst8 {
break
// cond:
// result: (Add64 ptr off)
for {
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd64 {
break
}
- _ = v_0.Args[1]
+ off := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConvert {
break
}
_ = v_0_0.Args[1]
ptr := v_0_0.Args[0]
- mem := v_0_0.Args[1]
- off := v_0.Args[1]
- if mem != v.Args[1] {
+ if mem != v_0_0.Args[1] {
break
}
v.reset(OpAdd64)
// cond:
// result: (Add64 ptr off)
for {
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd64 {
break
}
_ = v_0_1.Args[1]
ptr := v_0_1.Args[0]
- mem := v_0_1.Args[1]
- if mem != v.Args[1] {
+ if mem != v_0_1.Args[1] {
break
}
v.reset(OpAdd64)
// cond:
// result: (Add32 ptr off)
for {
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd32 {
break
}
- _ = v_0.Args[1]
+ off := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConvert {
break
}
_ = v_0_0.Args[1]
ptr := v_0_0.Args[0]
- mem := v_0_0.Args[1]
- off := v_0.Args[1]
- if mem != v.Args[1] {
+ if mem != v_0_0.Args[1] {
break
}
v.reset(OpAdd32)
// cond:
// result: (Add32 ptr off)
for {
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd32 {
break
}
_ = v_0_1.Args[1]
ptr := v_0_1.Args[0]
- mem := v_0_1.Args[1]
- if mem != v.Args[1] {
+ if mem != v_0_1.Args[1] {
break
}
v.reset(OpAdd32)
// cond:
// result: ptr
for {
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConvert {
break
}
_ = v_0.Args[1]
ptr := v_0.Args[0]
- mem := v_0.Args[1]
- if mem != v.Args[1] {
+ if mem != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond:
// result: (ConstBool [1])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConstBool)
if v_1.Op != OpAdd16 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst16 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpEq16)
v0 := b.NewValue0(v.Pos, OpConst16, t)
v0.AuxInt = int64(int16(c - d))
if v_0.Op != OpAdd16 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst16 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst16 {
break
if s.Op != OpSub16 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpConst16 {
break
if s.Op != OpSub16 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
if !(s.Uses == 1) {
break
}
// cond:
// result: (ConstBool [1])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConstBool)
if v_1.Op != OpAdd32 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpEq32)
v0 := b.NewValue0(v.Pos, OpConst32, t)
v0.AuxInt = int64(int32(c - d))
if v_0.Op != OpAdd32 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst32 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst32 {
break
if s.Op != OpSub32 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpConst32 {
break
if s.Op != OpSub32 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
if !(s.Uses == 1) {
break
}
// cond:
// result: (ConstBool [1])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConstBool)
if v_1.Op != OpAdd64 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst64 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpEq64)
v0 := b.NewValue0(v.Pos, OpConst64, t)
v0.AuxInt = c - d
if v_0.Op != OpAdd64 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst64 {
break
if s.Op != OpSub64 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpConst64 {
break
if s.Op != OpSub64 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
if !(s.Uses == 1) {
break
}
// cond:
// result: (ConstBool [1])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConstBool)
if v_1.Op != OpAdd8 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst8 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpEq8)
v0 := b.NewValue0(v.Pos, OpConst8, t)
v0.AuxInt = int64(int8(c - d))
if v_0.Op != OpAdd8 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst8 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst8 {
break
if s.Op != OpSub8 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpConst8 {
break
if s.Op != OpSub8 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
if !(s.Uses == 1) {
break
}
// cond:
// result: (Not x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConstBool {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpNot)
v.AddArg(x)
return true
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConstBool {
break
if v_0.AuxInt != 1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond:
// result: (EqPtr (ITab x) (ITab y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpEqPtr)
v0 := b.NewValue0(v.Pos, OpITab, typ.Uintptr)
v0.AddArg(x)
// cond:
// result: (ConstBool [1])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConstBool)
// cond: isSamePtr(p1, p2)
// result: (ConstBool [b2i(o1 == 0)])
for {
- _ = v.Args[1]
+ p2 := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOffPtr {
break
}
o1 := v_0.AuxInt
p1 := v_0.Args[0]
- p2 := v.Args[1]
if !(isSamePtr(p1, p2)) {
break
}
// cond: isSamePtr(p1, p2)
// result: (Not (IsNonNil o1))
for {
- _ = v.Args[1]
+ p2 := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAddPtr {
break
}
- _ = v_0.Args[1]
- p1 := v_0.Args[0]
o1 := v_0.Args[1]
- p2 := v.Args[1]
+ p1 := v_0.Args[0]
if !(isSamePtr(p1, p2)) {
break
}
if v_1.Op != OpAddPtr {
break
}
- _ = v_1.Args[1]
- p1 := v_1.Args[0]
o1 := v_1.Args[1]
+ p1 := v_1.Args[0]
if !(isSamePtr(p1, p2)) {
break
}
// cond:
// result: (Not (IsNonNil p))
for {
- _ = v.Args[1]
+ p := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32 {
break
if v_0.AuxInt != 0 {
break
}
- p := v.Args[1]
v.reset(OpNot)
v0 := b.NewValue0(v.Pos, OpIsNonNil, typ.Bool)
v0.AddArg(p)
// cond:
// result: (Not (IsNonNil p))
for {
- _ = v.Args[1]
+ p := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64 {
break
if v_0.AuxInt != 0 {
break
}
- p := v.Args[1]
v.reset(OpNot)
v0 := b.NewValue0(v.Pos, OpIsNonNil, typ.Bool)
v0.AddArg(p)
// cond:
// result: (Not (IsNonNil p))
for {
- _ = v.Args[1]
+ p := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConstNil {
break
}
- p := v.Args[1]
v.reset(OpNot)
v0 := b.NewValue0(v.Pos, OpIsNonNil, typ.Bool)
v0.AddArg(p)
// cond:
// result: (EqPtr (SlicePtr x) (SlicePtr y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpEqPtr)
v0 := b.NewValue0(v.Pos, OpSlicePtr, typ.BytePtr)
v0.AddArg(x)
// result: (StaticCall [argsize] {devirt(v, itab, off)} mem)
for {
argsize := v.AuxInt
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpLoad {
break
if v_0_0_0_0_0_0.Op != OpSB {
break
}
- mem := v.Args[1]
if !(devirt(v, itab, off) != nil) {
break
}
// cond:
// result: (ConstBool [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConstBool)
// cond:
// result: (ConstBool [1])
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMod32u {
break
}
_ = v_0.Args[1]
- y := v_0.Args[1]
- if y != v.Args[1] {
+ if y != v_0.Args[1] {
break
}
v.reset(OpConstBool)
// cond:
// result: (ConstBool [1])
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpMod64u {
break
}
_ = v_0.Args[1]
- y := v_0.Args[1]
- if y != v.Args[1] {
+ if y != v_0.Args[1] {
break
}
v.reset(OpConstBool)
// cond:
// result: (ConstBool [1])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConstBool)
// result: (StructMake1 (Load <t.FieldType(0)> (OffPtr <t.FieldType(0).PtrTo()> [0] ptr) mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsStruct() && t.NumFields() == 1 && fe.CanSSA(t)) {
break
}
// result: (StructMake2 (Load <t.FieldType(0)> (OffPtr <t.FieldType(0).PtrTo()> [0] ptr) mem) (Load <t.FieldType(1)> (OffPtr <t.FieldType(1).PtrTo()> [t.FieldOff(1)] ptr) mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsStruct() && t.NumFields() == 2 && fe.CanSSA(t)) {
break
}
// result: (StructMake3 (Load <t.FieldType(0)> (OffPtr <t.FieldType(0).PtrTo()> [0] ptr) mem) (Load <t.FieldType(1)> (OffPtr <t.FieldType(1).PtrTo()> [t.FieldOff(1)] ptr) mem) (Load <t.FieldType(2)> (OffPtr <t.FieldType(2).PtrTo()> [t.FieldOff(2)] ptr) mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsStruct() && t.NumFields() == 3 && fe.CanSSA(t)) {
break
}
// result: (StructMake4 (Load <t.FieldType(0)> (OffPtr <t.FieldType(0).PtrTo()> [0] ptr) mem) (Load <t.FieldType(1)> (OffPtr <t.FieldType(1).PtrTo()> [t.FieldOff(1)] ptr) mem) (Load <t.FieldType(2)> (OffPtr <t.FieldType(2).PtrTo()> [t.FieldOff(2)] ptr) mem) (Load <t.FieldType(3)> (OffPtr <t.FieldType(3).PtrTo()> [t.FieldOff(3)] ptr) mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsStruct() && t.NumFields() == 4 && fe.CanSSA(t)) {
break
}
// result: (ArrayMake1 (Load <t.Elem()> ptr mem))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
mem := v.Args[1]
+ ptr := v.Args[0]
if !(t.IsArray() && t.NumElem() == 1 && fe.CanSSA(t)) {
break
}
break
}
t2 := store.Aux
- _ = store.Args[2]
+ mem := store.Args[2]
op := store.Args[0]
if op.Op != OpOffPtr {
break
}
o2 := op.AuxInt
dst2 := op.Args[0]
- mem := store.Args[2]
if !(isSamePtr(dst1, dst2) && store.Uses == 1 && n >= o2+sizeof(t2) && disjoint(src1, n, op, sizeof(t2)) && clobber(store)) {
break
}
if move.Aux != t {
break
}
- _ = move.Args[2]
- dst2 := move.Args[0]
mem := move.Args[2]
+ dst2 := move.Args[0]
if !(move.Uses == 1 && isSamePtr(dst1, dst2) && disjoint(src1, n, dst2, n) && clobber(move)) {
break
}
if move.Aux != t {
break
}
- _ = move.Args[2]
- dst2 := move.Args[0]
mem := move.Args[2]
+ dst2 := move.Args[0]
if !(move.Uses == 1 && vardef.Uses == 1 && isSamePtr(dst1, dst2) && disjoint(src1, n, dst2, n) && clobber(move) && clobber(vardef)) {
break
}
if zero.Aux != t {
break
}
- _ = zero.Args[1]
- dst2 := zero.Args[0]
mem := zero.Args[1]
+ dst2 := zero.Args[0]
if !(zero.Uses == 1 && isSamePtr(dst1, dst2) && disjoint(src1, n, dst2, n) && clobber(zero)) {
break
}
if zero.Aux != t {
break
}
- _ = zero.Args[1]
- dst2 := zero.Args[0]
mem := zero.Args[1]
+ dst2 := zero.Args[0]
if !(zero.Uses == 1 && vardef.Uses == 1 && isSamePtr(dst1, dst2) && disjoint(src1, n, dst2, n) && clobber(zero) && clobber(vardef)) {
break
}
// cond: isSamePtr(dst, src)
// result: mem
for {
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
src := v.Args[1]
- mem := v.Args[2]
if !(isSamePtr(dst, src)) {
break
}
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst16 {
break
if v_0.AuxInt != 1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond:
// result: (Neg16 x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst16 {
break
if v_0.AuxInt != -1 {
break
}
- x := v.Args[1]
v.reset(OpNeg16)
v.AddArg(x)
return true
// result: (Lsh16x64 <t> n (Const64 <typ.UInt64> [log2(c)]))
for {
t := v.Type
- _ = v.Args[1]
+ n := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst16 {
break
}
c := v_0.AuxInt
- n := v.Args[1]
if !(isPowerOfTwo(c)) {
break
}
// result: (Neg16 (Lsh16x64 <t> n (Const64 <typ.UInt64> [log2(-c)])))
for {
t := v.Type
- _ = v.Args[1]
+ n := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst16 {
break
}
c := v_0.AuxInt
- n := v.Args[1]
if !(t.IsSigned() && isPowerOfTwo(-c)) {
break
}
if v_1.Op != OpMul16 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst16 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpMul16)
v0 := b.NewValue0(v.Pos, OpConst16, t)
v0.AuxInt = int64(int16(c * d))
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst16 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst16 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32 {
break
if v_0.AuxInt != 1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond:
// result: (Neg32 x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32 {
break
if v_0.AuxInt != -1 {
break
}
- x := v.Args[1]
v.reset(OpNeg32)
v.AddArg(x)
return true
// result: (Lsh32x64 <t> n (Const64 <typ.UInt64> [log2(c)]))
for {
t := v.Type
- _ = v.Args[1]
+ n := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32 {
break
}
c := v_0.AuxInt
- n := v.Args[1]
if !(isPowerOfTwo(c)) {
break
}
// result: (Neg32 (Lsh32x64 <t> n (Const64 <typ.UInt64> [log2(-c)])))
for {
t := v.Type
- _ = v.Args[1]
+ n := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32 {
break
}
c := v_0.AuxInt
- n := v.Args[1]
if !(t.IsSigned() && isPowerOfTwo(-c)) {
break
}
if v_1.Type != t {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAdd32)
v0 := b.NewValue0(v.Pos, OpConst32, t)
v0.AuxInt = int64(int32(c * d))
break
}
t := v_0.Type
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst32 {
break
break
}
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst32 {
break
if v_1.Op != OpMul32 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpMul32)
v0 := b.NewValue0(v.Pos, OpConst32, t)
v0.AuxInt = int64(int32(c * d))
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst32 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst32 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32F {
break
if v_0.AuxInt != auxFrom64F(1) {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond:
// result: (Neg32F x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32F {
break
if v_0.AuxInt != auxFrom32F(-1) {
break
}
- x := v.Args[1]
v.reset(OpNeg32F)
v.AddArg(x)
return true
// cond:
// result: (Add32F x x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32F {
break
if v_0.AuxInt != auxFrom32F(2) {
break
}
- x := v.Args[1]
v.reset(OpAdd32F)
v.AddArg(x)
v.AddArg(x)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64 {
break
if v_0.AuxInt != 1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond:
// result: (Neg64 x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64 {
break
if v_0.AuxInt != -1 {
break
}
- x := v.Args[1]
v.reset(OpNeg64)
v.AddArg(x)
return true
// result: (Lsh64x64 <t> n (Const64 <typ.UInt64> [log2(c)]))
for {
t := v.Type
- _ = v.Args[1]
+ n := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64 {
break
}
c := v_0.AuxInt
- n := v.Args[1]
if !(isPowerOfTwo(c)) {
break
}
// result: (Neg64 (Lsh64x64 <t> n (Const64 <typ.UInt64> [log2(-c)])))
for {
t := v.Type
- _ = v.Args[1]
+ n := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64 {
break
}
c := v_0.AuxInt
- n := v.Args[1]
if !(t.IsSigned() && isPowerOfTwo(-c)) {
break
}
if v_1.Type != t {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst64 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAdd64)
v0 := b.NewValue0(v.Pos, OpConst64, t)
v0.AuxInt = c * d
break
}
t := v_0.Type
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
break
}
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst64 {
break
if v_1.Op != OpMul64 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst64 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpMul64)
v0 := b.NewValue0(v.Pos, OpConst64, t)
v0.AuxInt = c * d
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst64 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64F {
break
if v_0.AuxInt != auxFrom64F(1) {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond:
// result: (Neg64F x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64F {
break
if v_0.AuxInt != auxFrom64F(-1) {
break
}
- x := v.Args[1]
v.reset(OpNeg64F)
v.AddArg(x)
return true
// cond:
// result: (Add64F x x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64F {
break
if v_0.AuxInt != auxFrom64F(2) {
break
}
- x := v.Args[1]
v.reset(OpAdd64F)
v.AddArg(x)
v.AddArg(x)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst8 {
break
if v_0.AuxInt != 1 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond:
// result: (Neg8 x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst8 {
break
if v_0.AuxInt != -1 {
break
}
- x := v.Args[1]
v.reset(OpNeg8)
v.AddArg(x)
return true
// result: (Lsh8x64 <t> n (Const64 <typ.UInt64> [log2(c)]))
for {
t := v.Type
- _ = v.Args[1]
+ n := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst8 {
break
}
c := v_0.AuxInt
- n := v.Args[1]
if !(isPowerOfTwo(c)) {
break
}
// result: (Neg8 (Lsh8x64 <t> n (Const64 <typ.UInt64> [log2(-c)])))
for {
t := v.Type
- _ = v.Args[1]
+ n := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst8 {
break
}
c := v_0.AuxInt
- n := v.Args[1]
if !(t.IsSigned() && isPowerOfTwo(-c)) {
break
}
if v_1.Op != OpMul8 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst8 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpMul8)
v0 := b.NewValue0(v.Pos, OpConst8, t)
v0.AuxInt = int64(int8(c * d))
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst8 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst8 {
break
if v_0.Op != OpSub16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpSub16)
v.AddArg(y)
v.AddArg(x)
if v_0.Op != OpSub32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpSub32)
v.AddArg(y)
v.AddArg(x)
if v_0.Op != OpSub64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpSub64)
v.AddArg(y)
v.AddArg(x)
if v_0.Op != OpSub8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpSub8)
v.AddArg(y)
v.AddArg(x)
// cond:
// result: (ConstBool [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConstBool)
if v_1.Op != OpAdd16 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst16 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpNeq16)
v0 := b.NewValue0(v.Pos, OpConst16, t)
v0.AuxInt = int64(int16(c - d))
if v_0.Op != OpAdd16 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst16 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst16 {
break
if s.Op != OpSub16 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpConst16 {
break
if s.Op != OpSub16 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
if !(s.Uses == 1) {
break
}
// cond:
// result: (ConstBool [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConstBool)
if v_1.Op != OpAdd32 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpNeq32)
v0 := b.NewValue0(v.Pos, OpConst32, t)
v0.AuxInt = int64(int32(c - d))
if v_0.Op != OpAdd32 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst32 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst32 {
break
if s.Op != OpSub32 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpConst32 {
break
if s.Op != OpSub32 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
if !(s.Uses == 1) {
break
}
// cond:
// result: (ConstBool [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConstBool)
if v_1.Op != OpAdd64 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst64 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpNeq64)
v0 := b.NewValue0(v.Pos, OpConst64, t)
v0.AuxInt = c - d
if v_0.Op != OpAdd64 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst64 {
break
if s.Op != OpSub64 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpConst64 {
break
if s.Op != OpSub64 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
if !(s.Uses == 1) {
break
}
// cond:
// result: (ConstBool [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConstBool)
if v_1.Op != OpAdd8 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst8 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpNeq8)
v0 := b.NewValue0(v.Pos, OpConst8, t)
v0.AuxInt = int64(int8(c - d))
if v_0.Op != OpAdd8 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst8 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst8 {
break
if s.Op != OpSub8 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpConst8 {
break
if s.Op != OpSub8 {
break
}
- _ = s.Args[1]
- x := s.Args[0]
y := s.Args[1]
+ x := s.Args[0]
if !(s.Uses == 1) {
break
}
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConstBool {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
// cond:
// result: (Not x)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConstBool {
break
if v_0.AuxInt != 1 {
break
}
- x := v.Args[1]
v.reset(OpNot)
v.AddArg(x)
return true
// cond:
// result: (NeqPtr (ITab x) (ITab y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpNeqPtr)
v0 := b.NewValue0(v.Pos, OpITab, typ.Uintptr)
v0.AddArg(x)
// cond:
// result: (ConstBool [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConstBool)
// cond: isSamePtr(p1, p2)
// result: (ConstBool [b2i(o1 != 0)])
for {
- _ = v.Args[1]
+ p2 := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOffPtr {
break
}
o1 := v_0.AuxInt
p1 := v_0.Args[0]
- p2 := v.Args[1]
if !(isSamePtr(p1, p2)) {
break
}
// cond: isSamePtr(p1, p2)
// result: (IsNonNil o1)
for {
- _ = v.Args[1]
+ p2 := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAddPtr {
break
}
- _ = v_0.Args[1]
- p1 := v_0.Args[0]
o1 := v_0.Args[1]
- p2 := v.Args[1]
+ p1 := v_0.Args[0]
if !(isSamePtr(p1, p2)) {
break
}
if v_1.Op != OpAddPtr {
break
}
- _ = v_1.Args[1]
- p1 := v_1.Args[0]
o1 := v_1.Args[1]
+ p1 := v_1.Args[0]
if !(isSamePtr(p1, p2)) {
break
}
// cond:
// result: (IsNonNil p)
for {
- _ = v.Args[1]
+ p := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32 {
break
if v_0.AuxInt != 0 {
break
}
- p := v.Args[1]
v.reset(OpIsNonNil)
v.AddArg(p)
return true
// cond:
// result: (IsNonNil p)
for {
- _ = v.Args[1]
+ p := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64 {
break
if v_0.AuxInt != 0 {
break
}
- p := v.Args[1]
v.reset(OpIsNonNil)
v.AddArg(p)
return true
// cond:
// result: (IsNonNil p)
for {
- _ = v.Args[1]
+ p := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConstNil {
break
}
- p := v.Args[1]
v.reset(OpIsNonNil)
v.AddArg(p)
return true
// cond:
// result: (NeqPtr (SlicePtr x) (SlicePtr y))
for {
- _ = v.Args[1]
- x := v.Args[0]
y := v.Args[1]
+ x := v.Args[0]
v.reset(OpNeqPtr)
v0 := b.NewValue0(v.Pos, OpSlicePtr, typ.BytePtr)
v0.AddArg(x)
// cond:
// result: mem
for {
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpGetG {
break
}
- mem := v_0.Args[0]
- if mem != v.Args[1] {
+ if mem != v_0.Args[0] {
break
}
v.reset(OpCopy)
if v_0.Op != OpEq64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpNeq64)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpEq32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpNeq32)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpEq16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpNeq16)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpEq8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpNeq8)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpEqB {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpNeqB)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpNeq64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpEq64)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpNeq32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpEq32)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpNeq16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpEq16)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpNeq8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpEq8)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpNeqB {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpEqB)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGreater64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLeq64)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGreater32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLeq32)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGreater16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLeq16)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGreater8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLeq8)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGreater64U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLeq64U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGreater32U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLeq32U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGreater16U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLeq16U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGreater8U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLeq8U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGeq64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLess64)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGeq32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLess32)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGeq16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLess16)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGeq8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLess8)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGeq64U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLess64U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGeq32U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLess32U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGeq16U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLess16U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpGeq8U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpLess8U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLess64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGeq64)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLess32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGeq32)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLess16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGeq16)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLess8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGeq8)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLess64U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGeq64U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLess32U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGeq32U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLess16U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGeq16U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLess8U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGeq8U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLeq64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGreater64)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLeq32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGreater32)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLeq16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGreater16)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLeq8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGreater8)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLeq64U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGreater64U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLeq32U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGreater32U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLeq16U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGreater16U)
v.AddArg(x)
v.AddArg(y)
if v_0.Op != OpLeq8U {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v.reset(OpGreater8U)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst16 {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_1.Op != OpOr16 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpOr16)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Or16 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpOr16)
// cond:
// result: (Or16 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr16 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpOr16)
if v_0.Op != OpAnd16 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst16 {
break
}
c2 := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst16 {
break
if v_1.Op != OpAnd16 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst16 {
break
}
c2 := v_1_0.AuxInt
- x := v_1.Args[1]
if !(^(c1 | c2) == 0) {
break
}
// cond: (z.Op != OpConst16 && x.Op != OpConst16)
// result: (Or16 i (Or16 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr16 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
// cond: (z.Op != OpConst16 && x.Op != OpConst16)
// result: (Or16 i (Or16 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr16 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
if v_1.Op != OpOr16 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
if v_1.Op != OpOr16 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst16 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpOr16)
v0 := b.NewValue0(v.Pos, OpConst16, t)
v0.AuxInt = int64(int16(c | d))
if v_0.Op != OpOr16 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst16 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst16 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32 {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_1.Op != OpOr32 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpOr32)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Or32 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpOr32)
// cond:
// result: (Or32 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr32 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpOr32)
if v_0.Op != OpAnd32 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst32 {
break
}
c2 := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst32 {
break
if v_1.Op != OpAnd32 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
}
c2 := v_1_0.AuxInt
- x := v_1.Args[1]
if !(^(c1 | c2) == 0) {
break
}
// cond: (z.Op != OpConst32 && x.Op != OpConst32)
// result: (Or32 i (Or32 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr32 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
// cond: (z.Op != OpConst32 && x.Op != OpConst32)
// result: (Or32 i (Or32 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr32 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
if v_1.Op != OpOr32 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
if v_1.Op != OpOr32 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpOr32)
v0 := b.NewValue0(v.Pos, OpConst32, t)
v0.AuxInt = int64(int32(c | d))
if v_0.Op != OpOr32 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst32 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst32 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64 {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_1.Op != OpOr64 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpOr64)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Or64 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpOr64)
// cond:
// result: (Or64 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr64 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpOr64)
if v_0.Op != OpAnd64 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
}
c2 := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst64 {
break
if v_1.Op != OpAnd64 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst64 {
break
}
c2 := v_1_0.AuxInt
- x := v_1.Args[1]
if !(^(c1 | c2) == 0) {
break
}
// cond: (z.Op != OpConst64 && x.Op != OpConst64)
// result: (Or64 i (Or64 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr64 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
// cond: (z.Op != OpConst64 && x.Op != OpConst64)
// result: (Or64 i (Or64 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr64 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
if v_1.Op != OpOr64 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
if v_1.Op != OpOr64 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst64 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpOr64)
v0 := b.NewValue0(v.Pos, OpConst64, t)
v0.AuxInt = c | d
if v_0.Op != OpOr64 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst64 {
break
// cond:
// result: x
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst8 {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_1.Op != OpOr8 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpOr8)
v.AddArg(x)
v.AddArg(y)
// cond:
// result: (Or8 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpOr8)
// cond:
// result: (Or8 x y)
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr8 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpOr8)
if v_0.Op != OpAnd8 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst8 {
break
}
c2 := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst8 {
break
if v_1.Op != OpAnd8 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst8 {
break
}
c2 := v_1_0.AuxInt
- x := v_1.Args[1]
if !(^(c1 | c2) == 0) {
break
}
// cond: (z.Op != OpConst8 && x.Op != OpConst8)
// result: (Or8 i (Or8 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr8 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
// cond: (z.Op != OpConst8 && x.Op != OpConst8)
// result: (Or8 i (Or8 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpOr8 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
if v_1.Op != OpOr8 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
if v_1.Op != OpOr8 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst8 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpOr8)
v0 := b.NewValue0(v.Pos, OpConst8, t)
v0.AuxInt = int64(int8(c | d))
if v_0.Op != OpOr8 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst8 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst8 {
break
// result: (AddPtr ptr (Mul32 <typ.Int> idx (Const32 <typ.Int> [t.Elem().Size()])))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
idx := v.Args[1]
+ ptr := v.Args[0]
if !(config.PtrSize == 4) {
break
}
// result: (AddPtr ptr (Mul64 <typ.Int> idx (Const64 <typ.Int> [t.Elem().Size()])))
for {
t := v.Type
- _ = v.Args[1]
- ptr := v.Args[0]
idx := v.Args[1]
+ ptr := v.Args[0]
if !(config.PtrSize == 8) {
break
}
break
}
t := s3.Aux
- _ = s3.Args[2]
- dst := s3.Args[1]
mem := s3.Args[2]
+ dst := s3.Args[1]
if !(isSameSym(sym, "runtime.memmove") && t.(*types.Type).IsPtr() && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && isInlinableMemmove(dst, src, sz, config) && clobber(s1) && clobber(s2) && clobber(s3)) {
break
}
break
}
t := s3.Aux
- _ = s3.Args[2]
- dst := s3.Args[1]
mem := s3.Args[2]
+ dst := s3.Args[1]
if !(isSameSym(sym, "runtime.memmove") && t.(*types.Type).IsPtr() && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && isInlinableMemmove(dst, src, sz, config) && clobber(s1) && clobber(s2) && clobber(s3)) {
break
}
// result: mem
for {
t1 := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
p1 := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpLoad {
t2 := v_1.Type
_ = v_1.Args[1]
p2 := v_1.Args[0]
- mem := v_1.Args[1]
- if mem != v.Args[2] {
+ if mem != v_1.Args[1] {
break
}
if !(isSamePtr(p1, p2) && t2.Size() == sizeof(t1)) {
break
}
t2 := v_1.Type
- _ = v_1.Args[1]
- p2 := v_1.Args[0]
oldmem := v_1.Args[1]
+ p2 := v_1.Args[0]
mem := v.Args[2]
if mem.Op != OpStore {
break
break
}
t2 := v_1.Type
- _ = v_1.Args[1]
- p2 := v_1.Args[0]
oldmem := v_1.Args[1]
+ p2 := v_1.Args[0]
mem := v.Args[2]
if mem.Op != OpStore {
break
break
}
t2 := v_1.Type
- _ = v_1.Args[1]
- p2 := v_1.Args[0]
oldmem := v_1.Args[1]
+ p2 := v_1.Args[0]
mem := v.Args[2]
if mem.Op != OpStore {
break
// cond:
// result: mem
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_1 := v.Args[1]
if v_1.Op != OpStructMake0 {
break
}
- mem := v.Args[2]
v.reset(OpCopy)
v.Type = mem.Type
v.AddArg(mem)
// cond:
// result: (Store {t.FieldType(0)} (OffPtr <t.FieldType(0).PtrTo()> [0] dst) f0 mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpStructMake1 {
}
t := v_1.Type
f0 := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpStore)
v.Aux = t.FieldType(0)
v0 := b.NewValue0(v.Pos, OpOffPtr, t.FieldType(0).PtrTo())
// cond:
// result: (Store {t.FieldType(1)} (OffPtr <t.FieldType(1).PtrTo()> [t.FieldOff(1)] dst) f1 (Store {t.FieldType(0)} (OffPtr <t.FieldType(0).PtrTo()> [0] dst) f0 mem))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpStructMake2 {
break
}
t := v_1.Type
- _ = v_1.Args[1]
- f0 := v_1.Args[0]
f1 := v_1.Args[1]
- mem := v.Args[2]
+ f0 := v_1.Args[0]
v.reset(OpStore)
v.Aux = t.FieldType(1)
v0 := b.NewValue0(v.Pos, OpOffPtr, t.FieldType(1).PtrTo())
// cond:
// result: (Store {t.FieldType(2)} (OffPtr <t.FieldType(2).PtrTo()> [t.FieldOff(2)] dst) f2 (Store {t.FieldType(1)} (OffPtr <t.FieldType(1).PtrTo()> [t.FieldOff(1)] dst) f1 (Store {t.FieldType(0)} (OffPtr <t.FieldType(0).PtrTo()> [0] dst) f0 mem)))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpStructMake3 {
break
}
t := v_1.Type
- _ = v_1.Args[2]
+ f2 := v_1.Args[2]
f0 := v_1.Args[0]
f1 := v_1.Args[1]
- f2 := v_1.Args[2]
- mem := v.Args[2]
v.reset(OpStore)
v.Aux = t.FieldType(2)
v0 := b.NewValue0(v.Pos, OpOffPtr, t.FieldType(2).PtrTo())
// cond:
// result: (Store {t.FieldType(3)} (OffPtr <t.FieldType(3).PtrTo()> [t.FieldOff(3)] dst) f3 (Store {t.FieldType(2)} (OffPtr <t.FieldType(2).PtrTo()> [t.FieldOff(2)] dst) f2 (Store {t.FieldType(1)} (OffPtr <t.FieldType(1).PtrTo()> [t.FieldOff(1)] dst) f1 (Store {t.FieldType(0)} (OffPtr <t.FieldType(0).PtrTo()> [0] dst) f0 mem))))
for {
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpStructMake4 {
break
}
t := v_1.Type
- _ = v_1.Args[3]
+ f3 := v_1.Args[3]
f0 := v_1.Args[0]
f1 := v_1.Args[1]
f2 := v_1.Args[2]
- f3 := v_1.Args[3]
- mem := v.Args[2]
v.reset(OpStore)
v.Aux = t.FieldType(3)
v0 := b.NewValue0(v.Pos, OpOffPtr, t.FieldType(3).PtrTo())
// result: (Move {t} [sizeof(t)] dst src mem)
for {
t := v.Aux
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpLoad {
}
_ = v_1.Args[1]
src := v_1.Args[0]
- mem := v_1.Args[1]
- if mem != v.Args[2] {
+ if mem != v_1.Args[1] {
break
}
if !(!fe.CanSSA(t.(*types.Type))) {
if v_1.Op != OpLoad {
break
}
- _ = v_1.Args[1]
- src := v_1.Args[0]
mem := v_1.Args[1]
+ src := v_1.Args[0]
v_2 := v.Args[2]
if v_2.Op != OpVarDef {
break
// cond:
// result: mem
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_1 := v.Args[1]
if v_1.Op != OpArrayMake0 {
break
}
- mem := v.Args[2]
v.reset(OpCopy)
v.Type = mem.Type
v.AddArg(mem)
// cond:
// result: (Store {e.Type} dst e mem)
for {
- _ = v.Args[2]
+ mem := v.Args[2]
dst := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpArrayMake1 {
break
}
e := v_1.Args[0]
- mem := v.Args[2]
v.reset(OpStore)
v.Aux = e.Type
v.AddArg(dst)
// cond: isConstZero(x) && mem.Op == OpStaticCall && isSameSym(mem.Aux, "runtime.newobject") && c == config.ctxt.FixedFrameSize() + config.RegSize
// result: mem
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpLoad {
break
if v_0_0_0.Op != OpSP {
break
}
- mem := v_0.Args[1]
- x := v.Args[1]
- if mem != v.Args[2] {
+ if mem != v_0.Args[1] {
break
}
+ x := v.Args[1]
if !(isConstZero(x) && mem.Op == OpStaticCall && isSameSym(mem.Aux, "runtime.newobject") && c == config.ctxt.FixedFrameSize()+config.RegSize) {
break
}
// cond: isConstZero(x) && mem.Op == OpStaticCall && isSameSym(mem.Aux, "runtime.newobject") && c == config.ctxt.FixedFrameSize() + config.RegSize
// result: mem
for {
- _ = v.Args[2]
+ mem := v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpOffPtr {
break
if v_0_0_0_0.Op != OpSP {
break
}
- mem := v_0_0.Args[1]
- x := v.Args[1]
- if mem != v.Args[2] {
+ if mem != v_0_0.Args[1] {
break
}
+ x := v.Args[1]
if !(isConstZero(x) && mem.Op == OpStaticCall && isSameSym(mem.Aux, "runtime.newobject") && c == config.ctxt.FixedFrameSize()+config.RegSize) {
break
}
break
}
n := m3.AuxInt
- _ = m3.Args[2]
- p3 := m3.Args[0]
mem := m3.Args[2]
+ p3 := m3.Args[0]
if !(m2.Uses == 1 && m3.Uses == 1 && o1 == sizeof(t2) && n == sizeof(t2)+sizeof(t1) && isSamePtr(p1, p2) && isSamePtr(p2, p3) && clobber(m2) && clobber(m3)) {
break
}
break
}
n := m4.AuxInt
- _ = m4.Args[2]
- p4 := m4.Args[0]
mem := m4.Args[2]
+ p4 := m4.Args[0]
if !(m2.Uses == 1 && m3.Uses == 1 && m4.Uses == 1 && o2 == sizeof(t3) && o1-o2 == sizeof(t2) && n == sizeof(t3)+sizeof(t2)+sizeof(t1) && isSamePtr(p1, p2) && isSamePtr(p2, p3) && isSamePtr(p3, p4) && clobber(m2) && clobber(m3) && clobber(m4)) {
break
}
break
}
n := m5.AuxInt
- _ = m5.Args[2]
- p5 := m5.Args[0]
mem := m5.Args[2]
+ p5 := m5.Args[0]
if !(m2.Uses == 1 && m3.Uses == 1 && m4.Uses == 1 && m5.Uses == 1 && o3 == sizeof(t4) && o2-o3 == sizeof(t3) && o1-o2 == sizeof(t2) && n == sizeof(t4)+sizeof(t3)+sizeof(t2)+sizeof(t1) && isSamePtr(p1, p2) && isSamePtr(p2, p3) && isSamePtr(p3, p4) && isSamePtr(p4, p5) && clobber(m2) && clobber(m3) && clobber(m4) && clobber(m5)) {
break
}
break
}
n := m3.AuxInt
- _ = m3.Args[1]
- p3 := m3.Args[0]
mem := m3.Args[1]
+ p3 := m3.Args[0]
if !(m2.Uses == 1 && m3.Uses == 1 && o1 == sizeof(t2) && n == sizeof(t2)+sizeof(t1) && isSamePtr(p1, p2) && isSamePtr(p2, p3) && clobber(m2) && clobber(m3)) {
break
}
break
}
n := m4.AuxInt
- _ = m4.Args[1]
- p4 := m4.Args[0]
mem := m4.Args[1]
+ p4 := m4.Args[0]
if !(m2.Uses == 1 && m3.Uses == 1 && m4.Uses == 1 && o2 == sizeof(t3) && o1-o2 == sizeof(t2) && n == sizeof(t3)+sizeof(t2)+sizeof(t1) && isSamePtr(p1, p2) && isSamePtr(p2, p3) && isSamePtr(p3, p4) && clobber(m2) && clobber(m3) && clobber(m4)) {
break
}
break
}
n := m5.AuxInt
- _ = m5.Args[1]
- p5 := m5.Args[0]
mem := m5.Args[1]
+ p5 := m5.Args[0]
if !(m2.Uses == 1 && m3.Uses == 1 && m4.Uses == 1 && m5.Uses == 1 && o3 == sizeof(t4) && o2-o3 == sizeof(t3) && o1-o2 == sizeof(t2) && n == sizeof(t4)+sizeof(t3)+sizeof(t2)+sizeof(t1) && isSamePtr(p1, p2) && isSamePtr(p2, p3) && isSamePtr(p3, p4) && isSamePtr(p4, p5) && clobber(m2) && clobber(m3) && clobber(m4) && clobber(m5)) {
break
}
if v_0.Op != OpStructMake2 {
break
}
- _ = v_0.Args[1]
x := v_0.Args[1]
v.reset(OpCopy)
v.Type = x.Type
if v_0.Op != OpStructMake3 {
break
}
- _ = v_0.Args[2]
x := v_0.Args[2]
v.reset(OpCopy)
v.Type = x.Type
if v_0.Op != OpStructMake4 {
break
}
- _ = v_0.Args[3]
x := v_0.Args[3]
v.reset(OpCopy)
v.Type = x.Type
break
}
t := x.Type
- _ = x.Args[1]
- ptr := x.Args[0]
mem := x.Args[1]
+ ptr := x.Args[0]
if !(!fe.CanSSA(t)) {
break
}
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul16 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul16)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpSub16, t)
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul16 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul16)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpSub16, t)
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul16 {
break
if v_0.Op != OpMul16 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul16 {
break
// cond:
// result: (Const16 [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConst16)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd16 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd16 {
break
}
_ = v_0.Args[1]
x := v_0.Args[0]
- y := v_0.Args[1]
- if y != v.Args[1] {
+ if y != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd16 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
- if y != v.Args[1] {
+ if y != v_0.Args[0] {
break
}
v.reset(OpCopy)
if v_1.Op != OpSub16 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
if v_1.Op != OpSub16 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst16 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAdd16)
v0 := b.NewValue0(v.Pos, OpConst16, t)
v0.AuxInt = int64(int16(c - d))
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul32 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul32)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpSub32, t)
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul32 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul32)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpSub32, t)
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul32 {
break
if v_0.Op != OpMul32 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul32 {
break
// cond:
// result: (Const32 [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConst32)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd32 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd32 {
break
}
_ = v_0.Args[1]
x := v_0.Args[0]
- y := v_0.Args[1]
- if y != v.Args[1] {
+ if y != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd32 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
- if y != v.Args[1] {
+ if y != v_0.Args[0] {
break
}
v.reset(OpCopy)
if v_1.Op != OpSub32 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
if v_1.Op != OpSub32 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAdd32)
v0 := b.NewValue0(v.Pos, OpConst32, t)
v0.AuxInt = int64(int32(c - d))
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul64 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpSub64, t)
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul64 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul64)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpSub64, t)
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul64 {
break
if v_0.Op != OpMul64 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul64 {
break
// cond:
// result: (Const64 [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConst64)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd64 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd64 {
break
}
_ = v_0.Args[1]
x := v_0.Args[0]
- y := v_0.Args[1]
- if y != v.Args[1] {
+ if y != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd64 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
- if y != v.Args[1] {
+ if y != v_0.Args[0] {
break
}
v.reset(OpCopy)
if v_1.Op != OpSub64 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
if v_1.Op != OpSub64 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst64 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAdd64)
v0 := b.NewValue0(v.Pos, OpConst64, t)
v0.AuxInt = c - d
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul8 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul8)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpSub8, t)
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul8 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- z := v_1.Args[1]
v.reset(OpMul8)
v.AddArg(x)
v0 := b.NewValue0(v.Pos, OpSub8, t)
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
+ x := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul8 {
break
if v_0.Op != OpMul8 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
+ y := v_0.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpMul8 {
break
// cond:
// result: (Const8 [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConst8)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd8 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd8 {
break
}
_ = v_0.Args[1]
x := v_0.Args[0]
- y := v_0.Args[1]
- if y != v.Args[1] {
+ if y != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond:
// result: x
for {
- _ = v.Args[1]
+ y := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpAdd8 {
break
}
- _ = v_0.Args[1]
- y := v_0.Args[0]
x := v_0.Args[1]
- if y != v.Args[1] {
+ if y != v_0.Args[0] {
break
}
v.reset(OpCopy)
if v_1.Op != OpSub8 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
if v_1.Op != OpSub8 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst8 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpAdd8)
v0 := b.NewValue0(v.Pos, OpConst8, t)
v0.AuxInt = int64(int8(c - d))
if v_0.Op != OpAnd16 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst16 {
break
}
y := v_0_0.AuxInt
- x := v_0.Args[1]
if !(y&0xFF == 0xFF) {
break
}
if v_0.Op != OpAnd32 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst32 {
break
}
y := v_0_0.AuxInt
- x := v_0.Args[1]
if !(y&0xFFFF == 0xFFFF) {
break
}
if v_0.Op != OpAnd32 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst32 {
break
}
y := v_0_0.AuxInt
- x := v_0.Args[1]
if !(y&0xFF == 0xFF) {
break
}
if v_0.Op != OpAnd64 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
}
y := v_0_0.AuxInt
- x := v_0.Args[1]
if !(y&0xFFFF == 0xFFFF) {
break
}
if v_0.Op != OpAnd64 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
}
y := v_0_0.AuxInt
- x := v_0.Args[1]
if !(y&0xFFFFFFFF == 0xFFFFFFFF) {
break
}
if v_0.Op != OpAnd64 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
}
y := v_0_0.AuxInt
- x := v_0.Args[1]
if !(y&0xFF == 0xFF) {
break
}
// cond:
// result: (Const16 [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConst16)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst16 {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_1.Op != OpXor16 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpCopy)
v.Type = y.Type
v.AddArg(y)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor16 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor16 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond: (z.Op != OpConst16 && x.Op != OpConst16)
// result: (Xor16 i (Xor16 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor16 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
// cond: (z.Op != OpConst16 && x.Op != OpConst16)
// result: (Xor16 i (Xor16 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor16 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
if v_1.Op != OpXor16 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst16 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst16 && x.Op != OpConst16) {
break
}
if v_1.Op != OpXor16 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst16 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpXor16)
v0 := b.NewValue0(v.Pos, OpConst16, t)
v0.AuxInt = int64(int16(c ^ d))
if v_0.Op != OpXor16 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst16 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst16 {
break
// cond:
// result: (Const32 [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConst32)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst32 {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_1.Op != OpXor32 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpCopy)
v.Type = y.Type
v.AddArg(y)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor32 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor32 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond: (z.Op != OpConst32 && x.Op != OpConst32)
// result: (Xor32 i (Xor32 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor32 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
// cond: (z.Op != OpConst32 && x.Op != OpConst32)
// result: (Xor32 i (Xor32 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor32 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
if v_1.Op != OpXor32 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst32 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst32 && x.Op != OpConst32) {
break
}
if v_1.Op != OpXor32 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst32 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpXor32)
v0 := b.NewValue0(v.Pos, OpConst32, t)
v0.AuxInt = int64(int32(c ^ d))
if v_0.Op != OpXor32 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst32 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst32 {
break
// cond:
// result: (Const64 [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConst64)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst64 {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_1.Op != OpXor64 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpCopy)
v.Type = y.Type
v.AddArg(y)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor64 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor64 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond: (z.Op != OpConst64 && x.Op != OpConst64)
// result: (Xor64 i (Xor64 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor64 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
// cond: (z.Op != OpConst64 && x.Op != OpConst64)
// result: (Xor64 i (Xor64 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor64 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
if v_1.Op != OpXor64 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst64 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst64 && x.Op != OpConst64) {
break
}
if v_1.Op != OpXor64 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst64 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpXor64)
v0 := b.NewValue0(v.Pos, OpConst64, t)
v0.AuxInt = c ^ d
if v_0.Op != OpXor64 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst64 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst64 {
break
// cond:
// result: (Const8 [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ x := v.Args[1]
+ if x != v.Args[0] {
break
}
v.reset(OpConst8)
// cond:
// result: x
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpConst8 {
break
if v_0.AuxInt != 0 {
break
}
- x := v.Args[1]
v.reset(OpCopy)
v.Type = x.Type
v.AddArg(x)
if v_1.Op != OpXor8 {
break
}
- _ = v_1.Args[1]
+ y := v_1.Args[1]
if x != v_1.Args[0] {
break
}
- y := v_1.Args[1]
v.reset(OpCopy)
v.Type = y.Type
v.AddArg(y)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor8 {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
y := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[0] {
break
}
v.reset(OpCopy)
// cond:
// result: y
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor8 {
break
}
_ = v_0.Args[1]
y := v_0.Args[0]
- x := v_0.Args[1]
- if x != v.Args[1] {
+ if x != v_0.Args[1] {
break
}
v.reset(OpCopy)
// cond: (z.Op != OpConst8 && x.Op != OpConst8)
// result: (Xor8 i (Xor8 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor8 {
break
}
- _ = v_0.Args[1]
+ z := v_0.Args[1]
i := v_0.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_0.Args[1]
- x := v.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
// cond: (z.Op != OpConst8 && x.Op != OpConst8)
// result: (Xor8 i (Xor8 <t> z x))
for {
- _ = v.Args[1]
+ x := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpXor8 {
break
break
}
t := i.Type
- x := v.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
if v_1.Op != OpXor8 {
break
}
- _ = v_1.Args[1]
+ z := v_1.Args[1]
i := v_1.Args[0]
if i.Op != OpConst8 {
break
}
t := i.Type
- z := v_1.Args[1]
if !(z.Op != OpConst8 && x.Op != OpConst8) {
break
}
if v_1.Op != OpXor8 {
break
}
- _ = v_1.Args[1]
+ x := v_1.Args[1]
v_1_0 := v_1.Args[0]
if v_1_0.Op != OpConst8 {
break
break
}
d := v_1_0.AuxInt
- x := v_1.Args[1]
v.reset(OpXor8)
v0 := b.NewValue0(v.Pos, OpConst8, t)
v0.AuxInt = int64(int8(c ^ d))
if v_0.Op != OpXor8 {
break
}
- _ = v_0.Args[1]
+ x := v_0.Args[1]
v_0_0 := v_0.Args[0]
if v_0_0.Op != OpConst8 {
break
}
t := v_0_0.Type
d := v_0_0.AuxInt
- x := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpConst8 {
break
// cond: mem.Op == OpStaticCall && isSameSym(mem.Aux, "runtime.newobject") && c == config.ctxt.FixedFrameSize() + config.RegSize
// result: mem
for {
- _ = v.Args[1]
+ mem := v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpLoad {
break
if v_0_0_0.Op != OpSP {
break
}
- mem := v_0.Args[1]
- if mem != v.Args[1] {
+ if mem != v_0.Args[1] {
break
}
if !(mem.Op == OpStaticCall && isSameSym(mem.Aux, "runtime.newobject") && c == config.ctxt.FixedFrameSize()+config.RegSize) {
break
}
t2 := store.Aux
- _ = store.Args[2]
+ mem := store.Args[2]
store_0 := store.Args[0]
if store_0.Op != OpOffPtr {
break
}
o2 := store_0.AuxInt
p2 := store_0.Args[0]
- mem := store.Args[2]
if !(isSamePtr(p1, p2) && store.Uses == 1 && n >= o2+sizeof(t2) && clobber(store)) {
break
}
if move.Aux != t {
break
}
- _ = move.Args[2]
- dst2 := move.Args[0]
mem := move.Args[2]
+ dst2 := move.Args[0]
if !(move.Uses == 1 && isSamePtr(dst1, dst2) && clobber(move)) {
break
}
if move.Aux != t {
break
}
- _ = move.Args[2]
- dst2 := move.Args[0]
mem := move.Args[2]
+ dst2 := move.Args[0]
if !(move.Uses == 1 && vardef.Uses == 1 && isSamePtr(dst1, dst2) && clobber(move) && clobber(vardef)) {
break
}