]> Cypherpunks repositories - gostls13.git/commitdiff
[dev.simd] cmd/compile: add and fix k register supports
authorJunyang Shao <shaojunyang@google.com>
Wed, 28 May 2025 17:00:59 +0000 (17:00 +0000)
committerGopher Robot <gobot@golang.org>
Wed, 28 May 2025 17:44:36 +0000 (10:44 -0700)
This CL marks the "mask" ssa type as a simd type. This will make the
last return of `simdMov` reachable and the spilling of K register
correct.

This CL also makes `simdReg` able to return K registers.

Change-Id: Ia66230d3e5425d9e8bdd0081b008e098382d3827
Reviewed-on: https://go-review.googlesource.com/c/go/+/676876
Reviewed-by: David Chase <drchase@google.com>
Auto-Submit: Junyang Shao <shaojunyang@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>

src/cmd/compile/internal/amd64/ssa.go
src/cmd/compile/internal/types/type.go

index cf5f81345602832279f2ed66f92ddeeec0d20215..dcc4e30e1e65c25580bdfae16c787004380f9f32 100644 (file)
@@ -1671,6 +1671,8 @@ func simdReg(v *ssa.Value) int16 {
                panic("simdReg: not a simd type")
        }
        switch t.Size() {
+       case 8:
+               return v.Reg() // K registers
        case 16:
                return v.Reg()
        case 32:
index 41217cb2a9b212d39f5539076800aed835c61df0..f7b9b0f3f75940dcbfa5eee127134e0040c4a5a3 100644 (file)
@@ -1633,7 +1633,7 @@ var (
        TypeVec128    = newSIMD("vec128")
        TypeVec256    = newSIMD("vec256")
        TypeVec512    = newSIMD("vec512")
-       TypeMask      = newSSA("mask") // not a vector, not 100% sure what this should be.
+       TypeMask      = newSIMD("mask") // not a vector, not 100% sure what this should be.
        TypeResultMem = newResults([]*Type{TypeMem})
 )