(VPANDNQMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDNQMasked128load {sym} [off] x ptr mask mem)
(VPANDNQMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDNQMasked256load {sym} [off] x ptr mask mem)
(VPANDNQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPANDNQMasked512load {sym} [off] x ptr mask mem)
-(VRNDSCALEPS128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPS128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VRNDSCALEPS256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPS256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VRNDSCALEPS512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPS512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VRNDSCALEPD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPD128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VRNDSCALEPD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPD256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VRNDSCALEPD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VRNDSCALEPSMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPSMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VRNDSCALEPSMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPSMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VRNDSCALEPSMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPSMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VRNDSCALEPDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VRNDSCALEPDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VRNDSCALEPDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VREDUCEPS128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPS128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VREDUCEPS256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPS256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VREDUCEPS512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPS512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VREDUCEPD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPD128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VREDUCEPD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPD256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VREDUCEPD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VREDUCEPSMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPSMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VREDUCEPSMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPSMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VREDUCEPSMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPSMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VREDUCEPDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VREDUCEPDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VREDUCEPDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+(VRNDSCALEPS128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPS128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VRNDSCALEPS256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPS256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VRNDSCALEPS512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPS512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VRNDSCALEPD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPD128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VRNDSCALEPD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPD256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VRNDSCALEPD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPD512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VRNDSCALEPSMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPSMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VRNDSCALEPSMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPSMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VRNDSCALEPSMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPSMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VRNDSCALEPDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VRNDSCALEPDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VRNDSCALEPDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRNDSCALEPDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VREDUCEPS128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPS128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VREDUCEPS256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPS256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VREDUCEPS512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPS512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VREDUCEPD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPD128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VREDUCEPD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPD256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VREDUCEPD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPD512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VREDUCEPSMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPSMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VREDUCEPSMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPSMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VREDUCEPSMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPSMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VREDUCEPDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VREDUCEPDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VREDUCEPDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VREDUCEPDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
(VPERMI2PS128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PS128load {sym} [off] x y ptr mem)
(VPERMI2D128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2D128load {sym} [off] x y ptr mem)
(VPERMI2PS256 x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPERMI2PS256load {sym} [off] x y ptr mem)
(VPDPBUSDSMasked512 x y l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPDPBUSDSMasked512load {sym} [off] x y ptr mask mem)
(VPCMPEQD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPEQD512load {sym} [off] x ptr mem)
(VPCMPEQQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPEQQ512load {sym} [off] x ptr mem)
-(VCMPPS512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCMPPS512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VCMPPD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCMPPD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VCMPPSMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPSMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VCMPPSMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPSMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VCMPPSMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPSMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VCMPPDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VCMPPDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VCMPPDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPCMPDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPCMPDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPCMPDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPCMPQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPCMPQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPCMPQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPCMPUDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPCMPUDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPCMPUDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPCMPUQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPCMPUQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPCMPUQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VGF2P8AFFINEQB128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQB128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VGF2P8AFFINEQB256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQB256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VGF2P8AFFINEQB512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQB512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VGF2P8AFFINEINVQB128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQB128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VGF2P8AFFINEINVQB256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQB256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VGF2P8AFFINEINVQB512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQB512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VGF2P8AFFINEINVQBMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQBMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VGF2P8AFFINEINVQBMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQBMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VGF2P8AFFINEINVQBMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQBMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VGF2P8AFFINEQBMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQBMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VGF2P8AFFINEQBMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQBMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VGF2P8AFFINEQBMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQBMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+(VCMPPS512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCMPPS512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VCMPPD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VCMPPD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VCMPPSMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPSMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VCMPPSMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPSMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VCMPPSMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPSMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VCMPPDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VCMPPDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VCMPPDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VCMPPDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPCMPDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPCMPDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPCMPDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPCMPQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPQMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPCMPQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPQMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPCMPQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPQMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPCMPUDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPCMPUDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPCMPUDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPCMPUQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUQMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPCMPUQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUQMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPCMPUQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPCMPUQMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VGF2P8AFFINEQB128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQB128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VGF2P8AFFINEQB256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQB256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VGF2P8AFFINEQB512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQB512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VGF2P8AFFINEINVQB128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQB128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VGF2P8AFFINEINVQB256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQB256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VGF2P8AFFINEINVQB512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQB512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VGF2P8AFFINEINVQBMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQBMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VGF2P8AFFINEINVQBMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQBMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VGF2P8AFFINEINVQBMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEINVQBMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VGF2P8AFFINEQBMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQBMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VGF2P8AFFINEQBMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQBMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VGF2P8AFFINEQBMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VGF2P8AFFINEQBMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
(VPCMPGTD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPGTD512load {sym} [off] x ptr mem)
(VPCMPGTQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPGTQ512load {sym} [off] x ptr mem)
-(VPCMPUD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPUD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPCMPUQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPUQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPCMPD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPCMPQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+(VPCMPUD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPUD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPCMPUQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPUQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPCMPD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPCMPQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPCMPQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
(VPUNPCKHDQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPUNPCKHDQ512load {sym} [off] x ptr mem)
(VPUNPCKHQDQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPUNPCKHQDQ512load {sym} [off] x ptr mem)
(VPUNPCKLDQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPUNPCKLDQ512load {sym} [off] x ptr mem)
(VRSQRT14PDMasked128 l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PDMasked128load {sym} [off] ptr mask mem)
(VRSQRT14PDMasked256 l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PDMasked256load {sym} [off] ptr mask mem)
(VRSQRT14PDMasked512 l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VRSQRT14PDMasked512load {sym} [off] ptr mask mem)
-(VPROLD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLD128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPROLD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLD256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPROLD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPROLQ128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLQ128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPROLQ256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLQ256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPROLQ512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLQ512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPROLDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPROLDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPROLDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPROLQMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPROLQMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPROLQMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPRORD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORD128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPRORD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORD256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPRORD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPRORQ128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORQ128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPRORQ256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORQ256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPRORQ512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORQ512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPRORDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPRORDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPRORDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPRORQMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPRORQMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPRORQMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+(VPROLD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLD128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPROLD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLD256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPROLD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLD512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPROLQ128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLQ128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPROLQ256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLQ256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPROLQ512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPROLDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPROLDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPROLDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPROLQMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLQMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPROLQMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLQMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPROLQMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPROLQMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPRORD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORD128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPRORD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORD256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPRORD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORD512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPRORQ128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORQ128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPRORQ256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORQ256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPRORQ512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPRORQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPRORDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPRORDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPRORDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPRORQMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORQMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPRORQMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORQMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPRORQMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPRORQMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
(VPROLVD128 x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLVD128load {sym} [off] x ptr mem)
(VPROLVD256 x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLVD256load {sym} [off] x ptr mem)
(VPROLVD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPROLVD512load {sym} [off] x ptr mem)
(VSCALEFPDMasked128 x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPDMasked128load {sym} [off] x ptr mask mem)
(VSCALEFPDMasked256 x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPDMasked256load {sym} [off] x ptr mask mem)
(VSCALEFPDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VSCALEFPDMasked512load {sym} [off] x ptr mask mem)
-(VPSHLDD128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDD128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHLDD256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDD256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHLDD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHLDQ128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQ128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHLDQ256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQ256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHLDQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHLDDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPSHLDDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPSHLDDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPSHLDQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPSHLDQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPSHLDQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPSHRDD128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDD128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHRDD256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDD256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHRDD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHRDQ128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQ128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHRDQ256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQ256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHRDQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHRDDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPSHRDDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPSHRDDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPSHRDQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPSHRDQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
-(VPSHRDQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+(VPSHLDD128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDD128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHLDD256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDD256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHLDD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHLDQ128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQ128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHLDQ256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQ256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHLDQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHLDDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPSHLDDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPSHLDDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPSHLDQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPSHLDQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPSHLDQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHLDQMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPSHRDD128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDD128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHRDD256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDD256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHRDD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHRDQ128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQ128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHRDQ256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQ256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHRDQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHRDDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPSHRDDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPSHRDDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPSHRDQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPSHRDQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
+(VPSHRDQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHRDQMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
(VPSLLVD512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSLLVD512load {sym} [off] x ptr mem)
(VPSLLVQ512 x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSLLVQ512load {sym} [off] x ptr mem)
(VPSHLDVD128 x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHLDVD128load {sym} [off] x y ptr mem)
(VPXORQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPXORQMasked512load {sym} [off] x ptr mask mem)
(VPBLENDMDMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPBLENDMDMasked512load {sym} [off] x ptr mask mem)
(VPBLENDMQMasked512 x l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPBLENDMQMasked512load {sym} [off] x ptr mask mem)
-(VSHUFPS512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSHUFPS512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VSHUFPD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSHUFPD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
-(VPSHUFD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHUFD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPSHUFDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHUFDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSHUFDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHUFDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSHUFDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHUFDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSLLD512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSLLD512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPSLLQ512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSLLQ512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPSLLDMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLDMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSLLDMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLDMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSLLDMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLDMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSLLQMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLQMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSLLQMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLQMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSLLQMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLQMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSRLD512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRLD512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPSRLQ512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRLQ512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPSRAD512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAD512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPSRAQ128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAQ128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPSRAQ256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAQ256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPSRAQ512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAQ512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
-(VPSRLDMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLDMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSRLDMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLDMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSRLDMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLDMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSRLQMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLQMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSRLQMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLQMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSRLQMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLQMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSRADMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRADMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSRADMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRADMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSRADMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRADMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSRAQMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAQMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSRAQMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAQMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPSRAQMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAQMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
-(VPTERNLOGD128 [c] x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGD128load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
-(VPTERNLOGD256 [c] x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGD256load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
-(VPTERNLOGD512 [c] x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGD512load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
-(VPTERNLOGQ128 [c] x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGQ128load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
-(VPTERNLOGQ256 [c] x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGQ256load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
-(VPTERNLOGQ512 [c] x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
+(VSHUFPS512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSHUFPS512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VSHUFPD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VSHUFPD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
+(VPSHUFD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSHUFD512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPSHUFDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHUFDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSHUFDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHUFDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSHUFDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSHUFDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSLLD512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSLLD512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPSLLQ512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSLLQ512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPSLLDMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLDMasked128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSLLDMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLDMasked256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSLLDMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLDMasked512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSLLQMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLQMasked128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSLLQMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLQMasked256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSLLQMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSLLQMasked512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSRLD512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRLD512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPSRLQ512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRLQ512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPSRAD512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAD512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPSRAQ128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAQ128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPSRAQ256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAQ256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPSRAQ512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPSRAQ512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
+(VPSRLDMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLDMasked128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSRLDMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLDMasked256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSRLDMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLDMasked512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSRLQMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLQMasked128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSRLQMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLQMasked256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSRLQMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRLQMasked512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSRADMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRADMasked128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSRADMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRADMasked256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSRADMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRADMasked512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSRAQMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAQMasked128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSRAQMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAQMasked256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPSRAQMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask) && canMergeLoad(v, l) && clobber(l) => (VPSRAQMasked512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
+(VPTERNLOGD128 [c] x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGD128load {sym} [makeValAndOff(int32(uint8(c)),off)] x y ptr mem)
+(VPTERNLOGD256 [c] x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGD256load {sym} [makeValAndOff(int32(uint8(c)),off)] x y ptr mem)
+(VPTERNLOGD512 [c] x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x y ptr mem)
+(VPTERNLOGQ128 [c] x y l:(VMOVDQUload128 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGQ128load {sym} [makeValAndOff(int32(uint8(c)),off)] x y ptr mem)
+(VPTERNLOGQ256 [c] x y l:(VMOVDQUload256 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGQ256load {sym} [makeValAndOff(int32(uint8(c)),off)] x y ptr mem)
+(VPTERNLOGQ512 [c] x y l:(VMOVDQUload512 {sym} [off] ptr mem)) && canMergeLoad(v, l) && clobber(l) => (VPTERNLOGQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] x y ptr mem)
v_0 := v.Args[0]
// match: (VCMPPD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VCMPPD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VCMPPD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VCMPPD512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VCMPPDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VCMPPDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VCMPPDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VCMPPDMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VCMPPDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VCMPPDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VCMPPDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VCMPPDMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VCMPPDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VCMPPDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VCMPPDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VCMPPDMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VCMPPS512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VCMPPS512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VCMPPS512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VCMPPS512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VCMPPSMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VCMPPSMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VCMPPSMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VCMPPSMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VCMPPSMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VCMPPSMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VCMPPSMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VCMPPSMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VCMPPSMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VCMPPSMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VCMPPSMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VCMPPSMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VGF2P8AFFINEINVQB128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VGF2P8AFFINEINVQB128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VGF2P8AFFINEINVQB128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VGF2P8AFFINEINVQB128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VGF2P8AFFINEINVQB256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VGF2P8AFFINEINVQB256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VGF2P8AFFINEINVQB256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VGF2P8AFFINEINVQB256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VGF2P8AFFINEINVQB512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VGF2P8AFFINEINVQB512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VGF2P8AFFINEINVQB512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VGF2P8AFFINEINVQB512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VGF2P8AFFINEINVQBMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VGF2P8AFFINEINVQBMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VGF2P8AFFINEINVQBMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VGF2P8AFFINEINVQBMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VGF2P8AFFINEINVQBMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VGF2P8AFFINEINVQBMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VGF2P8AFFINEINVQBMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VGF2P8AFFINEINVQBMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VGF2P8AFFINEINVQBMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VGF2P8AFFINEINVQBMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VGF2P8AFFINEINVQBMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VGF2P8AFFINEINVQBMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VGF2P8AFFINEQB128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VGF2P8AFFINEQB128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VGF2P8AFFINEQB128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VGF2P8AFFINEQB128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VGF2P8AFFINEQB256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VGF2P8AFFINEQB256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VGF2P8AFFINEQB256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VGF2P8AFFINEQB256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VGF2P8AFFINEQB512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VGF2P8AFFINEQB512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VGF2P8AFFINEQB512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VGF2P8AFFINEQB512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VGF2P8AFFINEQBMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VGF2P8AFFINEQBMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VGF2P8AFFINEQBMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VGF2P8AFFINEQBMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VGF2P8AFFINEQBMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VGF2P8AFFINEQBMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VGF2P8AFFINEQBMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VGF2P8AFFINEQBMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VGF2P8AFFINEQBMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VGF2P8AFFINEQBMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VGF2P8AFFINEQBMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VGF2P8AFFINEQBMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPCMPD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPD512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPCMPDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPDMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPCMPDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPDMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPCMPDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPDMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPCMPQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPQ512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPCMPQMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPQMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPCMPQMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPQMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPCMPQMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPQMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPUD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPUD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPCMPUD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPUD512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPUDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPUDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPCMPUDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPUDMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPUDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPUDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPCMPUDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPUDMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPUDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPUDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPCMPUDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPUDMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPUQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPUQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPCMPUQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPUQ512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPUQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPUQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPCMPUQMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPUQMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPUQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPUQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPCMPUQMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPUQMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPCMPUQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPCMPUQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPCMPUQMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPCMPUQMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPROLD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPROLD128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPROLD128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPROLD128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPROLD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPROLD256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPROLD256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPROLD256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPROLD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPROLD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPROLD512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPROLD512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPROLDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPROLDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPROLDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPROLDMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPROLDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPROLDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPROLDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPROLDMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPROLDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPROLDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPROLDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPROLDMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPROLQ128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPROLQ128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPROLQ128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPROLQ128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPROLQ256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPROLQ256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPROLQ256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPROLQ256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPROLQ512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPROLQ512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPROLQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPROLQ512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPROLQMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPROLQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPROLQMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPROLQMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPROLQMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPROLQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPROLQMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPROLQMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPROLQMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPROLQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPROLQMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPROLQMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPRORD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPRORD128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPRORD128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPRORD128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPRORD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPRORD256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPRORD256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPRORD256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPRORD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPRORD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPRORD512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPRORD512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPRORDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPRORDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPRORDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPRORDMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPRORDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPRORDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPRORDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPRORDMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPRORDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPRORDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPRORDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPRORDMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPRORQ128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPRORQ128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPRORQ128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPRORQ128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPRORQ256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPRORQ256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPRORQ256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPRORQ256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPRORQ512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPRORQ512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPRORQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPRORQ512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPRORQMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPRORQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPRORQMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPRORQMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPRORQMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPRORQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPRORQMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPRORQMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPRORQMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPRORQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPRORQMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPRORQMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHLDD128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHLDD128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPSHLDD128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHLDD128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHLDD256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHLDD256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPSHLDD256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHLDD256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHLDD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHLDD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPSHLDD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHLDD512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHLDDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHLDDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPSHLDDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHLDDMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHLDDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHLDDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPSHLDDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHLDDMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHLDDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHLDDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPSHLDDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHLDDMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHLDQ128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHLDQ128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPSHLDQ128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHLDQ128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHLDQ256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHLDQ256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPSHLDQ256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHLDQ256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHLDQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHLDQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPSHLDQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHLDQ512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHLDQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHLDQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPSHLDQMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHLDQMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHLDQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHLDQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPSHLDQMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHLDQMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHLDQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHLDQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPSHLDQMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHLDQMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHRDD128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHRDD128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPSHRDD128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHRDD128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHRDD256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHRDD256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPSHRDD256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHRDD256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHRDD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHRDD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPSHRDD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHRDD512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHRDDMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHRDDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPSHRDDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHRDDMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHRDDMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHRDDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPSHRDDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHRDDMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHRDDMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHRDDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPSHRDDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHRDDMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHRDQ128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHRDQ128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPSHRDQ128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHRDQ128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHRDQ256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHRDQ256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPSHRDQ256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHRDQ256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHRDQ512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHRDQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VPSHRDQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHRDQ512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHRDQMasked128 [c] x l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHRDQMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPSHRDQMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHRDQMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHRDQMasked256 [c] x l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHRDQMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPSHRDQMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHRDQMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHRDQMasked512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHRDQMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mask mem)
+ // result: (VPSHRDQMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPSHRDQMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHUFD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHUFD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPSHUFD512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSHUFD512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSHUFDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHUFDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSHUFDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSHUFDMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHUFDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHUFDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSHUFDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSHUFDMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSHUFDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSHUFDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSHUFDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSHUFDMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSLLD512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSLLD512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPSLLD512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSLLD512constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSLLDMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSLLDMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSLLDMasked128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSLLDMasked128constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSLLDMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSLLDMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSLLDMasked256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSLLDMasked256constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSLLDMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSLLDMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSLLDMasked512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSLLDMasked512constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSLLQ512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSLLQ512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPSLLQ512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSLLQ512constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSLLQMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSLLQMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSLLQMasked128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSLLQMasked128constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSLLQMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSLLQMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSLLQMasked256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSLLQMasked256constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSLLQMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSLLQMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSLLQMasked512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSLLQMasked512constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSRAD512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRAD512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPSRAD512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRAD512constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSRADMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRADMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSRADMasked128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRADMasked128constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSRADMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRADMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSRADMasked256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRADMasked256constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSRADMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRADMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSRADMasked512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRADMasked512constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSRAQ128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRAQ128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPSRAQ128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRAQ128constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSRAQ256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRAQ256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPSRAQ256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRAQ256constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSRAQ512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRAQ512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPSRAQ512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRAQ512constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSRAQMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRAQMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSRAQMasked128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRAQMasked128constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSRAQMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRAQMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSRAQMasked256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRAQMasked256constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSRAQMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRAQMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSRAQMasked512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRAQMasked512constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSRLD512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRLD512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPSRLD512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRLD512constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSRLDMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRLDMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSRLDMasked128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRLDMasked128constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSRLDMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRLDMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSRLDMasked256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRLDMasked256constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSRLDMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRLDMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSRLDMasked512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRLDMasked512constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSRLQ512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRLQ512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VPSRLQ512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRLQ512constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPSRLQMasked128const [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRLQMasked128constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSRLQMasked128constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRLQMasked128constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSRLQMasked256const [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRLQMasked256constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSRLQMasked256constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRLQMasked256constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPSRLQMasked512const [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPSRLQMasked512constload {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VPSRLQMasked512constload {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VPSRLQMasked512constload)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VPTERNLOGD128 [c] x y l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPTERNLOGD128load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
+ // result: (VPTERNLOGD128load {sym} [makeValAndOff(int32(uint8(c)),off)] x y ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPTERNLOGD128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, y, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPTERNLOGD256 [c] x y l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPTERNLOGD256load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
+ // result: (VPTERNLOGD256load {sym} [makeValAndOff(int32(uint8(c)),off)] x y ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPTERNLOGD256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, y, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPTERNLOGD512 [c] x y l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPTERNLOGD512load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
+ // result: (VPTERNLOGD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x y ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPTERNLOGD512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, y, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPTERNLOGQ128 [c] x y l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPTERNLOGQ128load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
+ // result: (VPTERNLOGQ128load {sym} [makeValAndOff(int32(uint8(c)),off)] x y ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPTERNLOGQ128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, y, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPTERNLOGQ256 [c] x y l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPTERNLOGQ256load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
+ // result: (VPTERNLOGQ256load {sym} [makeValAndOff(int32(uint8(c)),off)] x y ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPTERNLOGQ256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, y, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VPTERNLOGQ512 [c] x y l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VPTERNLOGQ512load {sym} [makeValAndOff(int32(int8(c)),off)] x y ptr mem)
+ // result: (VPTERNLOGQ512load {sym} [makeValAndOff(int32(uint8(c)),off)] x y ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VPTERNLOGQ512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg4(x, y, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VREDUCEPD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VREDUCEPD128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VREDUCEPD128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VREDUCEPD128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VREDUCEPD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VREDUCEPD256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VREDUCEPD256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VREDUCEPD256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VREDUCEPD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VREDUCEPD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VREDUCEPD512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VREDUCEPD512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VREDUCEPDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VREDUCEPDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VREDUCEPDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VREDUCEPDMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VREDUCEPDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VREDUCEPDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VREDUCEPDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VREDUCEPDMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VREDUCEPDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VREDUCEPDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VREDUCEPDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VREDUCEPDMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VREDUCEPS128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VREDUCEPS128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VREDUCEPS128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VREDUCEPS128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VREDUCEPS256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VREDUCEPS256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VREDUCEPS256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VREDUCEPS256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VREDUCEPS512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VREDUCEPS512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VREDUCEPS512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VREDUCEPS512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VREDUCEPSMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VREDUCEPSMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VREDUCEPSMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VREDUCEPSMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VREDUCEPSMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VREDUCEPSMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VREDUCEPSMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VREDUCEPSMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VREDUCEPSMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VREDUCEPSMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VREDUCEPSMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VREDUCEPSMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VRNDSCALEPD128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VRNDSCALEPD128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VRNDSCALEPD128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VRNDSCALEPD128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VRNDSCALEPD256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VRNDSCALEPD256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VRNDSCALEPD256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VRNDSCALEPD256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VRNDSCALEPD512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VRNDSCALEPD512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VRNDSCALEPD512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VRNDSCALEPD512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VRNDSCALEPDMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VRNDSCALEPDMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VRNDSCALEPDMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VRNDSCALEPDMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VRNDSCALEPDMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VRNDSCALEPDMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VRNDSCALEPDMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VRNDSCALEPDMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VRNDSCALEPDMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VRNDSCALEPDMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VRNDSCALEPDMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VRNDSCALEPDMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VRNDSCALEPS128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VRNDSCALEPS128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VRNDSCALEPS128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VRNDSCALEPS128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VRNDSCALEPS256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VRNDSCALEPS256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VRNDSCALEPS256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VRNDSCALEPS256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VRNDSCALEPS512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VRNDSCALEPS512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mem)
+ // result: (VRNDSCALEPS512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VRNDSCALEPS512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg2(ptr, mem)
return true
v_0 := v.Args[0]
// match: (VRNDSCALEPSMasked128 [c] l:(VMOVDQUload128 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VRNDSCALEPSMasked128load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VRNDSCALEPSMasked128load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VRNDSCALEPSMasked128load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VRNDSCALEPSMasked256 [c] l:(VMOVDQUload256 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VRNDSCALEPSMasked256load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VRNDSCALEPSMasked256load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VRNDSCALEPSMasked256load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VRNDSCALEPSMasked512 [c] l:(VMOVDQUload512 {sym} [off] ptr mem) mask)
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VRNDSCALEPSMasked512load {sym} [makeValAndOff(int32(int8(c)),off)] ptr mask mem)
+ // result: (VRNDSCALEPSMasked512load {sym} [makeValAndOff(int32(uint8(c)),off)] ptr mask mem)
for {
c := auxIntToUint8(v.AuxInt)
l := v_0
break
}
v.reset(OpAMD64VRNDSCALEPSMasked512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(ptr, mask, mem)
return true
v_0 := v.Args[0]
// match: (VSHUFPD512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VSHUFPD512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VSHUFPD512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VSHUFPD512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true
v_0 := v.Args[0]
// match: (VSHUFPS512 [c] x l:(VMOVDQUload512 {sym} [off] ptr mem))
// cond: canMergeLoad(v, l) && clobber(l)
- // result: (VSHUFPS512load {sym} [makeValAndOff(int32(int8(c)),off)] x ptr mem)
+ // result: (VSHUFPS512load {sym} [makeValAndOff(int32(uint8(c)),off)] x ptr mem)
for {
c := auxIntToUint8(v.AuxInt)
x := v_0
break
}
v.reset(OpAMD64VSHUFPS512load)
- v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(int8(c)), off))
+ v.AuxInt = valAndOffToAuxInt(makeValAndOff(int32(uint8(c)), off))
v.Aux = symToAux(sym)
v.AddArg3(x, ptr, mem)
return true