// Abs computes the absolute value of each element.
//
-// Asm: VPABSB, CPU Feature: AVX512BW
+// Asm: VPABSB, CPU Feature: AVX512
func (x Int8x64) Abs() Int8x64
// Abs computes the absolute value of each element.
// Abs computes the absolute value of each element.
//
-// Asm: VPABSW, CPU Feature: AVX512BW
+// Asm: VPABSW, CPU Feature: AVX512
func (x Int16x32) Abs() Int16x32
// Abs computes the absolute value of each element.
// Abs computes the absolute value of each element.
//
-// Asm: VPABSD, CPU Feature: AVX512F
+// Asm: VPABSD, CPU Feature: AVX512
func (x Int32x16) Abs() Int32x16
// Abs computes the absolute value of each element.
//
-// Asm: VPABSQ, CPU Feature: AVX512F
+// Asm: VPABSQ, CPU Feature: AVX512
func (x Int64x2) Abs() Int64x2
// Abs computes the absolute value of each element.
//
-// Asm: VPABSQ, CPU Feature: AVX512F
+// Asm: VPABSQ, CPU Feature: AVX512
func (x Int64x4) Abs() Int64x4
// Abs computes the absolute value of each element.
//
-// Asm: VPABSQ, CPU Feature: AVX512F
+// Asm: VPABSQ, CPU Feature: AVX512
func (x Int64x8) Abs() Int64x8
/* AbsMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPABSB, CPU Feature: AVX512BW
+// Asm: VPABSB, CPU Feature: AVX512
func (x Int8x16) AbsMasked(mask Mask8x16) Int8x16
// AbsMasked computes the absolute value of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPABSB, CPU Feature: AVX512BW
+// Asm: VPABSB, CPU Feature: AVX512
func (x Int8x32) AbsMasked(mask Mask8x32) Int8x32
// AbsMasked computes the absolute value of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPABSB, CPU Feature: AVX512BW
+// Asm: VPABSB, CPU Feature: AVX512
func (x Int8x64) AbsMasked(mask Mask8x64) Int8x64
// AbsMasked computes the absolute value of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPABSW, CPU Feature: AVX512BW
+// Asm: VPABSW, CPU Feature: AVX512
func (x Int16x8) AbsMasked(mask Mask16x8) Int16x8
// AbsMasked computes the absolute value of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPABSW, CPU Feature: AVX512BW
+// Asm: VPABSW, CPU Feature: AVX512
func (x Int16x16) AbsMasked(mask Mask16x16) Int16x16
// AbsMasked computes the absolute value of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPABSW, CPU Feature: AVX512BW
+// Asm: VPABSW, CPU Feature: AVX512
func (x Int16x32) AbsMasked(mask Mask16x32) Int16x32
// AbsMasked computes the absolute value of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPABSD, CPU Feature: AVX512F
+// Asm: VPABSD, CPU Feature: AVX512
func (x Int32x4) AbsMasked(mask Mask32x4) Int32x4
// AbsMasked computes the absolute value of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPABSD, CPU Feature: AVX512F
+// Asm: VPABSD, CPU Feature: AVX512
func (x Int32x8) AbsMasked(mask Mask32x8) Int32x8
// AbsMasked computes the absolute value of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPABSD, CPU Feature: AVX512F
+// Asm: VPABSD, CPU Feature: AVX512
func (x Int32x16) AbsMasked(mask Mask32x16) Int32x16
// AbsMasked computes the absolute value of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPABSQ, CPU Feature: AVX512F
+// Asm: VPABSQ, CPU Feature: AVX512
func (x Int64x2) AbsMasked(mask Mask64x2) Int64x2
// AbsMasked computes the absolute value of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPABSQ, CPU Feature: AVX512F
+// Asm: VPABSQ, CPU Feature: AVX512
func (x Int64x4) AbsMasked(mask Mask64x4) Int64x4
// AbsMasked computes the absolute value of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPABSQ, CPU Feature: AVX512F
+// Asm: VPABSQ, CPU Feature: AVX512
func (x Int64x8) AbsMasked(mask Mask64x8) Int64x8
/* Add */
// Add adds corresponding elements of two vectors.
//
-// Asm: VADDPS, CPU Feature: AVX512F
+// Asm: VADDPS, CPU Feature: AVX512
func (x Float32x16) Add(y Float32x16) Float32x16
// Add adds corresponding elements of two vectors.
// Add adds corresponding elements of two vectors.
//
-// Asm: VADDPD, CPU Feature: AVX512F
+// Asm: VADDPD, CPU Feature: AVX512
func (x Float64x8) Add(y Float64x8) Float64x8
// Add adds corresponding elements of two vectors.
// Add adds corresponding elements of two vectors.
//
-// Asm: VPADDB, CPU Feature: AVX512BW
+// Asm: VPADDB, CPU Feature: AVX512
func (x Int8x64) Add(y Int8x64) Int8x64
// Add adds corresponding elements of two vectors.
// Add adds corresponding elements of two vectors.
//
-// Asm: VPADDW, CPU Feature: AVX512BW
+// Asm: VPADDW, CPU Feature: AVX512
func (x Int16x32) Add(y Int16x32) Int16x32
// Add adds corresponding elements of two vectors.
// Add adds corresponding elements of two vectors.
//
-// Asm: VPADDD, CPU Feature: AVX512F
+// Asm: VPADDD, CPU Feature: AVX512
func (x Int32x16) Add(y Int32x16) Int32x16
// Add adds corresponding elements of two vectors.
// Add adds corresponding elements of two vectors.
//
-// Asm: VPADDQ, CPU Feature: AVX512F
+// Asm: VPADDQ, CPU Feature: AVX512
func (x Int64x8) Add(y Int64x8) Int64x8
// Add adds corresponding elements of two vectors.
// Add adds corresponding elements of two vectors.
//
-// Asm: VPADDB, CPU Feature: AVX512BW
+// Asm: VPADDB, CPU Feature: AVX512
func (x Uint8x64) Add(y Uint8x64) Uint8x64
// Add adds corresponding elements of two vectors.
// Add adds corresponding elements of two vectors.
//
-// Asm: VPADDW, CPU Feature: AVX512BW
+// Asm: VPADDW, CPU Feature: AVX512
func (x Uint16x32) Add(y Uint16x32) Uint16x32
// Add adds corresponding elements of two vectors.
// Add adds corresponding elements of two vectors.
//
-// Asm: VPADDD, CPU Feature: AVX512F
+// Asm: VPADDD, CPU Feature: AVX512
func (x Uint32x16) Add(y Uint32x16) Uint32x16
// Add adds corresponding elements of two vectors.
// Add adds corresponding elements of two vectors.
//
-// Asm: VPADDQ, CPU Feature: AVX512F
+// Asm: VPADDQ, CPU Feature: AVX512
func (x Uint64x8) Add(y Uint64x8) Uint64x8
/* AddDotProdPairsSaturated */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VADDPS, CPU Feature: AVX512F
+// Asm: VADDPS, CPU Feature: AVX512
func (x Float32x4) AddMasked(y Float32x4, mask Mask32x4) Float32x4
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VADDPS, CPU Feature: AVX512F
+// Asm: VADDPS, CPU Feature: AVX512
func (x Float32x8) AddMasked(y Float32x8, mask Mask32x8) Float32x8
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VADDPS, CPU Feature: AVX512F
+// Asm: VADDPS, CPU Feature: AVX512
func (x Float32x16) AddMasked(y Float32x16, mask Mask32x16) Float32x16
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VADDPD, CPU Feature: AVX512F
+// Asm: VADDPD, CPU Feature: AVX512
func (x Float64x2) AddMasked(y Float64x2, mask Mask64x2) Float64x2
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VADDPD, CPU Feature: AVX512F
+// Asm: VADDPD, CPU Feature: AVX512
func (x Float64x4) AddMasked(y Float64x4, mask Mask64x4) Float64x4
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VADDPD, CPU Feature: AVX512F
+// Asm: VADDPD, CPU Feature: AVX512
func (x Float64x8) AddMasked(y Float64x8, mask Mask64x8) Float64x8
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDB, CPU Feature: AVX512BW
+// Asm: VPADDB, CPU Feature: AVX512
func (x Int8x16) AddMasked(y Int8x16, mask Mask8x16) Int8x16
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDB, CPU Feature: AVX512BW
+// Asm: VPADDB, CPU Feature: AVX512
func (x Int8x32) AddMasked(y Int8x32, mask Mask8x32) Int8x32
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDB, CPU Feature: AVX512BW
+// Asm: VPADDB, CPU Feature: AVX512
func (x Int8x64) AddMasked(y Int8x64, mask Mask8x64) Int8x64
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDW, CPU Feature: AVX512BW
+// Asm: VPADDW, CPU Feature: AVX512
func (x Int16x8) AddMasked(y Int16x8, mask Mask16x8) Int16x8
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDW, CPU Feature: AVX512BW
+// Asm: VPADDW, CPU Feature: AVX512
func (x Int16x16) AddMasked(y Int16x16, mask Mask16x16) Int16x16
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDW, CPU Feature: AVX512BW
+// Asm: VPADDW, CPU Feature: AVX512
func (x Int16x32) AddMasked(y Int16x32, mask Mask16x32) Int16x32
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDD, CPU Feature: AVX512F
+// Asm: VPADDD, CPU Feature: AVX512
func (x Int32x4) AddMasked(y Int32x4, mask Mask32x4) Int32x4
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDD, CPU Feature: AVX512F
+// Asm: VPADDD, CPU Feature: AVX512
func (x Int32x8) AddMasked(y Int32x8, mask Mask32x8) Int32x8
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDD, CPU Feature: AVX512F
+// Asm: VPADDD, CPU Feature: AVX512
func (x Int32x16) AddMasked(y Int32x16, mask Mask32x16) Int32x16
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDQ, CPU Feature: AVX512F
+// Asm: VPADDQ, CPU Feature: AVX512
func (x Int64x2) AddMasked(y Int64x2, mask Mask64x2) Int64x2
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDQ, CPU Feature: AVX512F
+// Asm: VPADDQ, CPU Feature: AVX512
func (x Int64x4) AddMasked(y Int64x4, mask Mask64x4) Int64x4
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDQ, CPU Feature: AVX512F
+// Asm: VPADDQ, CPU Feature: AVX512
func (x Int64x8) AddMasked(y Int64x8, mask Mask64x8) Int64x8
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDB, CPU Feature: AVX512BW
+// Asm: VPADDB, CPU Feature: AVX512
func (x Uint8x16) AddMasked(y Uint8x16, mask Mask8x16) Uint8x16
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDB, CPU Feature: AVX512BW
+// Asm: VPADDB, CPU Feature: AVX512
func (x Uint8x32) AddMasked(y Uint8x32, mask Mask8x32) Uint8x32
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDB, CPU Feature: AVX512BW
+// Asm: VPADDB, CPU Feature: AVX512
func (x Uint8x64) AddMasked(y Uint8x64, mask Mask8x64) Uint8x64
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDW, CPU Feature: AVX512BW
+// Asm: VPADDW, CPU Feature: AVX512
func (x Uint16x8) AddMasked(y Uint16x8, mask Mask16x8) Uint16x8
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDW, CPU Feature: AVX512BW
+// Asm: VPADDW, CPU Feature: AVX512
func (x Uint16x16) AddMasked(y Uint16x16, mask Mask16x16) Uint16x16
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDW, CPU Feature: AVX512BW
+// Asm: VPADDW, CPU Feature: AVX512
func (x Uint16x32) AddMasked(y Uint16x32, mask Mask16x32) Uint16x32
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDD, CPU Feature: AVX512F
+// Asm: VPADDD, CPU Feature: AVX512
func (x Uint32x4) AddMasked(y Uint32x4, mask Mask32x4) Uint32x4
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDD, CPU Feature: AVX512F
+// Asm: VPADDD, CPU Feature: AVX512
func (x Uint32x8) AddMasked(y Uint32x8, mask Mask32x8) Uint32x8
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDD, CPU Feature: AVX512F
+// Asm: VPADDD, CPU Feature: AVX512
func (x Uint32x16) AddMasked(y Uint32x16, mask Mask32x16) Uint32x16
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDQ, CPU Feature: AVX512F
+// Asm: VPADDQ, CPU Feature: AVX512
func (x Uint64x2) AddMasked(y Uint64x2, mask Mask64x2) Uint64x2
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDQ, CPU Feature: AVX512F
+// Asm: VPADDQ, CPU Feature: AVX512
func (x Uint64x4) AddMasked(y Uint64x4, mask Mask64x4) Uint64x4
// AddMasked adds corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDQ, CPU Feature: AVX512F
+// Asm: VPADDQ, CPU Feature: AVX512
func (x Uint64x8) AddMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* AddPairs */
// AddSaturated adds corresponding elements of two vectors with saturation.
//
-// Asm: VPADDSB, CPU Feature: AVX512BW
+// Asm: VPADDSB, CPU Feature: AVX512
func (x Int8x64) AddSaturated(y Int8x64) Int8x64
// AddSaturated adds corresponding elements of two vectors with saturation.
// AddSaturated adds corresponding elements of two vectors with saturation.
//
-// Asm: VPADDSW, CPU Feature: AVX512BW
+// Asm: VPADDSW, CPU Feature: AVX512
func (x Int16x32) AddSaturated(y Int16x32) Int16x32
// AddSaturated adds corresponding elements of two vectors with saturation.
// AddSaturated adds corresponding elements of two vectors with saturation.
//
-// Asm: VPADDUSB, CPU Feature: AVX512BW
+// Asm: VPADDUSB, CPU Feature: AVX512
func (x Uint8x64) AddSaturated(y Uint8x64) Uint8x64
// AddSaturated adds corresponding elements of two vectors with saturation.
// AddSaturated adds corresponding elements of two vectors with saturation.
//
-// Asm: VPADDUSW, CPU Feature: AVX512BW
+// Asm: VPADDUSW, CPU Feature: AVX512
func (x Uint16x32) AddSaturated(y Uint16x32) Uint16x32
/* AddSaturatedMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDSB, CPU Feature: AVX512BW
+// Asm: VPADDSB, CPU Feature: AVX512
func (x Int8x16) AddSaturatedMasked(y Int8x16, mask Mask8x16) Int8x16
// AddSaturatedMasked adds corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDSB, CPU Feature: AVX512BW
+// Asm: VPADDSB, CPU Feature: AVX512
func (x Int8x32) AddSaturatedMasked(y Int8x32, mask Mask8x32) Int8x32
// AddSaturatedMasked adds corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDSB, CPU Feature: AVX512BW
+// Asm: VPADDSB, CPU Feature: AVX512
func (x Int8x64) AddSaturatedMasked(y Int8x64, mask Mask8x64) Int8x64
// AddSaturatedMasked adds corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDSW, CPU Feature: AVX512BW
+// Asm: VPADDSW, CPU Feature: AVX512
func (x Int16x8) AddSaturatedMasked(y Int16x8, mask Mask16x8) Int16x8
// AddSaturatedMasked adds corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDSW, CPU Feature: AVX512BW
+// Asm: VPADDSW, CPU Feature: AVX512
func (x Int16x16) AddSaturatedMasked(y Int16x16, mask Mask16x16) Int16x16
// AddSaturatedMasked adds corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDSW, CPU Feature: AVX512BW
+// Asm: VPADDSW, CPU Feature: AVX512
func (x Int16x32) AddSaturatedMasked(y Int16x32, mask Mask16x32) Int16x32
// AddSaturatedMasked adds corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDUSB, CPU Feature: AVX512BW
+// Asm: VPADDUSB, CPU Feature: AVX512
func (x Uint8x16) AddSaturatedMasked(y Uint8x16, mask Mask8x16) Uint8x16
// AddSaturatedMasked adds corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDUSB, CPU Feature: AVX512BW
+// Asm: VPADDUSB, CPU Feature: AVX512
func (x Uint8x32) AddSaturatedMasked(y Uint8x32, mask Mask8x32) Uint8x32
// AddSaturatedMasked adds corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDUSB, CPU Feature: AVX512BW
+// Asm: VPADDUSB, CPU Feature: AVX512
func (x Uint8x64) AddSaturatedMasked(y Uint8x64, mask Mask8x64) Uint8x64
// AddSaturatedMasked adds corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDUSW, CPU Feature: AVX512BW
+// Asm: VPADDUSW, CPU Feature: AVX512
func (x Uint16x8) AddSaturatedMasked(y Uint16x8, mask Mask16x8) Uint16x8
// AddSaturatedMasked adds corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDUSW, CPU Feature: AVX512BW
+// Asm: VPADDUSW, CPU Feature: AVX512
func (x Uint16x16) AddSaturatedMasked(y Uint16x16, mask Mask16x16) Uint16x16
// AddSaturatedMasked adds corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPADDUSW, CPU Feature: AVX512BW
+// Asm: VPADDUSW, CPU Feature: AVX512
func (x Uint16x32) AddSaturatedMasked(y Uint16x32, mask Mask16x32) Uint16x32
/* AddSub */
// And performs a bitwise AND operation between two vectors.
//
-// Asm: VPANDD, CPU Feature: AVX512F
+// Asm: VPANDD, CPU Feature: AVX512
func (x Int8x64) And(y Int8x64) Int8x64
// And performs a bitwise AND operation between two vectors.
// And performs a bitwise AND operation between two vectors.
//
-// Asm: VPANDD, CPU Feature: AVX512F
+// Asm: VPANDD, CPU Feature: AVX512
func (x Int16x32) And(y Int16x32) Int16x32
// And performs a bitwise AND operation between two vectors.
// And performs a bitwise AND operation between two vectors.
//
-// Asm: VPANDD, CPU Feature: AVX512F
+// Asm: VPANDD, CPU Feature: AVX512
func (x Int32x16) And(y Int32x16) Int32x16
// And performs a bitwise AND operation between two vectors.
// And performs a bitwise AND operation between two vectors.
//
-// Asm: VPANDQ, CPU Feature: AVX512F
+// Asm: VPANDQ, CPU Feature: AVX512
func (x Int64x8) And(y Int64x8) Int64x8
// And performs a bitwise AND operation between two vectors.
// And performs a bitwise AND operation between two vectors.
//
-// Asm: VPANDD, CPU Feature: AVX512F
+// Asm: VPANDD, CPU Feature: AVX512
func (x Uint8x64) And(y Uint8x64) Uint8x64
// And performs a bitwise AND operation between two vectors.
// And performs a bitwise AND operation between two vectors.
//
-// Asm: VPANDD, CPU Feature: AVX512F
+// Asm: VPANDD, CPU Feature: AVX512
func (x Uint16x32) And(y Uint16x32) Uint16x32
// And performs a bitwise AND operation between two vectors.
// And performs a bitwise AND operation between two vectors.
//
-// Asm: VPANDD, CPU Feature: AVX512F
+// Asm: VPANDD, CPU Feature: AVX512
func (x Uint32x16) And(y Uint32x16) Uint32x16
// And performs a bitwise AND operation between two vectors.
// And performs a bitwise AND operation between two vectors.
//
-// Asm: VPANDQ, CPU Feature: AVX512F
+// Asm: VPANDQ, CPU Feature: AVX512
func (x Uint64x8) And(y Uint64x8) Uint64x8
/* AndMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDD, CPU Feature: AVX512F
+// Asm: VPANDD, CPU Feature: AVX512
func (x Int32x4) AndMasked(y Int32x4, mask Mask32x4) Int32x4
// AndMasked performs a bitwise AND operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDD, CPU Feature: AVX512F
+// Asm: VPANDD, CPU Feature: AVX512
func (x Int32x8) AndMasked(y Int32x8, mask Mask32x8) Int32x8
// AndMasked performs a bitwise AND operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDD, CPU Feature: AVX512F
+// Asm: VPANDD, CPU Feature: AVX512
func (x Int32x16) AndMasked(y Int32x16, mask Mask32x16) Int32x16
// AndMasked performs a bitwise AND operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDQ, CPU Feature: AVX512F
+// Asm: VPANDQ, CPU Feature: AVX512
func (x Int64x2) AndMasked(y Int64x2, mask Mask64x2) Int64x2
// AndMasked performs a bitwise AND operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDQ, CPU Feature: AVX512F
+// Asm: VPANDQ, CPU Feature: AVX512
func (x Int64x4) AndMasked(y Int64x4, mask Mask64x4) Int64x4
// AndMasked performs a bitwise AND operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDQ, CPU Feature: AVX512F
+// Asm: VPANDQ, CPU Feature: AVX512
func (x Int64x8) AndMasked(y Int64x8, mask Mask64x8) Int64x8
// AndMasked performs a bitwise AND operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDD, CPU Feature: AVX512F
+// Asm: VPANDD, CPU Feature: AVX512
func (x Uint32x4) AndMasked(y Uint32x4, mask Mask32x4) Uint32x4
// AndMasked performs a bitwise AND operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDD, CPU Feature: AVX512F
+// Asm: VPANDD, CPU Feature: AVX512
func (x Uint32x8) AndMasked(y Uint32x8, mask Mask32x8) Uint32x8
// AndMasked performs a bitwise AND operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDD, CPU Feature: AVX512F
+// Asm: VPANDD, CPU Feature: AVX512
func (x Uint32x16) AndMasked(y Uint32x16, mask Mask32x16) Uint32x16
// AndMasked performs a bitwise AND operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDQ, CPU Feature: AVX512F
+// Asm: VPANDQ, CPU Feature: AVX512
func (x Uint64x2) AndMasked(y Uint64x2, mask Mask64x2) Uint64x2
// AndMasked performs a bitwise AND operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDQ, CPU Feature: AVX512F
+// Asm: VPANDQ, CPU Feature: AVX512
func (x Uint64x4) AndMasked(y Uint64x4, mask Mask64x4) Uint64x4
// AndMasked performs a bitwise AND operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDQ, CPU Feature: AVX512F
+// Asm: VPANDQ, CPU Feature: AVX512
func (x Uint64x8) AndMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* AndNot */
// AndNot performs a bitwise x &^ y.
//
-// Asm: VPANDND, CPU Feature: AVX512F
+// Asm: VPANDND, CPU Feature: AVX512
func (x Int8x64) AndNot(y Int8x64) Int8x64
// AndNot performs a bitwise x &^ y.
// AndNot performs a bitwise x &^ y.
//
-// Asm: VPANDND, CPU Feature: AVX512F
+// Asm: VPANDND, CPU Feature: AVX512
func (x Int16x32) AndNot(y Int16x32) Int16x32
// AndNot performs a bitwise x &^ y.
// AndNot performs a bitwise x &^ y.
//
-// Asm: VPANDND, CPU Feature: AVX512F
+// Asm: VPANDND, CPU Feature: AVX512
func (x Int32x16) AndNot(y Int32x16) Int32x16
// AndNot performs a bitwise x &^ y.
// AndNot performs a bitwise x &^ y.
//
-// Asm: VPANDNQ, CPU Feature: AVX512F
+// Asm: VPANDNQ, CPU Feature: AVX512
func (x Int64x8) AndNot(y Int64x8) Int64x8
// AndNot performs a bitwise x &^ y.
// AndNot performs a bitwise x &^ y.
//
-// Asm: VPANDND, CPU Feature: AVX512F
+// Asm: VPANDND, CPU Feature: AVX512
func (x Uint8x64) AndNot(y Uint8x64) Uint8x64
// AndNot performs a bitwise x &^ y.
// AndNot performs a bitwise x &^ y.
//
-// Asm: VPANDND, CPU Feature: AVX512F
+// Asm: VPANDND, CPU Feature: AVX512
func (x Uint16x32) AndNot(y Uint16x32) Uint16x32
// AndNot performs a bitwise x &^ y.
// AndNot performs a bitwise x &^ y.
//
-// Asm: VPANDND, CPU Feature: AVX512F
+// Asm: VPANDND, CPU Feature: AVX512
func (x Uint32x16) AndNot(y Uint32x16) Uint32x16
// AndNot performs a bitwise x &^ y.
// AndNot performs a bitwise x &^ y.
//
-// Asm: VPANDNQ, CPU Feature: AVX512F
+// Asm: VPANDNQ, CPU Feature: AVX512
func (x Uint64x8) AndNot(y Uint64x8) Uint64x8
/* AndNotMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDND, CPU Feature: AVX512F
+// Asm: VPANDND, CPU Feature: AVX512
func (x Int32x4) AndNotMasked(y Int32x4, mask Mask32x4) Int32x4
// AndNotMasked performs a bitwise x &^ y.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDND, CPU Feature: AVX512F
+// Asm: VPANDND, CPU Feature: AVX512
func (x Int32x8) AndNotMasked(y Int32x8, mask Mask32x8) Int32x8
// AndNotMasked performs a bitwise x &^ y.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDND, CPU Feature: AVX512F
+// Asm: VPANDND, CPU Feature: AVX512
func (x Int32x16) AndNotMasked(y Int32x16, mask Mask32x16) Int32x16
// AndNotMasked performs a bitwise x &^ y.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDNQ, CPU Feature: AVX512F
+// Asm: VPANDNQ, CPU Feature: AVX512
func (x Int64x2) AndNotMasked(y Int64x2, mask Mask64x2) Int64x2
// AndNotMasked performs a bitwise x &^ y.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDNQ, CPU Feature: AVX512F
+// Asm: VPANDNQ, CPU Feature: AVX512
func (x Int64x4) AndNotMasked(y Int64x4, mask Mask64x4) Int64x4
// AndNotMasked performs a bitwise x &^ y.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDNQ, CPU Feature: AVX512F
+// Asm: VPANDNQ, CPU Feature: AVX512
func (x Int64x8) AndNotMasked(y Int64x8, mask Mask64x8) Int64x8
// AndNotMasked performs a bitwise x &^ y.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDND, CPU Feature: AVX512F
+// Asm: VPANDND, CPU Feature: AVX512
func (x Uint32x4) AndNotMasked(y Uint32x4, mask Mask32x4) Uint32x4
// AndNotMasked performs a bitwise x &^ y.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDND, CPU Feature: AVX512F
+// Asm: VPANDND, CPU Feature: AVX512
func (x Uint32x8) AndNotMasked(y Uint32x8, mask Mask32x8) Uint32x8
// AndNotMasked performs a bitwise x &^ y.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDND, CPU Feature: AVX512F
+// Asm: VPANDND, CPU Feature: AVX512
func (x Uint32x16) AndNotMasked(y Uint32x16, mask Mask32x16) Uint32x16
// AndNotMasked performs a bitwise x &^ y.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDNQ, CPU Feature: AVX512F
+// Asm: VPANDNQ, CPU Feature: AVX512
func (x Uint64x2) AndNotMasked(y Uint64x2, mask Mask64x2) Uint64x2
// AndNotMasked performs a bitwise x &^ y.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDNQ, CPU Feature: AVX512F
+// Asm: VPANDNQ, CPU Feature: AVX512
func (x Uint64x4) AndNotMasked(y Uint64x4, mask Mask64x4) Uint64x4
// AndNotMasked performs a bitwise x &^ y.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPANDNQ, CPU Feature: AVX512F
+// Asm: VPANDNQ, CPU Feature: AVX512
func (x Uint64x8) AndNotMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* Average */
// Average computes the rounded average of corresponding elements.
//
-// Asm: VPAVGB, CPU Feature: AVX512BW
+// Asm: VPAVGB, CPU Feature: AVX512
func (x Uint8x64) Average(y Uint8x64) Uint8x64
// Average computes the rounded average of corresponding elements.
// Average computes the rounded average of corresponding elements.
//
-// Asm: VPAVGW, CPU Feature: AVX512BW
+// Asm: VPAVGW, CPU Feature: AVX512
func (x Uint16x32) Average(y Uint16x32) Uint16x32
/* AverageMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPAVGB, CPU Feature: AVX512BW
+// Asm: VPAVGB, CPU Feature: AVX512
func (x Uint8x16) AverageMasked(y Uint8x16, mask Mask8x16) Uint8x16
// AverageMasked computes the rounded average of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPAVGB, CPU Feature: AVX512BW
+// Asm: VPAVGB, CPU Feature: AVX512
func (x Uint8x32) AverageMasked(y Uint8x32, mask Mask8x32) Uint8x32
// AverageMasked computes the rounded average of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPAVGB, CPU Feature: AVX512BW
+// Asm: VPAVGB, CPU Feature: AVX512
func (x Uint8x64) AverageMasked(y Uint8x64, mask Mask8x64) Uint8x64
// AverageMasked computes the rounded average of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPAVGW, CPU Feature: AVX512BW
+// Asm: VPAVGW, CPU Feature: AVX512
func (x Uint16x8) AverageMasked(y Uint16x8, mask Mask16x8) Uint16x8
// AverageMasked computes the rounded average of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPAVGW, CPU Feature: AVX512BW
+// Asm: VPAVGW, CPU Feature: AVX512
func (x Uint16x16) AverageMasked(y Uint16x16, mask Mask16x16) Uint16x16
// AverageMasked computes the rounded average of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPAVGW, CPU Feature: AVX512BW
+// Asm: VPAVGW, CPU Feature: AVX512
func (x Uint16x32) AverageMasked(y Uint16x32, mask Mask16x32) Uint16x32
/* Ceil */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x4) CeilScaled(prec uint8) Float32x4
// CeilScaled rounds elements up with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x8) CeilScaled(prec uint8) Float32x8
// CeilScaled rounds elements up with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x16) CeilScaled(prec uint8) Float32x16
// CeilScaled rounds elements up with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x2) CeilScaled(prec uint8) Float64x2
// CeilScaled rounds elements up with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x4) CeilScaled(prec uint8) Float64x4
// CeilScaled rounds elements up with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x8) CeilScaled(prec uint8) Float64x8
/* CeilScaledMasked */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x4) CeilScaledMasked(prec uint8, mask Mask32x4) Float32x4
// CeilScaledMasked rounds elements up with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x8) CeilScaledMasked(prec uint8, mask Mask32x8) Float32x8
// CeilScaledMasked rounds elements up with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x16) CeilScaledMasked(prec uint8, mask Mask32x16) Float32x16
// CeilScaledMasked rounds elements up with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x2) CeilScaledMasked(prec uint8, mask Mask64x2) Float64x2
// CeilScaledMasked rounds elements up with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x4) CeilScaledMasked(prec uint8, mask Mask64x4) Float64x4
// CeilScaledMasked rounds elements up with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x8) CeilScaledMasked(prec uint8, mask Mask64x8) Float64x8
/* CeilScaledResidue */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x4) CeilScaledResidue(prec uint8) Float32x4
// CeilScaledResidue computes the difference after ceiling with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x8) CeilScaledResidue(prec uint8) Float32x8
// CeilScaledResidue computes the difference after ceiling with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x16) CeilScaledResidue(prec uint8) Float32x16
// CeilScaledResidue computes the difference after ceiling with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x2) CeilScaledResidue(prec uint8) Float64x2
// CeilScaledResidue computes the difference after ceiling with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x4) CeilScaledResidue(prec uint8) Float64x4
// CeilScaledResidue computes the difference after ceiling with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x8) CeilScaledResidue(prec uint8) Float64x8
/* CeilScaledResidueMasked */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x4) CeilScaledResidueMasked(prec uint8, mask Mask32x4) Float32x4
// CeilScaledResidueMasked computes the difference after ceiling with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x8) CeilScaledResidueMasked(prec uint8, mask Mask32x8) Float32x8
// CeilScaledResidueMasked computes the difference after ceiling with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x16) CeilScaledResidueMasked(prec uint8, mask Mask32x16) Float32x16
// CeilScaledResidueMasked computes the difference after ceiling with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x2) CeilScaledResidueMasked(prec uint8, mask Mask64x2) Float64x2
// CeilScaledResidueMasked computes the difference after ceiling with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x4) CeilScaledResidueMasked(prec uint8, mask Mask64x4) Float64x4
// CeilScaledResidueMasked computes the difference after ceiling with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x8) CeilScaledResidueMasked(prec uint8, mask Mask64x8) Float64x8
/* Compress */
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VCOMPRESSPS, CPU Feature: AVX512F
+// Asm: VCOMPRESSPS, CPU Feature: AVX512
func (x Float32x4) Compress(mask Mask32x4) Float32x4
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VCOMPRESSPS, CPU Feature: AVX512F
+// Asm: VCOMPRESSPS, CPU Feature: AVX512
func (x Float32x8) Compress(mask Mask32x8) Float32x8
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VCOMPRESSPS, CPU Feature: AVX512F
+// Asm: VCOMPRESSPS, CPU Feature: AVX512
func (x Float32x16) Compress(mask Mask32x16) Float32x16
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VCOMPRESSPD, CPU Feature: AVX512F
+// Asm: VCOMPRESSPD, CPU Feature: AVX512
func (x Float64x2) Compress(mask Mask64x2) Float64x2
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VCOMPRESSPD, CPU Feature: AVX512F
+// Asm: VCOMPRESSPD, CPU Feature: AVX512
func (x Float64x4) Compress(mask Mask64x4) Float64x4
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VCOMPRESSPD, CPU Feature: AVX512F
+// Asm: VCOMPRESSPD, CPU Feature: AVX512
func (x Float64x8) Compress(mask Mask64x8) Float64x8
// Compress performs a compression on vector x using mask by
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VPCOMPRESSD, CPU Feature: AVX512F
+// Asm: VPCOMPRESSD, CPU Feature: AVX512
func (x Int32x4) Compress(mask Mask32x4) Int32x4
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VPCOMPRESSD, CPU Feature: AVX512F
+// Asm: VPCOMPRESSD, CPU Feature: AVX512
func (x Int32x8) Compress(mask Mask32x8) Int32x8
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VPCOMPRESSD, CPU Feature: AVX512F
+// Asm: VPCOMPRESSD, CPU Feature: AVX512
func (x Int32x16) Compress(mask Mask32x16) Int32x16
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VPCOMPRESSQ, CPU Feature: AVX512F
+// Asm: VPCOMPRESSQ, CPU Feature: AVX512
func (x Int64x2) Compress(mask Mask64x2) Int64x2
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VPCOMPRESSQ, CPU Feature: AVX512F
+// Asm: VPCOMPRESSQ, CPU Feature: AVX512
func (x Int64x4) Compress(mask Mask64x4) Int64x4
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VPCOMPRESSQ, CPU Feature: AVX512F
+// Asm: VPCOMPRESSQ, CPU Feature: AVX512
func (x Int64x8) Compress(mask Mask64x8) Int64x8
// Compress performs a compression on vector x using mask by
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VPCOMPRESSD, CPU Feature: AVX512F
+// Asm: VPCOMPRESSD, CPU Feature: AVX512
func (x Uint32x4) Compress(mask Mask32x4) Uint32x4
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VPCOMPRESSD, CPU Feature: AVX512F
+// Asm: VPCOMPRESSD, CPU Feature: AVX512
func (x Uint32x8) Compress(mask Mask32x8) Uint32x8
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VPCOMPRESSD, CPU Feature: AVX512F
+// Asm: VPCOMPRESSD, CPU Feature: AVX512
func (x Uint32x16) Compress(mask Mask32x16) Uint32x16
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VPCOMPRESSQ, CPU Feature: AVX512F
+// Asm: VPCOMPRESSQ, CPU Feature: AVX512
func (x Uint64x2) Compress(mask Mask64x2) Uint64x2
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VPCOMPRESSQ, CPU Feature: AVX512F
+// Asm: VPCOMPRESSQ, CPU Feature: AVX512
func (x Uint64x4) Compress(mask Mask64x4) Uint64x4
// Compress performs a compression on vector x using mask by
// selecting elements as indicated by mask, and pack them to lower indexed elements.
//
-// Asm: VPCOMPRESSQ, CPU Feature: AVX512F
+// Asm: VPCOMPRESSQ, CPU Feature: AVX512
func (x Uint64x8) Compress(mask Mask64x8) Uint64x8
/* ConvertToInt32 */
// ConvertToInt32 converts element values to int32.
//
-// Asm: VCVTTPS2DQ, CPU Feature: AVX512F
+// Asm: VCVTTPS2DQ, CPU Feature: AVX512
func (x Float32x16) ConvertToInt32() Int32x16
/* ConvertToInt32Masked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCVTTPS2DQ, CPU Feature: AVX512F
+// Asm: VCVTTPS2DQ, CPU Feature: AVX512
func (x Float32x4) ConvertToInt32Masked(mask Mask32x4) Int32x4
// ConvertToInt32 converts element values to int32.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCVTTPS2DQ, CPU Feature: AVX512F
+// Asm: VCVTTPS2DQ, CPU Feature: AVX512
func (x Float32x8) ConvertToInt32Masked(mask Mask32x8) Int32x8
// ConvertToInt32 converts element values to int32.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCVTTPS2DQ, CPU Feature: AVX512F
+// Asm: VCVTTPS2DQ, CPU Feature: AVX512
func (x Float32x16) ConvertToInt32Masked(mask Mask32x16) Int32x16
/* ConvertToUint32 */
// ConvertToUint32Masked converts element values to uint32.
//
-// Asm: VCVTPS2UDQ, CPU Feature: AVX512F
+// Asm: VCVTPS2UDQ, CPU Feature: AVX512
func (x Float32x4) ConvertToUint32() Uint32x4
// ConvertToUint32Masked converts element values to uint32.
//
-// Asm: VCVTPS2UDQ, CPU Feature: AVX512F
+// Asm: VCVTPS2UDQ, CPU Feature: AVX512
func (x Float32x8) ConvertToUint32() Uint32x8
// ConvertToUint32Masked converts element values to uint32.
//
-// Asm: VCVTPS2UDQ, CPU Feature: AVX512F
+// Asm: VCVTPS2UDQ, CPU Feature: AVX512
func (x Float32x16) ConvertToUint32() Uint32x16
/* ConvertToUint32Masked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCVTPS2UDQ, CPU Feature: AVX512F
+// Asm: VCVTPS2UDQ, CPU Feature: AVX512
func (x Float32x4) ConvertToUint32Masked(mask Mask32x4) Uint32x4
// ConvertToUint32Masked converts element values to uint32.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCVTPS2UDQ, CPU Feature: AVX512F
+// Asm: VCVTPS2UDQ, CPU Feature: AVX512
func (x Float32x8) ConvertToUint32Masked(mask Mask32x8) Uint32x8
// ConvertToUint32Masked converts element values to uint32.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCVTPS2UDQ, CPU Feature: AVX512F
+// Asm: VCVTPS2UDQ, CPU Feature: AVX512
func (x Float32x16) ConvertToUint32Masked(mask Mask32x16) Uint32x16
/* CopySign */
// Div divides elements of two vectors.
//
-// Asm: VDIVPS, CPU Feature: AVX512F
+// Asm: VDIVPS, CPU Feature: AVX512
func (x Float32x16) Div(y Float32x16) Float32x16
// Div divides elements of two vectors.
// Div divides elements of two vectors.
//
-// Asm: VDIVPD, CPU Feature: AVX512F
+// Asm: VDIVPD, CPU Feature: AVX512
func (x Float64x8) Div(y Float64x8) Float64x8
/* DivMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VDIVPS, CPU Feature: AVX512F
+// Asm: VDIVPS, CPU Feature: AVX512
func (x Float32x4) DivMasked(y Float32x4, mask Mask32x4) Float32x4
// DivMasked divides elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VDIVPS, CPU Feature: AVX512F
+// Asm: VDIVPS, CPU Feature: AVX512
func (x Float32x8) DivMasked(y Float32x8, mask Mask32x8) Float32x8
// DivMasked divides elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VDIVPS, CPU Feature: AVX512F
+// Asm: VDIVPS, CPU Feature: AVX512
func (x Float32x16) DivMasked(y Float32x16, mask Mask32x16) Float32x16
// DivMasked divides elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VDIVPD, CPU Feature: AVX512F
+// Asm: VDIVPD, CPU Feature: AVX512
func (x Float64x2) DivMasked(y Float64x2, mask Mask64x2) Float64x2
// DivMasked divides elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VDIVPD, CPU Feature: AVX512F
+// Asm: VDIVPD, CPU Feature: AVX512
func (x Float64x4) DivMasked(y Float64x4, mask Mask64x4) Float64x4
// DivMasked divides elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VDIVPD, CPU Feature: AVX512F
+// Asm: VDIVPD, CPU Feature: AVX512
func (x Float64x8) DivMasked(y Float64x8, mask Mask64x8) Float64x8
/* DotProdPairs */
// DotProdPairs multiplies the elements and add the pairs together,
// yielding a vector of half as many elements with twice the input element size.
//
-// Asm: VPMADDWD, CPU Feature: AVX512BW
+// Asm: VPMADDWD, CPU Feature: AVX512
func (x Int16x32) DotProdPairs(y Int16x32) Int32x16
/* DotProdPairsMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMADDWD, CPU Feature: AVX512BW
+// Asm: VPMADDWD, CPU Feature: AVX512
func (x Int16x8) DotProdPairsMasked(y Int16x8, mask Mask16x8) Int32x4
// DotProdPairsMasked multiplies the elements and add the pairs together,
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMADDWD, CPU Feature: AVX512BW
+// Asm: VPMADDWD, CPU Feature: AVX512
func (x Int16x16) DotProdPairsMasked(y Int16x16, mask Mask16x16) Int32x8
// DotProdPairsMasked multiplies the elements and add the pairs together,
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMADDWD, CPU Feature: AVX512BW
+// Asm: VPMADDWD, CPU Feature: AVX512
func (x Int16x32) DotProdPairsMasked(y Int16x32, mask Mask16x32) Int32x16
/* DotProdPairsSaturated */
// DotProdPairsSaturated multiplies the elements and add the pairs together with saturation,
// yielding a vector of half as many elements with twice the input element size.
//
-// Asm: VPMADDUBSW, CPU Feature: AVX512BW
+// Asm: VPMADDUBSW, CPU Feature: AVX512
func (x Uint8x64) DotProdPairsSaturated(y Int8x64) Int16x32
/* DotProdPairsSaturatedMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMADDUBSW, CPU Feature: AVX512BW
+// Asm: VPMADDUBSW, CPU Feature: AVX512
func (x Uint8x16) DotProdPairsSaturatedMasked(y Int8x16, mask Mask16x8) Int16x8
// DotProdPairsSaturatedMasked multiplies the elements and add the pairs together with saturation,
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMADDUBSW, CPU Feature: AVX512BW
+// Asm: VPMADDUBSW, CPU Feature: AVX512
func (x Uint8x32) DotProdPairsSaturatedMasked(y Int8x32, mask Mask16x16) Int16x16
// DotProdPairsSaturatedMasked multiplies the elements and add the pairs together with saturation,
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMADDUBSW, CPU Feature: AVX512BW
+// Asm: VPMADDUBSW, CPU Feature: AVX512
func (x Uint8x64) DotProdPairsSaturatedMasked(y Int8x64, mask Mask16x32) Int16x32
/* Equal */
// Equal compares for equality.
//
-// Asm: VPCMPEQB, CPU Feature: AVX512BW
+// Asm: VPCMPEQB, CPU Feature: AVX512
func (x Int8x64) Equal(y Int8x64) Mask8x64
// Equal compares for equality.
// Equal compares for equality.
//
-// Asm: VPCMPEQW, CPU Feature: AVX512BW
+// Asm: VPCMPEQW, CPU Feature: AVX512
func (x Int16x32) Equal(y Int16x32) Mask16x32
// Equal compares for equality.
// Equal compares for equality.
//
-// Asm: VPCMPEQD, CPU Feature: AVX512F
+// Asm: VPCMPEQD, CPU Feature: AVX512
func (x Int32x16) Equal(y Int32x16) Mask32x16
// Equal compares for equality.
// Equal compares for equality.
//
-// Asm: VPCMPEQQ, CPU Feature: AVX512F
+// Asm: VPCMPEQQ, CPU Feature: AVX512
func (x Int64x8) Equal(y Int64x8) Mask64x8
// Equal compares for equality.
// Equal compares for equality.
//
-// Asm: VPCMPEQB, CPU Feature: AVX512BW
+// Asm: VPCMPEQB, CPU Feature: AVX512
func (x Uint8x64) Equal(y Uint8x64) Mask8x64
// Equal compares for equality.
// Equal compares for equality.
//
-// Asm: VPCMPEQW, CPU Feature: AVX512BW
+// Asm: VPCMPEQW, CPU Feature: AVX512
func (x Uint16x32) Equal(y Uint16x32) Mask16x32
// Equal compares for equality.
// Equal compares for equality.
//
-// Asm: VPCMPEQD, CPU Feature: AVX512F
+// Asm: VPCMPEQD, CPU Feature: AVX512
func (x Uint32x16) Equal(y Uint32x16) Mask32x16
// Equal compares for equality.
// Equal compares for equality.
//
-// Asm: VPCMPEQQ, CPU Feature: AVX512F
+// Asm: VPCMPEQQ, CPU Feature: AVX512
func (x Uint64x8) Equal(y Uint64x8) Mask64x8
// Equal compares for equality.
// Equal compares for equality.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) Equal(y Float32x16) Mask32x16
// Equal compares for equality.
// Equal compares for equality.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) Equal(y Float64x8) Mask64x8
/* EqualMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x4) EqualMasked(y Float32x4, mask Mask32x4) Mask32x4
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x8) EqualMasked(y Float32x8, mask Mask32x8) Mask32x8
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) EqualMasked(y Float32x16, mask Mask32x16) Mask32x16
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x2) EqualMasked(y Float64x2, mask Mask64x2) Mask64x2
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x4) EqualMasked(y Float64x4, mask Mask64x4) Mask64x4
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) EqualMasked(y Float64x8, mask Mask64x8) Mask64x8
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x16) EqualMasked(y Int8x16, mask Mask8x16) Mask8x16
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x32) EqualMasked(y Int8x32, mask Mask8x32) Mask8x32
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x64) EqualMasked(y Int8x64, mask Mask8x64) Mask8x64
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x8) EqualMasked(y Int16x8, mask Mask16x8) Mask16x8
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x16) EqualMasked(y Int16x16, mask Mask16x16) Mask16x16
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x32) EqualMasked(y Int16x32, mask Mask16x32) Mask16x32
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x4) EqualMasked(y Int32x4, mask Mask32x4) Mask32x4
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x8) EqualMasked(y Int32x8, mask Mask32x8) Mask32x8
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x16) EqualMasked(y Int32x16, mask Mask32x16) Mask32x16
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x2) EqualMasked(y Int64x2, mask Mask64x2) Mask64x2
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x4) EqualMasked(y Int64x4, mask Mask64x4) Mask64x4
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x8) EqualMasked(y Int64x8, mask Mask64x8) Mask64x8
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x16) EqualMasked(y Uint8x16, mask Mask8x16) Mask8x16
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x32) EqualMasked(y Uint8x32, mask Mask8x32) Mask8x32
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x64) EqualMasked(y Uint8x64, mask Mask8x64) Mask8x64
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x8) EqualMasked(y Uint16x8, mask Mask16x8) Mask16x8
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x16) EqualMasked(y Uint16x16, mask Mask16x16) Mask16x16
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x32) EqualMasked(y Uint16x32, mask Mask16x32) Mask16x32
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x4) EqualMasked(y Uint32x4, mask Mask32x4) Mask32x4
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x8) EqualMasked(y Uint32x8, mask Mask32x8) Mask32x8
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x16) EqualMasked(y Uint32x16, mask Mask32x16) Mask32x16
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x2) EqualMasked(y Uint64x2, mask Mask64x2) Mask64x2
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x4) EqualMasked(y Uint64x4, mask Mask64x4) Mask64x4
// EqualMasked compares for equality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x8) EqualMasked(y Uint64x8, mask Mask64x8) Mask64x8
/* Expand */
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VEXPANDPS, CPU Feature: AVX512F
+// Asm: VEXPANDPS, CPU Feature: AVX512
func (x Float32x4) Expand(mask Mask32x4) Float32x4
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VEXPANDPS, CPU Feature: AVX512F
+// Asm: VEXPANDPS, CPU Feature: AVX512
func (x Float32x8) Expand(mask Mask32x8) Float32x8
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VEXPANDPS, CPU Feature: AVX512F
+// Asm: VEXPANDPS, CPU Feature: AVX512
func (x Float32x16) Expand(mask Mask32x16) Float32x16
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VEXPANDPD, CPU Feature: AVX512F
+// Asm: VEXPANDPD, CPU Feature: AVX512
func (x Float64x2) Expand(mask Mask64x2) Float64x2
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VEXPANDPD, CPU Feature: AVX512F
+// Asm: VEXPANDPD, CPU Feature: AVX512
func (x Float64x4) Expand(mask Mask64x4) Float64x4
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VEXPANDPD, CPU Feature: AVX512F
+// Asm: VEXPANDPD, CPU Feature: AVX512
func (x Float64x8) Expand(mask Mask64x8) Float64x8
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VPEXPANDD, CPU Feature: AVX512F
+// Asm: VPEXPANDD, CPU Feature: AVX512
func (x Int32x4) Expand(mask Mask32x4) Int32x4
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VPEXPANDD, CPU Feature: AVX512F
+// Asm: VPEXPANDD, CPU Feature: AVX512
func (x Int32x8) Expand(mask Mask32x8) Int32x8
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VPEXPANDD, CPU Feature: AVX512F
+// Asm: VPEXPANDD, CPU Feature: AVX512
func (x Int32x16) Expand(mask Mask32x16) Int32x16
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VPEXPANDQ, CPU Feature: AVX512F
+// Asm: VPEXPANDQ, CPU Feature: AVX512
func (x Int64x2) Expand(mask Mask64x2) Int64x2
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VPEXPANDQ, CPU Feature: AVX512F
+// Asm: VPEXPANDQ, CPU Feature: AVX512
func (x Int64x4) Expand(mask Mask64x4) Int64x4
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VPEXPANDQ, CPU Feature: AVX512F
+// Asm: VPEXPANDQ, CPU Feature: AVX512
func (x Int64x8) Expand(mask Mask64x8) Int64x8
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VPEXPANDD, CPU Feature: AVX512F
+// Asm: VPEXPANDD, CPU Feature: AVX512
func (x Uint32x4) Expand(mask Mask32x4) Uint32x4
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VPEXPANDD, CPU Feature: AVX512F
+// Asm: VPEXPANDD, CPU Feature: AVX512
func (x Uint32x8) Expand(mask Mask32x8) Uint32x8
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VPEXPANDD, CPU Feature: AVX512F
+// Asm: VPEXPANDD, CPU Feature: AVX512
func (x Uint32x16) Expand(mask Mask32x16) Uint32x16
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VPEXPANDQ, CPU Feature: AVX512F
+// Asm: VPEXPANDQ, CPU Feature: AVX512
func (x Uint64x2) Expand(mask Mask64x2) Uint64x2
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VPEXPANDQ, CPU Feature: AVX512F
+// Asm: VPEXPANDQ, CPU Feature: AVX512
func (x Uint64x4) Expand(mask Mask64x4) Uint64x4
// Expand performs an expansion on a vector x whose elements are packed to lower parts.
// The expansion is to distribute elements as indexed by mask, from lower mask elements to upper in order.
//
-// Asm: VPEXPANDQ, CPU Feature: AVX512F
+// Asm: VPEXPANDQ, CPU Feature: AVX512
func (x Uint64x8) Expand(mask Mask64x8) Uint64x8
/* Floor */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x4) FloorScaled(prec uint8) Float32x4
// FloorScaled rounds elements down with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x8) FloorScaled(prec uint8) Float32x8
// FloorScaled rounds elements down with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x16) FloorScaled(prec uint8) Float32x16
// FloorScaled rounds elements down with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x2) FloorScaled(prec uint8) Float64x2
// FloorScaled rounds elements down with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x4) FloorScaled(prec uint8) Float64x4
// FloorScaled rounds elements down with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x8) FloorScaled(prec uint8) Float64x8
/* FloorScaledMasked */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x4) FloorScaledMasked(prec uint8, mask Mask32x4) Float32x4
// FloorScaledMasked rounds elements down with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x8) FloorScaledMasked(prec uint8, mask Mask32x8) Float32x8
// FloorScaledMasked rounds elements down with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x16) FloorScaledMasked(prec uint8, mask Mask32x16) Float32x16
// FloorScaledMasked rounds elements down with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x2) FloorScaledMasked(prec uint8, mask Mask64x2) Float64x2
// FloorScaledMasked rounds elements down with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x4) FloorScaledMasked(prec uint8, mask Mask64x4) Float64x4
// FloorScaledMasked rounds elements down with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x8) FloorScaledMasked(prec uint8, mask Mask64x8) Float64x8
/* FloorScaledResidue */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x4) FloorScaledResidue(prec uint8) Float32x4
// FloorScaledResidue computes the difference after flooring with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x8) FloorScaledResidue(prec uint8) Float32x8
// FloorScaledResidue computes the difference after flooring with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x16) FloorScaledResidue(prec uint8) Float32x16
// FloorScaledResidue computes the difference after flooring with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x2) FloorScaledResidue(prec uint8) Float64x2
// FloorScaledResidue computes the difference after flooring with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x4) FloorScaledResidue(prec uint8) Float64x4
// FloorScaledResidue computes the difference after flooring with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x8) FloorScaledResidue(prec uint8) Float64x8
/* FloorScaledResidueMasked */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x4) FloorScaledResidueMasked(prec uint8, mask Mask32x4) Float32x4
// FloorScaledResidueMasked computes the difference after flooring with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x8) FloorScaledResidueMasked(prec uint8, mask Mask32x8) Float32x8
// FloorScaledResidueMasked computes the difference after flooring with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x16) FloorScaledResidueMasked(prec uint8, mask Mask32x16) Float32x16
// FloorScaledResidueMasked computes the difference after flooring with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x2) FloorScaledResidueMasked(prec uint8, mask Mask64x2) Float64x2
// FloorScaledResidueMasked computes the difference after flooring with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x4) FloorScaledResidueMasked(prec uint8, mask Mask64x4) Float64x4
// FloorScaledResidueMasked computes the difference after flooring with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x8) FloorScaledResidueMasked(prec uint8, mask Mask64x8) Float64x8
/* GaloisFieldAffineTransform */
//
// index results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPEXTRB, CPU Feature: AVX512BW
+// Asm: VPEXTRB, CPU Feature: AVX512
func (x Int8x16) GetElem(index uint8) int8
// GetElem retrieves a single constant-indexed element's value.
//
// index results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPEXTRW, CPU Feature: AVX512BW
+// Asm: VPEXTRW, CPU Feature: AVX512
func (x Int16x8) GetElem(index uint8) int16
// GetElem retrieves a single constant-indexed element's value.
//
// index results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPEXTRB, CPU Feature: AVX512BW
+// Asm: VPEXTRB, CPU Feature: AVX512
func (x Uint8x16) GetElem(index uint8) uint8
// GetElem retrieves a single constant-indexed element's value.
//
// index results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPEXTRW, CPU Feature: AVX512BW
+// Asm: VPEXTRW, CPU Feature: AVX512
func (x Uint16x8) GetElem(index uint8) uint16
// GetElem retrieves a single constant-indexed element's value.
// GetHi returns the upper half of x.
//
-// Asm: VEXTRACTF64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTF64X4, CPU Feature: AVX512
func (x Float32x16) GetHi() Float32x8
// GetHi returns the upper half of x.
// GetHi returns the upper half of x.
//
-// Asm: VEXTRACTF64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTF64X4, CPU Feature: AVX512
func (x Float64x8) GetHi() Float64x4
// GetHi returns the upper half of x.
// GetHi returns the upper half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Int8x64) GetHi() Int8x32
// GetHi returns the upper half of x.
// GetHi returns the upper half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Int16x32) GetHi() Int16x16
// GetHi returns the upper half of x.
// GetHi returns the upper half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Int32x16) GetHi() Int32x8
// GetHi returns the upper half of x.
// GetHi returns the upper half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Int64x8) GetHi() Int64x4
// GetHi returns the upper half of x.
// GetHi returns the upper half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Uint8x64) GetHi() Uint8x32
// GetHi returns the upper half of x.
// GetHi returns the upper half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Uint16x32) GetHi() Uint16x16
// GetHi returns the upper half of x.
// GetHi returns the upper half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Uint32x16) GetHi() Uint32x8
// GetHi returns the upper half of x.
// GetHi returns the upper half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Uint64x8) GetHi() Uint64x4
/* GetLo */
// GetLo returns the lower half of x.
//
-// Asm: VEXTRACTF64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTF64X4, CPU Feature: AVX512
func (x Float32x16) GetLo() Float32x8
// GetLo returns the lower half of x.
// GetLo returns the lower half of x.
//
-// Asm: VEXTRACTF64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTF64X4, CPU Feature: AVX512
func (x Float64x8) GetLo() Float64x4
// GetLo returns the lower half of x.
// GetLo returns the lower half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Int8x64) GetLo() Int8x32
// GetLo returns the lower half of x.
// GetLo returns the lower half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Int16x32) GetLo() Int16x16
// GetLo returns the lower half of x.
// GetLo returns the lower half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Int32x16) GetLo() Int32x8
// GetLo returns the lower half of x.
// GetLo returns the lower half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Int64x8) GetLo() Int64x4
// GetLo returns the lower half of x.
// GetLo returns the lower half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Uint8x64) GetLo() Uint8x32
// GetLo returns the lower half of x.
// GetLo returns the lower half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Uint16x32) GetLo() Uint16x16
// GetLo returns the lower half of x.
// GetLo returns the lower half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Uint32x16) GetLo() Uint32x8
// GetLo returns the lower half of x.
// GetLo returns the lower half of x.
//
-// Asm: VEXTRACTI64X4, CPU Feature: AVX512F
+// Asm: VEXTRACTI64X4, CPU Feature: AVX512
func (x Uint64x8) GetLo() Uint64x4
/* Greater */
// Greater compares for greater than.
//
-// Asm: VPCMPGTB, CPU Feature: AVX512BW
+// Asm: VPCMPGTB, CPU Feature: AVX512
func (x Int8x64) Greater(y Int8x64) Mask8x64
// Greater compares for greater than.
// Greater compares for greater than.
//
-// Asm: VPCMPGTW, CPU Feature: AVX512BW
+// Asm: VPCMPGTW, CPU Feature: AVX512
func (x Int16x32) Greater(y Int16x32) Mask16x32
// Greater compares for greater than.
// Greater compares for greater than.
//
-// Asm: VPCMPGTD, CPU Feature: AVX512F
+// Asm: VPCMPGTD, CPU Feature: AVX512
func (x Int32x16) Greater(y Int32x16) Mask32x16
// Greater compares for greater than.
// Greater compares for greater than.
//
-// Asm: VPCMPGTQ, CPU Feature: AVX512F
+// Asm: VPCMPGTQ, CPU Feature: AVX512
func (x Int64x8) Greater(y Int64x8) Mask64x8
// Greater compares for greater than.
// Greater compares for greater than.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) Greater(y Float32x16) Mask32x16
// Greater compares for greater than.
// Greater compares for greater than.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) Greater(y Float64x8) Mask64x8
// Greater compares for greater than.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x16) Greater(y Uint8x16) Mask8x16
// Greater compares for greater than.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x32) Greater(y Uint8x32) Mask8x32
// Greater compares for greater than.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x64) Greater(y Uint8x64) Mask8x64
// Greater compares for greater than.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x8) Greater(y Uint16x8) Mask16x8
// Greater compares for greater than.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x16) Greater(y Uint16x16) Mask16x16
// Greater compares for greater than.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x32) Greater(y Uint16x32) Mask16x32
// Greater compares for greater than.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x4) Greater(y Uint32x4) Mask32x4
// Greater compares for greater than.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x8) Greater(y Uint32x8) Mask32x8
// Greater compares for greater than.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x16) Greater(y Uint32x16) Mask32x16
// Greater compares for greater than.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x2) Greater(y Uint64x2) Mask64x2
// Greater compares for greater than.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x4) Greater(y Uint64x4) Mask64x4
// Greater compares for greater than.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x8) Greater(y Uint64x8) Mask64x8
/* GreaterEqual */
// GreaterEqual compares for greater than or equal.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) GreaterEqual(y Float32x16) Mask32x16
// GreaterEqual compares for greater than or equal.
// GreaterEqual compares for greater than or equal.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) GreaterEqual(y Float64x8) Mask64x8
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x16) GreaterEqual(y Int8x16) Mask8x16
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x32) GreaterEqual(y Int8x32) Mask8x32
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x64) GreaterEqual(y Int8x64) Mask8x64
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x8) GreaterEqual(y Int16x8) Mask16x8
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x16) GreaterEqual(y Int16x16) Mask16x16
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x32) GreaterEqual(y Int16x32) Mask16x32
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x4) GreaterEqual(y Int32x4) Mask32x4
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x8) GreaterEqual(y Int32x8) Mask32x8
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x16) GreaterEqual(y Int32x16) Mask32x16
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x2) GreaterEqual(y Int64x2) Mask64x2
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x4) GreaterEqual(y Int64x4) Mask64x4
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x8) GreaterEqual(y Int64x8) Mask64x8
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x16) GreaterEqual(y Uint8x16) Mask8x16
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x32) GreaterEqual(y Uint8x32) Mask8x32
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x64) GreaterEqual(y Uint8x64) Mask8x64
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x8) GreaterEqual(y Uint16x8) Mask16x8
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x16) GreaterEqual(y Uint16x16) Mask16x16
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x32) GreaterEqual(y Uint16x32) Mask16x32
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x4) GreaterEqual(y Uint32x4) Mask32x4
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x8) GreaterEqual(y Uint32x8) Mask32x8
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x16) GreaterEqual(y Uint32x16) Mask32x16
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x2) GreaterEqual(y Uint64x2) Mask64x2
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x4) GreaterEqual(y Uint64x4) Mask64x4
// GreaterEqual compares for greater than or equal.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x8) GreaterEqual(y Uint64x8) Mask64x8
/* GreaterEqualMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x4) GreaterEqualMasked(y Float32x4, mask Mask32x4) Mask32x4
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x8) GreaterEqualMasked(y Float32x8, mask Mask32x8) Mask32x8
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) GreaterEqualMasked(y Float32x16, mask Mask32x16) Mask32x16
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x2) GreaterEqualMasked(y Float64x2, mask Mask64x2) Mask64x2
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x4) GreaterEqualMasked(y Float64x4, mask Mask64x4) Mask64x4
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) GreaterEqualMasked(y Float64x8, mask Mask64x8) Mask64x8
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x16) GreaterEqualMasked(y Int8x16, mask Mask8x16) Mask8x16
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x32) GreaterEqualMasked(y Int8x32, mask Mask8x32) Mask8x32
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x64) GreaterEqualMasked(y Int8x64, mask Mask8x64) Mask8x64
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x8) GreaterEqualMasked(y Int16x8, mask Mask16x8) Mask16x8
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x16) GreaterEqualMasked(y Int16x16, mask Mask16x16) Mask16x16
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x32) GreaterEqualMasked(y Int16x32, mask Mask16x32) Mask16x32
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x4) GreaterEqualMasked(y Int32x4, mask Mask32x4) Mask32x4
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x8) GreaterEqualMasked(y Int32x8, mask Mask32x8) Mask32x8
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x16) GreaterEqualMasked(y Int32x16, mask Mask32x16) Mask32x16
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x2) GreaterEqualMasked(y Int64x2, mask Mask64x2) Mask64x2
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x4) GreaterEqualMasked(y Int64x4, mask Mask64x4) Mask64x4
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x8) GreaterEqualMasked(y Int64x8, mask Mask64x8) Mask64x8
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x16) GreaterEqualMasked(y Uint8x16, mask Mask8x16) Mask8x16
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x32) GreaterEqualMasked(y Uint8x32, mask Mask8x32) Mask8x32
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x64) GreaterEqualMasked(y Uint8x64, mask Mask8x64) Mask8x64
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x8) GreaterEqualMasked(y Uint16x8, mask Mask16x8) Mask16x8
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x16) GreaterEqualMasked(y Uint16x16, mask Mask16x16) Mask16x16
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x32) GreaterEqualMasked(y Uint16x32, mask Mask16x32) Mask16x32
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x4) GreaterEqualMasked(y Uint32x4, mask Mask32x4) Mask32x4
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x8) GreaterEqualMasked(y Uint32x8, mask Mask32x8) Mask32x8
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x16) GreaterEqualMasked(y Uint32x16, mask Mask32x16) Mask32x16
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x2) GreaterEqualMasked(y Uint64x2, mask Mask64x2) Mask64x2
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x4) GreaterEqualMasked(y Uint64x4, mask Mask64x4) Mask64x4
// GreaterEqualMasked compares for greater than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x8) GreaterEqualMasked(y Uint64x8, mask Mask64x8) Mask64x8
/* GreaterMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x4) GreaterMasked(y Float32x4, mask Mask32x4) Mask32x4
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x8) GreaterMasked(y Float32x8, mask Mask32x8) Mask32x8
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) GreaterMasked(y Float32x16, mask Mask32x16) Mask32x16
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x2) GreaterMasked(y Float64x2, mask Mask64x2) Mask64x2
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x4) GreaterMasked(y Float64x4, mask Mask64x4) Mask64x4
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) GreaterMasked(y Float64x8, mask Mask64x8) Mask64x8
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x16) GreaterMasked(y Int8x16, mask Mask8x16) Mask8x16
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x32) GreaterMasked(y Int8x32, mask Mask8x32) Mask8x32
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x64) GreaterMasked(y Int8x64, mask Mask8x64) Mask8x64
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x8) GreaterMasked(y Int16x8, mask Mask16x8) Mask16x8
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x16) GreaterMasked(y Int16x16, mask Mask16x16) Mask16x16
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x32) GreaterMasked(y Int16x32, mask Mask16x32) Mask16x32
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x4) GreaterMasked(y Int32x4, mask Mask32x4) Mask32x4
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x8) GreaterMasked(y Int32x8, mask Mask32x8) Mask32x8
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x16) GreaterMasked(y Int32x16, mask Mask32x16) Mask32x16
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x2) GreaterMasked(y Int64x2, mask Mask64x2) Mask64x2
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x4) GreaterMasked(y Int64x4, mask Mask64x4) Mask64x4
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x8) GreaterMasked(y Int64x8, mask Mask64x8) Mask64x8
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x16) GreaterMasked(y Uint8x16, mask Mask8x16) Mask8x16
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x32) GreaterMasked(y Uint8x32, mask Mask8x32) Mask8x32
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x64) GreaterMasked(y Uint8x64, mask Mask8x64) Mask8x64
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x8) GreaterMasked(y Uint16x8, mask Mask16x8) Mask16x8
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x16) GreaterMasked(y Uint16x16, mask Mask16x16) Mask16x16
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x32) GreaterMasked(y Uint16x32, mask Mask16x32) Mask16x32
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x4) GreaterMasked(y Uint32x4, mask Mask32x4) Mask32x4
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x8) GreaterMasked(y Uint32x8, mask Mask32x8) Mask32x8
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x16) GreaterMasked(y Uint32x16, mask Mask32x16) Mask32x16
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x2) GreaterMasked(y Uint64x2, mask Mask64x2) Mask64x2
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x4) GreaterMasked(y Uint64x4, mask Mask64x4) Mask64x4
// GreaterMasked compares for greater than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x8) GreaterMasked(y Uint64x8, mask Mask64x8) Mask64x8
/* IsNan */
// IsNan checks if elements are NaN. Use as x.IsNan(x).
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) IsNan(y Float32x16) Mask32x16
// IsNan checks if elements are NaN. Use as x.IsNan(x).
// IsNan checks if elements are NaN. Use as x.IsNan(x).
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) IsNan(y Float64x8) Mask64x8
/* IsNanMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x4) IsNanMasked(y Float32x4, mask Mask32x4) Mask32x4
// IsNanMasked checks if elements are NaN. Use as x.IsNan(x).
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x8) IsNanMasked(y Float32x8, mask Mask32x8) Mask32x8
// IsNanMasked checks if elements are NaN. Use as x.IsNan(x).
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) IsNanMasked(y Float32x16, mask Mask32x16) Mask32x16
// IsNanMasked checks if elements are NaN. Use as x.IsNan(x).
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x2) IsNanMasked(y Float64x2, mask Mask64x2) Mask64x2
// IsNanMasked checks if elements are NaN. Use as x.IsNan(x).
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x4) IsNanMasked(y Float64x4, mask Mask64x4) Mask64x4
// IsNanMasked checks if elements are NaN. Use as x.IsNan(x).
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) IsNanMasked(y Float64x8, mask Mask64x8) Mask64x8
/* Less */
// Less compares for less than.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) Less(y Float32x16) Mask32x16
// Less compares for less than.
// Less compares for less than.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) Less(y Float64x8) Mask64x8
// Less compares for less than.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x16) Less(y Int8x16) Mask8x16
// Less compares for less than.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x32) Less(y Int8x32) Mask8x32
// Less compares for less than.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x64) Less(y Int8x64) Mask8x64
// Less compares for less than.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x8) Less(y Int16x8) Mask16x8
// Less compares for less than.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x16) Less(y Int16x16) Mask16x16
// Less compares for less than.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x32) Less(y Int16x32) Mask16x32
// Less compares for less than.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x4) Less(y Int32x4) Mask32x4
// Less compares for less than.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x8) Less(y Int32x8) Mask32x8
// Less compares for less than.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x16) Less(y Int32x16) Mask32x16
// Less compares for less than.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x2) Less(y Int64x2) Mask64x2
// Less compares for less than.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x4) Less(y Int64x4) Mask64x4
// Less compares for less than.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x8) Less(y Int64x8) Mask64x8
// Less compares for less than.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x16) Less(y Uint8x16) Mask8x16
// Less compares for less than.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x32) Less(y Uint8x32) Mask8x32
// Less compares for less than.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x64) Less(y Uint8x64) Mask8x64
// Less compares for less than.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x8) Less(y Uint16x8) Mask16x8
// Less compares for less than.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x16) Less(y Uint16x16) Mask16x16
// Less compares for less than.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x32) Less(y Uint16x32) Mask16x32
// Less compares for less than.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x4) Less(y Uint32x4) Mask32x4
// Less compares for less than.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x8) Less(y Uint32x8) Mask32x8
// Less compares for less than.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x16) Less(y Uint32x16) Mask32x16
// Less compares for less than.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x2) Less(y Uint64x2) Mask64x2
// Less compares for less than.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x4) Less(y Uint64x4) Mask64x4
// Less compares for less than.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x8) Less(y Uint64x8) Mask64x8
/* LessEqual */
// LessEqual compares for less than or equal.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) LessEqual(y Float32x16) Mask32x16
// LessEqual compares for less than or equal.
// LessEqual compares for less than or equal.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) LessEqual(y Float64x8) Mask64x8
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x16) LessEqual(y Int8x16) Mask8x16
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x32) LessEqual(y Int8x32) Mask8x32
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x64) LessEqual(y Int8x64) Mask8x64
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x8) LessEqual(y Int16x8) Mask16x8
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x16) LessEqual(y Int16x16) Mask16x16
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x32) LessEqual(y Int16x32) Mask16x32
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x4) LessEqual(y Int32x4) Mask32x4
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x8) LessEqual(y Int32x8) Mask32x8
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x16) LessEqual(y Int32x16) Mask32x16
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x2) LessEqual(y Int64x2) Mask64x2
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x4) LessEqual(y Int64x4) Mask64x4
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x8) LessEqual(y Int64x8) Mask64x8
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x16) LessEqual(y Uint8x16) Mask8x16
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x32) LessEqual(y Uint8x32) Mask8x32
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x64) LessEqual(y Uint8x64) Mask8x64
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x8) LessEqual(y Uint16x8) Mask16x8
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x16) LessEqual(y Uint16x16) Mask16x16
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x32) LessEqual(y Uint16x32) Mask16x32
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x4) LessEqual(y Uint32x4) Mask32x4
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x8) LessEqual(y Uint32x8) Mask32x8
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x16) LessEqual(y Uint32x16) Mask32x16
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x2) LessEqual(y Uint64x2) Mask64x2
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x4) LessEqual(y Uint64x4) Mask64x4
// LessEqual compares for less than or equal.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x8) LessEqual(y Uint64x8) Mask64x8
/* LessEqualMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x4) LessEqualMasked(y Float32x4, mask Mask32x4) Mask32x4
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x8) LessEqualMasked(y Float32x8, mask Mask32x8) Mask32x8
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) LessEqualMasked(y Float32x16, mask Mask32x16) Mask32x16
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x2) LessEqualMasked(y Float64x2, mask Mask64x2) Mask64x2
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x4) LessEqualMasked(y Float64x4, mask Mask64x4) Mask64x4
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) LessEqualMasked(y Float64x8, mask Mask64x8) Mask64x8
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x16) LessEqualMasked(y Int8x16, mask Mask8x16) Mask8x16
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x32) LessEqualMasked(y Int8x32, mask Mask8x32) Mask8x32
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x64) LessEqualMasked(y Int8x64, mask Mask8x64) Mask8x64
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x8) LessEqualMasked(y Int16x8, mask Mask16x8) Mask16x8
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x16) LessEqualMasked(y Int16x16, mask Mask16x16) Mask16x16
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x32) LessEqualMasked(y Int16x32, mask Mask16x32) Mask16x32
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x4) LessEqualMasked(y Int32x4, mask Mask32x4) Mask32x4
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x8) LessEqualMasked(y Int32x8, mask Mask32x8) Mask32x8
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x16) LessEqualMasked(y Int32x16, mask Mask32x16) Mask32x16
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x2) LessEqualMasked(y Int64x2, mask Mask64x2) Mask64x2
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x4) LessEqualMasked(y Int64x4, mask Mask64x4) Mask64x4
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x8) LessEqualMasked(y Int64x8, mask Mask64x8) Mask64x8
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x16) LessEqualMasked(y Uint8x16, mask Mask8x16) Mask8x16
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x32) LessEqualMasked(y Uint8x32, mask Mask8x32) Mask8x32
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x64) LessEqualMasked(y Uint8x64, mask Mask8x64) Mask8x64
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x8) LessEqualMasked(y Uint16x8, mask Mask16x8) Mask16x8
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x16) LessEqualMasked(y Uint16x16, mask Mask16x16) Mask16x16
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x32) LessEqualMasked(y Uint16x32, mask Mask16x32) Mask16x32
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x4) LessEqualMasked(y Uint32x4, mask Mask32x4) Mask32x4
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x8) LessEqualMasked(y Uint32x8, mask Mask32x8) Mask32x8
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x16) LessEqualMasked(y Uint32x16, mask Mask32x16) Mask32x16
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x2) LessEqualMasked(y Uint64x2, mask Mask64x2) Mask64x2
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x4) LessEqualMasked(y Uint64x4, mask Mask64x4) Mask64x4
// LessEqualMasked compares for less than or equal.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x8) LessEqualMasked(y Uint64x8, mask Mask64x8) Mask64x8
/* LessMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x4) LessMasked(y Float32x4, mask Mask32x4) Mask32x4
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x8) LessMasked(y Float32x8, mask Mask32x8) Mask32x8
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) LessMasked(y Float32x16, mask Mask32x16) Mask32x16
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x2) LessMasked(y Float64x2, mask Mask64x2) Mask64x2
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x4) LessMasked(y Float64x4, mask Mask64x4) Mask64x4
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) LessMasked(y Float64x8, mask Mask64x8) Mask64x8
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x16) LessMasked(y Int8x16, mask Mask8x16) Mask8x16
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x32) LessMasked(y Int8x32, mask Mask8x32) Mask8x32
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x64) LessMasked(y Int8x64, mask Mask8x64) Mask8x64
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x8) LessMasked(y Int16x8, mask Mask16x8) Mask16x8
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x16) LessMasked(y Int16x16, mask Mask16x16) Mask16x16
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x32) LessMasked(y Int16x32, mask Mask16x32) Mask16x32
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x4) LessMasked(y Int32x4, mask Mask32x4) Mask32x4
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x8) LessMasked(y Int32x8, mask Mask32x8) Mask32x8
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x16) LessMasked(y Int32x16, mask Mask32x16) Mask32x16
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x2) LessMasked(y Int64x2, mask Mask64x2) Mask64x2
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x4) LessMasked(y Int64x4, mask Mask64x4) Mask64x4
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x8) LessMasked(y Int64x8, mask Mask64x8) Mask64x8
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x16) LessMasked(y Uint8x16, mask Mask8x16) Mask8x16
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x32) LessMasked(y Uint8x32, mask Mask8x32) Mask8x32
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x64) LessMasked(y Uint8x64, mask Mask8x64) Mask8x64
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x8) LessMasked(y Uint16x8, mask Mask16x8) Mask16x8
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x16) LessMasked(y Uint16x16, mask Mask16x16) Mask16x16
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x32) LessMasked(y Uint16x32, mask Mask16x32) Mask16x32
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x4) LessMasked(y Uint32x4, mask Mask32x4) Mask32x4
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x8) LessMasked(y Uint32x8, mask Mask32x8) Mask32x8
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x16) LessMasked(y Uint32x16, mask Mask32x16) Mask32x16
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x2) LessMasked(y Uint64x2, mask Mask64x2) Mask64x2
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x4) LessMasked(y Uint64x4, mask Mask64x4) Mask64x4
// LessMasked compares for less than.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x8) LessMasked(y Uint64x8, mask Mask64x8) Mask64x8
/* Max */
// Max computes the maximum of corresponding elements.
//
-// Asm: VMAXPS, CPU Feature: AVX512F
+// Asm: VMAXPS, CPU Feature: AVX512
func (x Float32x16) Max(y Float32x16) Float32x16
// Max computes the maximum of corresponding elements.
// Max computes the maximum of corresponding elements.
//
-// Asm: VMAXPD, CPU Feature: AVX512F
+// Asm: VMAXPD, CPU Feature: AVX512
func (x Float64x8) Max(y Float64x8) Float64x8
// Max computes the maximum of corresponding elements.
// Max computes the maximum of corresponding elements.
//
-// Asm: VPMAXSB, CPU Feature: AVX512BW
+// Asm: VPMAXSB, CPU Feature: AVX512
func (x Int8x64) Max(y Int8x64) Int8x64
// Max computes the maximum of corresponding elements.
// Max computes the maximum of corresponding elements.
//
-// Asm: VPMAXSW, CPU Feature: AVX512BW
+// Asm: VPMAXSW, CPU Feature: AVX512
func (x Int16x32) Max(y Int16x32) Int16x32
// Max computes the maximum of corresponding elements.
// Max computes the maximum of corresponding elements.
//
-// Asm: VPMAXSD, CPU Feature: AVX512F
+// Asm: VPMAXSD, CPU Feature: AVX512
func (x Int32x16) Max(y Int32x16) Int32x16
// Max computes the maximum of corresponding elements.
//
-// Asm: VPMAXSQ, CPU Feature: AVX512F
+// Asm: VPMAXSQ, CPU Feature: AVX512
func (x Int64x2) Max(y Int64x2) Int64x2
// Max computes the maximum of corresponding elements.
//
-// Asm: VPMAXSQ, CPU Feature: AVX512F
+// Asm: VPMAXSQ, CPU Feature: AVX512
func (x Int64x4) Max(y Int64x4) Int64x4
// Max computes the maximum of corresponding elements.
//
-// Asm: VPMAXSQ, CPU Feature: AVX512F
+// Asm: VPMAXSQ, CPU Feature: AVX512
func (x Int64x8) Max(y Int64x8) Int64x8
// Max computes the maximum of corresponding elements.
// Max computes the maximum of corresponding elements.
//
-// Asm: VPMAXUB, CPU Feature: AVX512BW
+// Asm: VPMAXUB, CPU Feature: AVX512
func (x Uint8x64) Max(y Uint8x64) Uint8x64
// Max computes the maximum of corresponding elements.
// Max computes the maximum of corresponding elements.
//
-// Asm: VPMAXUW, CPU Feature: AVX512BW
+// Asm: VPMAXUW, CPU Feature: AVX512
func (x Uint16x32) Max(y Uint16x32) Uint16x32
// Max computes the maximum of corresponding elements.
// Max computes the maximum of corresponding elements.
//
-// Asm: VPMAXUD, CPU Feature: AVX512F
+// Asm: VPMAXUD, CPU Feature: AVX512
func (x Uint32x16) Max(y Uint32x16) Uint32x16
// Max computes the maximum of corresponding elements.
//
-// Asm: VPMAXUQ, CPU Feature: AVX512F
+// Asm: VPMAXUQ, CPU Feature: AVX512
func (x Uint64x2) Max(y Uint64x2) Uint64x2
// Max computes the maximum of corresponding elements.
//
-// Asm: VPMAXUQ, CPU Feature: AVX512F
+// Asm: VPMAXUQ, CPU Feature: AVX512
func (x Uint64x4) Max(y Uint64x4) Uint64x4
// Max computes the maximum of corresponding elements.
//
-// Asm: VPMAXUQ, CPU Feature: AVX512F
+// Asm: VPMAXUQ, CPU Feature: AVX512
func (x Uint64x8) Max(y Uint64x8) Uint64x8
/* MaxMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMAXPS, CPU Feature: AVX512F
+// Asm: VMAXPS, CPU Feature: AVX512
func (x Float32x4) MaxMasked(y Float32x4, mask Mask32x4) Float32x4
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMAXPS, CPU Feature: AVX512F
+// Asm: VMAXPS, CPU Feature: AVX512
func (x Float32x8) MaxMasked(y Float32x8, mask Mask32x8) Float32x8
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMAXPS, CPU Feature: AVX512F
+// Asm: VMAXPS, CPU Feature: AVX512
func (x Float32x16) MaxMasked(y Float32x16, mask Mask32x16) Float32x16
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMAXPD, CPU Feature: AVX512F
+// Asm: VMAXPD, CPU Feature: AVX512
func (x Float64x2) MaxMasked(y Float64x2, mask Mask64x2) Float64x2
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMAXPD, CPU Feature: AVX512F
+// Asm: VMAXPD, CPU Feature: AVX512
func (x Float64x4) MaxMasked(y Float64x4, mask Mask64x4) Float64x4
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMAXPD, CPU Feature: AVX512F
+// Asm: VMAXPD, CPU Feature: AVX512
func (x Float64x8) MaxMasked(y Float64x8, mask Mask64x8) Float64x8
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXSB, CPU Feature: AVX512BW
+// Asm: VPMAXSB, CPU Feature: AVX512
func (x Int8x16) MaxMasked(y Int8x16, mask Mask8x16) Int8x16
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXSB, CPU Feature: AVX512BW
+// Asm: VPMAXSB, CPU Feature: AVX512
func (x Int8x32) MaxMasked(y Int8x32, mask Mask8x32) Int8x32
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXSB, CPU Feature: AVX512BW
+// Asm: VPMAXSB, CPU Feature: AVX512
func (x Int8x64) MaxMasked(y Int8x64, mask Mask8x64) Int8x64
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXSW, CPU Feature: AVX512BW
+// Asm: VPMAXSW, CPU Feature: AVX512
func (x Int16x8) MaxMasked(y Int16x8, mask Mask16x8) Int16x8
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXSW, CPU Feature: AVX512BW
+// Asm: VPMAXSW, CPU Feature: AVX512
func (x Int16x16) MaxMasked(y Int16x16, mask Mask16x16) Int16x16
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXSW, CPU Feature: AVX512BW
+// Asm: VPMAXSW, CPU Feature: AVX512
func (x Int16x32) MaxMasked(y Int16x32, mask Mask16x32) Int16x32
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXSD, CPU Feature: AVX512F
+// Asm: VPMAXSD, CPU Feature: AVX512
func (x Int32x4) MaxMasked(y Int32x4, mask Mask32x4) Int32x4
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXSD, CPU Feature: AVX512F
+// Asm: VPMAXSD, CPU Feature: AVX512
func (x Int32x8) MaxMasked(y Int32x8, mask Mask32x8) Int32x8
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXSD, CPU Feature: AVX512F
+// Asm: VPMAXSD, CPU Feature: AVX512
func (x Int32x16) MaxMasked(y Int32x16, mask Mask32x16) Int32x16
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXSQ, CPU Feature: AVX512F
+// Asm: VPMAXSQ, CPU Feature: AVX512
func (x Int64x2) MaxMasked(y Int64x2, mask Mask64x2) Int64x2
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXSQ, CPU Feature: AVX512F
+// Asm: VPMAXSQ, CPU Feature: AVX512
func (x Int64x4) MaxMasked(y Int64x4, mask Mask64x4) Int64x4
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXSQ, CPU Feature: AVX512F
+// Asm: VPMAXSQ, CPU Feature: AVX512
func (x Int64x8) MaxMasked(y Int64x8, mask Mask64x8) Int64x8
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXUB, CPU Feature: AVX512BW
+// Asm: VPMAXUB, CPU Feature: AVX512
func (x Uint8x16) MaxMasked(y Uint8x16, mask Mask8x16) Uint8x16
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXUB, CPU Feature: AVX512BW
+// Asm: VPMAXUB, CPU Feature: AVX512
func (x Uint8x32) MaxMasked(y Uint8x32, mask Mask8x32) Uint8x32
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXUB, CPU Feature: AVX512BW
+// Asm: VPMAXUB, CPU Feature: AVX512
func (x Uint8x64) MaxMasked(y Uint8x64, mask Mask8x64) Uint8x64
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXUW, CPU Feature: AVX512BW
+// Asm: VPMAXUW, CPU Feature: AVX512
func (x Uint16x8) MaxMasked(y Uint16x8, mask Mask16x8) Uint16x8
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXUW, CPU Feature: AVX512BW
+// Asm: VPMAXUW, CPU Feature: AVX512
func (x Uint16x16) MaxMasked(y Uint16x16, mask Mask16x16) Uint16x16
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXUW, CPU Feature: AVX512BW
+// Asm: VPMAXUW, CPU Feature: AVX512
func (x Uint16x32) MaxMasked(y Uint16x32, mask Mask16x32) Uint16x32
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXUD, CPU Feature: AVX512F
+// Asm: VPMAXUD, CPU Feature: AVX512
func (x Uint32x4) MaxMasked(y Uint32x4, mask Mask32x4) Uint32x4
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXUD, CPU Feature: AVX512F
+// Asm: VPMAXUD, CPU Feature: AVX512
func (x Uint32x8) MaxMasked(y Uint32x8, mask Mask32x8) Uint32x8
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXUD, CPU Feature: AVX512F
+// Asm: VPMAXUD, CPU Feature: AVX512
func (x Uint32x16) MaxMasked(y Uint32x16, mask Mask32x16) Uint32x16
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXUQ, CPU Feature: AVX512F
+// Asm: VPMAXUQ, CPU Feature: AVX512
func (x Uint64x2) MaxMasked(y Uint64x2, mask Mask64x2) Uint64x2
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXUQ, CPU Feature: AVX512F
+// Asm: VPMAXUQ, CPU Feature: AVX512
func (x Uint64x4) MaxMasked(y Uint64x4, mask Mask64x4) Uint64x4
// MaxMasked computes the maximum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMAXUQ, CPU Feature: AVX512F
+// Asm: VPMAXUQ, CPU Feature: AVX512
func (x Uint64x8) MaxMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* Min */
// Min computes the minimum of corresponding elements.
//
-// Asm: VMINPS, CPU Feature: AVX512F
+// Asm: VMINPS, CPU Feature: AVX512
func (x Float32x16) Min(y Float32x16) Float32x16
// Min computes the minimum of corresponding elements.
// Min computes the minimum of corresponding elements.
//
-// Asm: VMINPD, CPU Feature: AVX512F
+// Asm: VMINPD, CPU Feature: AVX512
func (x Float64x8) Min(y Float64x8) Float64x8
// Min computes the minimum of corresponding elements.
// Min computes the minimum of corresponding elements.
//
-// Asm: VPMINSB, CPU Feature: AVX512BW
+// Asm: VPMINSB, CPU Feature: AVX512
func (x Int8x64) Min(y Int8x64) Int8x64
// Min computes the minimum of corresponding elements.
// Min computes the minimum of corresponding elements.
//
-// Asm: VPMINSW, CPU Feature: AVX512BW
+// Asm: VPMINSW, CPU Feature: AVX512
func (x Int16x32) Min(y Int16x32) Int16x32
// Min computes the minimum of corresponding elements.
// Min computes the minimum of corresponding elements.
//
-// Asm: VPMINSD, CPU Feature: AVX512F
+// Asm: VPMINSD, CPU Feature: AVX512
func (x Int32x16) Min(y Int32x16) Int32x16
// Min computes the minimum of corresponding elements.
//
-// Asm: VPMINSQ, CPU Feature: AVX512F
+// Asm: VPMINSQ, CPU Feature: AVX512
func (x Int64x2) Min(y Int64x2) Int64x2
// Min computes the minimum of corresponding elements.
//
-// Asm: VPMINSQ, CPU Feature: AVX512F
+// Asm: VPMINSQ, CPU Feature: AVX512
func (x Int64x4) Min(y Int64x4) Int64x4
// Min computes the minimum of corresponding elements.
//
-// Asm: VPMINSQ, CPU Feature: AVX512F
+// Asm: VPMINSQ, CPU Feature: AVX512
func (x Int64x8) Min(y Int64x8) Int64x8
// Min computes the minimum of corresponding elements.
// Min computes the minimum of corresponding elements.
//
-// Asm: VPMINUB, CPU Feature: AVX512BW
+// Asm: VPMINUB, CPU Feature: AVX512
func (x Uint8x64) Min(y Uint8x64) Uint8x64
// Min computes the minimum of corresponding elements.
// Min computes the minimum of corresponding elements.
//
-// Asm: VPMINUW, CPU Feature: AVX512BW
+// Asm: VPMINUW, CPU Feature: AVX512
func (x Uint16x32) Min(y Uint16x32) Uint16x32
// Min computes the minimum of corresponding elements.
// Min computes the minimum of corresponding elements.
//
-// Asm: VPMINUD, CPU Feature: AVX512F
+// Asm: VPMINUD, CPU Feature: AVX512
func (x Uint32x16) Min(y Uint32x16) Uint32x16
// Min computes the minimum of corresponding elements.
//
-// Asm: VPMINUQ, CPU Feature: AVX512F
+// Asm: VPMINUQ, CPU Feature: AVX512
func (x Uint64x2) Min(y Uint64x2) Uint64x2
// Min computes the minimum of corresponding elements.
//
-// Asm: VPMINUQ, CPU Feature: AVX512F
+// Asm: VPMINUQ, CPU Feature: AVX512
func (x Uint64x4) Min(y Uint64x4) Uint64x4
// Min computes the minimum of corresponding elements.
//
-// Asm: VPMINUQ, CPU Feature: AVX512F
+// Asm: VPMINUQ, CPU Feature: AVX512
func (x Uint64x8) Min(y Uint64x8) Uint64x8
/* MinMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMINPS, CPU Feature: AVX512F
+// Asm: VMINPS, CPU Feature: AVX512
func (x Float32x4) MinMasked(y Float32x4, mask Mask32x4) Float32x4
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMINPS, CPU Feature: AVX512F
+// Asm: VMINPS, CPU Feature: AVX512
func (x Float32x8) MinMasked(y Float32x8, mask Mask32x8) Float32x8
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMINPS, CPU Feature: AVX512F
+// Asm: VMINPS, CPU Feature: AVX512
func (x Float32x16) MinMasked(y Float32x16, mask Mask32x16) Float32x16
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMINPD, CPU Feature: AVX512F
+// Asm: VMINPD, CPU Feature: AVX512
func (x Float64x2) MinMasked(y Float64x2, mask Mask64x2) Float64x2
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMINPD, CPU Feature: AVX512F
+// Asm: VMINPD, CPU Feature: AVX512
func (x Float64x4) MinMasked(y Float64x4, mask Mask64x4) Float64x4
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMINPD, CPU Feature: AVX512F
+// Asm: VMINPD, CPU Feature: AVX512
func (x Float64x8) MinMasked(y Float64x8, mask Mask64x8) Float64x8
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINSB, CPU Feature: AVX512BW
+// Asm: VPMINSB, CPU Feature: AVX512
func (x Int8x16) MinMasked(y Int8x16, mask Mask8x16) Int8x16
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINSB, CPU Feature: AVX512BW
+// Asm: VPMINSB, CPU Feature: AVX512
func (x Int8x32) MinMasked(y Int8x32, mask Mask8x32) Int8x32
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINSB, CPU Feature: AVX512BW
+// Asm: VPMINSB, CPU Feature: AVX512
func (x Int8x64) MinMasked(y Int8x64, mask Mask8x64) Int8x64
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINSW, CPU Feature: AVX512BW
+// Asm: VPMINSW, CPU Feature: AVX512
func (x Int16x8) MinMasked(y Int16x8, mask Mask16x8) Int16x8
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINSW, CPU Feature: AVX512BW
+// Asm: VPMINSW, CPU Feature: AVX512
func (x Int16x16) MinMasked(y Int16x16, mask Mask16x16) Int16x16
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINSW, CPU Feature: AVX512BW
+// Asm: VPMINSW, CPU Feature: AVX512
func (x Int16x32) MinMasked(y Int16x32, mask Mask16x32) Int16x32
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINSD, CPU Feature: AVX512F
+// Asm: VPMINSD, CPU Feature: AVX512
func (x Int32x4) MinMasked(y Int32x4, mask Mask32x4) Int32x4
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINSD, CPU Feature: AVX512F
+// Asm: VPMINSD, CPU Feature: AVX512
func (x Int32x8) MinMasked(y Int32x8, mask Mask32x8) Int32x8
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINSD, CPU Feature: AVX512F
+// Asm: VPMINSD, CPU Feature: AVX512
func (x Int32x16) MinMasked(y Int32x16, mask Mask32x16) Int32x16
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINSQ, CPU Feature: AVX512F
+// Asm: VPMINSQ, CPU Feature: AVX512
func (x Int64x2) MinMasked(y Int64x2, mask Mask64x2) Int64x2
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINSQ, CPU Feature: AVX512F
+// Asm: VPMINSQ, CPU Feature: AVX512
func (x Int64x4) MinMasked(y Int64x4, mask Mask64x4) Int64x4
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINSQ, CPU Feature: AVX512F
+// Asm: VPMINSQ, CPU Feature: AVX512
func (x Int64x8) MinMasked(y Int64x8, mask Mask64x8) Int64x8
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINUB, CPU Feature: AVX512BW
+// Asm: VPMINUB, CPU Feature: AVX512
func (x Uint8x16) MinMasked(y Uint8x16, mask Mask8x16) Uint8x16
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINUB, CPU Feature: AVX512BW
+// Asm: VPMINUB, CPU Feature: AVX512
func (x Uint8x32) MinMasked(y Uint8x32, mask Mask8x32) Uint8x32
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINUB, CPU Feature: AVX512BW
+// Asm: VPMINUB, CPU Feature: AVX512
func (x Uint8x64) MinMasked(y Uint8x64, mask Mask8x64) Uint8x64
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINUW, CPU Feature: AVX512BW
+// Asm: VPMINUW, CPU Feature: AVX512
func (x Uint16x8) MinMasked(y Uint16x8, mask Mask16x8) Uint16x8
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINUW, CPU Feature: AVX512BW
+// Asm: VPMINUW, CPU Feature: AVX512
func (x Uint16x16) MinMasked(y Uint16x16, mask Mask16x16) Uint16x16
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINUW, CPU Feature: AVX512BW
+// Asm: VPMINUW, CPU Feature: AVX512
func (x Uint16x32) MinMasked(y Uint16x32, mask Mask16x32) Uint16x32
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINUD, CPU Feature: AVX512F
+// Asm: VPMINUD, CPU Feature: AVX512
func (x Uint32x4) MinMasked(y Uint32x4, mask Mask32x4) Uint32x4
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINUD, CPU Feature: AVX512F
+// Asm: VPMINUD, CPU Feature: AVX512
func (x Uint32x8) MinMasked(y Uint32x8, mask Mask32x8) Uint32x8
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINUD, CPU Feature: AVX512F
+// Asm: VPMINUD, CPU Feature: AVX512
func (x Uint32x16) MinMasked(y Uint32x16, mask Mask32x16) Uint32x16
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINUQ, CPU Feature: AVX512F
+// Asm: VPMINUQ, CPU Feature: AVX512
func (x Uint64x2) MinMasked(y Uint64x2, mask Mask64x2) Uint64x2
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINUQ, CPU Feature: AVX512F
+// Asm: VPMINUQ, CPU Feature: AVX512
func (x Uint64x4) MinMasked(y Uint64x4, mask Mask64x4) Uint64x4
// MinMasked computes the minimum of corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMINUQ, CPU Feature: AVX512F
+// Asm: VPMINUQ, CPU Feature: AVX512
func (x Uint64x8) MinMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* Mul */
// Mul multiplies corresponding elements of two vectors.
//
-// Asm: VMULPS, CPU Feature: AVX512F
+// Asm: VMULPS, CPU Feature: AVX512
func (x Float32x16) Mul(y Float32x16) Float32x16
// Mul multiplies corresponding elements of two vectors.
// Mul multiplies corresponding elements of two vectors.
//
-// Asm: VMULPD, CPU Feature: AVX512F
+// Asm: VMULPD, CPU Feature: AVX512
func (x Float64x8) Mul(y Float64x8) Float64x8
// Mul multiplies corresponding elements of two vectors.
// Mul multiplies corresponding elements of two vectors.
//
-// Asm: VPMULLW, CPU Feature: AVX512BW
+// Asm: VPMULLW, CPU Feature: AVX512
func (x Int16x32) Mul(y Int16x32) Int16x32
// Mul multiplies corresponding elements of two vectors.
// Mul multiplies corresponding elements of two vectors.
//
-// Asm: VPMULLD, CPU Feature: AVX512F
+// Asm: VPMULLD, CPU Feature: AVX512
func (x Int32x16) Mul(y Int32x16) Int32x16
// Mul multiplies corresponding elements of two vectors.
//
-// Asm: VPMULLQ, CPU Feature: AVX512DQ
+// Asm: VPMULLQ, CPU Feature: AVX512
func (x Int64x2) Mul(y Int64x2) Int64x2
// Mul multiplies corresponding elements of two vectors.
//
-// Asm: VPMULLQ, CPU Feature: AVX512DQ
+// Asm: VPMULLQ, CPU Feature: AVX512
func (x Int64x4) Mul(y Int64x4) Int64x4
// Mul multiplies corresponding elements of two vectors.
//
-// Asm: VPMULLQ, CPU Feature: AVX512DQ
+// Asm: VPMULLQ, CPU Feature: AVX512
func (x Int64x8) Mul(y Int64x8) Int64x8
// Mul multiplies corresponding elements of two vectors.
// Mul multiplies corresponding elements of two vectors.
//
-// Asm: VPMULLW, CPU Feature: AVX512BW
+// Asm: VPMULLW, CPU Feature: AVX512
func (x Uint16x32) Mul(y Uint16x32) Uint16x32
// Mul multiplies corresponding elements of two vectors.
// Mul multiplies corresponding elements of two vectors.
//
-// Asm: VPMULLD, CPU Feature: AVX512F
+// Asm: VPMULLD, CPU Feature: AVX512
func (x Uint32x16) Mul(y Uint32x16) Uint32x16
// Mul multiplies corresponding elements of two vectors.
//
-// Asm: VPMULLQ, CPU Feature: AVX512DQ
+// Asm: VPMULLQ, CPU Feature: AVX512
func (x Uint64x2) Mul(y Uint64x2) Uint64x2
// Mul multiplies corresponding elements of two vectors.
//
-// Asm: VPMULLQ, CPU Feature: AVX512DQ
+// Asm: VPMULLQ, CPU Feature: AVX512
func (x Uint64x4) Mul(y Uint64x4) Uint64x4
// Mul multiplies corresponding elements of two vectors.
//
-// Asm: VPMULLQ, CPU Feature: AVX512DQ
+// Asm: VPMULLQ, CPU Feature: AVX512
func (x Uint64x8) Mul(y Uint64x8) Uint64x8
/* MulAdd */
// MulAdd performs a fused (x * y) + z.
//
-// Asm: VFMADD213PS, CPU Feature: AVX512F
+// Asm: VFMADD213PS, CPU Feature: AVX512
func (x Float32x4) MulAdd(y Float32x4, z Float32x4) Float32x4
// MulAdd performs a fused (x * y) + z.
//
-// Asm: VFMADD213PS, CPU Feature: AVX512F
+// Asm: VFMADD213PS, CPU Feature: AVX512
func (x Float32x8) MulAdd(y Float32x8, z Float32x8) Float32x8
// MulAdd performs a fused (x * y) + z.
//
-// Asm: VFMADD213PS, CPU Feature: AVX512F
+// Asm: VFMADD213PS, CPU Feature: AVX512
func (x Float32x16) MulAdd(y Float32x16, z Float32x16) Float32x16
// MulAdd performs a fused (x * y) + z.
//
-// Asm: VFMADD213PD, CPU Feature: AVX512F
+// Asm: VFMADD213PD, CPU Feature: AVX512
func (x Float64x2) MulAdd(y Float64x2, z Float64x2) Float64x2
// MulAdd performs a fused (x * y) + z.
//
-// Asm: VFMADD213PD, CPU Feature: AVX512F
+// Asm: VFMADD213PD, CPU Feature: AVX512
func (x Float64x4) MulAdd(y Float64x4, z Float64x4) Float64x4
// MulAdd performs a fused (x * y) + z.
//
-// Asm: VFMADD213PD, CPU Feature: AVX512F
+// Asm: VFMADD213PD, CPU Feature: AVX512
func (x Float64x8) MulAdd(y Float64x8, z Float64x8) Float64x8
/* MulAddMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMADD213PS, CPU Feature: AVX512F
+// Asm: VFMADD213PS, CPU Feature: AVX512
func (x Float32x4) MulAddMasked(y Float32x4, z Float32x4, mask Mask32x4) Float32x4
// MulAddMasked performs a fused (x * y) + z.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMADD213PS, CPU Feature: AVX512F
+// Asm: VFMADD213PS, CPU Feature: AVX512
func (x Float32x8) MulAddMasked(y Float32x8, z Float32x8, mask Mask32x8) Float32x8
// MulAddMasked performs a fused (x * y) + z.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMADD213PS, CPU Feature: AVX512F
+// Asm: VFMADD213PS, CPU Feature: AVX512
func (x Float32x16) MulAddMasked(y Float32x16, z Float32x16, mask Mask32x16) Float32x16
// MulAddMasked performs a fused (x * y) + z.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMADD213PD, CPU Feature: AVX512F
+// Asm: VFMADD213PD, CPU Feature: AVX512
func (x Float64x2) MulAddMasked(y Float64x2, z Float64x2, mask Mask64x2) Float64x2
// MulAddMasked performs a fused (x * y) + z.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMADD213PD, CPU Feature: AVX512F
+// Asm: VFMADD213PD, CPU Feature: AVX512
func (x Float64x4) MulAddMasked(y Float64x4, z Float64x4, mask Mask64x4) Float64x4
// MulAddMasked performs a fused (x * y) + z.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMADD213PD, CPU Feature: AVX512F
+// Asm: VFMADD213PD, CPU Feature: AVX512
func (x Float64x8) MulAddMasked(y Float64x8, z Float64x8, mask Mask64x8) Float64x8
/* MulAddSub */
// MulAddSub performs a fused (x * y) - z for odd-indexed elements, and (x * y) + z for even-indexed elements.
//
-// Asm: VFMADDSUB213PS, CPU Feature: AVX512F
+// Asm: VFMADDSUB213PS, CPU Feature: AVX512
func (x Float32x4) MulAddSub(y Float32x4, z Float32x4) Float32x4
// MulAddSub performs a fused (x * y) - z for odd-indexed elements, and (x * y) + z for even-indexed elements.
//
-// Asm: VFMADDSUB213PS, CPU Feature: AVX512F
+// Asm: VFMADDSUB213PS, CPU Feature: AVX512
func (x Float32x8) MulAddSub(y Float32x8, z Float32x8) Float32x8
// MulAddSub performs a fused (x * y) - z for odd-indexed elements, and (x * y) + z for even-indexed elements.
//
-// Asm: VFMADDSUB213PS, CPU Feature: AVX512F
+// Asm: VFMADDSUB213PS, CPU Feature: AVX512
func (x Float32x16) MulAddSub(y Float32x16, z Float32x16) Float32x16
// MulAddSub performs a fused (x * y) - z for odd-indexed elements, and (x * y) + z for even-indexed elements.
//
-// Asm: VFMADDSUB213PD, CPU Feature: AVX512F
+// Asm: VFMADDSUB213PD, CPU Feature: AVX512
func (x Float64x2) MulAddSub(y Float64x2, z Float64x2) Float64x2
// MulAddSub performs a fused (x * y) - z for odd-indexed elements, and (x * y) + z for even-indexed elements.
//
-// Asm: VFMADDSUB213PD, CPU Feature: AVX512F
+// Asm: VFMADDSUB213PD, CPU Feature: AVX512
func (x Float64x4) MulAddSub(y Float64x4, z Float64x4) Float64x4
// MulAddSub performs a fused (x * y) - z for odd-indexed elements, and (x * y) + z for even-indexed elements.
//
-// Asm: VFMADDSUB213PD, CPU Feature: AVX512F
+// Asm: VFMADDSUB213PD, CPU Feature: AVX512
func (x Float64x8) MulAddSub(y Float64x8, z Float64x8) Float64x8
/* MulAddSubMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMADDSUB213PS, CPU Feature: AVX512F
+// Asm: VFMADDSUB213PS, CPU Feature: AVX512
func (x Float32x4) MulAddSubMasked(y Float32x4, z Float32x4, mask Mask32x4) Float32x4
// MulAddSubMasked performs a fused (x * y) - z for odd-indexed elements, and (x * y) + z for even-indexed elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMADDSUB213PS, CPU Feature: AVX512F
+// Asm: VFMADDSUB213PS, CPU Feature: AVX512
func (x Float32x8) MulAddSubMasked(y Float32x8, z Float32x8, mask Mask32x8) Float32x8
// MulAddSubMasked performs a fused (x * y) - z for odd-indexed elements, and (x * y) + z for even-indexed elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMADDSUB213PS, CPU Feature: AVX512F
+// Asm: VFMADDSUB213PS, CPU Feature: AVX512
func (x Float32x16) MulAddSubMasked(y Float32x16, z Float32x16, mask Mask32x16) Float32x16
// MulAddSubMasked performs a fused (x * y) - z for odd-indexed elements, and (x * y) + z for even-indexed elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMADDSUB213PD, CPU Feature: AVX512F
+// Asm: VFMADDSUB213PD, CPU Feature: AVX512
func (x Float64x2) MulAddSubMasked(y Float64x2, z Float64x2, mask Mask64x2) Float64x2
// MulAddSubMasked performs a fused (x * y) - z for odd-indexed elements, and (x * y) + z for even-indexed elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMADDSUB213PD, CPU Feature: AVX512F
+// Asm: VFMADDSUB213PD, CPU Feature: AVX512
func (x Float64x4) MulAddSubMasked(y Float64x4, z Float64x4, mask Mask64x4) Float64x4
// MulAddSubMasked performs a fused (x * y) - z for odd-indexed elements, and (x * y) + z for even-indexed elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMADDSUB213PD, CPU Feature: AVX512F
+// Asm: VFMADDSUB213PD, CPU Feature: AVX512
func (x Float64x8) MulAddSubMasked(y Float64x8, z Float64x8, mask Mask64x8) Float64x8
/* MulEvenWiden */
// MulHigh multiplies elements and stores the high part of the result.
//
-// Asm: VPMULHW, CPU Feature: AVX512BW
+// Asm: VPMULHW, CPU Feature: AVX512
func (x Int16x32) MulHigh(y Int16x32) Int16x32
// MulHigh multiplies elements and stores the high part of the result.
// MulHigh multiplies elements and stores the high part of the result.
//
-// Asm: VPMULHUW, CPU Feature: AVX512BW
+// Asm: VPMULHUW, CPU Feature: AVX512
func (x Uint16x32) MulHigh(y Uint16x32) Uint16x32
/* MulHighMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULHW, CPU Feature: AVX512BW
+// Asm: VPMULHW, CPU Feature: AVX512
func (x Int16x8) MulHighMasked(y Int16x8, mask Mask16x8) Int16x8
// MulHighMasked multiplies elements and stores the high part of the result.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULHW, CPU Feature: AVX512BW
+// Asm: VPMULHW, CPU Feature: AVX512
func (x Int16x16) MulHighMasked(y Int16x16, mask Mask16x16) Int16x16
// MulHighMasked multiplies elements and stores the high part of the result.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULHW, CPU Feature: AVX512BW
+// Asm: VPMULHW, CPU Feature: AVX512
func (x Int16x32) MulHighMasked(y Int16x32, mask Mask16x32) Int16x32
// MulHighMasked multiplies elements and stores the high part of the result.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULHUW, CPU Feature: AVX512BW
+// Asm: VPMULHUW, CPU Feature: AVX512
func (x Uint16x8) MulHighMasked(y Uint16x8, mask Mask16x8) Uint16x8
// MulHighMasked multiplies elements and stores the high part of the result.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULHUW, CPU Feature: AVX512BW
+// Asm: VPMULHUW, CPU Feature: AVX512
func (x Uint16x16) MulHighMasked(y Uint16x16, mask Mask16x16) Uint16x16
// MulHighMasked multiplies elements and stores the high part of the result.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULHUW, CPU Feature: AVX512BW
+// Asm: VPMULHUW, CPU Feature: AVX512
func (x Uint16x32) MulHighMasked(y Uint16x32, mask Mask16x32) Uint16x32
/* MulMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMULPS, CPU Feature: AVX512F
+// Asm: VMULPS, CPU Feature: AVX512
func (x Float32x4) MulMasked(y Float32x4, mask Mask32x4) Float32x4
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMULPS, CPU Feature: AVX512F
+// Asm: VMULPS, CPU Feature: AVX512
func (x Float32x8) MulMasked(y Float32x8, mask Mask32x8) Float32x8
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMULPS, CPU Feature: AVX512F
+// Asm: VMULPS, CPU Feature: AVX512
func (x Float32x16) MulMasked(y Float32x16, mask Mask32x16) Float32x16
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMULPD, CPU Feature: AVX512F
+// Asm: VMULPD, CPU Feature: AVX512
func (x Float64x2) MulMasked(y Float64x2, mask Mask64x2) Float64x2
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMULPD, CPU Feature: AVX512F
+// Asm: VMULPD, CPU Feature: AVX512
func (x Float64x4) MulMasked(y Float64x4, mask Mask64x4) Float64x4
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VMULPD, CPU Feature: AVX512F
+// Asm: VMULPD, CPU Feature: AVX512
func (x Float64x8) MulMasked(y Float64x8, mask Mask64x8) Float64x8
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLW, CPU Feature: AVX512BW
+// Asm: VPMULLW, CPU Feature: AVX512
func (x Int16x8) MulMasked(y Int16x8, mask Mask16x8) Int16x8
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLW, CPU Feature: AVX512BW
+// Asm: VPMULLW, CPU Feature: AVX512
func (x Int16x16) MulMasked(y Int16x16, mask Mask16x16) Int16x16
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLW, CPU Feature: AVX512BW
+// Asm: VPMULLW, CPU Feature: AVX512
func (x Int16x32) MulMasked(y Int16x32, mask Mask16x32) Int16x32
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLD, CPU Feature: AVX512F
+// Asm: VPMULLD, CPU Feature: AVX512
func (x Int32x4) MulMasked(y Int32x4, mask Mask32x4) Int32x4
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLD, CPU Feature: AVX512F
+// Asm: VPMULLD, CPU Feature: AVX512
func (x Int32x8) MulMasked(y Int32x8, mask Mask32x8) Int32x8
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLD, CPU Feature: AVX512F
+// Asm: VPMULLD, CPU Feature: AVX512
func (x Int32x16) MulMasked(y Int32x16, mask Mask32x16) Int32x16
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLQ, CPU Feature: AVX512DQ
+// Asm: VPMULLQ, CPU Feature: AVX512
func (x Int64x2) MulMasked(y Int64x2, mask Mask64x2) Int64x2
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLQ, CPU Feature: AVX512DQ
+// Asm: VPMULLQ, CPU Feature: AVX512
func (x Int64x4) MulMasked(y Int64x4, mask Mask64x4) Int64x4
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLQ, CPU Feature: AVX512DQ
+// Asm: VPMULLQ, CPU Feature: AVX512
func (x Int64x8) MulMasked(y Int64x8, mask Mask64x8) Int64x8
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLW, CPU Feature: AVX512BW
+// Asm: VPMULLW, CPU Feature: AVX512
func (x Uint16x8) MulMasked(y Uint16x8, mask Mask16x8) Uint16x8
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLW, CPU Feature: AVX512BW
+// Asm: VPMULLW, CPU Feature: AVX512
func (x Uint16x16) MulMasked(y Uint16x16, mask Mask16x16) Uint16x16
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLW, CPU Feature: AVX512BW
+// Asm: VPMULLW, CPU Feature: AVX512
func (x Uint16x32) MulMasked(y Uint16x32, mask Mask16x32) Uint16x32
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLD, CPU Feature: AVX512F
+// Asm: VPMULLD, CPU Feature: AVX512
func (x Uint32x4) MulMasked(y Uint32x4, mask Mask32x4) Uint32x4
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLD, CPU Feature: AVX512F
+// Asm: VPMULLD, CPU Feature: AVX512
func (x Uint32x8) MulMasked(y Uint32x8, mask Mask32x8) Uint32x8
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLD, CPU Feature: AVX512F
+// Asm: VPMULLD, CPU Feature: AVX512
func (x Uint32x16) MulMasked(y Uint32x16, mask Mask32x16) Uint32x16
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLQ, CPU Feature: AVX512DQ
+// Asm: VPMULLQ, CPU Feature: AVX512
func (x Uint64x2) MulMasked(y Uint64x2, mask Mask64x2) Uint64x2
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLQ, CPU Feature: AVX512DQ
+// Asm: VPMULLQ, CPU Feature: AVX512
func (x Uint64x4) MulMasked(y Uint64x4, mask Mask64x4) Uint64x4
// MulMasked multiplies corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPMULLQ, CPU Feature: AVX512DQ
+// Asm: VPMULLQ, CPU Feature: AVX512
func (x Uint64x8) MulMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* MulSubAdd */
// MulSubAdd performs a fused (x * y) + z for odd-indexed elements, and (x * y) - z for even-indexed elements.
//
-// Asm: VFMSUBADD213PS, CPU Feature: AVX512F
+// Asm: VFMSUBADD213PS, CPU Feature: AVX512
func (x Float32x4) MulSubAdd(y Float32x4, z Float32x4) Float32x4
// MulSubAdd performs a fused (x * y) + z for odd-indexed elements, and (x * y) - z for even-indexed elements.
//
-// Asm: VFMSUBADD213PS, CPU Feature: AVX512F
+// Asm: VFMSUBADD213PS, CPU Feature: AVX512
func (x Float32x8) MulSubAdd(y Float32x8, z Float32x8) Float32x8
// MulSubAdd performs a fused (x * y) + z for odd-indexed elements, and (x * y) - z for even-indexed elements.
//
-// Asm: VFMSUBADD213PS, CPU Feature: AVX512F
+// Asm: VFMSUBADD213PS, CPU Feature: AVX512
func (x Float32x16) MulSubAdd(y Float32x16, z Float32x16) Float32x16
// MulSubAdd performs a fused (x * y) + z for odd-indexed elements, and (x * y) - z for even-indexed elements.
//
-// Asm: VFMSUBADD213PD, CPU Feature: AVX512F
+// Asm: VFMSUBADD213PD, CPU Feature: AVX512
func (x Float64x2) MulSubAdd(y Float64x2, z Float64x2) Float64x2
// MulSubAdd performs a fused (x * y) + z for odd-indexed elements, and (x * y) - z for even-indexed elements.
//
-// Asm: VFMSUBADD213PD, CPU Feature: AVX512F
+// Asm: VFMSUBADD213PD, CPU Feature: AVX512
func (x Float64x4) MulSubAdd(y Float64x4, z Float64x4) Float64x4
// MulSubAdd performs a fused (x * y) + z for odd-indexed elements, and (x * y) - z for even-indexed elements.
//
-// Asm: VFMSUBADD213PD, CPU Feature: AVX512F
+// Asm: VFMSUBADD213PD, CPU Feature: AVX512
func (x Float64x8) MulSubAdd(y Float64x8, z Float64x8) Float64x8
/* MulSubAddMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMSUBADD213PS, CPU Feature: AVX512F
+// Asm: VFMSUBADD213PS, CPU Feature: AVX512
func (x Float32x4) MulSubAddMasked(y Float32x4, z Float32x4, mask Mask32x4) Float32x4
// MulSubAddMasked performs a fused (x * y) + z for odd-indexed elements, and (x * y) - z for even-indexed elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMSUBADD213PS, CPU Feature: AVX512F
+// Asm: VFMSUBADD213PS, CPU Feature: AVX512
func (x Float32x8) MulSubAddMasked(y Float32x8, z Float32x8, mask Mask32x8) Float32x8
// MulSubAddMasked performs a fused (x * y) + z for odd-indexed elements, and (x * y) - z for even-indexed elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMSUBADD213PS, CPU Feature: AVX512F
+// Asm: VFMSUBADD213PS, CPU Feature: AVX512
func (x Float32x16) MulSubAddMasked(y Float32x16, z Float32x16, mask Mask32x16) Float32x16
// MulSubAddMasked performs a fused (x * y) + z for odd-indexed elements, and (x * y) - z for even-indexed elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMSUBADD213PD, CPU Feature: AVX512F
+// Asm: VFMSUBADD213PD, CPU Feature: AVX512
func (x Float64x2) MulSubAddMasked(y Float64x2, z Float64x2, mask Mask64x2) Float64x2
// MulSubAddMasked performs a fused (x * y) + z for odd-indexed elements, and (x * y) - z for even-indexed elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMSUBADD213PD, CPU Feature: AVX512F
+// Asm: VFMSUBADD213PD, CPU Feature: AVX512
func (x Float64x4) MulSubAddMasked(y Float64x4, z Float64x4, mask Mask64x4) Float64x4
// MulSubAddMasked performs a fused (x * y) + z for odd-indexed elements, and (x * y) - z for even-indexed elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VFMSUBADD213PD, CPU Feature: AVX512F
+// Asm: VFMSUBADD213PD, CPU Feature: AVX512
func (x Float64x8) MulSubAddMasked(y Float64x8, z Float64x8, mask Mask64x8) Float64x8
/* NotEqual */
// NotEqual compares for inequality.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) NotEqual(y Float32x16) Mask32x16
// NotEqual compares for inequality.
// NotEqual compares for inequality.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) NotEqual(y Float64x8) Mask64x8
// NotEqual compares for inequality.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x16) NotEqual(y Int8x16) Mask8x16
// NotEqual compares for inequality.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x32) NotEqual(y Int8x32) Mask8x32
// NotEqual compares for inequality.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x64) NotEqual(y Int8x64) Mask8x64
// NotEqual compares for inequality.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x8) NotEqual(y Int16x8) Mask16x8
// NotEqual compares for inequality.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x16) NotEqual(y Int16x16) Mask16x16
// NotEqual compares for inequality.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x32) NotEqual(y Int16x32) Mask16x32
// NotEqual compares for inequality.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x4) NotEqual(y Int32x4) Mask32x4
// NotEqual compares for inequality.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x8) NotEqual(y Int32x8) Mask32x8
// NotEqual compares for inequality.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x16) NotEqual(y Int32x16) Mask32x16
// NotEqual compares for inequality.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x2) NotEqual(y Int64x2) Mask64x2
// NotEqual compares for inequality.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x4) NotEqual(y Int64x4) Mask64x4
// NotEqual compares for inequality.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x8) NotEqual(y Int64x8) Mask64x8
// NotEqual compares for inequality.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x16) NotEqual(y Uint8x16) Mask8x16
// NotEqual compares for inequality.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x32) NotEqual(y Uint8x32) Mask8x32
// NotEqual compares for inequality.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x64) NotEqual(y Uint8x64) Mask8x64
// NotEqual compares for inequality.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x8) NotEqual(y Uint16x8) Mask16x8
// NotEqual compares for inequality.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x16) NotEqual(y Uint16x16) Mask16x16
// NotEqual compares for inequality.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x32) NotEqual(y Uint16x32) Mask16x32
// NotEqual compares for inequality.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x4) NotEqual(y Uint32x4) Mask32x4
// NotEqual compares for inequality.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x8) NotEqual(y Uint32x8) Mask32x8
// NotEqual compares for inequality.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x16) NotEqual(y Uint32x16) Mask32x16
// NotEqual compares for inequality.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x2) NotEqual(y Uint64x2) Mask64x2
// NotEqual compares for inequality.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x4) NotEqual(y Uint64x4) Mask64x4
// NotEqual compares for inequality.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x8) NotEqual(y Uint64x8) Mask64x8
/* NotEqualMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x4) NotEqualMasked(y Float32x4, mask Mask32x4) Mask32x4
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x8) NotEqualMasked(y Float32x8, mask Mask32x8) Mask32x8
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPS, CPU Feature: AVX512F
+// Asm: VCMPPS, CPU Feature: AVX512
func (x Float32x16) NotEqualMasked(y Float32x16, mask Mask32x16) Mask32x16
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x2) NotEqualMasked(y Float64x2, mask Mask64x2) Mask64x2
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x4) NotEqualMasked(y Float64x4, mask Mask64x4) Mask64x4
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VCMPPD, CPU Feature: AVX512F
+// Asm: VCMPPD, CPU Feature: AVX512
func (x Float64x8) NotEqualMasked(y Float64x8, mask Mask64x8) Mask64x8
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x16) NotEqualMasked(y Int8x16, mask Mask8x16) Mask8x16
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x32) NotEqualMasked(y Int8x32, mask Mask8x32) Mask8x32
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPB, CPU Feature: AVX512BW
+// Asm: VPCMPB, CPU Feature: AVX512
func (x Int8x64) NotEqualMasked(y Int8x64, mask Mask8x64) Mask8x64
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x8) NotEqualMasked(y Int16x8, mask Mask16x8) Mask16x8
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x16) NotEqualMasked(y Int16x16, mask Mask16x16) Mask16x16
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPW, CPU Feature: AVX512BW
+// Asm: VPCMPW, CPU Feature: AVX512
func (x Int16x32) NotEqualMasked(y Int16x32, mask Mask16x32) Mask16x32
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x4) NotEqualMasked(y Int32x4, mask Mask32x4) Mask32x4
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x8) NotEqualMasked(y Int32x8, mask Mask32x8) Mask32x8
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPD, CPU Feature: AVX512F
+// Asm: VPCMPD, CPU Feature: AVX512
func (x Int32x16) NotEqualMasked(y Int32x16, mask Mask32x16) Mask32x16
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x2) NotEqualMasked(y Int64x2, mask Mask64x2) Mask64x2
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x4) NotEqualMasked(y Int64x4, mask Mask64x4) Mask64x4
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPQ, CPU Feature: AVX512F
+// Asm: VPCMPQ, CPU Feature: AVX512
func (x Int64x8) NotEqualMasked(y Int64x8, mask Mask64x8) Mask64x8
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x16) NotEqualMasked(y Uint8x16, mask Mask8x16) Mask8x16
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x32) NotEqualMasked(y Uint8x32, mask Mask8x32) Mask8x32
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUB, CPU Feature: AVX512BW
+// Asm: VPCMPUB, CPU Feature: AVX512
func (x Uint8x64) NotEqualMasked(y Uint8x64, mask Mask8x64) Mask8x64
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x8) NotEqualMasked(y Uint16x8, mask Mask16x8) Mask16x8
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x16) NotEqualMasked(y Uint16x16, mask Mask16x16) Mask16x16
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUW, CPU Feature: AVX512BW
+// Asm: VPCMPUW, CPU Feature: AVX512
func (x Uint16x32) NotEqualMasked(y Uint16x32, mask Mask16x32) Mask16x32
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x4) NotEqualMasked(y Uint32x4, mask Mask32x4) Mask32x4
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x8) NotEqualMasked(y Uint32x8, mask Mask32x8) Mask32x8
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUD, CPU Feature: AVX512F
+// Asm: VPCMPUD, CPU Feature: AVX512
func (x Uint32x16) NotEqualMasked(y Uint32x16, mask Mask32x16) Mask32x16
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x2) NotEqualMasked(y Uint64x2, mask Mask64x2) Mask64x2
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x4) NotEqualMasked(y Uint64x4, mask Mask64x4) Mask64x4
// NotEqualMasked compares for inequality.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPCMPUQ, CPU Feature: AVX512F
+// Asm: VPCMPUQ, CPU Feature: AVX512
func (x Uint64x8) NotEqualMasked(y Uint64x8, mask Mask64x8) Mask64x8
/* OnesCount */
// Or performs a bitwise OR operation between two vectors.
//
-// Asm: VPORD, CPU Feature: AVX512F
+// Asm: VPORD, CPU Feature: AVX512
func (x Int8x64) Or(y Int8x64) Int8x64
// Or performs a bitwise OR operation between two vectors.
// Or performs a bitwise OR operation between two vectors.
//
-// Asm: VPORD, CPU Feature: AVX512F
+// Asm: VPORD, CPU Feature: AVX512
func (x Int16x32) Or(y Int16x32) Int16x32
// Or performs a bitwise OR operation between two vectors.
// Or performs a bitwise OR operation between two vectors.
//
-// Asm: VPORD, CPU Feature: AVX512F
+// Asm: VPORD, CPU Feature: AVX512
func (x Int32x16) Or(y Int32x16) Int32x16
// Or performs a bitwise OR operation between two vectors.
// Or performs a bitwise OR operation between two vectors.
//
-// Asm: VPORQ, CPU Feature: AVX512F
+// Asm: VPORQ, CPU Feature: AVX512
func (x Int64x8) Or(y Int64x8) Int64x8
// Or performs a bitwise OR operation between two vectors.
// Or performs a bitwise OR operation between two vectors.
//
-// Asm: VPORD, CPU Feature: AVX512F
+// Asm: VPORD, CPU Feature: AVX512
func (x Uint8x64) Or(y Uint8x64) Uint8x64
// Or performs a bitwise OR operation between two vectors.
// Or performs a bitwise OR operation between two vectors.
//
-// Asm: VPORD, CPU Feature: AVX512F
+// Asm: VPORD, CPU Feature: AVX512
func (x Uint16x32) Or(y Uint16x32) Uint16x32
// Or performs a bitwise OR operation between two vectors.
// Or performs a bitwise OR operation between two vectors.
//
-// Asm: VPORD, CPU Feature: AVX512F
+// Asm: VPORD, CPU Feature: AVX512
func (x Uint32x16) Or(y Uint32x16) Uint32x16
// Or performs a bitwise OR operation between two vectors.
// Or performs a bitwise OR operation between two vectors.
//
-// Asm: VPORQ, CPU Feature: AVX512F
+// Asm: VPORQ, CPU Feature: AVX512
func (x Uint64x8) Or(y Uint64x8) Uint64x8
/* OrMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPORD, CPU Feature: AVX512F
+// Asm: VPORD, CPU Feature: AVX512
func (x Int32x4) OrMasked(y Int32x4, mask Mask32x4) Int32x4
// OrMasked performs a bitwise OR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPORD, CPU Feature: AVX512F
+// Asm: VPORD, CPU Feature: AVX512
func (x Int32x8) OrMasked(y Int32x8, mask Mask32x8) Int32x8
// OrMasked performs a bitwise OR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPORD, CPU Feature: AVX512F
+// Asm: VPORD, CPU Feature: AVX512
func (x Int32x16) OrMasked(y Int32x16, mask Mask32x16) Int32x16
// OrMasked performs a bitwise OR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPORQ, CPU Feature: AVX512F
+// Asm: VPORQ, CPU Feature: AVX512
func (x Int64x2) OrMasked(y Int64x2, mask Mask64x2) Int64x2
// OrMasked performs a bitwise OR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPORQ, CPU Feature: AVX512F
+// Asm: VPORQ, CPU Feature: AVX512
func (x Int64x4) OrMasked(y Int64x4, mask Mask64x4) Int64x4
// OrMasked performs a bitwise OR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPORQ, CPU Feature: AVX512F
+// Asm: VPORQ, CPU Feature: AVX512
func (x Int64x8) OrMasked(y Int64x8, mask Mask64x8) Int64x8
// OrMasked performs a bitwise OR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPORD, CPU Feature: AVX512F
+// Asm: VPORD, CPU Feature: AVX512
func (x Uint32x4) OrMasked(y Uint32x4, mask Mask32x4) Uint32x4
// OrMasked performs a bitwise OR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPORD, CPU Feature: AVX512F
+// Asm: VPORD, CPU Feature: AVX512
func (x Uint32x8) OrMasked(y Uint32x8, mask Mask32x8) Uint32x8
// OrMasked performs a bitwise OR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPORD, CPU Feature: AVX512F
+// Asm: VPORD, CPU Feature: AVX512
func (x Uint32x16) OrMasked(y Uint32x16, mask Mask32x16) Uint32x16
// OrMasked performs a bitwise OR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPORQ, CPU Feature: AVX512F
+// Asm: VPORQ, CPU Feature: AVX512
func (x Uint64x2) OrMasked(y Uint64x2, mask Mask64x2) Uint64x2
// OrMasked performs a bitwise OR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPORQ, CPU Feature: AVX512F
+// Asm: VPORQ, CPU Feature: AVX512
func (x Uint64x4) OrMasked(y Uint64x4, mask Mask64x4) Uint64x4
// OrMasked performs a bitwise OR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPORQ, CPU Feature: AVX512F
+// Asm: VPORQ, CPU Feature: AVX512
func (x Uint64x8) OrMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* Permute */
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMW, CPU Feature: AVX512BW
+// Asm: VPERMW, CPU Feature: AVX512
func (x Int16x8) Permute(indices Uint16x8) Int16x8
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMW, CPU Feature: AVX512BW
+// Asm: VPERMW, CPU Feature: AVX512
func (x Uint16x8) Permute(indices Uint16x8) Uint16x8
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMW, CPU Feature: AVX512BW
+// Asm: VPERMW, CPU Feature: AVX512
func (x Int16x16) Permute(indices Uint16x16) Int16x16
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMW, CPU Feature: AVX512BW
+// Asm: VPERMW, CPU Feature: AVX512
func (x Uint16x16) Permute(indices Uint16x16) Uint16x16
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMW, CPU Feature: AVX512BW
+// Asm: VPERMW, CPU Feature: AVX512
func (x Int16x32) Permute(indices Uint16x32) Int16x32
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMW, CPU Feature: AVX512BW
+// Asm: VPERMW, CPU Feature: AVX512
func (x Uint16x32) Permute(indices Uint16x32) Uint16x32
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMPS, CPU Feature: AVX512F
+// Asm: VPERMPS, CPU Feature: AVX512
func (x Float32x16) Permute(indices Uint32x16) Float32x16
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMD, CPU Feature: AVX512F
+// Asm: VPERMD, CPU Feature: AVX512
func (x Int32x16) Permute(indices Uint32x16) Int32x16
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMD, CPU Feature: AVX512F
+// Asm: VPERMD, CPU Feature: AVX512
func (x Uint32x16) Permute(indices Uint32x16) Uint32x16
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMPD, CPU Feature: AVX512F
+// Asm: VPERMPD, CPU Feature: AVX512
func (x Float64x4) Permute(indices Uint64x4) Float64x4
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMQ, CPU Feature: AVX512F
+// Asm: VPERMQ, CPU Feature: AVX512
func (x Int64x4) Permute(indices Uint64x4) Int64x4
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMQ, CPU Feature: AVX512F
+// Asm: VPERMQ, CPU Feature: AVX512
func (x Uint64x4) Permute(indices Uint64x4) Uint64x4
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMPD, CPU Feature: AVX512F
+// Asm: VPERMPD, CPU Feature: AVX512
func (x Float64x8) Permute(indices Uint64x8) Float64x8
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMQ, CPU Feature: AVX512F
+// Asm: VPERMQ, CPU Feature: AVX512
func (x Int64x8) Permute(indices Uint64x8) Int64x8
// Permute performs a full permutation of vector x using indices:
// result := {x[indices[0]], x[indices[1]], ..., x[indices[n]]}
// Only the needed bits to represent x's index are used in indices' elements.
//
-// Asm: VPERMQ, CPU Feature: AVX512F
+// Asm: VPERMQ, CPU Feature: AVX512
func (x Uint64x8) Permute(indices Uint64x8) Uint64x8
/* Permute2 */
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2W, CPU Feature: AVX512BW
+// Asm: VPERMI2W, CPU Feature: AVX512
func (x Int16x8) Permute2(y Int16x8, indices Uint16x8) Int16x8
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2W, CPU Feature: AVX512BW
+// Asm: VPERMI2W, CPU Feature: AVX512
func (x Uint16x8) Permute2(y Uint16x8, indices Uint16x8) Uint16x8
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2W, CPU Feature: AVX512BW
+// Asm: VPERMI2W, CPU Feature: AVX512
func (x Int16x16) Permute2(y Int16x16, indices Uint16x16) Int16x16
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2W, CPU Feature: AVX512BW
+// Asm: VPERMI2W, CPU Feature: AVX512
func (x Uint16x16) Permute2(y Uint16x16, indices Uint16x16) Uint16x16
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2W, CPU Feature: AVX512BW
+// Asm: VPERMI2W, CPU Feature: AVX512
func (x Int16x32) Permute2(y Int16x32, indices Uint16x32) Int16x32
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2W, CPU Feature: AVX512BW
+// Asm: VPERMI2W, CPU Feature: AVX512
func (x Uint16x32) Permute2(y Uint16x32, indices Uint16x32) Uint16x32
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2PS, CPU Feature: AVX512F
+// Asm: VPERMI2PS, CPU Feature: AVX512
func (x Float32x4) Permute2(y Float32x4, indices Uint32x4) Float32x4
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2D, CPU Feature: AVX512F
+// Asm: VPERMI2D, CPU Feature: AVX512
func (x Int32x4) Permute2(y Int32x4, indices Uint32x4) Int32x4
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2D, CPU Feature: AVX512F
+// Asm: VPERMI2D, CPU Feature: AVX512
func (x Uint32x4) Permute2(y Uint32x4, indices Uint32x4) Uint32x4
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2PS, CPU Feature: AVX512F
+// Asm: VPERMI2PS, CPU Feature: AVX512
func (x Float32x8) Permute2(y Float32x8, indices Uint32x8) Float32x8
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2D, CPU Feature: AVX512F
+// Asm: VPERMI2D, CPU Feature: AVX512
func (x Int32x8) Permute2(y Int32x8, indices Uint32x8) Int32x8
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2D, CPU Feature: AVX512F
+// Asm: VPERMI2D, CPU Feature: AVX512
func (x Uint32x8) Permute2(y Uint32x8, indices Uint32x8) Uint32x8
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2PS, CPU Feature: AVX512F
+// Asm: VPERMI2PS, CPU Feature: AVX512
func (x Float32x16) Permute2(y Float32x16, indices Uint32x16) Float32x16
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2D, CPU Feature: AVX512F
+// Asm: VPERMI2D, CPU Feature: AVX512
func (x Int32x16) Permute2(y Int32x16, indices Uint32x16) Int32x16
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2D, CPU Feature: AVX512F
+// Asm: VPERMI2D, CPU Feature: AVX512
func (x Uint32x16) Permute2(y Uint32x16, indices Uint32x16) Uint32x16
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2PD, CPU Feature: AVX512F
+// Asm: VPERMI2PD, CPU Feature: AVX512
func (x Float64x2) Permute2(y Float64x2, indices Uint64x2) Float64x2
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2Q, CPU Feature: AVX512F
+// Asm: VPERMI2Q, CPU Feature: AVX512
func (x Int64x2) Permute2(y Int64x2, indices Uint64x2) Int64x2
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2Q, CPU Feature: AVX512F
+// Asm: VPERMI2Q, CPU Feature: AVX512
func (x Uint64x2) Permute2(y Uint64x2, indices Uint64x2) Uint64x2
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2PD, CPU Feature: AVX512F
+// Asm: VPERMI2PD, CPU Feature: AVX512
func (x Float64x4) Permute2(y Float64x4, indices Uint64x4) Float64x4
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2Q, CPU Feature: AVX512F
+// Asm: VPERMI2Q, CPU Feature: AVX512
func (x Int64x4) Permute2(y Int64x4, indices Uint64x4) Int64x4
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2Q, CPU Feature: AVX512F
+// Asm: VPERMI2Q, CPU Feature: AVX512
func (x Uint64x4) Permute2(y Uint64x4, indices Uint64x4) Uint64x4
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2PD, CPU Feature: AVX512F
+// Asm: VPERMI2PD, CPU Feature: AVX512
func (x Float64x8) Permute2(y Float64x8, indices Uint64x8) Float64x8
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2Q, CPU Feature: AVX512F
+// Asm: VPERMI2Q, CPU Feature: AVX512
func (x Int64x8) Permute2(y Int64x8, indices Uint64x8) Int64x8
// Permute2 performs a full permutation of vector x, y using indices:
// where xy is x appending y.
// Only the needed bits to represent xy's index are used in indices' elements.
//
-// Asm: VPERMI2Q, CPU Feature: AVX512F
+// Asm: VPERMI2Q, CPU Feature: AVX512
func (x Uint64x8) Permute2(y Uint64x8, indices Uint64x8) Uint64x8
/* Permute2Masked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2W, CPU Feature: AVX512BW
+// Asm: VPERMI2W, CPU Feature: AVX512
func (x Int16x8) Permute2Masked(y Int16x8, indices Uint16x8, mask Mask16x8) Int16x8
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2W, CPU Feature: AVX512BW
+// Asm: VPERMI2W, CPU Feature: AVX512
func (x Uint16x8) Permute2Masked(y Uint16x8, indices Uint16x8, mask Mask16x8) Uint16x8
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2W, CPU Feature: AVX512BW
+// Asm: VPERMI2W, CPU Feature: AVX512
func (x Int16x16) Permute2Masked(y Int16x16, indices Uint16x16, mask Mask16x16) Int16x16
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2W, CPU Feature: AVX512BW
+// Asm: VPERMI2W, CPU Feature: AVX512
func (x Uint16x16) Permute2Masked(y Uint16x16, indices Uint16x16, mask Mask16x16) Uint16x16
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2W, CPU Feature: AVX512BW
+// Asm: VPERMI2W, CPU Feature: AVX512
func (x Int16x32) Permute2Masked(y Int16x32, indices Uint16x32, mask Mask16x32) Int16x32
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2W, CPU Feature: AVX512BW
+// Asm: VPERMI2W, CPU Feature: AVX512
func (x Uint16x32) Permute2Masked(y Uint16x32, indices Uint16x32, mask Mask16x32) Uint16x32
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2PS, CPU Feature: AVX512F
+// Asm: VPERMI2PS, CPU Feature: AVX512
func (x Float32x4) Permute2Masked(y Float32x4, indices Uint32x4, mask Mask32x4) Float32x4
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2D, CPU Feature: AVX512F
+// Asm: VPERMI2D, CPU Feature: AVX512
func (x Int32x4) Permute2Masked(y Int32x4, indices Uint32x4, mask Mask32x4) Int32x4
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2D, CPU Feature: AVX512F
+// Asm: VPERMI2D, CPU Feature: AVX512
func (x Uint32x4) Permute2Masked(y Uint32x4, indices Uint32x4, mask Mask32x4) Uint32x4
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2PS, CPU Feature: AVX512F
+// Asm: VPERMI2PS, CPU Feature: AVX512
func (x Float32x8) Permute2Masked(y Float32x8, indices Uint32x8, mask Mask32x8) Float32x8
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2D, CPU Feature: AVX512F
+// Asm: VPERMI2D, CPU Feature: AVX512
func (x Int32x8) Permute2Masked(y Int32x8, indices Uint32x8, mask Mask32x8) Int32x8
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2D, CPU Feature: AVX512F
+// Asm: VPERMI2D, CPU Feature: AVX512
func (x Uint32x8) Permute2Masked(y Uint32x8, indices Uint32x8, mask Mask32x8) Uint32x8
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2PS, CPU Feature: AVX512F
+// Asm: VPERMI2PS, CPU Feature: AVX512
func (x Float32x16) Permute2Masked(y Float32x16, indices Uint32x16, mask Mask32x16) Float32x16
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2D, CPU Feature: AVX512F
+// Asm: VPERMI2D, CPU Feature: AVX512
func (x Int32x16) Permute2Masked(y Int32x16, indices Uint32x16, mask Mask32x16) Int32x16
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2D, CPU Feature: AVX512F
+// Asm: VPERMI2D, CPU Feature: AVX512
func (x Uint32x16) Permute2Masked(y Uint32x16, indices Uint32x16, mask Mask32x16) Uint32x16
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2PD, CPU Feature: AVX512F
+// Asm: VPERMI2PD, CPU Feature: AVX512
func (x Float64x2) Permute2Masked(y Float64x2, indices Uint64x2, mask Mask64x2) Float64x2
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2Q, CPU Feature: AVX512F
+// Asm: VPERMI2Q, CPU Feature: AVX512
func (x Int64x2) Permute2Masked(y Int64x2, indices Uint64x2, mask Mask64x2) Int64x2
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2Q, CPU Feature: AVX512F
+// Asm: VPERMI2Q, CPU Feature: AVX512
func (x Uint64x2) Permute2Masked(y Uint64x2, indices Uint64x2, mask Mask64x2) Uint64x2
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2PD, CPU Feature: AVX512F
+// Asm: VPERMI2PD, CPU Feature: AVX512
func (x Float64x4) Permute2Masked(y Float64x4, indices Uint64x4, mask Mask64x4) Float64x4
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2Q, CPU Feature: AVX512F
+// Asm: VPERMI2Q, CPU Feature: AVX512
func (x Int64x4) Permute2Masked(y Int64x4, indices Uint64x4, mask Mask64x4) Int64x4
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2Q, CPU Feature: AVX512F
+// Asm: VPERMI2Q, CPU Feature: AVX512
func (x Uint64x4) Permute2Masked(y Uint64x4, indices Uint64x4, mask Mask64x4) Uint64x4
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2PD, CPU Feature: AVX512F
+// Asm: VPERMI2PD, CPU Feature: AVX512
func (x Float64x8) Permute2Masked(y Float64x8, indices Uint64x8, mask Mask64x8) Float64x8
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2Q, CPU Feature: AVX512F
+// Asm: VPERMI2Q, CPU Feature: AVX512
func (x Int64x8) Permute2Masked(y Int64x8, indices Uint64x8, mask Mask64x8) Int64x8
// Permute2Masked performs a full permutation of vector x, y using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMI2Q, CPU Feature: AVX512F
+// Asm: VPERMI2Q, CPU Feature: AVX512
func (x Uint64x8) Permute2Masked(y Uint64x8, indices Uint64x8, mask Mask64x8) Uint64x8
/* PermuteMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMW, CPU Feature: AVX512BW
+// Asm: VPERMW, CPU Feature: AVX512
func (x Int16x8) PermuteMasked(indices Uint16x8, mask Mask16x8) Int16x8
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMW, CPU Feature: AVX512BW
+// Asm: VPERMW, CPU Feature: AVX512
func (x Uint16x8) PermuteMasked(indices Uint16x8, mask Mask16x8) Uint16x8
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMW, CPU Feature: AVX512BW
+// Asm: VPERMW, CPU Feature: AVX512
func (x Int16x16) PermuteMasked(indices Uint16x16, mask Mask16x16) Int16x16
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMW, CPU Feature: AVX512BW
+// Asm: VPERMW, CPU Feature: AVX512
func (x Uint16x16) PermuteMasked(indices Uint16x16, mask Mask16x16) Uint16x16
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMW, CPU Feature: AVX512BW
+// Asm: VPERMW, CPU Feature: AVX512
func (x Int16x32) PermuteMasked(indices Uint16x32, mask Mask16x32) Int16x32
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMW, CPU Feature: AVX512BW
+// Asm: VPERMW, CPU Feature: AVX512
func (x Uint16x32) PermuteMasked(indices Uint16x32, mask Mask16x32) Uint16x32
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMPS, CPU Feature: AVX512F
+// Asm: VPERMPS, CPU Feature: AVX512
func (x Float32x8) PermuteMasked(indices Uint32x8, mask Mask32x8) Float32x8
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMD, CPU Feature: AVX512F
+// Asm: VPERMD, CPU Feature: AVX512
func (x Int32x8) PermuteMasked(indices Uint32x8, mask Mask32x8) Int32x8
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMD, CPU Feature: AVX512F
+// Asm: VPERMD, CPU Feature: AVX512
func (x Uint32x8) PermuteMasked(indices Uint32x8, mask Mask32x8) Uint32x8
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMPS, CPU Feature: AVX512F
+// Asm: VPERMPS, CPU Feature: AVX512
func (x Float32x16) PermuteMasked(indices Uint32x16, mask Mask32x16) Float32x16
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMD, CPU Feature: AVX512F
+// Asm: VPERMD, CPU Feature: AVX512
func (x Int32x16) PermuteMasked(indices Uint32x16, mask Mask32x16) Int32x16
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMD, CPU Feature: AVX512F
+// Asm: VPERMD, CPU Feature: AVX512
func (x Uint32x16) PermuteMasked(indices Uint32x16, mask Mask32x16) Uint32x16
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMPD, CPU Feature: AVX512F
+// Asm: VPERMPD, CPU Feature: AVX512
func (x Float64x4) PermuteMasked(indices Uint64x4, mask Mask64x4) Float64x4
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMQ, CPU Feature: AVX512F
+// Asm: VPERMQ, CPU Feature: AVX512
func (x Int64x4) PermuteMasked(indices Uint64x4, mask Mask64x4) Int64x4
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMQ, CPU Feature: AVX512F
+// Asm: VPERMQ, CPU Feature: AVX512
func (x Uint64x4) PermuteMasked(indices Uint64x4, mask Mask64x4) Uint64x4
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMPD, CPU Feature: AVX512F
+// Asm: VPERMPD, CPU Feature: AVX512
func (x Float64x8) PermuteMasked(indices Uint64x8, mask Mask64x8) Float64x8
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMQ, CPU Feature: AVX512F
+// Asm: VPERMQ, CPU Feature: AVX512
func (x Int64x8) PermuteMasked(indices Uint64x8, mask Mask64x8) Int64x8
// PermuteMasked performs a full permutation of vector x using indices:
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPERMQ, CPU Feature: AVX512F
+// Asm: VPERMQ, CPU Feature: AVX512
func (x Uint64x8) PermuteMasked(indices Uint64x8, mask Mask64x8) Uint64x8
/* Reciprocal */
// Reciprocal computes an approximate reciprocal of each element.
//
-// Asm: VRCP14PS, CPU Feature: AVX512F
+// Asm: VRCP14PS, CPU Feature: AVX512
func (x Float32x16) Reciprocal() Float32x16
// Reciprocal computes an approximate reciprocal of each element.
//
-// Asm: VRCP14PD, CPU Feature: AVX512F
+// Asm: VRCP14PD, CPU Feature: AVX512
func (x Float64x2) Reciprocal() Float64x2
// Reciprocal computes an approximate reciprocal of each element.
//
-// Asm: VRCP14PD, CPU Feature: AVX512F
+// Asm: VRCP14PD, CPU Feature: AVX512
func (x Float64x4) Reciprocal() Float64x4
// Reciprocal computes an approximate reciprocal of each element.
//
-// Asm: VRCP14PD, CPU Feature: AVX512F
+// Asm: VRCP14PD, CPU Feature: AVX512
func (x Float64x8) Reciprocal() Float64x8
/* ReciprocalMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VRCP14PS, CPU Feature: AVX512F
+// Asm: VRCP14PS, CPU Feature: AVX512
func (x Float32x4) ReciprocalMasked(mask Mask32x4) Float32x4
// ReciprocalMasked computes an approximate reciprocal of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VRCP14PS, CPU Feature: AVX512F
+// Asm: VRCP14PS, CPU Feature: AVX512
func (x Float32x8) ReciprocalMasked(mask Mask32x8) Float32x8
// ReciprocalMasked computes an approximate reciprocal of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VRCP14PS, CPU Feature: AVX512F
+// Asm: VRCP14PS, CPU Feature: AVX512
func (x Float32x16) ReciprocalMasked(mask Mask32x16) Float32x16
// ReciprocalMasked computes an approximate reciprocal of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VRCP14PD, CPU Feature: AVX512F
+// Asm: VRCP14PD, CPU Feature: AVX512
func (x Float64x2) ReciprocalMasked(mask Mask64x2) Float64x2
// ReciprocalMasked computes an approximate reciprocal of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VRCP14PD, CPU Feature: AVX512F
+// Asm: VRCP14PD, CPU Feature: AVX512
func (x Float64x4) ReciprocalMasked(mask Mask64x4) Float64x4
// ReciprocalMasked computes an approximate reciprocal of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VRCP14PD, CPU Feature: AVX512F
+// Asm: VRCP14PD, CPU Feature: AVX512
func (x Float64x8) ReciprocalMasked(mask Mask64x8) Float64x8
/* ReciprocalSqrt */
// ReciprocalSqrt computes an approximate reciprocal of the square root of each element.
//
-// Asm: VRSQRT14PS, CPU Feature: AVX512F
+// Asm: VRSQRT14PS, CPU Feature: AVX512
func (x Float32x16) ReciprocalSqrt() Float32x16
// ReciprocalSqrt computes an approximate reciprocal of the square root of each element.
//
-// Asm: VRSQRT14PD, CPU Feature: AVX512F
+// Asm: VRSQRT14PD, CPU Feature: AVX512
func (x Float64x2) ReciprocalSqrt() Float64x2
// ReciprocalSqrt computes an approximate reciprocal of the square root of each element.
//
-// Asm: VRSQRT14PD, CPU Feature: AVX512F
+// Asm: VRSQRT14PD, CPU Feature: AVX512
func (x Float64x4) ReciprocalSqrt() Float64x4
// ReciprocalSqrt computes an approximate reciprocal of the square root of each element.
//
-// Asm: VRSQRT14PD, CPU Feature: AVX512F
+// Asm: VRSQRT14PD, CPU Feature: AVX512
func (x Float64x8) ReciprocalSqrt() Float64x8
/* ReciprocalSqrtMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VRSQRT14PS, CPU Feature: AVX512F
+// Asm: VRSQRT14PS, CPU Feature: AVX512
func (x Float32x4) ReciprocalSqrtMasked(mask Mask32x4) Float32x4
// ReciprocalSqrtMasked computes an approximate reciprocal of the square root of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VRSQRT14PS, CPU Feature: AVX512F
+// Asm: VRSQRT14PS, CPU Feature: AVX512
func (x Float32x8) ReciprocalSqrtMasked(mask Mask32x8) Float32x8
// ReciprocalSqrtMasked computes an approximate reciprocal of the square root of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VRSQRT14PS, CPU Feature: AVX512F
+// Asm: VRSQRT14PS, CPU Feature: AVX512
func (x Float32x16) ReciprocalSqrtMasked(mask Mask32x16) Float32x16
// ReciprocalSqrtMasked computes an approximate reciprocal of the square root of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VRSQRT14PD, CPU Feature: AVX512F
+// Asm: VRSQRT14PD, CPU Feature: AVX512
func (x Float64x2) ReciprocalSqrtMasked(mask Mask64x2) Float64x2
// ReciprocalSqrtMasked computes an approximate reciprocal of the square root of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VRSQRT14PD, CPU Feature: AVX512F
+// Asm: VRSQRT14PD, CPU Feature: AVX512
func (x Float64x4) ReciprocalSqrtMasked(mask Mask64x4) Float64x4
// ReciprocalSqrtMasked computes an approximate reciprocal of the square root of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VRSQRT14PD, CPU Feature: AVX512F
+// Asm: VRSQRT14PD, CPU Feature: AVX512
func (x Float64x8) ReciprocalSqrtMasked(mask Mask64x8) Float64x8
/* RotateAllLeft */
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLD, CPU Feature: AVX512F
+// Asm: VPROLD, CPU Feature: AVX512
func (x Int32x4) RotateAllLeft(shift uint8) Int32x4
// RotateAllLeft rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLD, CPU Feature: AVX512F
+// Asm: VPROLD, CPU Feature: AVX512
func (x Int32x8) RotateAllLeft(shift uint8) Int32x8
// RotateAllLeft rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLD, CPU Feature: AVX512F
+// Asm: VPROLD, CPU Feature: AVX512
func (x Int32x16) RotateAllLeft(shift uint8) Int32x16
// RotateAllLeft rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLQ, CPU Feature: AVX512F
+// Asm: VPROLQ, CPU Feature: AVX512
func (x Int64x2) RotateAllLeft(shift uint8) Int64x2
// RotateAllLeft rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLQ, CPU Feature: AVX512F
+// Asm: VPROLQ, CPU Feature: AVX512
func (x Int64x4) RotateAllLeft(shift uint8) Int64x4
// RotateAllLeft rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLQ, CPU Feature: AVX512F
+// Asm: VPROLQ, CPU Feature: AVX512
func (x Int64x8) RotateAllLeft(shift uint8) Int64x8
// RotateAllLeft rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLD, CPU Feature: AVX512F
+// Asm: VPROLD, CPU Feature: AVX512
func (x Uint32x4) RotateAllLeft(shift uint8) Uint32x4
// RotateAllLeft rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLD, CPU Feature: AVX512F
+// Asm: VPROLD, CPU Feature: AVX512
func (x Uint32x8) RotateAllLeft(shift uint8) Uint32x8
// RotateAllLeft rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLD, CPU Feature: AVX512F
+// Asm: VPROLD, CPU Feature: AVX512
func (x Uint32x16) RotateAllLeft(shift uint8) Uint32x16
// RotateAllLeft rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLQ, CPU Feature: AVX512F
+// Asm: VPROLQ, CPU Feature: AVX512
func (x Uint64x2) RotateAllLeft(shift uint8) Uint64x2
// RotateAllLeft rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLQ, CPU Feature: AVX512F
+// Asm: VPROLQ, CPU Feature: AVX512
func (x Uint64x4) RotateAllLeft(shift uint8) Uint64x4
// RotateAllLeft rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLQ, CPU Feature: AVX512F
+// Asm: VPROLQ, CPU Feature: AVX512
func (x Uint64x8) RotateAllLeft(shift uint8) Uint64x8
/* RotateAllLeftMasked */
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLD, CPU Feature: AVX512F
+// Asm: VPROLD, CPU Feature: AVX512
func (x Int32x4) RotateAllLeftMasked(shift uint8, mask Mask32x4) Int32x4
// RotateAllLeftMasked rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLD, CPU Feature: AVX512F
+// Asm: VPROLD, CPU Feature: AVX512
func (x Int32x8) RotateAllLeftMasked(shift uint8, mask Mask32x8) Int32x8
// RotateAllLeftMasked rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLD, CPU Feature: AVX512F
+// Asm: VPROLD, CPU Feature: AVX512
func (x Int32x16) RotateAllLeftMasked(shift uint8, mask Mask32x16) Int32x16
// RotateAllLeftMasked rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLQ, CPU Feature: AVX512F
+// Asm: VPROLQ, CPU Feature: AVX512
func (x Int64x2) RotateAllLeftMasked(shift uint8, mask Mask64x2) Int64x2
// RotateAllLeftMasked rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLQ, CPU Feature: AVX512F
+// Asm: VPROLQ, CPU Feature: AVX512
func (x Int64x4) RotateAllLeftMasked(shift uint8, mask Mask64x4) Int64x4
// RotateAllLeftMasked rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLQ, CPU Feature: AVX512F
+// Asm: VPROLQ, CPU Feature: AVX512
func (x Int64x8) RotateAllLeftMasked(shift uint8, mask Mask64x8) Int64x8
// RotateAllLeftMasked rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLD, CPU Feature: AVX512F
+// Asm: VPROLD, CPU Feature: AVX512
func (x Uint32x4) RotateAllLeftMasked(shift uint8, mask Mask32x4) Uint32x4
// RotateAllLeftMasked rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLD, CPU Feature: AVX512F
+// Asm: VPROLD, CPU Feature: AVX512
func (x Uint32x8) RotateAllLeftMasked(shift uint8, mask Mask32x8) Uint32x8
// RotateAllLeftMasked rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLD, CPU Feature: AVX512F
+// Asm: VPROLD, CPU Feature: AVX512
func (x Uint32x16) RotateAllLeftMasked(shift uint8, mask Mask32x16) Uint32x16
// RotateAllLeftMasked rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLQ, CPU Feature: AVX512F
+// Asm: VPROLQ, CPU Feature: AVX512
func (x Uint64x2) RotateAllLeftMasked(shift uint8, mask Mask64x2) Uint64x2
// RotateAllLeftMasked rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLQ, CPU Feature: AVX512F
+// Asm: VPROLQ, CPU Feature: AVX512
func (x Uint64x4) RotateAllLeftMasked(shift uint8, mask Mask64x4) Uint64x4
// RotateAllLeftMasked rotates each element to the left by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPROLQ, CPU Feature: AVX512F
+// Asm: VPROLQ, CPU Feature: AVX512
func (x Uint64x8) RotateAllLeftMasked(shift uint8, mask Mask64x8) Uint64x8
/* RotateAllRight */
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORD, CPU Feature: AVX512F
+// Asm: VPRORD, CPU Feature: AVX512
func (x Int32x4) RotateAllRight(shift uint8) Int32x4
// RotateAllRight rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORD, CPU Feature: AVX512F
+// Asm: VPRORD, CPU Feature: AVX512
func (x Int32x8) RotateAllRight(shift uint8) Int32x8
// RotateAllRight rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORD, CPU Feature: AVX512F
+// Asm: VPRORD, CPU Feature: AVX512
func (x Int32x16) RotateAllRight(shift uint8) Int32x16
// RotateAllRight rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORQ, CPU Feature: AVX512F
+// Asm: VPRORQ, CPU Feature: AVX512
func (x Int64x2) RotateAllRight(shift uint8) Int64x2
// RotateAllRight rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORQ, CPU Feature: AVX512F
+// Asm: VPRORQ, CPU Feature: AVX512
func (x Int64x4) RotateAllRight(shift uint8) Int64x4
// RotateAllRight rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORQ, CPU Feature: AVX512F
+// Asm: VPRORQ, CPU Feature: AVX512
func (x Int64x8) RotateAllRight(shift uint8) Int64x8
// RotateAllRight rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORD, CPU Feature: AVX512F
+// Asm: VPRORD, CPU Feature: AVX512
func (x Uint32x4) RotateAllRight(shift uint8) Uint32x4
// RotateAllRight rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORD, CPU Feature: AVX512F
+// Asm: VPRORD, CPU Feature: AVX512
func (x Uint32x8) RotateAllRight(shift uint8) Uint32x8
// RotateAllRight rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORD, CPU Feature: AVX512F
+// Asm: VPRORD, CPU Feature: AVX512
func (x Uint32x16) RotateAllRight(shift uint8) Uint32x16
// RotateAllRight rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORQ, CPU Feature: AVX512F
+// Asm: VPRORQ, CPU Feature: AVX512
func (x Uint64x2) RotateAllRight(shift uint8) Uint64x2
// RotateAllRight rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORQ, CPU Feature: AVX512F
+// Asm: VPRORQ, CPU Feature: AVX512
func (x Uint64x4) RotateAllRight(shift uint8) Uint64x4
// RotateAllRight rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORQ, CPU Feature: AVX512F
+// Asm: VPRORQ, CPU Feature: AVX512
func (x Uint64x8) RotateAllRight(shift uint8) Uint64x8
/* RotateAllRightMasked */
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORD, CPU Feature: AVX512F
+// Asm: VPRORD, CPU Feature: AVX512
func (x Int32x4) RotateAllRightMasked(shift uint8, mask Mask32x4) Int32x4
// RotateAllRightMasked rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORD, CPU Feature: AVX512F
+// Asm: VPRORD, CPU Feature: AVX512
func (x Int32x8) RotateAllRightMasked(shift uint8, mask Mask32x8) Int32x8
// RotateAllRightMasked rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORD, CPU Feature: AVX512F
+// Asm: VPRORD, CPU Feature: AVX512
func (x Int32x16) RotateAllRightMasked(shift uint8, mask Mask32x16) Int32x16
// RotateAllRightMasked rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORQ, CPU Feature: AVX512F
+// Asm: VPRORQ, CPU Feature: AVX512
func (x Int64x2) RotateAllRightMasked(shift uint8, mask Mask64x2) Int64x2
// RotateAllRightMasked rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORQ, CPU Feature: AVX512F
+// Asm: VPRORQ, CPU Feature: AVX512
func (x Int64x4) RotateAllRightMasked(shift uint8, mask Mask64x4) Int64x4
// RotateAllRightMasked rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORQ, CPU Feature: AVX512F
+// Asm: VPRORQ, CPU Feature: AVX512
func (x Int64x8) RotateAllRightMasked(shift uint8, mask Mask64x8) Int64x8
// RotateAllRightMasked rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORD, CPU Feature: AVX512F
+// Asm: VPRORD, CPU Feature: AVX512
func (x Uint32x4) RotateAllRightMasked(shift uint8, mask Mask32x4) Uint32x4
// RotateAllRightMasked rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORD, CPU Feature: AVX512F
+// Asm: VPRORD, CPU Feature: AVX512
func (x Uint32x8) RotateAllRightMasked(shift uint8, mask Mask32x8) Uint32x8
// RotateAllRightMasked rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORD, CPU Feature: AVX512F
+// Asm: VPRORD, CPU Feature: AVX512
func (x Uint32x16) RotateAllRightMasked(shift uint8, mask Mask32x16) Uint32x16
// RotateAllRightMasked rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORQ, CPU Feature: AVX512F
+// Asm: VPRORQ, CPU Feature: AVX512
func (x Uint64x2) RotateAllRightMasked(shift uint8, mask Mask64x2) Uint64x2
// RotateAllRightMasked rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORQ, CPU Feature: AVX512F
+// Asm: VPRORQ, CPU Feature: AVX512
func (x Uint64x4) RotateAllRightMasked(shift uint8, mask Mask64x4) Uint64x4
// RotateAllRightMasked rotates each element to the right by the number of bits specified by the immediate.
//
// shift results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VPRORQ, CPU Feature: AVX512F
+// Asm: VPRORQ, CPU Feature: AVX512
func (x Uint64x8) RotateAllRightMasked(shift uint8, mask Mask64x8) Uint64x8
/* RotateLeft */
// RotateLeft rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
-// Asm: VPROLVD, CPU Feature: AVX512F
+// Asm: VPROLVD, CPU Feature: AVX512
func (x Int32x4) RotateLeft(y Int32x4) Int32x4
// RotateLeft rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
-// Asm: VPROLVD, CPU Feature: AVX512F
+// Asm: VPROLVD, CPU Feature: AVX512
func (x Int32x8) RotateLeft(y Int32x8) Int32x8
// RotateLeft rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
-// Asm: VPROLVD, CPU Feature: AVX512F
+// Asm: VPROLVD, CPU Feature: AVX512
func (x Int32x16) RotateLeft(y Int32x16) Int32x16
// RotateLeft rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
-// Asm: VPROLVQ, CPU Feature: AVX512F
+// Asm: VPROLVQ, CPU Feature: AVX512
func (x Int64x2) RotateLeft(y Int64x2) Int64x2
// RotateLeft rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
-// Asm: VPROLVQ, CPU Feature: AVX512F
+// Asm: VPROLVQ, CPU Feature: AVX512
func (x Int64x4) RotateLeft(y Int64x4) Int64x4
// RotateLeft rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
-// Asm: VPROLVQ, CPU Feature: AVX512F
+// Asm: VPROLVQ, CPU Feature: AVX512
func (x Int64x8) RotateLeft(y Int64x8) Int64x8
// RotateLeft rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
-// Asm: VPROLVD, CPU Feature: AVX512F
+// Asm: VPROLVD, CPU Feature: AVX512
func (x Uint32x4) RotateLeft(y Uint32x4) Uint32x4
// RotateLeft rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
-// Asm: VPROLVD, CPU Feature: AVX512F
+// Asm: VPROLVD, CPU Feature: AVX512
func (x Uint32x8) RotateLeft(y Uint32x8) Uint32x8
// RotateLeft rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
-// Asm: VPROLVD, CPU Feature: AVX512F
+// Asm: VPROLVD, CPU Feature: AVX512
func (x Uint32x16) RotateLeft(y Uint32x16) Uint32x16
// RotateLeft rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
-// Asm: VPROLVQ, CPU Feature: AVX512F
+// Asm: VPROLVQ, CPU Feature: AVX512
func (x Uint64x2) RotateLeft(y Uint64x2) Uint64x2
// RotateLeft rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
-// Asm: VPROLVQ, CPU Feature: AVX512F
+// Asm: VPROLVQ, CPU Feature: AVX512
func (x Uint64x4) RotateLeft(y Uint64x4) Uint64x4
// RotateLeft rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
-// Asm: VPROLVQ, CPU Feature: AVX512F
+// Asm: VPROLVQ, CPU Feature: AVX512
func (x Uint64x8) RotateLeft(y Uint64x8) Uint64x8
/* RotateLeftMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPROLVD, CPU Feature: AVX512F
+// Asm: VPROLVD, CPU Feature: AVX512
func (x Int32x4) RotateLeftMasked(y Int32x4, mask Mask32x4) Int32x4
// RotateLeftMasked rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPROLVD, CPU Feature: AVX512F
+// Asm: VPROLVD, CPU Feature: AVX512
func (x Int32x8) RotateLeftMasked(y Int32x8, mask Mask32x8) Int32x8
// RotateLeftMasked rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPROLVD, CPU Feature: AVX512F
+// Asm: VPROLVD, CPU Feature: AVX512
func (x Int32x16) RotateLeftMasked(y Int32x16, mask Mask32x16) Int32x16
// RotateLeftMasked rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPROLVQ, CPU Feature: AVX512F
+// Asm: VPROLVQ, CPU Feature: AVX512
func (x Int64x2) RotateLeftMasked(y Int64x2, mask Mask64x2) Int64x2
// RotateLeftMasked rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPROLVQ, CPU Feature: AVX512F
+// Asm: VPROLVQ, CPU Feature: AVX512
func (x Int64x4) RotateLeftMasked(y Int64x4, mask Mask64x4) Int64x4
// RotateLeftMasked rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPROLVQ, CPU Feature: AVX512F
+// Asm: VPROLVQ, CPU Feature: AVX512
func (x Int64x8) RotateLeftMasked(y Int64x8, mask Mask64x8) Int64x8
// RotateLeftMasked rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPROLVD, CPU Feature: AVX512F
+// Asm: VPROLVD, CPU Feature: AVX512
func (x Uint32x4) RotateLeftMasked(y Uint32x4, mask Mask32x4) Uint32x4
// RotateLeftMasked rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPROLVD, CPU Feature: AVX512F
+// Asm: VPROLVD, CPU Feature: AVX512
func (x Uint32x8) RotateLeftMasked(y Uint32x8, mask Mask32x8) Uint32x8
// RotateLeftMasked rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPROLVD, CPU Feature: AVX512F
+// Asm: VPROLVD, CPU Feature: AVX512
func (x Uint32x16) RotateLeftMasked(y Uint32x16, mask Mask32x16) Uint32x16
// RotateLeftMasked rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPROLVQ, CPU Feature: AVX512F
+// Asm: VPROLVQ, CPU Feature: AVX512
func (x Uint64x2) RotateLeftMasked(y Uint64x2, mask Mask64x2) Uint64x2
// RotateLeftMasked rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPROLVQ, CPU Feature: AVX512F
+// Asm: VPROLVQ, CPU Feature: AVX512
func (x Uint64x4) RotateLeftMasked(y Uint64x4, mask Mask64x4) Uint64x4
// RotateLeftMasked rotates each element in x to the left by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPROLVQ, CPU Feature: AVX512F
+// Asm: VPROLVQ, CPU Feature: AVX512
func (x Uint64x8) RotateLeftMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* RotateRight */
// RotateRight rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
-// Asm: VPRORVD, CPU Feature: AVX512F
+// Asm: VPRORVD, CPU Feature: AVX512
func (x Int32x4) RotateRight(y Int32x4) Int32x4
// RotateRight rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
-// Asm: VPRORVD, CPU Feature: AVX512F
+// Asm: VPRORVD, CPU Feature: AVX512
func (x Int32x8) RotateRight(y Int32x8) Int32x8
// RotateRight rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
-// Asm: VPRORVD, CPU Feature: AVX512F
+// Asm: VPRORVD, CPU Feature: AVX512
func (x Int32x16) RotateRight(y Int32x16) Int32x16
// RotateRight rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
-// Asm: VPRORVQ, CPU Feature: AVX512F
+// Asm: VPRORVQ, CPU Feature: AVX512
func (x Int64x2) RotateRight(y Int64x2) Int64x2
// RotateRight rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
-// Asm: VPRORVQ, CPU Feature: AVX512F
+// Asm: VPRORVQ, CPU Feature: AVX512
func (x Int64x4) RotateRight(y Int64x4) Int64x4
// RotateRight rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
-// Asm: VPRORVQ, CPU Feature: AVX512F
+// Asm: VPRORVQ, CPU Feature: AVX512
func (x Int64x8) RotateRight(y Int64x8) Int64x8
// RotateRight rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
-// Asm: VPRORVD, CPU Feature: AVX512F
+// Asm: VPRORVD, CPU Feature: AVX512
func (x Uint32x4) RotateRight(y Uint32x4) Uint32x4
// RotateRight rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
-// Asm: VPRORVD, CPU Feature: AVX512F
+// Asm: VPRORVD, CPU Feature: AVX512
func (x Uint32x8) RotateRight(y Uint32x8) Uint32x8
// RotateRight rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
-// Asm: VPRORVD, CPU Feature: AVX512F
+// Asm: VPRORVD, CPU Feature: AVX512
func (x Uint32x16) RotateRight(y Uint32x16) Uint32x16
// RotateRight rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
-// Asm: VPRORVQ, CPU Feature: AVX512F
+// Asm: VPRORVQ, CPU Feature: AVX512
func (x Uint64x2) RotateRight(y Uint64x2) Uint64x2
// RotateRight rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
-// Asm: VPRORVQ, CPU Feature: AVX512F
+// Asm: VPRORVQ, CPU Feature: AVX512
func (x Uint64x4) RotateRight(y Uint64x4) Uint64x4
// RotateRight rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
-// Asm: VPRORVQ, CPU Feature: AVX512F
+// Asm: VPRORVQ, CPU Feature: AVX512
func (x Uint64x8) RotateRight(y Uint64x8) Uint64x8
/* RotateRightMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPRORVD, CPU Feature: AVX512F
+// Asm: VPRORVD, CPU Feature: AVX512
func (x Int32x4) RotateRightMasked(y Int32x4, mask Mask32x4) Int32x4
// RotateRightMasked rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPRORVD, CPU Feature: AVX512F
+// Asm: VPRORVD, CPU Feature: AVX512
func (x Int32x8) RotateRightMasked(y Int32x8, mask Mask32x8) Int32x8
// RotateRightMasked rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPRORVD, CPU Feature: AVX512F
+// Asm: VPRORVD, CPU Feature: AVX512
func (x Int32x16) RotateRightMasked(y Int32x16, mask Mask32x16) Int32x16
// RotateRightMasked rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPRORVQ, CPU Feature: AVX512F
+// Asm: VPRORVQ, CPU Feature: AVX512
func (x Int64x2) RotateRightMasked(y Int64x2, mask Mask64x2) Int64x2
// RotateRightMasked rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPRORVQ, CPU Feature: AVX512F
+// Asm: VPRORVQ, CPU Feature: AVX512
func (x Int64x4) RotateRightMasked(y Int64x4, mask Mask64x4) Int64x4
// RotateRightMasked rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPRORVQ, CPU Feature: AVX512F
+// Asm: VPRORVQ, CPU Feature: AVX512
func (x Int64x8) RotateRightMasked(y Int64x8, mask Mask64x8) Int64x8
// RotateRightMasked rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPRORVD, CPU Feature: AVX512F
+// Asm: VPRORVD, CPU Feature: AVX512
func (x Uint32x4) RotateRightMasked(y Uint32x4, mask Mask32x4) Uint32x4
// RotateRightMasked rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPRORVD, CPU Feature: AVX512F
+// Asm: VPRORVD, CPU Feature: AVX512
func (x Uint32x8) RotateRightMasked(y Uint32x8, mask Mask32x8) Uint32x8
// RotateRightMasked rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPRORVD, CPU Feature: AVX512F
+// Asm: VPRORVD, CPU Feature: AVX512
func (x Uint32x16) RotateRightMasked(y Uint32x16, mask Mask32x16) Uint32x16
// RotateRightMasked rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPRORVQ, CPU Feature: AVX512F
+// Asm: VPRORVQ, CPU Feature: AVX512
func (x Uint64x2) RotateRightMasked(y Uint64x2, mask Mask64x2) Uint64x2
// RotateRightMasked rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPRORVQ, CPU Feature: AVX512F
+// Asm: VPRORVQ, CPU Feature: AVX512
func (x Uint64x4) RotateRightMasked(y Uint64x4, mask Mask64x4) Uint64x4
// RotateRightMasked rotates each element in x to the right by the number of bits specified by y's corresponding elements.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPRORVQ, CPU Feature: AVX512F
+// Asm: VPRORVQ, CPU Feature: AVX512
func (x Uint64x8) RotateRightMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* RoundToEven */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x4) RoundToEvenScaled(prec uint8) Float32x4
// RoundToEvenScaled rounds elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x8) RoundToEvenScaled(prec uint8) Float32x8
// RoundToEvenScaled rounds elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x16) RoundToEvenScaled(prec uint8) Float32x16
// RoundToEvenScaled rounds elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x2) RoundToEvenScaled(prec uint8) Float64x2
// RoundToEvenScaled rounds elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x4) RoundToEvenScaled(prec uint8) Float64x4
// RoundToEvenScaled rounds elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x8) RoundToEvenScaled(prec uint8) Float64x8
/* RoundToEvenScaledMasked */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x4) RoundToEvenScaledMasked(prec uint8, mask Mask32x4) Float32x4
// RoundToEvenScaledMasked rounds elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x8) RoundToEvenScaledMasked(prec uint8, mask Mask32x8) Float32x8
// RoundToEvenScaledMasked rounds elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x16) RoundToEvenScaledMasked(prec uint8, mask Mask32x16) Float32x16
// RoundToEvenScaledMasked rounds elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x2) RoundToEvenScaledMasked(prec uint8, mask Mask64x2) Float64x2
// RoundToEvenScaledMasked rounds elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x4) RoundToEvenScaledMasked(prec uint8, mask Mask64x4) Float64x4
// RoundToEvenScaledMasked rounds elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x8) RoundToEvenScaledMasked(prec uint8, mask Mask64x8) Float64x8
/* RoundToEvenScaledResidue */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x4) RoundToEvenScaledResidue(prec uint8) Float32x4
// RoundToEvenScaledResidue computes the difference after rounding with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x8) RoundToEvenScaledResidue(prec uint8) Float32x8
// RoundToEvenScaledResidue computes the difference after rounding with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x16) RoundToEvenScaledResidue(prec uint8) Float32x16
// RoundToEvenScaledResidue computes the difference after rounding with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x2) RoundToEvenScaledResidue(prec uint8) Float64x2
// RoundToEvenScaledResidue computes the difference after rounding with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x4) RoundToEvenScaledResidue(prec uint8) Float64x4
// RoundToEvenScaledResidue computes the difference after rounding with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x8) RoundToEvenScaledResidue(prec uint8) Float64x8
/* RoundToEvenScaledResidueMasked */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x4) RoundToEvenScaledResidueMasked(prec uint8, mask Mask32x4) Float32x4
// RoundToEvenScaledResidueMasked computes the difference after rounding with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x8) RoundToEvenScaledResidueMasked(prec uint8, mask Mask32x8) Float32x8
// RoundToEvenScaledResidueMasked computes the difference after rounding with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x16) RoundToEvenScaledResidueMasked(prec uint8, mask Mask32x16) Float32x16
// RoundToEvenScaledResidueMasked computes the difference after rounding with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x2) RoundToEvenScaledResidueMasked(prec uint8, mask Mask64x2) Float64x2
// RoundToEvenScaledResidueMasked computes the difference after rounding with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x4) RoundToEvenScaledResidueMasked(prec uint8, mask Mask64x4) Float64x4
// RoundToEvenScaledResidueMasked computes the difference after rounding with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x8) RoundToEvenScaledResidueMasked(prec uint8, mask Mask64x8) Float64x8
/* Scale */
// Scale multiplies elements by a power of 2.
//
-// Asm: VSCALEFPS, CPU Feature: AVX512F
+// Asm: VSCALEFPS, CPU Feature: AVX512
func (x Float32x4) Scale(y Float32x4) Float32x4
// Scale multiplies elements by a power of 2.
//
-// Asm: VSCALEFPS, CPU Feature: AVX512F
+// Asm: VSCALEFPS, CPU Feature: AVX512
func (x Float32x8) Scale(y Float32x8) Float32x8
// Scale multiplies elements by a power of 2.
//
-// Asm: VSCALEFPS, CPU Feature: AVX512F
+// Asm: VSCALEFPS, CPU Feature: AVX512
func (x Float32x16) Scale(y Float32x16) Float32x16
// Scale multiplies elements by a power of 2.
//
-// Asm: VSCALEFPD, CPU Feature: AVX512F
+// Asm: VSCALEFPD, CPU Feature: AVX512
func (x Float64x2) Scale(y Float64x2) Float64x2
// Scale multiplies elements by a power of 2.
//
-// Asm: VSCALEFPD, CPU Feature: AVX512F
+// Asm: VSCALEFPD, CPU Feature: AVX512
func (x Float64x4) Scale(y Float64x4) Float64x4
// Scale multiplies elements by a power of 2.
//
-// Asm: VSCALEFPD, CPU Feature: AVX512F
+// Asm: VSCALEFPD, CPU Feature: AVX512
func (x Float64x8) Scale(y Float64x8) Float64x8
/* ScaleMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSCALEFPS, CPU Feature: AVX512F
+// Asm: VSCALEFPS, CPU Feature: AVX512
func (x Float32x4) ScaleMasked(y Float32x4, mask Mask32x4) Float32x4
// ScaleMasked multiplies elements by a power of 2.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSCALEFPS, CPU Feature: AVX512F
+// Asm: VSCALEFPS, CPU Feature: AVX512
func (x Float32x8) ScaleMasked(y Float32x8, mask Mask32x8) Float32x8
// ScaleMasked multiplies elements by a power of 2.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSCALEFPS, CPU Feature: AVX512F
+// Asm: VSCALEFPS, CPU Feature: AVX512
func (x Float32x16) ScaleMasked(y Float32x16, mask Mask32x16) Float32x16
// ScaleMasked multiplies elements by a power of 2.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSCALEFPD, CPU Feature: AVX512F
+// Asm: VSCALEFPD, CPU Feature: AVX512
func (x Float64x2) ScaleMasked(y Float64x2, mask Mask64x2) Float64x2
// ScaleMasked multiplies elements by a power of 2.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSCALEFPD, CPU Feature: AVX512F
+// Asm: VSCALEFPD, CPU Feature: AVX512
func (x Float64x4) ScaleMasked(y Float64x4, mask Mask64x4) Float64x4
// ScaleMasked multiplies elements by a power of 2.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSCALEFPD, CPU Feature: AVX512F
+// Asm: VSCALEFPD, CPU Feature: AVX512
func (x Float64x8) ScaleMasked(y Float64x8, mask Mask64x8) Float64x8
/* SetElem */
// SetHi returns x with its upper half set to y.
//
-// Asm: VINSERTF64X4, CPU Feature: AVX512F
+// Asm: VINSERTF64X4, CPU Feature: AVX512
func (x Float32x16) SetHi(y Float32x8) Float32x16
// SetHi returns x with its upper half set to y.
// SetHi returns x with its upper half set to y.
//
-// Asm: VINSERTF64X4, CPU Feature: AVX512F
+// Asm: VINSERTF64X4, CPU Feature: AVX512
func (x Float64x8) SetHi(y Float64x4) Float64x8
// SetHi returns x with its upper half set to y.
// SetHi returns x with its upper half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Int8x64) SetHi(y Int8x32) Int8x64
// SetHi returns x with its upper half set to y.
// SetHi returns x with its upper half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Int16x32) SetHi(y Int16x16) Int16x32
// SetHi returns x with its upper half set to y.
// SetHi returns x with its upper half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Int32x16) SetHi(y Int32x8) Int32x16
// SetHi returns x with its upper half set to y.
// SetHi returns x with its upper half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Int64x8) SetHi(y Int64x4) Int64x8
// SetHi returns x with its upper half set to y.
// SetHi returns x with its upper half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Uint8x64) SetHi(y Uint8x32) Uint8x64
// SetHi returns x with its upper half set to y.
// SetHi returns x with its upper half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Uint16x32) SetHi(y Uint16x16) Uint16x32
// SetHi returns x with its upper half set to y.
// SetHi returns x with its upper half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Uint32x16) SetHi(y Uint32x8) Uint32x16
// SetHi returns x with its upper half set to y.
// SetHi returns x with its upper half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Uint64x8) SetHi(y Uint64x4) Uint64x8
/* SetLo */
// SetLo returns x with its lower half set to y.
//
-// Asm: VINSERTF64X4, CPU Feature: AVX512F
+// Asm: VINSERTF64X4, CPU Feature: AVX512
func (x Float32x16) SetLo(y Float32x8) Float32x16
// SetLo returns x with its lower half set to y.
// SetLo returns x with its lower half set to y.
//
-// Asm: VINSERTF64X4, CPU Feature: AVX512F
+// Asm: VINSERTF64X4, CPU Feature: AVX512
func (x Float64x8) SetLo(y Float64x4) Float64x8
// SetLo returns x with its lower half set to y.
// SetLo returns x with its lower half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Int8x64) SetLo(y Int8x32) Int8x64
// SetLo returns x with its lower half set to y.
// SetLo returns x with its lower half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Int16x32) SetLo(y Int16x16) Int16x32
// SetLo returns x with its lower half set to y.
// SetLo returns x with its lower half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Int32x16) SetLo(y Int32x8) Int32x16
// SetLo returns x with its lower half set to y.
// SetLo returns x with its lower half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Int64x8) SetLo(y Int64x4) Int64x8
// SetLo returns x with its lower half set to y.
// SetLo returns x with its lower half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Uint8x64) SetLo(y Uint8x32) Uint8x64
// SetLo returns x with its lower half set to y.
// SetLo returns x with its lower half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Uint16x32) SetLo(y Uint16x16) Uint16x32
// SetLo returns x with its lower half set to y.
// SetLo returns x with its lower half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Uint32x16) SetLo(y Uint32x8) Uint32x16
// SetLo returns x with its lower half set to y.
// SetLo returns x with its lower half set to y.
//
-// Asm: VINSERTI64X4, CPU Feature: AVX512F
+// Asm: VINSERTI64X4, CPU Feature: AVX512
func (x Uint64x8) SetLo(y Uint64x4) Uint64x8
/* ShiftAllLeft */
// ShiftAllLeft shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
-// Asm: VPSLLW, CPU Feature: AVX512BW
+// Asm: VPSLLW, CPU Feature: AVX512
func (x Int16x32) ShiftAllLeft(y uint64) Int16x32
// ShiftAllLeft shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
// ShiftAllLeft shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
-// Asm: VPSLLD, CPU Feature: AVX512F
+// Asm: VPSLLD, CPU Feature: AVX512
func (x Int32x16) ShiftAllLeft(y uint64) Int32x16
// ShiftAllLeft shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
// ShiftAllLeft shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
-// Asm: VPSLLQ, CPU Feature: AVX512F
+// Asm: VPSLLQ, CPU Feature: AVX512
func (x Int64x8) ShiftAllLeft(y uint64) Int64x8
// ShiftAllLeft shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
// ShiftAllLeft shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
-// Asm: VPSLLW, CPU Feature: AVX512BW
+// Asm: VPSLLW, CPU Feature: AVX512
func (x Uint16x32) ShiftAllLeft(y uint64) Uint16x32
// ShiftAllLeft shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
// ShiftAllLeft shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
-// Asm: VPSLLD, CPU Feature: AVX512F
+// Asm: VPSLLD, CPU Feature: AVX512
func (x Uint32x16) ShiftAllLeft(y uint64) Uint32x16
// ShiftAllLeft shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
// ShiftAllLeft shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
-// Asm: VPSLLQ, CPU Feature: AVX512F
+// Asm: VPSLLQ, CPU Feature: AVX512
func (x Uint64x8) ShiftAllLeft(y uint64) Uint64x8
/* ShiftAllLeftConcat */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLW, CPU Feature: AVX512BW
+// Asm: VPSLLW, CPU Feature: AVX512
func (x Int16x8) ShiftAllLeftMasked(y uint64, mask Mask16x8) Int16x8
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLW, CPU Feature: AVX512BW
+// Asm: VPSLLW, CPU Feature: AVX512
func (x Int16x16) ShiftAllLeftMasked(y uint64, mask Mask16x16) Int16x16
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLW, CPU Feature: AVX512BW
+// Asm: VPSLLW, CPU Feature: AVX512
func (x Int16x32) ShiftAllLeftMasked(y uint64, mask Mask16x32) Int16x32
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLD, CPU Feature: AVX512F
+// Asm: VPSLLD, CPU Feature: AVX512
func (x Int32x4) ShiftAllLeftMasked(y uint64, mask Mask32x4) Int32x4
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLD, CPU Feature: AVX512F
+// Asm: VPSLLD, CPU Feature: AVX512
func (x Int32x8) ShiftAllLeftMasked(y uint64, mask Mask32x8) Int32x8
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLD, CPU Feature: AVX512F
+// Asm: VPSLLD, CPU Feature: AVX512
func (x Int32x16) ShiftAllLeftMasked(y uint64, mask Mask32x16) Int32x16
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLQ, CPU Feature: AVX512F
+// Asm: VPSLLQ, CPU Feature: AVX512
func (x Int64x2) ShiftAllLeftMasked(y uint64, mask Mask64x2) Int64x2
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLQ, CPU Feature: AVX512F
+// Asm: VPSLLQ, CPU Feature: AVX512
func (x Int64x4) ShiftAllLeftMasked(y uint64, mask Mask64x4) Int64x4
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLQ, CPU Feature: AVX512F
+// Asm: VPSLLQ, CPU Feature: AVX512
func (x Int64x8) ShiftAllLeftMasked(y uint64, mask Mask64x8) Int64x8
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLW, CPU Feature: AVX512BW
+// Asm: VPSLLW, CPU Feature: AVX512
func (x Uint16x8) ShiftAllLeftMasked(y uint64, mask Mask16x8) Uint16x8
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLW, CPU Feature: AVX512BW
+// Asm: VPSLLW, CPU Feature: AVX512
func (x Uint16x16) ShiftAllLeftMasked(y uint64, mask Mask16x16) Uint16x16
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLW, CPU Feature: AVX512BW
+// Asm: VPSLLW, CPU Feature: AVX512
func (x Uint16x32) ShiftAllLeftMasked(y uint64, mask Mask16x32) Uint16x32
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLD, CPU Feature: AVX512F
+// Asm: VPSLLD, CPU Feature: AVX512
func (x Uint32x4) ShiftAllLeftMasked(y uint64, mask Mask32x4) Uint32x4
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLD, CPU Feature: AVX512F
+// Asm: VPSLLD, CPU Feature: AVX512
func (x Uint32x8) ShiftAllLeftMasked(y uint64, mask Mask32x8) Uint32x8
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLD, CPU Feature: AVX512F
+// Asm: VPSLLD, CPU Feature: AVX512
func (x Uint32x16) ShiftAllLeftMasked(y uint64, mask Mask32x16) Uint32x16
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLQ, CPU Feature: AVX512F
+// Asm: VPSLLQ, CPU Feature: AVX512
func (x Uint64x2) ShiftAllLeftMasked(y uint64, mask Mask64x2) Uint64x2
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLQ, CPU Feature: AVX512F
+// Asm: VPSLLQ, CPU Feature: AVX512
func (x Uint64x4) ShiftAllLeftMasked(y uint64, mask Mask64x4) Uint64x4
// ShiftAllLeftMasked shifts each element to the left by the specified number of bits. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLQ, CPU Feature: AVX512F
+// Asm: VPSLLQ, CPU Feature: AVX512
func (x Uint64x8) ShiftAllLeftMasked(y uint64, mask Mask64x8) Uint64x8
/* ShiftAllRight */
// ShiftAllRight shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
-// Asm: VPSRAW, CPU Feature: AVX512BW
+// Asm: VPSRAW, CPU Feature: AVX512
func (x Int16x32) ShiftAllRight(y uint64) Int16x32
// ShiftAllRight shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
// ShiftAllRight shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
-// Asm: VPSRAD, CPU Feature: AVX512F
+// Asm: VPSRAD, CPU Feature: AVX512
func (x Int32x16) ShiftAllRight(y uint64) Int32x16
// ShiftAllRight shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
-// Asm: VPSRAQ, CPU Feature: AVX512F
+// Asm: VPSRAQ, CPU Feature: AVX512
func (x Int64x2) ShiftAllRight(y uint64) Int64x2
// ShiftAllRight shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
-// Asm: VPSRAQ, CPU Feature: AVX512F
+// Asm: VPSRAQ, CPU Feature: AVX512
func (x Int64x4) ShiftAllRight(y uint64) Int64x4
// ShiftAllRight shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
-// Asm: VPSRAQ, CPU Feature: AVX512F
+// Asm: VPSRAQ, CPU Feature: AVX512
func (x Int64x8) ShiftAllRight(y uint64) Int64x8
// ShiftAllRight shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
// ShiftAllRight shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
//
-// Asm: VPSRLW, CPU Feature: AVX512BW
+// Asm: VPSRLW, CPU Feature: AVX512
func (x Uint16x32) ShiftAllRight(y uint64) Uint16x32
// ShiftAllRight shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
// ShiftAllRight shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
//
-// Asm: VPSRLD, CPU Feature: AVX512F
+// Asm: VPSRLD, CPU Feature: AVX512
func (x Uint32x16) ShiftAllRight(y uint64) Uint32x16
// ShiftAllRight shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
// ShiftAllRight shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
//
-// Asm: VPSRLQ, CPU Feature: AVX512F
+// Asm: VPSRLQ, CPU Feature: AVX512
func (x Uint64x8) ShiftAllRight(y uint64) Uint64x8
/* ShiftAllRightConcat */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAW, CPU Feature: AVX512BW
+// Asm: VPSRAW, CPU Feature: AVX512
func (x Int16x8) ShiftAllRightMasked(y uint64, mask Mask16x8) Int16x8
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAW, CPU Feature: AVX512BW
+// Asm: VPSRAW, CPU Feature: AVX512
func (x Int16x16) ShiftAllRightMasked(y uint64, mask Mask16x16) Int16x16
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAW, CPU Feature: AVX512BW
+// Asm: VPSRAW, CPU Feature: AVX512
func (x Int16x32) ShiftAllRightMasked(y uint64, mask Mask16x32) Int16x32
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAD, CPU Feature: AVX512F
+// Asm: VPSRAD, CPU Feature: AVX512
func (x Int32x4) ShiftAllRightMasked(y uint64, mask Mask32x4) Int32x4
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAD, CPU Feature: AVX512F
+// Asm: VPSRAD, CPU Feature: AVX512
func (x Int32x8) ShiftAllRightMasked(y uint64, mask Mask32x8) Int32x8
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAD, CPU Feature: AVX512F
+// Asm: VPSRAD, CPU Feature: AVX512
func (x Int32x16) ShiftAllRightMasked(y uint64, mask Mask32x16) Int32x16
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAQ, CPU Feature: AVX512F
+// Asm: VPSRAQ, CPU Feature: AVX512
func (x Int64x2) ShiftAllRightMasked(y uint64, mask Mask64x2) Int64x2
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAQ, CPU Feature: AVX512F
+// Asm: VPSRAQ, CPU Feature: AVX512
func (x Int64x4) ShiftAllRightMasked(y uint64, mask Mask64x4) Int64x4
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAQ, CPU Feature: AVX512F
+// Asm: VPSRAQ, CPU Feature: AVX512
func (x Int64x8) ShiftAllRightMasked(y uint64, mask Mask64x8) Int64x8
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLW, CPU Feature: AVX512BW
+// Asm: VPSRLW, CPU Feature: AVX512
func (x Uint16x8) ShiftAllRightMasked(y uint64, mask Mask16x8) Uint16x8
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLW, CPU Feature: AVX512BW
+// Asm: VPSRLW, CPU Feature: AVX512
func (x Uint16x16) ShiftAllRightMasked(y uint64, mask Mask16x16) Uint16x16
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLW, CPU Feature: AVX512BW
+// Asm: VPSRLW, CPU Feature: AVX512
func (x Uint16x32) ShiftAllRightMasked(y uint64, mask Mask16x32) Uint16x32
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLD, CPU Feature: AVX512F
+// Asm: VPSRLD, CPU Feature: AVX512
func (x Uint32x4) ShiftAllRightMasked(y uint64, mask Mask32x4) Uint32x4
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLD, CPU Feature: AVX512F
+// Asm: VPSRLD, CPU Feature: AVX512
func (x Uint32x8) ShiftAllRightMasked(y uint64, mask Mask32x8) Uint32x8
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLD, CPU Feature: AVX512F
+// Asm: VPSRLD, CPU Feature: AVX512
func (x Uint32x16) ShiftAllRightMasked(y uint64, mask Mask32x16) Uint32x16
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLQ, CPU Feature: AVX512F
+// Asm: VPSRLQ, CPU Feature: AVX512
func (x Uint64x2) ShiftAllRightMasked(y uint64, mask Mask64x2) Uint64x2
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLQ, CPU Feature: AVX512F
+// Asm: VPSRLQ, CPU Feature: AVX512
func (x Uint64x4) ShiftAllRightMasked(y uint64, mask Mask64x4) Uint64x4
// ShiftAllRightMasked shifts each element to the right by the specified number of bits. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLQ, CPU Feature: AVX512F
+// Asm: VPSRLQ, CPU Feature: AVX512
func (x Uint64x8) ShiftAllRightMasked(y uint64, mask Mask64x8) Uint64x8
/* ShiftLeft */
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
-// Asm: VPSLLVW, CPU Feature: AVX512BW
+// Asm: VPSLLVW, CPU Feature: AVX512
func (x Int16x8) ShiftLeft(y Int16x8) Int16x8
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
-// Asm: VPSLLVW, CPU Feature: AVX512BW
+// Asm: VPSLLVW, CPU Feature: AVX512
func (x Int16x16) ShiftLeft(y Int16x16) Int16x16
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
-// Asm: VPSLLVW, CPU Feature: AVX512BW
+// Asm: VPSLLVW, CPU Feature: AVX512
func (x Int16x32) ShiftLeft(y Int16x32) Int16x32
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
-// Asm: VPSLLVD, CPU Feature: AVX512F
+// Asm: VPSLLVD, CPU Feature: AVX512
func (x Int32x16) ShiftLeft(y Int32x16) Int32x16
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
-// Asm: VPSLLVQ, CPU Feature: AVX512F
+// Asm: VPSLLVQ, CPU Feature: AVX512
func (x Int64x8) ShiftLeft(y Int64x8) Int64x8
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
-// Asm: VPSLLVW, CPU Feature: AVX512BW
+// Asm: VPSLLVW, CPU Feature: AVX512
func (x Uint16x8) ShiftLeft(y Uint16x8) Uint16x8
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
-// Asm: VPSLLVW, CPU Feature: AVX512BW
+// Asm: VPSLLVW, CPU Feature: AVX512
func (x Uint16x16) ShiftLeft(y Uint16x16) Uint16x16
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
-// Asm: VPSLLVW, CPU Feature: AVX512BW
+// Asm: VPSLLVW, CPU Feature: AVX512
func (x Uint16x32) ShiftLeft(y Uint16x32) Uint16x32
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
-// Asm: VPSLLVD, CPU Feature: AVX512F
+// Asm: VPSLLVD, CPU Feature: AVX512
func (x Uint32x16) ShiftLeft(y Uint32x16) Uint32x16
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
// ShiftLeft shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
-// Asm: VPSLLVQ, CPU Feature: AVX512F
+// Asm: VPSLLVQ, CPU Feature: AVX512
func (x Uint64x8) ShiftLeft(y Uint64x8) Uint64x8
/* ShiftLeftConcat */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVW, CPU Feature: AVX512BW
+// Asm: VPSLLVW, CPU Feature: AVX512
func (x Int16x8) ShiftLeftMasked(y Int16x8, mask Mask16x8) Int16x8
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVW, CPU Feature: AVX512BW
+// Asm: VPSLLVW, CPU Feature: AVX512
func (x Int16x16) ShiftLeftMasked(y Int16x16, mask Mask16x16) Int16x16
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVW, CPU Feature: AVX512BW
+// Asm: VPSLLVW, CPU Feature: AVX512
func (x Int16x32) ShiftLeftMasked(y Int16x32, mask Mask16x32) Int16x32
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVD, CPU Feature: AVX512F
+// Asm: VPSLLVD, CPU Feature: AVX512
func (x Int32x4) ShiftLeftMasked(y Int32x4, mask Mask32x4) Int32x4
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVD, CPU Feature: AVX512F
+// Asm: VPSLLVD, CPU Feature: AVX512
func (x Int32x8) ShiftLeftMasked(y Int32x8, mask Mask32x8) Int32x8
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVD, CPU Feature: AVX512F
+// Asm: VPSLLVD, CPU Feature: AVX512
func (x Int32x16) ShiftLeftMasked(y Int32x16, mask Mask32x16) Int32x16
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVQ, CPU Feature: AVX512F
+// Asm: VPSLLVQ, CPU Feature: AVX512
func (x Int64x2) ShiftLeftMasked(y Int64x2, mask Mask64x2) Int64x2
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVQ, CPU Feature: AVX512F
+// Asm: VPSLLVQ, CPU Feature: AVX512
func (x Int64x4) ShiftLeftMasked(y Int64x4, mask Mask64x4) Int64x4
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVQ, CPU Feature: AVX512F
+// Asm: VPSLLVQ, CPU Feature: AVX512
func (x Int64x8) ShiftLeftMasked(y Int64x8, mask Mask64x8) Int64x8
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVW, CPU Feature: AVX512BW
+// Asm: VPSLLVW, CPU Feature: AVX512
func (x Uint16x8) ShiftLeftMasked(y Uint16x8, mask Mask16x8) Uint16x8
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVW, CPU Feature: AVX512BW
+// Asm: VPSLLVW, CPU Feature: AVX512
func (x Uint16x16) ShiftLeftMasked(y Uint16x16, mask Mask16x16) Uint16x16
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVW, CPU Feature: AVX512BW
+// Asm: VPSLLVW, CPU Feature: AVX512
func (x Uint16x32) ShiftLeftMasked(y Uint16x32, mask Mask16x32) Uint16x32
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVD, CPU Feature: AVX512F
+// Asm: VPSLLVD, CPU Feature: AVX512
func (x Uint32x4) ShiftLeftMasked(y Uint32x4, mask Mask32x4) Uint32x4
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVD, CPU Feature: AVX512F
+// Asm: VPSLLVD, CPU Feature: AVX512
func (x Uint32x8) ShiftLeftMasked(y Uint32x8, mask Mask32x8) Uint32x8
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVD, CPU Feature: AVX512F
+// Asm: VPSLLVD, CPU Feature: AVX512
func (x Uint32x16) ShiftLeftMasked(y Uint32x16, mask Mask32x16) Uint32x16
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVQ, CPU Feature: AVX512F
+// Asm: VPSLLVQ, CPU Feature: AVX512
func (x Uint64x2) ShiftLeftMasked(y Uint64x2, mask Mask64x2) Uint64x2
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVQ, CPU Feature: AVX512F
+// Asm: VPSLLVQ, CPU Feature: AVX512
func (x Uint64x4) ShiftLeftMasked(y Uint64x4, mask Mask64x4) Uint64x4
// ShiftLeftMasked shifts each element in x to the left by the number of bits specified in y's corresponding elements. Emptied lower bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSLLVQ, CPU Feature: AVX512F
+// Asm: VPSLLVQ, CPU Feature: AVX512
func (x Uint64x8) ShiftLeftMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* ShiftRight */
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
-// Asm: VPSRAVW, CPU Feature: AVX512BW
+// Asm: VPSRAVW, CPU Feature: AVX512
func (x Int16x8) ShiftRight(y Int16x8) Int16x8
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
-// Asm: VPSRAVW, CPU Feature: AVX512BW
+// Asm: VPSRAVW, CPU Feature: AVX512
func (x Int16x16) ShiftRight(y Int16x16) Int16x16
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
-// Asm: VPSRAVW, CPU Feature: AVX512BW
+// Asm: VPSRAVW, CPU Feature: AVX512
func (x Int16x32) ShiftRight(y Int16x32) Int16x32
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
-// Asm: VPSRAVD, CPU Feature: AVX512F
+// Asm: VPSRAVD, CPU Feature: AVX512
func (x Int32x16) ShiftRight(y Int32x16) Int32x16
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
-// Asm: VPSRAVQ, CPU Feature: AVX512F
+// Asm: VPSRAVQ, CPU Feature: AVX512
func (x Int64x2) ShiftRight(y Int64x2) Int64x2
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
-// Asm: VPSRAVQ, CPU Feature: AVX512F
+// Asm: VPSRAVQ, CPU Feature: AVX512
func (x Int64x4) ShiftRight(y Int64x4) Int64x4
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
-// Asm: VPSRAVQ, CPU Feature: AVX512F
+// Asm: VPSRAVQ, CPU Feature: AVX512
func (x Int64x8) ShiftRight(y Int64x8) Int64x8
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
-// Asm: VPSRLVW, CPU Feature: AVX512BW
+// Asm: VPSRLVW, CPU Feature: AVX512
func (x Uint16x8) ShiftRight(y Uint16x8) Uint16x8
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
-// Asm: VPSRLVW, CPU Feature: AVX512BW
+// Asm: VPSRLVW, CPU Feature: AVX512
func (x Uint16x16) ShiftRight(y Uint16x16) Uint16x16
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
-// Asm: VPSRLVW, CPU Feature: AVX512BW
+// Asm: VPSRLVW, CPU Feature: AVX512
func (x Uint16x32) ShiftRight(y Uint16x32) Uint16x32
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
-// Asm: VPSRLVD, CPU Feature: AVX512F
+// Asm: VPSRLVD, CPU Feature: AVX512
func (x Uint32x16) ShiftRight(y Uint32x16) Uint32x16
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
// ShiftRight shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
-// Asm: VPSRLVQ, CPU Feature: AVX512F
+// Asm: VPSRLVQ, CPU Feature: AVX512
func (x Uint64x8) ShiftRight(y Uint64x8) Uint64x8
/* ShiftRightConcat */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAVW, CPU Feature: AVX512BW
+// Asm: VPSRAVW, CPU Feature: AVX512
func (x Int16x8) ShiftRightMasked(y Int16x8, mask Mask16x8) Int16x8
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAVW, CPU Feature: AVX512BW
+// Asm: VPSRAVW, CPU Feature: AVX512
func (x Int16x16) ShiftRightMasked(y Int16x16, mask Mask16x16) Int16x16
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAVW, CPU Feature: AVX512BW
+// Asm: VPSRAVW, CPU Feature: AVX512
func (x Int16x32) ShiftRightMasked(y Int16x32, mask Mask16x32) Int16x32
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAVD, CPU Feature: AVX512F
+// Asm: VPSRAVD, CPU Feature: AVX512
func (x Int32x4) ShiftRightMasked(y Int32x4, mask Mask32x4) Int32x4
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAVD, CPU Feature: AVX512F
+// Asm: VPSRAVD, CPU Feature: AVX512
func (x Int32x8) ShiftRightMasked(y Int32x8, mask Mask32x8) Int32x8
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAVD, CPU Feature: AVX512F
+// Asm: VPSRAVD, CPU Feature: AVX512
func (x Int32x16) ShiftRightMasked(y Int32x16, mask Mask32x16) Int32x16
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAVQ, CPU Feature: AVX512F
+// Asm: VPSRAVQ, CPU Feature: AVX512
func (x Int64x2) ShiftRightMasked(y Int64x2, mask Mask64x2) Int64x2
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAVQ, CPU Feature: AVX512F
+// Asm: VPSRAVQ, CPU Feature: AVX512
func (x Int64x4) ShiftRightMasked(y Int64x4, mask Mask64x4) Int64x4
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are filled with the sign bit.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRAVQ, CPU Feature: AVX512F
+// Asm: VPSRAVQ, CPU Feature: AVX512
func (x Int64x8) ShiftRightMasked(y Int64x8, mask Mask64x8) Int64x8
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLVW, CPU Feature: AVX512BW
+// Asm: VPSRLVW, CPU Feature: AVX512
func (x Uint16x8) ShiftRightMasked(y Uint16x8, mask Mask16x8) Uint16x8
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLVW, CPU Feature: AVX512BW
+// Asm: VPSRLVW, CPU Feature: AVX512
func (x Uint16x16) ShiftRightMasked(y Uint16x16, mask Mask16x16) Uint16x16
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLVW, CPU Feature: AVX512BW
+// Asm: VPSRLVW, CPU Feature: AVX512
func (x Uint16x32) ShiftRightMasked(y Uint16x32, mask Mask16x32) Uint16x32
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLVD, CPU Feature: AVX512F
+// Asm: VPSRLVD, CPU Feature: AVX512
func (x Uint32x4) ShiftRightMasked(y Uint32x4, mask Mask32x4) Uint32x4
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLVD, CPU Feature: AVX512F
+// Asm: VPSRLVD, CPU Feature: AVX512
func (x Uint32x8) ShiftRightMasked(y Uint32x8, mask Mask32x8) Uint32x8
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLVD, CPU Feature: AVX512F
+// Asm: VPSRLVD, CPU Feature: AVX512
func (x Uint32x16) ShiftRightMasked(y Uint32x16, mask Mask32x16) Uint32x16
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLVQ, CPU Feature: AVX512F
+// Asm: VPSRLVQ, CPU Feature: AVX512
func (x Uint64x2) ShiftRightMasked(y Uint64x2, mask Mask64x2) Uint64x2
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLVQ, CPU Feature: AVX512F
+// Asm: VPSRLVQ, CPU Feature: AVX512
func (x Uint64x4) ShiftRightMasked(y Uint64x4, mask Mask64x4) Uint64x4
// ShiftRightMasked shifts each element in x to the right by the number of bits specified in y's corresponding elements. Emptied upper bits are zeroed.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSRLVQ, CPU Feature: AVX512F
+// Asm: VPSRLVQ, CPU Feature: AVX512
func (x Uint64x8) ShiftRightMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* Sqrt */
// Sqrt computes the square root of each element.
//
-// Asm: VSQRTPS, CPU Feature: AVX512F
+// Asm: VSQRTPS, CPU Feature: AVX512
func (x Float32x16) Sqrt() Float32x16
// Sqrt computes the square root of each element.
// Sqrt computes the square root of each element.
//
-// Asm: VSQRTPD, CPU Feature: AVX512F
+// Asm: VSQRTPD, CPU Feature: AVX512
func (x Float64x8) Sqrt() Float64x8
/* SqrtMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSQRTPS, CPU Feature: AVX512F
+// Asm: VSQRTPS, CPU Feature: AVX512
func (x Float32x4) SqrtMasked(mask Mask32x4) Float32x4
// SqrtMasked computes the square root of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSQRTPS, CPU Feature: AVX512F
+// Asm: VSQRTPS, CPU Feature: AVX512
func (x Float32x8) SqrtMasked(mask Mask32x8) Float32x8
// SqrtMasked computes the square root of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSQRTPS, CPU Feature: AVX512F
+// Asm: VSQRTPS, CPU Feature: AVX512
func (x Float32x16) SqrtMasked(mask Mask32x16) Float32x16
// SqrtMasked computes the square root of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSQRTPD, CPU Feature: AVX512F
+// Asm: VSQRTPD, CPU Feature: AVX512
func (x Float64x2) SqrtMasked(mask Mask64x2) Float64x2
// SqrtMasked computes the square root of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSQRTPD, CPU Feature: AVX512F
+// Asm: VSQRTPD, CPU Feature: AVX512
func (x Float64x4) SqrtMasked(mask Mask64x4) Float64x4
// SqrtMasked computes the square root of each element.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSQRTPD, CPU Feature: AVX512F
+// Asm: VSQRTPD, CPU Feature: AVX512
func (x Float64x8) SqrtMasked(mask Mask64x8) Float64x8
/* Sub */
// Sub subtracts corresponding elements of two vectors.
//
-// Asm: VSUBPS, CPU Feature: AVX512F
+// Asm: VSUBPS, CPU Feature: AVX512
func (x Float32x16) Sub(y Float32x16) Float32x16
// Sub subtracts corresponding elements of two vectors.
// Sub subtracts corresponding elements of two vectors.
//
-// Asm: VSUBPD, CPU Feature: AVX512F
+// Asm: VSUBPD, CPU Feature: AVX512
func (x Float64x8) Sub(y Float64x8) Float64x8
// Sub subtracts corresponding elements of two vectors.
// Sub subtracts corresponding elements of two vectors.
//
-// Asm: VPSUBB, CPU Feature: AVX512BW
+// Asm: VPSUBB, CPU Feature: AVX512
func (x Int8x64) Sub(y Int8x64) Int8x64
// Sub subtracts corresponding elements of two vectors.
// Sub subtracts corresponding elements of two vectors.
//
-// Asm: VPSUBW, CPU Feature: AVX512BW
+// Asm: VPSUBW, CPU Feature: AVX512
func (x Int16x32) Sub(y Int16x32) Int16x32
// Sub subtracts corresponding elements of two vectors.
// Sub subtracts corresponding elements of two vectors.
//
-// Asm: VPSUBD, CPU Feature: AVX512F
+// Asm: VPSUBD, CPU Feature: AVX512
func (x Int32x16) Sub(y Int32x16) Int32x16
// Sub subtracts corresponding elements of two vectors.
// Sub subtracts corresponding elements of two vectors.
//
-// Asm: VPSUBQ, CPU Feature: AVX512F
+// Asm: VPSUBQ, CPU Feature: AVX512
func (x Int64x8) Sub(y Int64x8) Int64x8
// Sub subtracts corresponding elements of two vectors.
// Sub subtracts corresponding elements of two vectors.
//
-// Asm: VPSUBB, CPU Feature: AVX512BW
+// Asm: VPSUBB, CPU Feature: AVX512
func (x Uint8x64) Sub(y Uint8x64) Uint8x64
// Sub subtracts corresponding elements of two vectors.
// Sub subtracts corresponding elements of two vectors.
//
-// Asm: VPSUBW, CPU Feature: AVX512BW
+// Asm: VPSUBW, CPU Feature: AVX512
func (x Uint16x32) Sub(y Uint16x32) Uint16x32
// Sub subtracts corresponding elements of two vectors.
// Sub subtracts corresponding elements of two vectors.
//
-// Asm: VPSUBD, CPU Feature: AVX512F
+// Asm: VPSUBD, CPU Feature: AVX512
func (x Uint32x16) Sub(y Uint32x16) Uint32x16
// Sub subtracts corresponding elements of two vectors.
// Sub subtracts corresponding elements of two vectors.
//
-// Asm: VPSUBQ, CPU Feature: AVX512F
+// Asm: VPSUBQ, CPU Feature: AVX512
func (x Uint64x8) Sub(y Uint64x8) Uint64x8
/* SubMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSUBPS, CPU Feature: AVX512F
+// Asm: VSUBPS, CPU Feature: AVX512
func (x Float32x4) SubMasked(y Float32x4, mask Mask32x4) Float32x4
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSUBPS, CPU Feature: AVX512F
+// Asm: VSUBPS, CPU Feature: AVX512
func (x Float32x8) SubMasked(y Float32x8, mask Mask32x8) Float32x8
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSUBPS, CPU Feature: AVX512F
+// Asm: VSUBPS, CPU Feature: AVX512
func (x Float32x16) SubMasked(y Float32x16, mask Mask32x16) Float32x16
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSUBPD, CPU Feature: AVX512F
+// Asm: VSUBPD, CPU Feature: AVX512
func (x Float64x2) SubMasked(y Float64x2, mask Mask64x2) Float64x2
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSUBPD, CPU Feature: AVX512F
+// Asm: VSUBPD, CPU Feature: AVX512
func (x Float64x4) SubMasked(y Float64x4, mask Mask64x4) Float64x4
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VSUBPD, CPU Feature: AVX512F
+// Asm: VSUBPD, CPU Feature: AVX512
func (x Float64x8) SubMasked(y Float64x8, mask Mask64x8) Float64x8
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBB, CPU Feature: AVX512BW
+// Asm: VPSUBB, CPU Feature: AVX512
func (x Int8x16) SubMasked(y Int8x16, mask Mask8x16) Int8x16
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBB, CPU Feature: AVX512BW
+// Asm: VPSUBB, CPU Feature: AVX512
func (x Int8x32) SubMasked(y Int8x32, mask Mask8x32) Int8x32
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBB, CPU Feature: AVX512BW
+// Asm: VPSUBB, CPU Feature: AVX512
func (x Int8x64) SubMasked(y Int8x64, mask Mask8x64) Int8x64
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBW, CPU Feature: AVX512BW
+// Asm: VPSUBW, CPU Feature: AVX512
func (x Int16x8) SubMasked(y Int16x8, mask Mask16x8) Int16x8
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBW, CPU Feature: AVX512BW
+// Asm: VPSUBW, CPU Feature: AVX512
func (x Int16x16) SubMasked(y Int16x16, mask Mask16x16) Int16x16
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBW, CPU Feature: AVX512BW
+// Asm: VPSUBW, CPU Feature: AVX512
func (x Int16x32) SubMasked(y Int16x32, mask Mask16x32) Int16x32
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBD, CPU Feature: AVX512F
+// Asm: VPSUBD, CPU Feature: AVX512
func (x Int32x4) SubMasked(y Int32x4, mask Mask32x4) Int32x4
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBD, CPU Feature: AVX512F
+// Asm: VPSUBD, CPU Feature: AVX512
func (x Int32x8) SubMasked(y Int32x8, mask Mask32x8) Int32x8
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBD, CPU Feature: AVX512F
+// Asm: VPSUBD, CPU Feature: AVX512
func (x Int32x16) SubMasked(y Int32x16, mask Mask32x16) Int32x16
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBQ, CPU Feature: AVX512F
+// Asm: VPSUBQ, CPU Feature: AVX512
func (x Int64x2) SubMasked(y Int64x2, mask Mask64x2) Int64x2
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBQ, CPU Feature: AVX512F
+// Asm: VPSUBQ, CPU Feature: AVX512
func (x Int64x4) SubMasked(y Int64x4, mask Mask64x4) Int64x4
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBQ, CPU Feature: AVX512F
+// Asm: VPSUBQ, CPU Feature: AVX512
func (x Int64x8) SubMasked(y Int64x8, mask Mask64x8) Int64x8
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBB, CPU Feature: AVX512BW
+// Asm: VPSUBB, CPU Feature: AVX512
func (x Uint8x16) SubMasked(y Uint8x16, mask Mask8x16) Uint8x16
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBB, CPU Feature: AVX512BW
+// Asm: VPSUBB, CPU Feature: AVX512
func (x Uint8x32) SubMasked(y Uint8x32, mask Mask8x32) Uint8x32
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBB, CPU Feature: AVX512BW
+// Asm: VPSUBB, CPU Feature: AVX512
func (x Uint8x64) SubMasked(y Uint8x64, mask Mask8x64) Uint8x64
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBW, CPU Feature: AVX512BW
+// Asm: VPSUBW, CPU Feature: AVX512
func (x Uint16x8) SubMasked(y Uint16x8, mask Mask16x8) Uint16x8
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBW, CPU Feature: AVX512BW
+// Asm: VPSUBW, CPU Feature: AVX512
func (x Uint16x16) SubMasked(y Uint16x16, mask Mask16x16) Uint16x16
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBW, CPU Feature: AVX512BW
+// Asm: VPSUBW, CPU Feature: AVX512
func (x Uint16x32) SubMasked(y Uint16x32, mask Mask16x32) Uint16x32
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBD, CPU Feature: AVX512F
+// Asm: VPSUBD, CPU Feature: AVX512
func (x Uint32x4) SubMasked(y Uint32x4, mask Mask32x4) Uint32x4
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBD, CPU Feature: AVX512F
+// Asm: VPSUBD, CPU Feature: AVX512
func (x Uint32x8) SubMasked(y Uint32x8, mask Mask32x8) Uint32x8
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBD, CPU Feature: AVX512F
+// Asm: VPSUBD, CPU Feature: AVX512
func (x Uint32x16) SubMasked(y Uint32x16, mask Mask32x16) Uint32x16
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBQ, CPU Feature: AVX512F
+// Asm: VPSUBQ, CPU Feature: AVX512
func (x Uint64x2) SubMasked(y Uint64x2, mask Mask64x2) Uint64x2
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBQ, CPU Feature: AVX512F
+// Asm: VPSUBQ, CPU Feature: AVX512
func (x Uint64x4) SubMasked(y Uint64x4, mask Mask64x4) Uint64x4
// SubMasked subtracts corresponding elements of two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBQ, CPU Feature: AVX512F
+// Asm: VPSUBQ, CPU Feature: AVX512
func (x Uint64x8) SubMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* SubPairs */
// SubSaturated subtracts corresponding elements of two vectors with saturation.
//
-// Asm: VPSUBSB, CPU Feature: AVX512BW
+// Asm: VPSUBSB, CPU Feature: AVX512
func (x Int8x64) SubSaturated(y Int8x64) Int8x64
// SubSaturated subtracts corresponding elements of two vectors with saturation.
// SubSaturated subtracts corresponding elements of two vectors with saturation.
//
-// Asm: VPSUBSW, CPU Feature: AVX512BW
+// Asm: VPSUBSW, CPU Feature: AVX512
func (x Int16x32) SubSaturated(y Int16x32) Int16x32
// SubSaturated subtracts corresponding elements of two vectors with saturation.
// SubSaturated subtracts corresponding elements of two vectors with saturation.
//
-// Asm: VPSUBUSB, CPU Feature: AVX512BW
+// Asm: VPSUBUSB, CPU Feature: AVX512
func (x Uint8x64) SubSaturated(y Uint8x64) Uint8x64
// SubSaturated subtracts corresponding elements of two vectors with saturation.
// SubSaturated subtracts corresponding elements of two vectors with saturation.
//
-// Asm: VPSUBUSW, CPU Feature: AVX512BW
+// Asm: VPSUBUSW, CPU Feature: AVX512
func (x Uint16x32) SubSaturated(y Uint16x32) Uint16x32
/* SubSaturatedMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBSB, CPU Feature: AVX512BW
+// Asm: VPSUBSB, CPU Feature: AVX512
func (x Int8x16) SubSaturatedMasked(y Int8x16, mask Mask8x16) Int8x16
// SubSaturatedMasked subtracts corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBSB, CPU Feature: AVX512BW
+// Asm: VPSUBSB, CPU Feature: AVX512
func (x Int8x32) SubSaturatedMasked(y Int8x32, mask Mask8x32) Int8x32
// SubSaturatedMasked subtracts corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBSB, CPU Feature: AVX512BW
+// Asm: VPSUBSB, CPU Feature: AVX512
func (x Int8x64) SubSaturatedMasked(y Int8x64, mask Mask8x64) Int8x64
// SubSaturatedMasked subtracts corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBSW, CPU Feature: AVX512BW
+// Asm: VPSUBSW, CPU Feature: AVX512
func (x Int16x8) SubSaturatedMasked(y Int16x8, mask Mask16x8) Int16x8
// SubSaturatedMasked subtracts corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBSW, CPU Feature: AVX512BW
+// Asm: VPSUBSW, CPU Feature: AVX512
func (x Int16x16) SubSaturatedMasked(y Int16x16, mask Mask16x16) Int16x16
// SubSaturatedMasked subtracts corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBSW, CPU Feature: AVX512BW
+// Asm: VPSUBSW, CPU Feature: AVX512
func (x Int16x32) SubSaturatedMasked(y Int16x32, mask Mask16x32) Int16x32
// SubSaturatedMasked subtracts corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBUSB, CPU Feature: AVX512BW
+// Asm: VPSUBUSB, CPU Feature: AVX512
func (x Uint8x16) SubSaturatedMasked(y Uint8x16, mask Mask8x16) Uint8x16
// SubSaturatedMasked subtracts corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBUSB, CPU Feature: AVX512BW
+// Asm: VPSUBUSB, CPU Feature: AVX512
func (x Uint8x32) SubSaturatedMasked(y Uint8x32, mask Mask8x32) Uint8x32
// SubSaturatedMasked subtracts corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBUSB, CPU Feature: AVX512BW
+// Asm: VPSUBUSB, CPU Feature: AVX512
func (x Uint8x64) SubSaturatedMasked(y Uint8x64, mask Mask8x64) Uint8x64
// SubSaturatedMasked subtracts corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBUSW, CPU Feature: AVX512BW
+// Asm: VPSUBUSW, CPU Feature: AVX512
func (x Uint16x8) SubSaturatedMasked(y Uint16x8, mask Mask16x8) Uint16x8
// SubSaturatedMasked subtracts corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBUSW, CPU Feature: AVX512BW
+// Asm: VPSUBUSW, CPU Feature: AVX512
func (x Uint16x16) SubSaturatedMasked(y Uint16x16, mask Mask16x16) Uint16x16
// SubSaturatedMasked subtracts corresponding elements of two vectors with saturation.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPSUBUSW, CPU Feature: AVX512BW
+// Asm: VPSUBUSW, CPU Feature: AVX512
func (x Uint16x32) SubSaturatedMasked(y Uint16x32, mask Mask16x32) Uint16x32
/* Trunc */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x4) TruncScaled(prec uint8) Float32x4
// TruncScaled truncates elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x8) TruncScaled(prec uint8) Float32x8
// TruncScaled truncates elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x16) TruncScaled(prec uint8) Float32x16
// TruncScaled truncates elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x2) TruncScaled(prec uint8) Float64x2
// TruncScaled truncates elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x4) TruncScaled(prec uint8) Float64x4
// TruncScaled truncates elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x8) TruncScaled(prec uint8) Float64x8
/* TruncScaledMasked */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x4) TruncScaledMasked(prec uint8, mask Mask32x4) Float32x4
// TruncScaledMasked truncates elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x8) TruncScaledMasked(prec uint8, mask Mask32x8) Float32x8
// TruncScaledMasked truncates elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPS, CPU Feature: AVX512F
+// Asm: VRNDSCALEPS, CPU Feature: AVX512
func (x Float32x16) TruncScaledMasked(prec uint8, mask Mask32x16) Float32x16
// TruncScaledMasked truncates elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x2) TruncScaledMasked(prec uint8, mask Mask64x2) Float64x2
// TruncScaledMasked truncates elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x4) TruncScaledMasked(prec uint8, mask Mask64x4) Float64x4
// TruncScaledMasked truncates elements with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VRNDSCALEPD, CPU Feature: AVX512F
+// Asm: VRNDSCALEPD, CPU Feature: AVX512
func (x Float64x8) TruncScaledMasked(prec uint8, mask Mask64x8) Float64x8
/* TruncScaledResidue */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x4) TruncScaledResidue(prec uint8) Float32x4
// TruncScaledResidue computes the difference after truncating with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x8) TruncScaledResidue(prec uint8) Float32x8
// TruncScaledResidue computes the difference after truncating with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x16) TruncScaledResidue(prec uint8) Float32x16
// TruncScaledResidue computes the difference after truncating with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x2) TruncScaledResidue(prec uint8) Float64x2
// TruncScaledResidue computes the difference after truncating with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x4) TruncScaledResidue(prec uint8) Float64x4
// TruncScaledResidue computes the difference after truncating with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x8) TruncScaledResidue(prec uint8) Float64x8
/* TruncScaledResidueMasked */
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x4) TruncScaledResidueMasked(prec uint8, mask Mask32x4) Float32x4
// TruncScaledResidueMasked computes the difference after truncating with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x8) TruncScaledResidueMasked(prec uint8, mask Mask32x8) Float32x8
// TruncScaledResidueMasked computes the difference after truncating with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPS, CPU Feature: AVX512DQ
+// Asm: VREDUCEPS, CPU Feature: AVX512
func (x Float32x16) TruncScaledResidueMasked(prec uint8, mask Mask32x16) Float32x16
// TruncScaledResidueMasked computes the difference after truncating with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x2) TruncScaledResidueMasked(prec uint8, mask Mask64x2) Float64x2
// TruncScaledResidueMasked computes the difference after truncating with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x4) TruncScaledResidueMasked(prec uint8, mask Mask64x4) Float64x4
// TruncScaledResidueMasked computes the difference after truncating with specified precision.
//
// prec results in better performance when it's a constant, a non-constant value will be translated into a jump table.
//
-// Asm: VREDUCEPD, CPU Feature: AVX512DQ
+// Asm: VREDUCEPD, CPU Feature: AVX512
func (x Float64x8) TruncScaledResidueMasked(prec uint8, mask Mask64x8) Float64x8
/* Xor */
// Xor performs a bitwise XOR operation between two vectors.
//
-// Asm: VPXORD, CPU Feature: AVX512F
+// Asm: VPXORD, CPU Feature: AVX512
func (x Int8x64) Xor(y Int8x64) Int8x64
// Xor performs a bitwise XOR operation between two vectors.
// Xor performs a bitwise XOR operation between two vectors.
//
-// Asm: VPXORD, CPU Feature: AVX512F
+// Asm: VPXORD, CPU Feature: AVX512
func (x Int16x32) Xor(y Int16x32) Int16x32
// Xor performs a bitwise XOR operation between two vectors.
// Xor performs a bitwise XOR operation between two vectors.
//
-// Asm: VPXORD, CPU Feature: AVX512F
+// Asm: VPXORD, CPU Feature: AVX512
func (x Int32x16) Xor(y Int32x16) Int32x16
// Xor performs a bitwise XOR operation between two vectors.
// Xor performs a bitwise XOR operation between two vectors.
//
-// Asm: VPXORQ, CPU Feature: AVX512F
+// Asm: VPXORQ, CPU Feature: AVX512
func (x Int64x8) Xor(y Int64x8) Int64x8
// Xor performs a bitwise XOR operation between two vectors.
// Xor performs a bitwise XOR operation between two vectors.
//
-// Asm: VPXORD, CPU Feature: AVX512F
+// Asm: VPXORD, CPU Feature: AVX512
func (x Uint8x64) Xor(y Uint8x64) Uint8x64
// Xor performs a bitwise XOR operation between two vectors.
// Xor performs a bitwise XOR operation between two vectors.
//
-// Asm: VPXORD, CPU Feature: AVX512F
+// Asm: VPXORD, CPU Feature: AVX512
func (x Uint16x32) Xor(y Uint16x32) Uint16x32
// Xor performs a bitwise XOR operation between two vectors.
// Xor performs a bitwise XOR operation between two vectors.
//
-// Asm: VPXORD, CPU Feature: AVX512F
+// Asm: VPXORD, CPU Feature: AVX512
func (x Uint32x16) Xor(y Uint32x16) Uint32x16
// Xor performs a bitwise XOR operation between two vectors.
// Xor performs a bitwise XOR operation between two vectors.
//
-// Asm: VPXORQ, CPU Feature: AVX512F
+// Asm: VPXORQ, CPU Feature: AVX512
func (x Uint64x8) Xor(y Uint64x8) Uint64x8
/* XorMasked */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPXORD, CPU Feature: AVX512F
+// Asm: VPXORD, CPU Feature: AVX512
func (x Int32x4) XorMasked(y Int32x4, mask Mask32x4) Int32x4
// XorMasked performs a bitwise XOR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPXORD, CPU Feature: AVX512F
+// Asm: VPXORD, CPU Feature: AVX512
func (x Int32x8) XorMasked(y Int32x8, mask Mask32x8) Int32x8
// XorMasked performs a bitwise XOR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPXORD, CPU Feature: AVX512F
+// Asm: VPXORD, CPU Feature: AVX512
func (x Int32x16) XorMasked(y Int32x16, mask Mask32x16) Int32x16
// XorMasked performs a bitwise XOR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPXORQ, CPU Feature: AVX512F
+// Asm: VPXORQ, CPU Feature: AVX512
func (x Int64x2) XorMasked(y Int64x2, mask Mask64x2) Int64x2
// XorMasked performs a bitwise XOR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPXORQ, CPU Feature: AVX512F
+// Asm: VPXORQ, CPU Feature: AVX512
func (x Int64x4) XorMasked(y Int64x4, mask Mask64x4) Int64x4
// XorMasked performs a bitwise XOR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPXORQ, CPU Feature: AVX512F
+// Asm: VPXORQ, CPU Feature: AVX512
func (x Int64x8) XorMasked(y Int64x8, mask Mask64x8) Int64x8
// XorMasked performs a bitwise XOR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPXORD, CPU Feature: AVX512F
+// Asm: VPXORD, CPU Feature: AVX512
func (x Uint32x4) XorMasked(y Uint32x4, mask Mask32x4) Uint32x4
// XorMasked performs a bitwise XOR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPXORD, CPU Feature: AVX512F
+// Asm: VPXORD, CPU Feature: AVX512
func (x Uint32x8) XorMasked(y Uint32x8, mask Mask32x8) Uint32x8
// XorMasked performs a bitwise XOR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPXORD, CPU Feature: AVX512F
+// Asm: VPXORD, CPU Feature: AVX512
func (x Uint32x16) XorMasked(y Uint32x16, mask Mask32x16) Uint32x16
// XorMasked performs a bitwise XOR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPXORQ, CPU Feature: AVX512F
+// Asm: VPXORQ, CPU Feature: AVX512
func (x Uint64x2) XorMasked(y Uint64x2, mask Mask64x2) Uint64x2
// XorMasked performs a bitwise XOR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPXORQ, CPU Feature: AVX512F
+// Asm: VPXORQ, CPU Feature: AVX512
func (x Uint64x4) XorMasked(y Uint64x4, mask Mask64x4) Uint64x4
// XorMasked performs a bitwise XOR operation between two vectors.
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPXORQ, CPU Feature: AVX512F
+// Asm: VPXORQ, CPU Feature: AVX512
func (x Uint64x8) XorMasked(y Uint64x8, mask Mask64x8) Uint64x8
/* blend */
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPBLENDMB, CPU Feature: AVX512BW
+// Asm: VPBLENDMB, CPU Feature: AVX512
func (x Int8x64) blendMasked(y Int8x64, mask Mask8x64) Int8x64
// blendMasked blends two vectors based on mask values, choosing either
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPBLENDMW, CPU Feature: AVX512BW
+// Asm: VPBLENDMW, CPU Feature: AVX512
func (x Int16x32) blendMasked(y Int16x32, mask Mask16x32) Int16x32
// blendMasked blends two vectors based on mask values, choosing either
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPBLENDMD, CPU Feature: AVX512F
+// Asm: VPBLENDMD, CPU Feature: AVX512
func (x Int32x16) blendMasked(y Int32x16, mask Mask32x16) Int32x16
// blendMasked blends two vectors based on mask values, choosing either
//
// This operation is applied selectively under a write mask.
//
-// Asm: VPBLENDMQ, CPU Feature: AVX512F
+// Asm: VPBLENDMQ, CPU Feature: AVX512
func (x Int64x8) blendMasked(y Int64x8, mask Mask64x8) Int64x8
// Float64x2 converts from Float32x4 to Float64x2