Go asm syntax:
MULWVW RK, RJ, RD
MULWVWU RK, RJ, RD
Equivalent platform assembler syntax:
mulw.d.w rd, rj, rk
mulw.d.wu rd, rj, rk
Change-Id: Ie46a21904a4c25d04200b0663f83072c38a76c6f
Reviewed-on: https://go-review.googlesource.com/c/go/+/721521
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
Reviewed-by: Meidan Li <limeidan@loongson.cn>
Reviewed-by: Mark Freeman <markfreeman@google.com>
Reviewed-by: Keith Randall <khr@google.com>
SRLV $32, R4, R5 // 85804500
SRLV $32, R4 // 84804500
+ // MULW.D.W[U] instructions
+ MULWVW R4, R5 // a5101f00
+ MULWVW R4, R5, R6 // a6101f00
+ MULWVWU R4, R5 // a5901f00
+ MULWVWU R4, R5, R6 // a6901f00
+
MASKEQZ R4, R5, R6 // a6101300
MASKNEZ R4, R5, R6 // a6901300
AORN
AANDN
+ // 2.2.1.12
+ AMULWVW
+ AMULWVWU
+
// 2.2.7. Atomic Memory Access Instructions
AAMSWAPB
AAMSWAPH
"ALSLV",
"ORN",
"ANDN",
+ "MULWVW",
+ "MULWVWU",
"AMSWAPB",
"AMSWAPH",
"AMSWAPW",
opset(AREMU, r0)
opset(ADIV, r0)
opset(ADIVU, r0)
+ opset(AMULWVW, r0)
+ opset(AMULWVWU, r0)
case AMULV:
opset(AMULVU, r0)
return 0x3c << 15 // mulh.d
case AMULHVU:
return 0x3d << 15 // mulhu.d
+ case AMULWVW:
+ return 0x3e << 15 // mulw.d.w
+ case AMULWVWU:
+ return 0x3f << 15 // mulw.d.wu
case ADIV:
return 0x40 << 15 // div.w
case ADIVU: