[dev.simd] cmd/compile: fix maskreg/simdreg chaos

This CL fixes some errors left by CL 685895.

Change-Id: I35ee36287fc964a82fd3c88764b688bd4491be65
Reviewed-on: https://go-review.googlesource.com/c/go/+/687095
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>

diff --git a/src/cmd/compile/internal/amd64/ssa.go b/src/cmd/compile/internal/amd64/ssa.go
index 8bc7cf83a35be4f5788b76f75b2835139f3042a5..3e45097edf4c0c46f329b7372a671c7eb932102c 100644 (file)
--- a/src/cmd/compile/internal/amd64/ssa.go
+++ b/src/cmd/compile/internal/amd64/ssa.go
@@ -1043,8 +1043,8 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
                x := v.Args[0].Reg()
                y := v.Reg()
                if v.Type.IsSIMD() {
-                       x = simdReg(v.Args[0])
-                       y = simdReg(v)
+                       x = simdOrMaskReg(v.Args[0])
+                       y = simdOrMaskReg(v)
                }
                if x != y {
                        opregreg(s, moveByType(v.Type), y, x)
@@ -1059,7 +1059,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
                p.To.Type = obj.TYPE_REG
                r := v.Reg()
                if v.Type.IsSIMD() {
-                       r = simdReg(v)
+                       r = simdOrMaskReg(v)
                }
                p.To.Reg = r
 
@@ -1070,7 +1070,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
                }
                r := v.Args[0].Reg()
                if v.Type.IsSIMD() {
-                       r = simdReg(v.Args[0])
+                       r = simdOrMaskReg(v.Args[0])
                }
                p := s.Prog(storeByType(v.Type))
                p.From.Type = obj.TYPE_REG
@@ -1906,7 +1906,7 @@ func simdReg(v *ssa.Value) int16 {
 func maskReg(v *ssa.Value) int16 {
        t := v.Type
        if !t.IsSIMD() {
-               base.Fatalf("simdReg: not a simd type; v=%s, b=b%d, f=%s", v.LongString(), v.Block.ID, v.Block.Func.Name)
+               base.Fatalf("maskReg: not a simd type; v=%s, b=b%d, f=%s", v.LongString(), v.Block.ID, v.Block.Func.Name)
        }
        switch t.Size() {
        case 8:
@@ -1915,6 +1915,15 @@ func maskReg(v *ssa.Value) int16 {
        panic("unreachable")
 }
 
+// XXX k mask + vec
+func simdOrMaskReg(v *ssa.Value) int16 {
+       t := v.Type
+       if t.Size() <= 8 {
+               return maskReg(v)
+       }
+       return simdReg(v)
+}
+
 // XXX this is used for shift operations only.
 // regalloc will issue OpCopy with incorrect type, but the assigned
 // register should be correct, and this function is merely checking