[dev.simd] simd/_gen: fix sorting ops slices

Fix sorting slices to avoid panic when there are more opsDataImm than
opsData (the problem occurs when generating only a subset of instructions
but it may be better to keep them sorted by their own names anyway).

Change-Id: Iea7fe61259e8416f16c46158d87c84b1d7a3076d
Reviewed-on: https://go-review.googlesource.com/c/go/+/716121
Reviewed-by: Junyang Shao <shaojunyang@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Auto-Submit: Junyang Shao <shaojunyang@google.com>

diff --git a/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go b/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
index 0ee4f33fbf74033830ad68ce581615972f882390..70558de0f3458d5a46b5209000f9d2e32e5c1f6d 100644 (file)
--- a/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
+++ b/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
@@ -1092,801 +1092,801 @@ func simdAMD64Ops(v11, v21, v2k, vkv, v2kv, v2kk, v31, v3kv, vgpv, vgp, vfpv, vf
                {name: "VSUBPSMasked128", argLength: 3, reg: w2kw, asm: "VSUBPS", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VSUBPSMasked256", argLength: 3, reg: w2kw, asm: "VSUBPS", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VSUBPSMasked512", argLength: 3, reg: w2kw, asm: "VSUBPS", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "SHA1RNDS4128", argLength: 2, reg: v21, asm: "SHA1RNDS4", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: true},
                {name: "VAESKEYGENASSIST128", argLength: 1, reg: v11, asm: "VAESKEYGENASSIST", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VROUNDPS128", argLength: 1, reg: v11, asm: "VROUNDPS", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VROUNDPS256", argLength: 1, reg: v11, asm: "VROUNDPS", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VROUNDPD128", argLength: 1, reg: v11, asm: "VROUNDPD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VROUNDPD256", argLength: 1, reg: v11, asm: "VROUNDPD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VRNDSCALEPS128", argLength: 1, reg: w11, asm: "VRNDSCALEPS", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VRNDSCALEPS256", argLength: 1, reg: w11, asm: "VRNDSCALEPS", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VRNDSCALEPS512", argLength: 1, reg: w11, asm: "VRNDSCALEPS", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VRNDSCALEPD128", argLength: 1, reg: w11, asm: "VRNDSCALEPD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VRNDSCALEPD256", argLength: 1, reg: w11, asm: "VRNDSCALEPD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VRNDSCALEPD512", argLength: 1, reg: w11, asm: "VRNDSCALEPD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VRNDSCALEPSMasked128", argLength: 2, reg: wkw, asm: "VRNDSCALEPS", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VRNDSCALEPSMasked256", argLength: 2, reg: wkw, asm: "VRNDSCALEPS", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VRNDSCALEPSMasked512", argLength: 2, reg: wkw, asm: "VRNDSCALEPS", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VRNDSCALEPDMasked128", argLength: 2, reg: wkw, asm: "VRNDSCALEPD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VRNDSCALEPDMasked256", argLength: 2, reg: wkw, asm: "VRNDSCALEPD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VRNDSCALEPDMasked512", argLength: 2, reg: wkw, asm: "VRNDSCALEPD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VREDUCEPS128", argLength: 1, reg: w11, asm: "VREDUCEPS", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VREDUCEPS256", argLength: 1, reg: w11, asm: "VREDUCEPS", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VREDUCEPS512", argLength: 1, reg: w11, asm: "VREDUCEPS", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VREDUCEPD128", argLength: 1, reg: w11, asm: "VREDUCEPD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VREDUCEPD256", argLength: 1, reg: w11, asm: "VREDUCEPD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VREDUCEPD512", argLength: 1, reg: w11, asm: "VREDUCEPD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VREDUCEPSMasked128", argLength: 2, reg: wkw, asm: "VREDUCEPS", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VREDUCEPSMasked256", argLength: 2, reg: wkw, asm: "VREDUCEPS", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VREDUCEPSMasked512", argLength: 2, reg: wkw, asm: "VREDUCEPS", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VREDUCEPDMasked128", argLength: 2, reg: wkw, asm: "VREDUCEPD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VREDUCEPDMasked256", argLength: 2, reg: wkw, asm: "VREDUCEPD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VREDUCEPDMasked512", argLength: 2, reg: wkw, asm: "VREDUCEPD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VCMPPS128", argLength: 2, reg: v21, asm: "VCMPPS", aux: "UInt8", commutative: true, typ: "Vec128", resultInArg0: false},
-               {name: "VCMPPS256", argLength: 2, reg: v21, asm: "VCMPPS", aux: "UInt8", commutative: true, typ: "Vec256", resultInArg0: false},
-               {name: "VCMPPS512", argLength: 2, reg: w2k, asm: "VCMPPS", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VCMPPD128", argLength: 2, reg: v21, asm: "VCMPPD", aux: "UInt8", commutative: true, typ: "Vec128", resultInArg0: false},
                {name: "VCMPPD256", argLength: 2, reg: v21, asm: "VCMPPD", aux: "UInt8", commutative: true, typ: "Vec256", resultInArg0: false},
                {name: "VCMPPD512", argLength: 2, reg: w2k, asm: "VCMPPD", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
-               {name: "VCMPPSMasked128", argLength: 3, reg: w2kk, asm: "VCMPPS", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
-               {name: "VCMPPSMasked256", argLength: 3, reg: w2kk, asm: "VCMPPS", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
-               {name: "VCMPPSMasked512", argLength: 3, reg: w2kk, asm: "VCMPPS", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VCMPPDMasked128", argLength: 3, reg: w2kk, asm: "VCMPPD", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VCMPPDMasked256", argLength: 3, reg: w2kk, asm: "VCMPPD", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VCMPPDMasked512", argLength: 3, reg: w2kk, asm: "VCMPPD", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VCMPPS128", argLength: 2, reg: v21, asm: "VCMPPS", aux: "UInt8", commutative: true, typ: "Vec128", resultInArg0: false},
+               {name: "VCMPPS256", argLength: 2, reg: v21, asm: "VCMPPS", aux: "UInt8", commutative: true, typ: "Vec256", resultInArg0: false},
+               {name: "VCMPPS512", argLength: 2, reg: w2k, asm: "VCMPPS", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VCMPPSMasked128", argLength: 3, reg: w2kk, asm: "VCMPPS", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VCMPPSMasked256", argLength: 3, reg: w2kk, asm: "VCMPPS", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VCMPPSMasked512", argLength: 3, reg: w2kk, asm: "VCMPPS", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VEXTRACTF64X4256", argLength: 1, reg: w11, asm: "VEXTRACTF64X4", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VEXTRACTF128128", argLength: 1, reg: v11, asm: "VEXTRACTF128", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VEXTRACTI64X4256", argLength: 1, reg: w11, asm: "VEXTRACTI64X4", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VEXTRACTI128128", argLength: 1, reg: v11, asm: "VEXTRACTI128", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VGF2P8AFFINEINVQB128", argLength: 2, reg: w21, asm: "VGF2P8AFFINEINVQB", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VGF2P8AFFINEINVQB256", argLength: 2, reg: w21, asm: "VGF2P8AFFINEINVQB", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VGF2P8AFFINEINVQB512", argLength: 2, reg: w21, asm: "VGF2P8AFFINEINVQB", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VGF2P8AFFINEINVQBMasked128", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEINVQB", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VGF2P8AFFINEINVQBMasked256", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEINVQB", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VGF2P8AFFINEINVQBMasked512", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEINVQB", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VGF2P8AFFINEQB128", argLength: 2, reg: w21, asm: "VGF2P8AFFINEQB", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VGF2P8AFFINEQB256", argLength: 2, reg: w21, asm: "VGF2P8AFFINEQB", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VGF2P8AFFINEQB512", argLength: 2, reg: w21, asm: "VGF2P8AFFINEQB", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VGF2P8AFFINEQBMasked128", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEQB", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VGF2P8AFFINEQBMasked256", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEQB", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VGF2P8AFFINEQBMasked512", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEQB", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VINSERTF64X4512", argLength: 2, reg: w21, asm: "VINSERTF64X4", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VINSERTF128256", argLength: 2, reg: v21, asm: "VINSERTF128", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VINSERTI64X4512", argLength: 2, reg: w21, asm: "VINSERTI64X4", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VINSERTI128256", argLength: 2, reg: v21, asm: "VINSERTI128", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPCMPB512", argLength: 2, reg: w2k, asm: "VPCMPB", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
                {name: "VPCMPBMasked128", argLength: 3, reg: w2kk, asm: "VPCMPB", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VPCMPBMasked256", argLength: 3, reg: w2kk, asm: "VPCMPB", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VPCMPBMasked512", argLength: 3, reg: w2kk, asm: "VPCMPB", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPWMasked128", argLength: 3, reg: w2kk, asm: "VPCMPW", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPWMasked256", argLength: 3, reg: w2kk, asm: "VPCMPW", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPWMasked512", argLength: 3, reg: w2kk, asm: "VPCMPW", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VPCMPD512", argLength: 2, reg: w2k, asm: "VPCMPD", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
                {name: "VPCMPDMasked128", argLength: 3, reg: w2kk, asm: "VPCMPD", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VPCMPDMasked256", argLength: 3, reg: w2kk, asm: "VPCMPD", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VPCMPDMasked512", argLength: 3, reg: w2kk, asm: "VPCMPD", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VPCMPQ512", argLength: 2, reg: w2k, asm: "VPCMPQ", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
                {name: "VPCMPQMasked128", argLength: 3, reg: w2kk, asm: "VPCMPQ", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VPCMPQMasked256", argLength: 3, reg: w2kk, asm: "VPCMPQ", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VPCMPQMasked512", argLength: 3, reg: w2kk, asm: "VPCMPQ", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VPCMPUB512", argLength: 2, reg: w2k, asm: "VPCMPUB", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
                {name: "VPCMPUBMasked128", argLength: 3, reg: w2kk, asm: "VPCMPUB", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VPCMPUBMasked256", argLength: 3, reg: w2kk, asm: "VPCMPUB", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VPCMPUBMasked512", argLength: 3, reg: w2kk, asm: "VPCMPUB", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPUWMasked128", argLength: 3, reg: w2kk, asm: "VPCMPUW", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPUWMasked256", argLength: 3, reg: w2kk, asm: "VPCMPUW", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPUWMasked512", argLength: 3, reg: w2kk, asm: "VPCMPUW", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VPCMPUD512", argLength: 2, reg: w2k, asm: "VPCMPUD", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
                {name: "VPCMPUDMasked128", argLength: 3, reg: w2kk, asm: "VPCMPUD", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VPCMPUDMasked256", argLength: 3, reg: w2kk, asm: "VPCMPUD", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VPCMPUDMasked512", argLength: 3, reg: w2kk, asm: "VPCMPUD", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VPCMPUQ512", argLength: 2, reg: w2k, asm: "VPCMPUQ", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
                {name: "VPCMPUQMasked128", argLength: 3, reg: w2kk, asm: "VPCMPUQ", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VPCMPUQMasked256", argLength: 3, reg: w2kk, asm: "VPCMPUQ", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
                {name: "VPCMPUQMasked512", argLength: 3, reg: w2kk, asm: "VPCMPUQ", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
-               {name: "VGF2P8AFFINEQB128", argLength: 2, reg: w21, asm: "VGF2P8AFFINEQB", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VGF2P8AFFINEQB256", argLength: 2, reg: w21, asm: "VGF2P8AFFINEQB", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VGF2P8AFFINEQB512", argLength: 2, reg: w21, asm: "VGF2P8AFFINEQB", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VGF2P8AFFINEINVQB128", argLength: 2, reg: w21, asm: "VGF2P8AFFINEINVQB", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VGF2P8AFFINEINVQB256", argLength: 2, reg: w21, asm: "VGF2P8AFFINEINVQB", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VGF2P8AFFINEINVQB512", argLength: 2, reg: w21, asm: "VGF2P8AFFINEINVQB", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VGF2P8AFFINEINVQBMasked128", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEINVQB", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VGF2P8AFFINEINVQBMasked256", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEINVQB", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VGF2P8AFFINEINVQBMasked512", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEINVQB", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VGF2P8AFFINEQBMasked128", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEQB", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VGF2P8AFFINEQBMasked256", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEQB", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VGF2P8AFFINEQBMasked512", argLength: 3, reg: w2kw, asm: "VGF2P8AFFINEQB", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPCMPUW512", argLength: 2, reg: w2k, asm: "VPCMPUW", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
+               {name: "VPCMPUWMasked128", argLength: 3, reg: w2kk, asm: "VPCMPUW", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VPCMPUWMasked256", argLength: 3, reg: w2kk, asm: "VPCMPUW", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VPCMPUWMasked512", argLength: 3, reg: w2kk, asm: "VPCMPUW", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VPCMPW512", argLength: 2, reg: w2k, asm: "VPCMPW", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
+               {name: "VPCMPWMasked128", argLength: 3, reg: w2kk, asm: "VPCMPW", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VPCMPWMasked256", argLength: 3, reg: w2kk, asm: "VPCMPW", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VPCMPWMasked512", argLength: 3, reg: w2kk, asm: "VPCMPW", aux: "UInt8", commutative: true, typ: "Mask", resultInArg0: false},
+               {name: "VPERM2F128256", argLength: 2, reg: v21, asm: "VPERM2F128", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPERM2I128256", argLength: 2, reg: v21, asm: "VPERM2I128", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPEXTRB128", argLength: 1, reg: wgp, asm: "VPEXTRB", aux: "UInt8", commutative: false, typ: "int8", resultInArg0: false},
                {name: "VPEXTRD128", argLength: 1, reg: vgp, asm: "VPEXTRD", aux: "UInt8", commutative: false, typ: "int32", resultInArg0: false},
                {name: "VPEXTRQ128", argLength: 1, reg: vgp, asm: "VPEXTRQ", aux: "UInt8", commutative: false, typ: "int64", resultInArg0: false},
-               {name: "VPEXTRB128", argLength: 1, reg: wgp, asm: "VPEXTRB", aux: "UInt8", commutative: false, typ: "int8", resultInArg0: false},
                {name: "VPEXTRW128", argLength: 1, reg: wgp, asm: "VPEXTRW", aux: "UInt8", commutative: false, typ: "int16", resultInArg0: false},
-               {name: "VEXTRACTF128128", argLength: 1, reg: v11, asm: "VEXTRACTF128", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VEXTRACTF64X4256", argLength: 1, reg: w11, asm: "VEXTRACTF64X4", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VEXTRACTI128128", argLength: 1, reg: v11, asm: "VEXTRACTI128", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VEXTRACTI64X4256", argLength: 1, reg: w11, asm: "VEXTRACTI64X4", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPCMPUB512", argLength: 2, reg: w2k, asm: "VPCMPUB", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPUW512", argLength: 2, reg: w2k, asm: "VPCMPUW", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPUD512", argLength: 2, reg: w2k, asm: "VPCMPUD", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPUQ512", argLength: 2, reg: w2k, asm: "VPCMPUQ", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPB512", argLength: 2, reg: w2k, asm: "VPCMPB", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPW512", argLength: 2, reg: w2k, asm: "VPCMPW", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPD512", argLength: 2, reg: w2k, asm: "VPCMPD", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
-               {name: "VPCMPQ512", argLength: 2, reg: w2k, asm: "VPCMPQ", aux: "UInt8", commutative: false, typ: "Mask", resultInArg0: false},
-               {name: "VPSHUFD128", argLength: 1, reg: v11, asm: "VPSHUFD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSHUFD256", argLength: 1, reg: v11, asm: "VPSHUFD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSHUFD512", argLength: 1, reg: w11, asm: "VPSHUFD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSHUFDMasked256", argLength: 2, reg: wkw, asm: "VPSHUFD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSHUFDMasked512", argLength: 2, reg: wkw, asm: "VPSHUFD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSHUFHW128", argLength: 1, reg: w11, asm: "VPSHUFHW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSHUFHW256", argLength: 1, reg: v11, asm: "VPSHUFHW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSHUFHW512", argLength: 1, reg: w11, asm: "VPSHUFHW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSHUFHWMasked256", argLength: 2, reg: wkw, asm: "VPSHUFHW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSHUFHWMasked512", argLength: 2, reg: wkw, asm: "VPSHUFHW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSHUFHWMasked128", argLength: 2, reg: wkw, asm: "VPSHUFHW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSHUFDMasked128", argLength: 2, reg: wkw, asm: "VPSHUFD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPINSRB128", argLength: 2, reg: vgpv, asm: "VPINSRB", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPINSRD128", argLength: 2, reg: vgpv, asm: "VPINSRD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPINSRQ128", argLength: 2, reg: vgpv, asm: "VPINSRQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPINSRW128", argLength: 2, reg: vgpv, asm: "VPINSRW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPROLD128", argLength: 1, reg: w11, asm: "VPROLD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPROLD256", argLength: 1, reg: w11, asm: "VPROLD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPROLD512", argLength: 1, reg: w11, asm: "VPROLD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPROLQ128", argLength: 1, reg: w11, asm: "VPROLQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPROLQ256", argLength: 1, reg: w11, asm: "VPROLQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPROLQ512", argLength: 1, reg: w11, asm: "VPROLQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPROLDMasked128", argLength: 2, reg: wkw, asm: "VPROLD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPROLDMasked256", argLength: 2, reg: wkw, asm: "VPROLD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPROLDMasked512", argLength: 2, reg: wkw, asm: "VPROLD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPROLQ128", argLength: 1, reg: w11, asm: "VPROLQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPROLQ256", argLength: 1, reg: w11, asm: "VPROLQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPROLQ512", argLength: 1, reg: w11, asm: "VPROLQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPROLQMasked128", argLength: 2, reg: wkw, asm: "VPROLQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPROLQMasked256", argLength: 2, reg: wkw, asm: "VPROLQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPROLQMasked512", argLength: 2, reg: wkw, asm: "VPROLQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPRORD128", argLength: 1, reg: w11, asm: "VPRORD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPRORD256", argLength: 1, reg: w11, asm: "VPRORD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPRORD512", argLength: 1, reg: w11, asm: "VPRORD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPRORQ128", argLength: 1, reg: w11, asm: "VPRORQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPRORQ256", argLength: 1, reg: w11, asm: "VPRORQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPRORQ512", argLength: 1, reg: w11, asm: "VPRORQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPRORDMasked128", argLength: 2, reg: wkw, asm: "VPRORD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPRORDMasked256", argLength: 2, reg: wkw, asm: "VPRORD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPRORDMasked512", argLength: 2, reg: wkw, asm: "VPRORD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPRORQ128", argLength: 1, reg: w11, asm: "VPRORQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPRORQ256", argLength: 1, reg: w11, asm: "VPRORQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPRORQ512", argLength: 1, reg: w11, asm: "VPRORQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPRORQMasked128", argLength: 2, reg: wkw, asm: "VPRORQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPRORQMasked256", argLength: 2, reg: wkw, asm: "VPRORQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPRORQMasked512", argLength: 2, reg: wkw, asm: "VPRORQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "SHA1RNDS4128", argLength: 2, reg: v21, asm: "SHA1RNDS4", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: true},
-               {name: "VPERM2F128256", argLength: 2, reg: v21, asm: "VPERM2F128", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPERM2I128256", argLength: 2, reg: v21, asm: "VPERM2I128", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPINSRD128", argLength: 2, reg: vgpv, asm: "VPINSRD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPINSRQ128", argLength: 2, reg: vgpv, asm: "VPINSRQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPINSRB128", argLength: 2, reg: vgpv, asm: "VPINSRB", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPINSRW128", argLength: 2, reg: vgpv, asm: "VPINSRW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VINSERTF128256", argLength: 2, reg: v21, asm: "VINSERTF128", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VINSERTF64X4512", argLength: 2, reg: w21, asm: "VINSERTF64X4", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VINSERTI128256", argLength: 2, reg: v21, asm: "VINSERTI128", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VINSERTI64X4512", argLength: 2, reg: w21, asm: "VINSERTI64X4", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSHLDW128", argLength: 2, reg: w21, asm: "VPSHLDW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSHLDW256", argLength: 2, reg: w21, asm: "VPSHLDW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSHLDW512", argLength: 2, reg: w21, asm: "VPSHLDW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSHLDD128", argLength: 2, reg: w21, asm: "VPSHLDD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSHLDD256", argLength: 2, reg: w21, asm: "VPSHLDD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSHLDD512", argLength: 2, reg: w21, asm: "VPSHLDD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSHLDQ128", argLength: 2, reg: w21, asm: "VPSHLDQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSHLDQ256", argLength: 2, reg: w21, asm: "VPSHLDQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSHLDQ512", argLength: 2, reg: w21, asm: "VPSHLDQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSHLDWMasked128", argLength: 3, reg: w2kw, asm: "VPSHLDW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSHLDWMasked256", argLength: 3, reg: w2kw, asm: "VPSHLDW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSHLDWMasked512", argLength: 3, reg: w2kw, asm: "VPSHLDW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSHLDDMasked128", argLength: 3, reg: w2kw, asm: "VPSHLDD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSHLDDMasked256", argLength: 3, reg: w2kw, asm: "VPSHLDD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSHLDDMasked512", argLength: 3, reg: w2kw, asm: "VPSHLDD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSHLDQ128", argLength: 2, reg: w21, asm: "VPSHLDQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSHLDQ256", argLength: 2, reg: w21, asm: "VPSHLDQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSHLDQ512", argLength: 2, reg: w21, asm: "VPSHLDQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSHLDQMasked128", argLength: 3, reg: w2kw, asm: "VPSHLDQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSHLDQMasked256", argLength: 3, reg: w2kw, asm: "VPSHLDQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSHLDQMasked512", argLength: 3, reg: w2kw, asm: "VPSHLDQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSHRDW128", argLength: 2, reg: w21, asm: "VPSHRDW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSHRDW256", argLength: 2, reg: w21, asm: "VPSHRDW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSHRDW512", argLength: 2, reg: w21, asm: "VPSHRDW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSHLDW128", argLength: 2, reg: w21, asm: "VPSHLDW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSHLDW256", argLength: 2, reg: w21, asm: "VPSHLDW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSHLDW512", argLength: 2, reg: w21, asm: "VPSHLDW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSHLDWMasked128", argLength: 3, reg: w2kw, asm: "VPSHLDW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSHLDWMasked256", argLength: 3, reg: w2kw, asm: "VPSHLDW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSHLDWMasked512", argLength: 3, reg: w2kw, asm: "VPSHLDW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSHRDD128", argLength: 2, reg: w21, asm: "VPSHRDD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSHRDD256", argLength: 2, reg: w21, asm: "VPSHRDD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSHRDD512", argLength: 2, reg: w21, asm: "VPSHRDD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSHRDQ128", argLength: 2, reg: w21, asm: "VPSHRDQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSHRDQ256", argLength: 2, reg: w21, asm: "VPSHRDQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSHRDQ512", argLength: 2, reg: w21, asm: "VPSHRDQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSHRDWMasked128", argLength: 3, reg: w2kw, asm: "VPSHRDW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSHRDWMasked256", argLength: 3, reg: w2kw, asm: "VPSHRDW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSHRDWMasked512", argLength: 3, reg: w2kw, asm: "VPSHRDW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSHRDDMasked128", argLength: 3, reg: w2kw, asm: "VPSHRDD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSHRDDMasked256", argLength: 3, reg: w2kw, asm: "VPSHRDD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSHRDDMasked512", argLength: 3, reg: w2kw, asm: "VPSHRDD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSHRDQ128", argLength: 2, reg: w21, asm: "VPSHRDQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSHRDQ256", argLength: 2, reg: w21, asm: "VPSHRDQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSHRDQ512", argLength: 2, reg: w21, asm: "VPSHRDQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSHRDQMasked128", argLength: 3, reg: w2kw, asm: "VPSHRDQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSHRDQMasked256", argLength: 3, reg: w2kw, asm: "VPSHRDQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSHRDQMasked512", argLength: 3, reg: w2kw, asm: "VPSHRDQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VSHUFPS128", argLength: 2, reg: v21, asm: "VSHUFPS", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VSHUFPD128", argLength: 2, reg: v21, asm: "VSHUFPD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VSHUFPS256", argLength: 2, reg: v21, asm: "VSHUFPS", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VSHUFPS512", argLength: 2, reg: w21, asm: "VSHUFPS", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VSHUFPD256", argLength: 2, reg: v21, asm: "VSHUFPD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VSHUFPD512", argLength: 2, reg: w21, asm: "VSHUFPD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSLLW128const", argLength: 1, reg: v11, asm: "VPSLLW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSLLW256const", argLength: 1, reg: v11, asm: "VPSLLW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSLLW512const", argLength: 1, reg: w11, asm: "VPSLLW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSHRDW128", argLength: 2, reg: w21, asm: "VPSHRDW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSHRDW256", argLength: 2, reg: w21, asm: "VPSHRDW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSHRDW512", argLength: 2, reg: w21, asm: "VPSHRDW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSHRDWMasked128", argLength: 3, reg: w2kw, asm: "VPSHRDW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSHRDWMasked256", argLength: 3, reg: w2kw, asm: "VPSHRDW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSHRDWMasked512", argLength: 3, reg: w2kw, asm: "VPSHRDW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSHUFD128", argLength: 1, reg: v11, asm: "VPSHUFD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSHUFD256", argLength: 1, reg: v11, asm: "VPSHUFD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSHUFD512", argLength: 1, reg: w11, asm: "VPSHUFD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSHUFDMasked128", argLength: 2, reg: wkw, asm: "VPSHUFD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSHUFDMasked256", argLength: 2, reg: wkw, asm: "VPSHUFD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSHUFDMasked512", argLength: 2, reg: wkw, asm: "VPSHUFD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSHUFHW128", argLength: 1, reg: w11, asm: "VPSHUFHW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSHUFHW256", argLength: 1, reg: v11, asm: "VPSHUFHW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSHUFHW512", argLength: 1, reg: w11, asm: "VPSHUFHW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSHUFHWMasked128", argLength: 2, reg: wkw, asm: "VPSHUFHW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSHUFHWMasked256", argLength: 2, reg: wkw, asm: "VPSHUFHW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSHUFHWMasked512", argLength: 2, reg: wkw, asm: "VPSHUFHW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSLLD128const", argLength: 1, reg: v11, asm: "VPSLLD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSLLD256const", argLength: 1, reg: v11, asm: "VPSLLD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSLLD512const", argLength: 1, reg: w11, asm: "VPSLLD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSLLQ128const", argLength: 1, reg: v11, asm: "VPSLLQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSLLQ256const", argLength: 1, reg: v11, asm: "VPSLLQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSLLQ512const", argLength: 1, reg: w11, asm: "VPSLLQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSLLWMasked128const", argLength: 2, reg: wkw, asm: "VPSLLW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSLLWMasked256const", argLength: 2, reg: wkw, asm: "VPSLLW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSLLWMasked512const", argLength: 2, reg: wkw, asm: "VPSLLW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSLLDMasked128const", argLength: 2, reg: wkw, asm: "VPSLLD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSLLDMasked256const", argLength: 2, reg: wkw, asm: "VPSLLD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSLLDMasked512const", argLength: 2, reg: wkw, asm: "VPSLLD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSLLQ128const", argLength: 1, reg: v11, asm: "VPSLLQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSLLQ256const", argLength: 1, reg: v11, asm: "VPSLLQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSLLQ512const", argLength: 1, reg: w11, asm: "VPSLLQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSLLQMasked128const", argLength: 2, reg: wkw, asm: "VPSLLQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSLLQMasked256const", argLength: 2, reg: wkw, asm: "VPSLLQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSLLQMasked512const", argLength: 2, reg: wkw, asm: "VPSLLQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSRLW128const", argLength: 1, reg: v11, asm: "VPSRLW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSRLW256const", argLength: 1, reg: v11, asm: "VPSRLW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSRLW512const", argLength: 1, reg: w11, asm: "VPSRLW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSRLD128const", argLength: 1, reg: v11, asm: "VPSRLD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSRLD256const", argLength: 1, reg: v11, asm: "VPSRLD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSRLD512const", argLength: 1, reg: w11, asm: "VPSRLD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSRLQ128const", argLength: 1, reg: v11, asm: "VPSRLQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSRLQ256const", argLength: 1, reg: v11, asm: "VPSRLQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSRLQ512const", argLength: 1, reg: w11, asm: "VPSRLQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSRAW128const", argLength: 1, reg: v11, asm: "VPSRAW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSRAW256const", argLength: 1, reg: v11, asm: "VPSRAW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSRAW512const", argLength: 1, reg: w11, asm: "VPSRAW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSLLW128const", argLength: 1, reg: v11, asm: "VPSLLW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSLLW256const", argLength: 1, reg: v11, asm: "VPSLLW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSLLW512const", argLength: 1, reg: w11, asm: "VPSLLW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSLLWMasked128const", argLength: 2, reg: wkw, asm: "VPSLLW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSLLWMasked256const", argLength: 2, reg: wkw, asm: "VPSLLW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSLLWMasked512const", argLength: 2, reg: wkw, asm: "VPSLLW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSRAD128const", argLength: 1, reg: v11, asm: "VPSRAD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSRAD256const", argLength: 1, reg: v11, asm: "VPSRAD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSRAD512const", argLength: 1, reg: w11, asm: "VPSRAD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSRADMasked128const", argLength: 2, reg: wkw, asm: "VPSRAD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSRADMasked256const", argLength: 2, reg: wkw, asm: "VPSRAD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSRADMasked512const", argLength: 2, reg: wkw, asm: "VPSRAD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSRAQ128const", argLength: 1, reg: w11, asm: "VPSRAQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSRAQ256const", argLength: 1, reg: w11, asm: "VPSRAQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSRAQ512const", argLength: 1, reg: w11, asm: "VPSRAQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSRLWMasked128const", argLength: 2, reg: wkw, asm: "VPSRLW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSRLWMasked256const", argLength: 2, reg: wkw, asm: "VPSRLW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSRLWMasked512const", argLength: 2, reg: wkw, asm: "VPSRLW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSRAQMasked128const", argLength: 2, reg: wkw, asm: "VPSRAQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSRAQMasked256const", argLength: 2, reg: wkw, asm: "VPSRAQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSRAQMasked512const", argLength: 2, reg: wkw, asm: "VPSRAQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSRAW128const", argLength: 1, reg: v11, asm: "VPSRAW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSRAW256const", argLength: 1, reg: v11, asm: "VPSRAW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSRAW512const", argLength: 1, reg: w11, asm: "VPSRAW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSRAWMasked128const", argLength: 2, reg: wkw, asm: "VPSRAW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSRAWMasked256const", argLength: 2, reg: wkw, asm: "VPSRAW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSRAWMasked512const", argLength: 2, reg: wkw, asm: "VPSRAW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSRLD128const", argLength: 1, reg: v11, asm: "VPSRLD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSRLD256const", argLength: 1, reg: v11, asm: "VPSRLD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSRLD512const", argLength: 1, reg: w11, asm: "VPSRLD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSRLDMasked128const", argLength: 2, reg: wkw, asm: "VPSRLD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSRLDMasked256const", argLength: 2, reg: wkw, asm: "VPSRLD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSRLDMasked512const", argLength: 2, reg: wkw, asm: "VPSRLD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSRLQ128const", argLength: 1, reg: v11, asm: "VPSRLQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSRLQ256const", argLength: 1, reg: v11, asm: "VPSRLQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSRLQ512const", argLength: 1, reg: w11, asm: "VPSRLQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPSRLQMasked128const", argLength: 2, reg: wkw, asm: "VPSRLQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
                {name: "VPSRLQMasked256const", argLength: 2, reg: wkw, asm: "VPSRLQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
                {name: "VPSRLQMasked512const", argLength: 2, reg: wkw, asm: "VPSRLQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSRAWMasked128const", argLength: 2, reg: wkw, asm: "VPSRAW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSRAWMasked256const", argLength: 2, reg: wkw, asm: "VPSRAW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSRAWMasked512const", argLength: 2, reg: wkw, asm: "VPSRAW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSRADMasked128const", argLength: 2, reg: wkw, asm: "VPSRAD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSRADMasked256const", argLength: 2, reg: wkw, asm: "VPSRAD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSRADMasked512const", argLength: 2, reg: wkw, asm: "VPSRAD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
-               {name: "VPSRAQMasked128const", argLength: 2, reg: wkw, asm: "VPSRAQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
-               {name: "VPSRAQMasked256const", argLength: 2, reg: wkw, asm: "VPSRAQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
-               {name: "VPSRAQMasked512const", argLength: 2, reg: wkw, asm: "VPSRAQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSRLW128const", argLength: 1, reg: v11, asm: "VPSRLW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSRLW256const", argLength: 1, reg: v11, asm: "VPSRLW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSRLW512const", argLength: 1, reg: w11, asm: "VPSRLW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VPSRLWMasked128const", argLength: 2, reg: wkw, asm: "VPSRLW", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VPSRLWMasked256const", argLength: 2, reg: wkw, asm: "VPSRLW", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VPSRLWMasked512const", argLength: 2, reg: wkw, asm: "VPSRLW", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
                {name: "VPTERNLOGD128", argLength: 3, reg: w31, asm: "VPTERNLOGD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: true},
                {name: "VPTERNLOGD256", argLength: 3, reg: w31, asm: "VPTERNLOGD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: true},
                {name: "VPTERNLOGD512", argLength: 3, reg: w31, asm: "VPTERNLOGD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: true},
                {name: "VPTERNLOGQ128", argLength: 3, reg: w31, asm: "VPTERNLOGQ", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: true},
                {name: "VPTERNLOGQ256", argLength: 3, reg: w31, asm: "VPTERNLOGQ", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: true},
                {name: "VPTERNLOGQ512", argLength: 3, reg: w31, asm: "VPTERNLOGQ", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: true},
+               {name: "VREDUCEPD128", argLength: 1, reg: w11, asm: "VREDUCEPD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VREDUCEPD256", argLength: 1, reg: w11, asm: "VREDUCEPD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VREDUCEPD512", argLength: 1, reg: w11, asm: "VREDUCEPD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VREDUCEPDMasked128", argLength: 2, reg: wkw, asm: "VREDUCEPD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VREDUCEPDMasked256", argLength: 2, reg: wkw, asm: "VREDUCEPD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VREDUCEPDMasked512", argLength: 2, reg: wkw, asm: "VREDUCEPD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VREDUCEPS128", argLength: 1, reg: w11, asm: "VREDUCEPS", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VREDUCEPS256", argLength: 1, reg: w11, asm: "VREDUCEPS", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VREDUCEPS512", argLength: 1, reg: w11, asm: "VREDUCEPS", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VREDUCEPSMasked128", argLength: 2, reg: wkw, asm: "VREDUCEPS", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VREDUCEPSMasked256", argLength: 2, reg: wkw, asm: "VREDUCEPS", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VREDUCEPSMasked512", argLength: 2, reg: wkw, asm: "VREDUCEPS", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VRNDSCALEPD128", argLength: 1, reg: w11, asm: "VRNDSCALEPD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VRNDSCALEPD256", argLength: 1, reg: w11, asm: "VRNDSCALEPD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VRNDSCALEPD512", argLength: 1, reg: w11, asm: "VRNDSCALEPD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VRNDSCALEPDMasked128", argLength: 2, reg: wkw, asm: "VRNDSCALEPD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VRNDSCALEPDMasked256", argLength: 2, reg: wkw, asm: "VRNDSCALEPD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VRNDSCALEPDMasked512", argLength: 2, reg: wkw, asm: "VRNDSCALEPD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VRNDSCALEPS128", argLength: 1, reg: w11, asm: "VRNDSCALEPS", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VRNDSCALEPS256", argLength: 1, reg: w11, asm: "VRNDSCALEPS", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VRNDSCALEPS512", argLength: 1, reg: w11, asm: "VRNDSCALEPS", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VRNDSCALEPSMasked128", argLength: 2, reg: wkw, asm: "VRNDSCALEPS", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VRNDSCALEPSMasked256", argLength: 2, reg: wkw, asm: "VRNDSCALEPS", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VRNDSCALEPSMasked512", argLength: 2, reg: wkw, asm: "VRNDSCALEPS", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VROUNDPD128", argLength: 1, reg: v11, asm: "VROUNDPD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VROUNDPD256", argLength: 1, reg: v11, asm: "VROUNDPD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VROUNDPS128", argLength: 1, reg: v11, asm: "VROUNDPS", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VROUNDPS256", argLength: 1, reg: v11, asm: "VROUNDPS", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VSHUFPD128", argLength: 2, reg: v21, asm: "VSHUFPD", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VSHUFPD256", argLength: 2, reg: v21, asm: "VSHUFPD", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VSHUFPD512", argLength: 2, reg: w21, asm: "VSHUFPD", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VSHUFPS128", argLength: 2, reg: v21, asm: "VSHUFPS", aux: "UInt8", commutative: false, typ: "Vec128", resultInArg0: false},
+               {name: "VSHUFPS256", argLength: 2, reg: v21, asm: "VSHUFPS", aux: "UInt8", commutative: false, typ: "Vec256", resultInArg0: false},
+               {name: "VSHUFPS512", argLength: 2, reg: w21, asm: "VSHUFPS", aux: "UInt8", commutative: false, typ: "Vec512", resultInArg0: false},
+               {name: "VADDPD512load", argLength: 3, reg: w21load, asm: "VADDPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VADDPDMasked128load", argLength: 4, reg: w2kwload, asm: "VADDPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VADDPDMasked256load", argLength: 4, reg: w2kwload, asm: "VADDPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VADDPDMasked512load", argLength: 4, reg: w2kwload, asm: "VADDPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VADDPS512load", argLength: 3, reg: w21load, asm: "VADDPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VADDPSMasked128load", argLength: 4, reg: w2kwload, asm: "VADDPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VADDPSMasked256load", argLength: 4, reg: w2kwload, asm: "VADDPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VADDPSMasked512load", argLength: 4, reg: w2kwload, asm: "VADDPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCVTPS2UDQ128load", argLength: 2, reg: w11load, asm: "VCVTPS2UDQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCVTPS2UDQ256load", argLength: 2, reg: w11load, asm: "VCVTPS2UDQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCVTPS2UDQ512load", argLength: 2, reg: w11load, asm: "VCVTPS2UDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCVTPS2UDQMasked128load", argLength: 3, reg: wkwload, asm: "VCVTPS2UDQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCVTPS2UDQMasked256load", argLength: 3, reg: wkwload, asm: "VCVTPS2UDQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCVTPS2UDQMasked512load", argLength: 3, reg: wkwload, asm: "VCVTPS2UDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCVTTPS2DQ512load", argLength: 2, reg: w11load, asm: "VCVTTPS2DQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCVTTPS2DQMasked128load", argLength: 3, reg: wkwload, asm: "VCVTTPS2DQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCVTTPS2DQMasked256load", argLength: 3, reg: wkwload, asm: "VCVTTPS2DQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCVTTPS2DQMasked512load", argLength: 3, reg: wkwload, asm: "VCVTTPS2DQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VDIVPD512load", argLength: 3, reg: w21load, asm: "VDIVPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VDIVPDMasked128load", argLength: 4, reg: w2kwload, asm: "VDIVPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VDIVPDMasked256load", argLength: 4, reg: w2kwload, asm: "VDIVPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VDIVPDMasked512load", argLength: 4, reg: w2kwload, asm: "VDIVPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VDIVPS512load", argLength: 3, reg: w21load, asm: "VDIVPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VDIVPSMasked128load", argLength: 4, reg: w2kwload, asm: "VDIVPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VDIVPSMasked256load", argLength: 4, reg: w2kwload, asm: "VDIVPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VDIVPSMasked512load", argLength: 4, reg: w2kwload, asm: "VDIVPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VFMADD213PD128load", argLength: 4, reg: w31load, asm: "VFMADD213PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADD213PD256load", argLength: 4, reg: w31load, asm: "VFMADD213PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADD213PD512load", argLength: 4, reg: w31load, asm: "VFMADD213PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADD213PDMasked128load", argLength: 5, reg: w3kwload, asm: "VFMADD213PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADD213PDMasked256load", argLength: 5, reg: w3kwload, asm: "VFMADD213PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADD213PDMasked512load", argLength: 5, reg: w3kwload, asm: "VFMADD213PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADD213PS128load", argLength: 4, reg: w31load, asm: "VFMADD213PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADD213PS256load", argLength: 4, reg: w31load, asm: "VFMADD213PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADD213PS512load", argLength: 4, reg: w31load, asm: "VFMADD213PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADD213PSMasked128load", argLength: 5, reg: w3kwload, asm: "VFMADD213PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADD213PSMasked256load", argLength: 5, reg: w3kwload, asm: "VFMADD213PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADD213PSMasked512load", argLength: 5, reg: w3kwload, asm: "VFMADD213PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADDSUB213PD128load", argLength: 4, reg: w31load, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADDSUB213PD256load", argLength: 4, reg: w31load, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADDSUB213PD512load", argLength: 4, reg: w31load, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADDSUB213PDMasked128load", argLength: 5, reg: w3kwload, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADDSUB213PDMasked256load", argLength: 5, reg: w3kwload, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADDSUB213PDMasked512load", argLength: 5, reg: w3kwload, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADDSUB213PS128load", argLength: 4, reg: w31load, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADDSUB213PS256load", argLength: 4, reg: w31load, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADDSUB213PS512load", argLength: 4, reg: w31load, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADDSUB213PSMasked128load", argLength: 5, reg: w3kwload, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADDSUB213PSMasked256load", argLength: 5, reg: w3kwload, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMADDSUB213PSMasked512load", argLength: 5, reg: w3kwload, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMSUBADD213PD128load", argLength: 4, reg: w31load, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMSUBADD213PD256load", argLength: 4, reg: w31load, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMSUBADD213PD512load", argLength: 4, reg: w31load, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMSUBADD213PDMasked128load", argLength: 5, reg: w3kwload, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMSUBADD213PDMasked256load", argLength: 5, reg: w3kwload, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMSUBADD213PDMasked512load", argLength: 5, reg: w3kwload, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMSUBADD213PS128load", argLength: 4, reg: w31load, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMSUBADD213PS256load", argLength: 4, reg: w31load, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMSUBADD213PS512load", argLength: 4, reg: w31load, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMSUBADD213PSMasked128load", argLength: 5, reg: w3kwload, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMSUBADD213PSMasked256load", argLength: 5, reg: w3kwload, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VFMSUBADD213PSMasked512load", argLength: 5, reg: w3kwload, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VMAXPD512load", argLength: 3, reg: w21load, asm: "VMAXPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMAXPDMasked128load", argLength: 4, reg: w2kwload, asm: "VMAXPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMAXPDMasked256load", argLength: 4, reg: w2kwload, asm: "VMAXPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMAXPDMasked512load", argLength: 4, reg: w2kwload, asm: "VMAXPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMAXPS512load", argLength: 3, reg: w21load, asm: "VMAXPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMAXPSMasked128load", argLength: 4, reg: w2kwload, asm: "VMAXPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMAXPSMasked256load", argLength: 4, reg: w2kwload, asm: "VMAXPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMAXPSMasked512load", argLength: 4, reg: w2kwload, asm: "VMAXPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMINPD512load", argLength: 3, reg: w21load, asm: "VMINPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMINPDMasked128load", argLength: 4, reg: w2kwload, asm: "VMINPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMINPDMasked256load", argLength: 4, reg: w2kwload, asm: "VMINPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMINPDMasked512load", argLength: 4, reg: w2kwload, asm: "VMINPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMINPS512load", argLength: 3, reg: w21load, asm: "VMINPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMINPSMasked128load", argLength: 4, reg: w2kwload, asm: "VMINPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMINPSMasked256load", argLength: 4, reg: w2kwload, asm: "VMINPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMINPSMasked512load", argLength: 4, reg: w2kwload, asm: "VMINPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMULPD512load", argLength: 3, reg: w21load, asm: "VMULPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMULPDMasked128load", argLength: 4, reg: w2kwload, asm: "VMULPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMULPDMasked256load", argLength: 4, reg: w2kwload, asm: "VMULPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMULPDMasked512load", argLength: 4, reg: w2kwload, asm: "VMULPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMULPS512load", argLength: 3, reg: w21load, asm: "VMULPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMULPSMasked128load", argLength: 4, reg: w2kwload, asm: "VMULPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMULPSMasked256load", argLength: 4, reg: w2kwload, asm: "VMULPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VMULPSMasked512load", argLength: 4, reg: w2kwload, asm: "VMULPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPABSD512load", argLength: 2, reg: w11load, asm: "VPABSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPABSQ128load", argLength: 2, reg: w11load, asm: "VPABSQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPABSQ256load", argLength: 2, reg: w11load, asm: "VPABSQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPABSQ512load", argLength: 2, reg: w11load, asm: "VPABSQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPABSDMasked128load", argLength: 3, reg: wkwload, asm: "VPABSD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPABSDMasked256load", argLength: 3, reg: wkwload, asm: "VPABSD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPABSDMasked512load", argLength: 3, reg: wkwload, asm: "VPABSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPABSQ128load", argLength: 2, reg: w11load, asm: "VPABSQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPABSQ256load", argLength: 2, reg: w11load, asm: "VPABSQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPABSQ512load", argLength: 2, reg: w11load, asm: "VPABSQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPABSQMasked128load", argLength: 3, reg: wkwload, asm: "VPABSQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPABSQMasked256load", argLength: 3, reg: wkwload, asm: "VPABSQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPABSQMasked512load", argLength: 3, reg: wkwload, asm: "VPABSQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VADDPS512load", argLength: 3, reg: w21load, asm: "VADDPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VADDPD512load", argLength: 3, reg: w21load, asm: "VADDPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPACKSSDW512load", argLength: 3, reg: w21load, asm: "VPACKSSDW", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPACKSSDWMasked128load", argLength: 4, reg: w2kwload, asm: "VPACKSSDW", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPACKSSDWMasked256load", argLength: 4, reg: w2kwload, asm: "VPACKSSDW", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPACKSSDWMasked512load", argLength: 4, reg: w2kwload, asm: "VPACKSSDW", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPACKUSDW512load", argLength: 3, reg: w21load, asm: "VPACKUSDW", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPACKUSDWMasked128load", argLength: 4, reg: w2kwload, asm: "VPACKUSDW", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPACKUSDWMasked256load", argLength: 4, reg: w2kwload, asm: "VPACKUSDW", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPACKUSDWMasked512load", argLength: 4, reg: w2kwload, asm: "VPACKUSDW", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPADDD512load", argLength: 3, reg: w21load, asm: "VPADDD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPADDQ512load", argLength: 3, reg: w21load, asm: "VPADDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPDPWSSD512load", argLength: 4, reg: w31load, asm: "VPDPWSSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPDPWSSDMasked128load", argLength: 5, reg: w3kwload, asm: "VPDPWSSD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPDPWSSDMasked256load", argLength: 5, reg: w3kwload, asm: "VPDPWSSD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPDPWSSDMasked512load", argLength: 5, reg: w3kwload, asm: "VPDPWSSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPDPBUSD512load", argLength: 4, reg: w31load, asm: "VPDPBUSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPDPBUSDMasked128load", argLength: 5, reg: w3kwload, asm: "VPDPBUSD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPDPBUSDMasked256load", argLength: 5, reg: w3kwload, asm: "VPDPBUSD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPDPBUSDMasked512load", argLength: 5, reg: w3kwload, asm: "VPDPBUSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPDPBUSDS512load", argLength: 4, reg: w31load, asm: "VPDPBUSDS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPDPBUSDSMasked128load", argLength: 5, reg: w3kwload, asm: "VPDPBUSDS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPDPBUSDSMasked256load", argLength: 5, reg: w3kwload, asm: "VPDPBUSDS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPDPBUSDSMasked512load", argLength: 5, reg: w3kwload, asm: "VPDPBUSDS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VADDPSMasked128load", argLength: 4, reg: w2kwload, asm: "VADDPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VADDPSMasked256load", argLength: 4, reg: w2kwload, asm: "VADDPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VADDPSMasked512load", argLength: 4, reg: w2kwload, asm: "VADDPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VADDPDMasked128load", argLength: 4, reg: w2kwload, asm: "VADDPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VADDPDMasked256load", argLength: 4, reg: w2kwload, asm: "VADDPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VADDPDMasked512load", argLength: 4, reg: w2kwload, asm: "VADDPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPADDDMasked128load", argLength: 4, reg: w2kwload, asm: "VPADDD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPADDDMasked256load", argLength: 4, reg: w2kwload, asm: "VPADDD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPADDDMasked512load", argLength: 4, reg: w2kwload, asm: "VPADDD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPADDQ512load", argLength: 3, reg: w21load, asm: "VPADDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPADDQMasked128load", argLength: 4, reg: w2kwload, asm: "VPADDQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPADDQMasked256load", argLength: 4, reg: w2kwload, asm: "VPADDQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPADDQMasked512load", argLength: 4, reg: w2kwload, asm: "VPADDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPANDD512load", argLength: 3, reg: w21load, asm: "VPANDD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPANDQ512load", argLength: 3, reg: w21load, asm: "VPANDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPANDDMasked128load", argLength: 4, reg: w2kwload, asm: "VPANDD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPANDDMasked256load", argLength: 4, reg: w2kwload, asm: "VPANDD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPANDDMasked512load", argLength: 4, reg: w2kwload, asm: "VPANDD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPANDQMasked128load", argLength: 4, reg: w2kwload, asm: "VPANDQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPANDQMasked256load", argLength: 4, reg: w2kwload, asm: "VPANDQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPANDQMasked512load", argLength: 4, reg: w2kwload, asm: "VPANDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPANDND512load", argLength: 3, reg: w21load, asm: "VPANDND", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPANDNQ512load", argLength: 3, reg: w21load, asm: "VPANDNQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPANDNDMasked128load", argLength: 4, reg: w2kwload, asm: "VPANDND", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPANDNDMasked256load", argLength: 4, reg: w2kwload, asm: "VPANDND", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPANDNDMasked512load", argLength: 4, reg: w2kwload, asm: "VPANDND", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPANDNQ512load", argLength: 3, reg: w21load, asm: "VPANDNQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPANDNQMasked128load", argLength: 4, reg: w2kwload, asm: "VPANDNQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPANDNQMasked256load", argLength: 4, reg: w2kwload, asm: "VPANDNQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPANDNQMasked512load", argLength: 4, reg: w2kwload, asm: "VPANDNQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPACKSSDW512load", argLength: 3, reg: w21load, asm: "VPACKSSDW", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPACKSSDWMasked128load", argLength: 4, reg: w2kwload, asm: "VPACKSSDW", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPACKSSDWMasked256load", argLength: 4, reg: w2kwload, asm: "VPACKSSDW", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPACKSSDWMasked512load", argLength: 4, reg: w2kwload, asm: "VPACKSSDW", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCVTTPS2DQ512load", argLength: 2, reg: w11load, asm: "VCVTTPS2DQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCVTTPS2DQMasked128load", argLength: 3, reg: wkwload, asm: "VCVTTPS2DQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCVTTPS2DQMasked256load", argLength: 3, reg: wkwload, asm: "VCVTTPS2DQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCVTTPS2DQMasked512load", argLength: 3, reg: wkwload, asm: "VCVTTPS2DQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPACKUSDW512load", argLength: 3, reg: w21load, asm: "VPACKUSDW", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPACKUSDWMasked128load", argLength: 4, reg: w2kwload, asm: "VPACKUSDW", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPACKUSDWMasked256load", argLength: 4, reg: w2kwload, asm: "VPACKUSDW", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPACKUSDWMasked512load", argLength: 4, reg: w2kwload, asm: "VPACKUSDW", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCVTPS2UDQ128load", argLength: 2, reg: w11load, asm: "VCVTPS2UDQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCVTPS2UDQ256load", argLength: 2, reg: w11load, asm: "VCVTPS2UDQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCVTPS2UDQ512load", argLength: 2, reg: w11load, asm: "VCVTPS2UDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCVTPS2UDQMasked128load", argLength: 3, reg: wkwload, asm: "VCVTPS2UDQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCVTPS2UDQMasked256load", argLength: 3, reg: wkwload, asm: "VCVTPS2UDQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCVTPS2UDQMasked512load", argLength: 3, reg: wkwload, asm: "VCVTPS2UDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VDIVPS512load", argLength: 3, reg: w21load, asm: "VDIVPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VDIVPD512load", argLength: 3, reg: w21load, asm: "VDIVPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VDIVPSMasked128load", argLength: 4, reg: w2kwload, asm: "VDIVPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VDIVPSMasked256load", argLength: 4, reg: w2kwload, asm: "VDIVPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VDIVPSMasked512load", argLength: 4, reg: w2kwload, asm: "VDIVPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VDIVPDMasked128load", argLength: 4, reg: w2kwload, asm: "VDIVPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VDIVPDMasked256load", argLength: 4, reg: w2kwload, asm: "VDIVPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VDIVPDMasked512load", argLength: 4, reg: w2kwload, asm: "VDIVPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPANDQ512load", argLength: 3, reg: w21load, asm: "VPANDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPANDQMasked128load", argLength: 4, reg: w2kwload, asm: "VPANDQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPANDQMasked256load", argLength: 4, reg: w2kwload, asm: "VPANDQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPANDQMasked512load", argLength: 4, reg: w2kwload, asm: "VPANDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPBLENDMDMasked512load", argLength: 4, reg: w2kwload, asm: "VPBLENDMD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPBLENDMQMasked512load", argLength: 4, reg: w2kwload, asm: "VPBLENDMQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPEQD512load", argLength: 3, reg: w2kload, asm: "VPCMPEQD", commutative: false, typ: "Mask", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPEQQ512load", argLength: 3, reg: w2kload, asm: "VPCMPEQQ", commutative: false, typ: "Mask", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPGTD512load", argLength: 3, reg: w2kload, asm: "VPCMPGTD", commutative: false, typ: "Mask", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPGTQ512load", argLength: 3, reg: w2kload, asm: "VPCMPGTQ", commutative: false, typ: "Mask", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPUNPCKHDQ512load", argLength: 3, reg: w21load, asm: "VPUNPCKHDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPUNPCKHQDQ512load", argLength: 3, reg: w21load, asm: "VPUNPCKHQDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPUNPCKLDQ512load", argLength: 3, reg: w21load, asm: "VPUNPCKLDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPUNPCKLQDQ512load", argLength: 3, reg: w21load, asm: "VPUNPCKLQDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPDPBUSD512load", argLength: 4, reg: w31load, asm: "VPDPBUSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPDPBUSDMasked128load", argLength: 5, reg: w3kwload, asm: "VPDPBUSD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPDPBUSDMasked256load", argLength: 5, reg: w3kwload, asm: "VPDPBUSD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPDPBUSDMasked512load", argLength: 5, reg: w3kwload, asm: "VPDPBUSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPDPBUSDS512load", argLength: 4, reg: w31load, asm: "VPDPBUSDS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPDPBUSDSMasked128load", argLength: 5, reg: w3kwload, asm: "VPDPBUSDS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPDPBUSDSMasked256load", argLength: 5, reg: w3kwload, asm: "VPDPBUSDS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPDPBUSDSMasked512load", argLength: 5, reg: w3kwload, asm: "VPDPBUSDS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPDPWSSD512load", argLength: 4, reg: w31load, asm: "VPDPWSSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPDPWSSDMasked128load", argLength: 5, reg: w3kwload, asm: "VPDPWSSD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPDPWSSDMasked256load", argLength: 5, reg: w3kwload, asm: "VPDPWSSD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPDPWSSDMasked512load", argLength: 5, reg: w3kwload, asm: "VPDPWSSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMD512load", argLength: 3, reg: w21load, asm: "VPERMD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMDMasked256load", argLength: 4, reg: w2kwload, asm: "VPERMD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMDMasked512load", argLength: 4, reg: w2kwload, asm: "VPERMD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMI2D128load", argLength: 4, reg: w31load, asm: "VPERMI2D", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2D256load", argLength: 4, reg: w31load, asm: "VPERMI2D", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2D512load", argLength: 4, reg: w31load, asm: "VPERMI2D", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2DMasked128load", argLength: 5, reg: w3kwload, asm: "VPERMI2D", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2DMasked256load", argLength: 5, reg: w3kwload, asm: "VPERMI2D", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2DMasked512load", argLength: 5, reg: w3kwload, asm: "VPERMI2D", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2PD128load", argLength: 4, reg: w31load, asm: "VPERMI2PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2PD256load", argLength: 4, reg: w31load, asm: "VPERMI2PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2PD512load", argLength: 4, reg: w31load, asm: "VPERMI2PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2PDMasked128load", argLength: 5, reg: w3kwload, asm: "VPERMI2PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2PDMasked256load", argLength: 5, reg: w3kwload, asm: "VPERMI2PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2PDMasked512load", argLength: 5, reg: w3kwload, asm: "VPERMI2PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2PS128load", argLength: 4, reg: w31load, asm: "VPERMI2PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2PS256load", argLength: 4, reg: w31load, asm: "VPERMI2PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2PS512load", argLength: 4, reg: w31load, asm: "VPERMI2PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2PSMasked128load", argLength: 5, reg: w3kwload, asm: "VPERMI2PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2PSMasked256load", argLength: 5, reg: w3kwload, asm: "VPERMI2PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2PSMasked512load", argLength: 5, reg: w3kwload, asm: "VPERMI2PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2Q128load", argLength: 4, reg: w31load, asm: "VPERMI2Q", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2Q256load", argLength: 4, reg: w31load, asm: "VPERMI2Q", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2Q512load", argLength: 4, reg: w31load, asm: "VPERMI2Q", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2QMasked128load", argLength: 5, reg: w3kwload, asm: "VPERMI2Q", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2QMasked256load", argLength: 5, reg: w3kwload, asm: "VPERMI2Q", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMI2QMasked512load", argLength: 5, reg: w3kwload, asm: "VPERMI2Q", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPERMPD256load", argLength: 3, reg: w21load, asm: "VPERMPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMPD512load", argLength: 3, reg: w21load, asm: "VPERMPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMPDMasked256load", argLength: 4, reg: w2kwload, asm: "VPERMPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMPDMasked512load", argLength: 4, reg: w2kwload, asm: "VPERMPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMPS512load", argLength: 3, reg: w21load, asm: "VPERMPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMPSMasked256load", argLength: 4, reg: w2kwload, asm: "VPERMPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMPSMasked512load", argLength: 4, reg: w2kwload, asm: "VPERMPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMQ256load", argLength: 3, reg: w21load, asm: "VPERMQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMQ512load", argLength: 3, reg: w21load, asm: "VPERMQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMQMasked256load", argLength: 4, reg: w2kwload, asm: "VPERMQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPERMQMasked512load", argLength: 4, reg: w2kwload, asm: "VPERMQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPLZCNTD128load", argLength: 2, reg: w11load, asm: "VPLZCNTD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPLZCNTD256load", argLength: 2, reg: w11load, asm: "VPLZCNTD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPLZCNTD512load", argLength: 2, reg: w11load, asm: "VPLZCNTD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPLZCNTQ128load", argLength: 2, reg: w11load, asm: "VPLZCNTQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPLZCNTQ256load", argLength: 2, reg: w11load, asm: "VPLZCNTQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPLZCNTQ512load", argLength: 2, reg: w11load, asm: "VPLZCNTQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPLZCNTDMasked128load", argLength: 3, reg: wkwload, asm: "VPLZCNTD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPLZCNTDMasked256load", argLength: 3, reg: wkwload, asm: "VPLZCNTD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPLZCNTDMasked512load", argLength: 3, reg: wkwload, asm: "VPLZCNTD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPLZCNTQ128load", argLength: 2, reg: w11load, asm: "VPLZCNTQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPLZCNTQ256load", argLength: 2, reg: w11load, asm: "VPLZCNTQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPLZCNTQ512load", argLength: 2, reg: w11load, asm: "VPLZCNTQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPLZCNTQMasked128load", argLength: 3, reg: wkwload, asm: "VPLZCNTQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPLZCNTQMasked256load", argLength: 3, reg: wkwload, asm: "VPLZCNTQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPLZCNTQMasked512load", argLength: 3, reg: wkwload, asm: "VPLZCNTQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMAXPS512load", argLength: 3, reg: w21load, asm: "VMAXPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMAXPD512load", argLength: 3, reg: w21load, asm: "VMAXPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXSD512load", argLength: 3, reg: w21load, asm: "VPMAXSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMAXSQ128load", argLength: 3, reg: w21load, asm: "VPMAXSQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMAXSQ256load", argLength: 3, reg: w21load, asm: "VPMAXSQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMAXSQ512load", argLength: 3, reg: w21load, asm: "VPMAXSQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMAXUD512load", argLength: 3, reg: w21load, asm: "VPMAXUD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMAXUQ128load", argLength: 3, reg: w21load, asm: "VPMAXUQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMAXUQ256load", argLength: 3, reg: w21load, asm: "VPMAXUQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMAXUQ512load", argLength: 3, reg: w21load, asm: "VPMAXUQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMAXPSMasked128load", argLength: 4, reg: w2kwload, asm: "VMAXPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMAXPSMasked256load", argLength: 4, reg: w2kwload, asm: "VMAXPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMAXPSMasked512load", argLength: 4, reg: w2kwload, asm: "VMAXPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMAXPDMasked128load", argLength: 4, reg: w2kwload, asm: "VMAXPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMAXPDMasked256load", argLength: 4, reg: w2kwload, asm: "VMAXPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMAXPDMasked512load", argLength: 4, reg: w2kwload, asm: "VMAXPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXSDMasked128load", argLength: 4, reg: w2kwload, asm: "VPMAXSD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXSDMasked256load", argLength: 4, reg: w2kwload, asm: "VPMAXSD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXSDMasked512load", argLength: 4, reg: w2kwload, asm: "VPMAXSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMAXSQ128load", argLength: 3, reg: w21load, asm: "VPMAXSQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMAXSQ256load", argLength: 3, reg: w21load, asm: "VPMAXSQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMAXSQ512load", argLength: 3, reg: w21load, asm: "VPMAXSQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXSQMasked128load", argLength: 4, reg: w2kwload, asm: "VPMAXSQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXSQMasked256load", argLength: 4, reg: w2kwload, asm: "VPMAXSQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXSQMasked512load", argLength: 4, reg: w2kwload, asm: "VPMAXSQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMAXUD512load", argLength: 3, reg: w21load, asm: "VPMAXUD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXUDMasked128load", argLength: 4, reg: w2kwload, asm: "VPMAXUD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXUDMasked256load", argLength: 4, reg: w2kwload, asm: "VPMAXUD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXUDMasked512load", argLength: 4, reg: w2kwload, asm: "VPMAXUD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMAXUQ128load", argLength: 3, reg: w21load, asm: "VPMAXUQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMAXUQ256load", argLength: 3, reg: w21load, asm: "VPMAXUQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMAXUQ512load", argLength: 3, reg: w21load, asm: "VPMAXUQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXUQMasked128load", argLength: 4, reg: w2kwload, asm: "VPMAXUQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXUQMasked256load", argLength: 4, reg: w2kwload, asm: "VPMAXUQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMAXUQMasked512load", argLength: 4, reg: w2kwload, asm: "VPMAXUQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMINPS512load", argLength: 3, reg: w21load, asm: "VMINPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMINPD512load", argLength: 3, reg: w21load, asm: "VMINPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINSD512load", argLength: 3, reg: w21load, asm: "VPMINSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMINSQ128load", argLength: 3, reg: w21load, asm: "VPMINSQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMINSQ256load", argLength: 3, reg: w21load, asm: "VPMINSQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMINSQ512load", argLength: 3, reg: w21load, asm: "VPMINSQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMINUD512load", argLength: 3, reg: w21load, asm: "VPMINUD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMINUQ128load", argLength: 3, reg: w21load, asm: "VPMINUQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMINUQ256load", argLength: 3, reg: w21load, asm: "VPMINUQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMINUQ512load", argLength: 3, reg: w21load, asm: "VPMINUQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMINPSMasked128load", argLength: 4, reg: w2kwload, asm: "VMINPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMINPSMasked256load", argLength: 4, reg: w2kwload, asm: "VMINPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMINPSMasked512load", argLength: 4, reg: w2kwload, asm: "VMINPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMINPDMasked128load", argLength: 4, reg: w2kwload, asm: "VMINPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMINPDMasked256load", argLength: 4, reg: w2kwload, asm: "VMINPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMINPDMasked512load", argLength: 4, reg: w2kwload, asm: "VMINPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINSDMasked128load", argLength: 4, reg: w2kwload, asm: "VPMINSD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINSDMasked256load", argLength: 4, reg: w2kwload, asm: "VPMINSD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINSDMasked512load", argLength: 4, reg: w2kwload, asm: "VPMINSD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMINSQ128load", argLength: 3, reg: w21load, asm: "VPMINSQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMINSQ256load", argLength: 3, reg: w21load, asm: "VPMINSQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMINSQ512load", argLength: 3, reg: w21load, asm: "VPMINSQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINSQMasked128load", argLength: 4, reg: w2kwload, asm: "VPMINSQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINSQMasked256load", argLength: 4, reg: w2kwload, asm: "VPMINSQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINSQMasked512load", argLength: 4, reg: w2kwload, asm: "VPMINSQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMINUD512load", argLength: 3, reg: w21load, asm: "VPMINUD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINUDMasked128load", argLength: 4, reg: w2kwload, asm: "VPMINUD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINUDMasked256load", argLength: 4, reg: w2kwload, asm: "VPMINUD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINUDMasked512load", argLength: 4, reg: w2kwload, asm: "VPMINUD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMINUQ128load", argLength: 3, reg: w21load, asm: "VPMINUQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMINUQ256load", argLength: 3, reg: w21load, asm: "VPMINUQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMINUQ512load", argLength: 3, reg: w21load, asm: "VPMINUQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINUQMasked128load", argLength: 4, reg: w2kwload, asm: "VPMINUQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINUQMasked256load", argLength: 4, reg: w2kwload, asm: "VPMINUQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMINUQMasked512load", argLength: 4, reg: w2kwload, asm: "VPMINUQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMULPS512load", argLength: 3, reg: w21load, asm: "VMULPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMULPD512load", argLength: 3, reg: w21load, asm: "VMULPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMULLD512load", argLength: 3, reg: w21load, asm: "VPMULLD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMULLQ128load", argLength: 3, reg: w21load, asm: "VPMULLQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMULLQ256load", argLength: 3, reg: w21load, asm: "VPMULLQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPMULLQ512load", argLength: 3, reg: w21load, asm: "VPMULLQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VFMADD213PS128load", argLength: 4, reg: w31load, asm: "VFMADD213PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADD213PS256load", argLength: 4, reg: w31load, asm: "VFMADD213PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADD213PS512load", argLength: 4, reg: w31load, asm: "VFMADD213PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADD213PD128load", argLength: 4, reg: w31load, asm: "VFMADD213PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADD213PD256load", argLength: 4, reg: w31load, asm: "VFMADD213PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADD213PD512load", argLength: 4, reg: w31load, asm: "VFMADD213PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADD213PSMasked128load", argLength: 5, reg: w3kwload, asm: "VFMADD213PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADD213PSMasked256load", argLength: 5, reg: w3kwload, asm: "VFMADD213PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADD213PSMasked512load", argLength: 5, reg: w3kwload, asm: "VFMADD213PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADD213PDMasked128load", argLength: 5, reg: w3kwload, asm: "VFMADD213PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADD213PDMasked256load", argLength: 5, reg: w3kwload, asm: "VFMADD213PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADD213PDMasked512load", argLength: 5, reg: w3kwload, asm: "VFMADD213PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADDSUB213PS128load", argLength: 4, reg: w31load, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADDSUB213PS256load", argLength: 4, reg: w31load, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADDSUB213PS512load", argLength: 4, reg: w31load, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADDSUB213PD128load", argLength: 4, reg: w31load, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADDSUB213PD256load", argLength: 4, reg: w31load, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADDSUB213PD512load", argLength: 4, reg: w31load, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADDSUB213PSMasked128load", argLength: 5, reg: w3kwload, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADDSUB213PSMasked256load", argLength: 5, reg: w3kwload, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADDSUB213PSMasked512load", argLength: 5, reg: w3kwload, asm: "VFMADDSUB213PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADDSUB213PDMasked128load", argLength: 5, reg: w3kwload, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADDSUB213PDMasked256load", argLength: 5, reg: w3kwload, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMADDSUB213PDMasked512load", argLength: 5, reg: w3kwload, asm: "VFMADDSUB213PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VMULPSMasked128load", argLength: 4, reg: w2kwload, asm: "VMULPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMULPSMasked256load", argLength: 4, reg: w2kwload, asm: "VMULPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMULPSMasked512load", argLength: 4, reg: w2kwload, asm: "VMULPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMULPDMasked128load", argLength: 4, reg: w2kwload, asm: "VMULPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMULPDMasked256load", argLength: 4, reg: w2kwload, asm: "VMULPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VMULPDMasked512load", argLength: 4, reg: w2kwload, asm: "VMULPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMULLDMasked128load", argLength: 4, reg: w2kwload, asm: "VPMULLD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMULLDMasked256load", argLength: 4, reg: w2kwload, asm: "VPMULLD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMULLDMasked512load", argLength: 4, reg: w2kwload, asm: "VPMULLD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMULLQ128load", argLength: 3, reg: w21load, asm: "VPMULLQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMULLQ256load", argLength: 3, reg: w21load, asm: "VPMULLQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPMULLQ512load", argLength: 3, reg: w21load, asm: "VPMULLQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMULLQMasked128load", argLength: 4, reg: w2kwload, asm: "VPMULLQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMULLQMasked256load", argLength: 4, reg: w2kwload, asm: "VPMULLQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPMULLQMasked512load", argLength: 4, reg: w2kwload, asm: "VPMULLQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VFMSUBADD213PS128load", argLength: 4, reg: w31load, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMSUBADD213PS256load", argLength: 4, reg: w31load, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMSUBADD213PS512load", argLength: 4, reg: w31load, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMSUBADD213PD128load", argLength: 4, reg: w31load, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMSUBADD213PD256load", argLength: 4, reg: w31load, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMSUBADD213PD512load", argLength: 4, reg: w31load, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMSUBADD213PSMasked128load", argLength: 5, reg: w3kwload, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMSUBADD213PSMasked256load", argLength: 5, reg: w3kwload, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMSUBADD213PSMasked512load", argLength: 5, reg: w3kwload, asm: "VFMSUBADD213PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMSUBADD213PDMasked128load", argLength: 5, reg: w3kwload, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMSUBADD213PDMasked256load", argLength: 5, reg: w3kwload, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VFMSUBADD213PDMasked512load", argLength: 5, reg: w3kwload, asm: "VFMSUBADD213PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPOPCNTD128load", argLength: 2, reg: w11load, asm: "VPOPCNTD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPOPCNTD256load", argLength: 2, reg: w11load, asm: "VPOPCNTD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPOPCNTD512load", argLength: 2, reg: w11load, asm: "VPOPCNTD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPOPCNTQ128load", argLength: 2, reg: w11load, asm: "VPOPCNTQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPOPCNTQ256load", argLength: 2, reg: w11load, asm: "VPOPCNTQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPOPCNTQ512load", argLength: 2, reg: w11load, asm: "VPOPCNTQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPOPCNTDMasked128load", argLength: 3, reg: wkwload, asm: "VPOPCNTD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPOPCNTDMasked256load", argLength: 3, reg: wkwload, asm: "VPOPCNTD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPOPCNTDMasked512load", argLength: 3, reg: wkwload, asm: "VPOPCNTD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPOPCNTQ128load", argLength: 2, reg: w11load, asm: "VPOPCNTQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPOPCNTQ256load", argLength: 2, reg: w11load, asm: "VPOPCNTQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPOPCNTQ512load", argLength: 2, reg: w11load, asm: "VPOPCNTQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPOPCNTQMasked128load", argLength: 3, reg: wkwload, asm: "VPOPCNTQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPOPCNTQMasked256load", argLength: 3, reg: wkwload, asm: "VPOPCNTQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPOPCNTQMasked512load", argLength: 3, reg: wkwload, asm: "VPOPCNTQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPORD512load", argLength: 3, reg: w21load, asm: "VPORD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPORQ512load", argLength: 3, reg: w21load, asm: "VPORQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPORDMasked128load", argLength: 4, reg: w2kwload, asm: "VPORD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPORDMasked256load", argLength: 4, reg: w2kwload, asm: "VPORD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPORDMasked512load", argLength: 4, reg: w2kwload, asm: "VPORD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPORQ512load", argLength: 3, reg: w21load, asm: "VPORQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPORQMasked128load", argLength: 4, reg: w2kwload, asm: "VPORQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPORQMasked256load", argLength: 4, reg: w2kwload, asm: "VPORQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPORQMasked512load", argLength: 4, reg: w2kwload, asm: "VPORQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMPS512load", argLength: 3, reg: w21load, asm: "VPERMPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMD512load", argLength: 3, reg: w21load, asm: "VPERMD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMPD256load", argLength: 3, reg: w21load, asm: "VPERMPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMQ256load", argLength: 3, reg: w21load, asm: "VPERMQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMPD512load", argLength: 3, reg: w21load, asm: "VPERMPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMQ512load", argLength: 3, reg: w21load, asm: "VPERMQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMI2PS128load", argLength: 4, reg: w31load, asm: "VPERMI2PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2D128load", argLength: 4, reg: w31load, asm: "VPERMI2D", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2PS256load", argLength: 4, reg: w31load, asm: "VPERMI2PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2D256load", argLength: 4, reg: w31load, asm: "VPERMI2D", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2PS512load", argLength: 4, reg: w31load, asm: "VPERMI2PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2D512load", argLength: 4, reg: w31load, asm: "VPERMI2D", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2PD128load", argLength: 4, reg: w31load, asm: "VPERMI2PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2Q128load", argLength: 4, reg: w31load, asm: "VPERMI2Q", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2PD256load", argLength: 4, reg: w31load, asm: "VPERMI2PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2Q256load", argLength: 4, reg: w31load, asm: "VPERMI2Q", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2PD512load", argLength: 4, reg: w31load, asm: "VPERMI2PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2Q512load", argLength: 4, reg: w31load, asm: "VPERMI2Q", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2PSMasked128load", argLength: 5, reg: w3kwload, asm: "VPERMI2PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2DMasked128load", argLength: 5, reg: w3kwload, asm: "VPERMI2D", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2PSMasked256load", argLength: 5, reg: w3kwload, asm: "VPERMI2PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2DMasked256load", argLength: 5, reg: w3kwload, asm: "VPERMI2D", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2PSMasked512load", argLength: 5, reg: w3kwload, asm: "VPERMI2PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2DMasked512load", argLength: 5, reg: w3kwload, asm: "VPERMI2D", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2PDMasked128load", argLength: 5, reg: w3kwload, asm: "VPERMI2PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2QMasked128load", argLength: 5, reg: w3kwload, asm: "VPERMI2Q", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2PDMasked256load", argLength: 5, reg: w3kwload, asm: "VPERMI2PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2QMasked256load", argLength: 5, reg: w3kwload, asm: "VPERMI2Q", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2PDMasked512load", argLength: 5, reg: w3kwload, asm: "VPERMI2PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMI2QMasked512load", argLength: 5, reg: w3kwload, asm: "VPERMI2Q", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPERMPSMasked256load", argLength: 4, reg: w2kwload, asm: "VPERMPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMDMasked256load", argLength: 4, reg: w2kwload, asm: "VPERMD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMPSMasked512load", argLength: 4, reg: w2kwload, asm: "VPERMPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMDMasked512load", argLength: 4, reg: w2kwload, asm: "VPERMD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMPDMasked256load", argLength: 4, reg: w2kwload, asm: "VPERMPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMQMasked256load", argLength: 4, reg: w2kwload, asm: "VPERMQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMPDMasked512load", argLength: 4, reg: w2kwload, asm: "VPERMPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPERMQMasked512load", argLength: 4, reg: w2kwload, asm: "VPERMQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRCP14PS512load", argLength: 2, reg: w11load, asm: "VRCP14PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRCP14PD128load", argLength: 2, reg: w11load, asm: "VRCP14PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRCP14PD256load", argLength: 2, reg: w11load, asm: "VRCP14PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRCP14PD512load", argLength: 2, reg: w11load, asm: "VRCP14PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRCP14PSMasked128load", argLength: 3, reg: wkwload, asm: "VRCP14PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRCP14PSMasked256load", argLength: 3, reg: wkwload, asm: "VRCP14PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRCP14PSMasked512load", argLength: 3, reg: wkwload, asm: "VRCP14PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRCP14PDMasked128load", argLength: 3, reg: wkwload, asm: "VRCP14PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRCP14PDMasked256load", argLength: 3, reg: wkwload, asm: "VRCP14PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRCP14PDMasked512load", argLength: 3, reg: wkwload, asm: "VRCP14PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRSQRT14PS512load", argLength: 2, reg: w11load, asm: "VRSQRT14PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRSQRT14PD128load", argLength: 2, reg: w11load, asm: "VRSQRT14PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRSQRT14PD256load", argLength: 2, reg: w11load, asm: "VRSQRT14PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRSQRT14PD512load", argLength: 2, reg: w11load, asm: "VRSQRT14PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRSQRT14PSMasked128load", argLength: 3, reg: wkwload, asm: "VRSQRT14PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRSQRT14PSMasked256load", argLength: 3, reg: wkwload, asm: "VRSQRT14PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRSQRT14PSMasked512load", argLength: 3, reg: wkwload, asm: "VRSQRT14PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRSQRT14PDMasked128load", argLength: 3, reg: wkwload, asm: "VRSQRT14PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRSQRT14PDMasked256load", argLength: 3, reg: wkwload, asm: "VRSQRT14PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRSQRT14PDMasked512load", argLength: 3, reg: wkwload, asm: "VRSQRT14PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLVD128load", argLength: 3, reg: w21load, asm: "VPROLVD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLVD256load", argLength: 3, reg: w21load, asm: "VPROLVD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLVD512load", argLength: 3, reg: w21load, asm: "VPROLVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPROLVQ128load", argLength: 3, reg: w21load, asm: "VPROLVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPROLVQ256load", argLength: 3, reg: w21load, asm: "VPROLVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPROLVQ512load", argLength: 3, reg: w21load, asm: "VPROLVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLVDMasked128load", argLength: 4, reg: w2kwload, asm: "VPROLVD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLVDMasked256load", argLength: 4, reg: w2kwload, asm: "VPROLVD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLVDMasked512load", argLength: 4, reg: w2kwload, asm: "VPROLVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPROLVQ128load", argLength: 3, reg: w21load, asm: "VPROLVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPROLVQ256load", argLength: 3, reg: w21load, asm: "VPROLVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPROLVQ512load", argLength: 3, reg: w21load, asm: "VPROLVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLVQMasked128load", argLength: 4, reg: w2kwload, asm: "VPROLVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLVQMasked256load", argLength: 4, reg: w2kwload, asm: "VPROLVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLVQMasked512load", argLength: 4, reg: w2kwload, asm: "VPROLVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORVD128load", argLength: 3, reg: w21load, asm: "VPRORVD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORVD256load", argLength: 3, reg: w21load, asm: "VPRORVD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORVD512load", argLength: 3, reg: w21load, asm: "VPRORVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPRORVQ128load", argLength: 3, reg: w21load, asm: "VPRORVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPRORVQ256load", argLength: 3, reg: w21load, asm: "VPRORVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPRORVQ512load", argLength: 3, reg: w21load, asm: "VPRORVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORVDMasked128load", argLength: 4, reg: w2kwload, asm: "VPRORVD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORVDMasked256load", argLength: 4, reg: w2kwload, asm: "VPRORVD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORVDMasked512load", argLength: 4, reg: w2kwload, asm: "VPRORVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPRORVQ128load", argLength: 3, reg: w21load, asm: "VPRORVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPRORVQ256load", argLength: 3, reg: w21load, asm: "VPRORVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPRORVQ512load", argLength: 3, reg: w21load, asm: "VPRORVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORVQMasked128load", argLength: 4, reg: w2kwload, asm: "VPRORVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPRORVQMasked256load", argLength: 4, reg: w2kwload, asm: "VPRORVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPRORVQMasked512load", argLength: 4, reg: w2kwload, asm: "VPRORVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSCALEFPS128load", argLength: 3, reg: w21load, asm: "VSCALEFPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSCALEFPS256load", argLength: 3, reg: w21load, asm: "VSCALEFPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSCALEFPS512load", argLength: 3, reg: w21load, asm: "VSCALEFPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSCALEFPD128load", argLength: 3, reg: w21load, asm: "VSCALEFPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSCALEFPD256load", argLength: 3, reg: w21load, asm: "VSCALEFPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSCALEFPD512load", argLength: 3, reg: w21load, asm: "VSCALEFPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSCALEFPSMasked128load", argLength: 4, reg: w2kwload, asm: "VSCALEFPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSCALEFPSMasked256load", argLength: 4, reg: w2kwload, asm: "VSCALEFPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSCALEFPSMasked512load", argLength: 4, reg: w2kwload, asm: "VSCALEFPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSCALEFPDMasked128load", argLength: 4, reg: w2kwload, asm: "VSCALEFPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSCALEFPDMasked256load", argLength: 4, reg: w2kwload, asm: "VSCALEFPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSCALEFPDMasked512load", argLength: 4, reg: w2kwload, asm: "VSCALEFPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSLLVD512load", argLength: 3, reg: w21load, asm: "VPSLLVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSLLVQ512load", argLength: 3, reg: w21load, asm: "VPSLLVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPRORVQMasked256load", argLength: 4, reg: w2kwload, asm: "VPRORVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPRORVQMasked512load", argLength: 4, reg: w2kwload, asm: "VPRORVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHLDVD128load", argLength: 4, reg: w31load, asm: "VPSHLDVD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHLDVD256load", argLength: 4, reg: w31load, asm: "VPSHLDVD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHLDVD512load", argLength: 4, reg: w31load, asm: "VPSHLDVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPSHLDVQ128load", argLength: 4, reg: w31load, asm: "VPSHLDVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPSHLDVQ256load", argLength: 4, reg: w31load, asm: "VPSHLDVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPSHLDVQ512load", argLength: 4, reg: w31load, asm: "VPSHLDVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHLDVDMasked128load", argLength: 5, reg: w3kwload, asm: "VPSHLDVD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHLDVDMasked256load", argLength: 5, reg: w3kwload, asm: "VPSHLDVD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHLDVDMasked512load", argLength: 5, reg: w3kwload, asm: "VPSHLDVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPSHLDVQ128load", argLength: 4, reg: w31load, asm: "VPSHLDVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPSHLDVQ256load", argLength: 4, reg: w31load, asm: "VPSHLDVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPSHLDVQ512load", argLength: 4, reg: w31load, asm: "VPSHLDVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHLDVQMasked128load", argLength: 5, reg: w3kwload, asm: "VPSHLDVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHLDVQMasked256load", argLength: 5, reg: w3kwload, asm: "VPSHLDVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHLDVQMasked512load", argLength: 5, reg: w3kwload, asm: "VPSHLDVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPSLLVDMasked128load", argLength: 4, reg: w2kwload, asm: "VPSLLVD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSLLVDMasked256load", argLength: 4, reg: w2kwload, asm: "VPSLLVD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSLLVDMasked512load", argLength: 4, reg: w2kwload, asm: "VPSLLVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSLLVQMasked128load", argLength: 4, reg: w2kwload, asm: "VPSLLVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSLLVQMasked256load", argLength: 4, reg: w2kwload, asm: "VPSLLVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSLLVQMasked512load", argLength: 4, reg: w2kwload, asm: "VPSLLVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRAVD512load", argLength: 3, reg: w21load, asm: "VPSRAVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRAVQ128load", argLength: 3, reg: w21load, asm: "VPSRAVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRAVQ256load", argLength: 3, reg: w21load, asm: "VPSRAVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRAVQ512load", argLength: 3, reg: w21load, asm: "VPSRAVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRLVD512load", argLength: 3, reg: w21load, asm: "VPSRLVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRLVQ512load", argLength: 3, reg: w21load, asm: "VPSRLVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHRDVD128load", argLength: 4, reg: w31load, asm: "VPSHRDVD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHRDVD256load", argLength: 4, reg: w31load, asm: "VPSHRDVD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHRDVD512load", argLength: 4, reg: w31load, asm: "VPSHRDVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPSHRDVQ128load", argLength: 4, reg: w31load, asm: "VPSHRDVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPSHRDVQ256load", argLength: 4, reg: w31load, asm: "VPSHRDVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
-               {name: "VPSHRDVQ512load", argLength: 4, reg: w31load, asm: "VPSHRDVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHRDVDMasked128load", argLength: 5, reg: w3kwload, asm: "VPSHRDVD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHRDVDMasked256load", argLength: 5, reg: w3kwload, asm: "VPSHRDVD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHRDVDMasked512load", argLength: 5, reg: w3kwload, asm: "VPSHRDVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPSHRDVQ128load", argLength: 4, reg: w31load, asm: "VPSHRDVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPSHRDVQ256load", argLength: 4, reg: w31load, asm: "VPSHRDVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPSHRDVQ512load", argLength: 4, reg: w31load, asm: "VPSHRDVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHRDVQMasked128load", argLength: 5, reg: w3kwload, asm: "VPSHRDVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHRDVQMasked256load", argLength: 5, reg: w3kwload, asm: "VPSHRDVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: true},
                {name: "VPSHRDVQMasked512load", argLength: 5, reg: w3kwload, asm: "VPSHRDVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: true},
+               {name: "VPSLLVD512load", argLength: 3, reg: w21load, asm: "VPSLLVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSLLVDMasked128load", argLength: 4, reg: w2kwload, asm: "VPSLLVD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSLLVDMasked256load", argLength: 4, reg: w2kwload, asm: "VPSLLVD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSLLVDMasked512load", argLength: 4, reg: w2kwload, asm: "VPSLLVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSLLVQ512load", argLength: 3, reg: w21load, asm: "VPSLLVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSLLVQMasked128load", argLength: 4, reg: w2kwload, asm: "VPSLLVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSLLVQMasked256load", argLength: 4, reg: w2kwload, asm: "VPSLLVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSLLVQMasked512load", argLength: 4, reg: w2kwload, asm: "VPSLLVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRAVD512load", argLength: 3, reg: w21load, asm: "VPSRAVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRAVDMasked128load", argLength: 4, reg: w2kwload, asm: "VPSRAVD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRAVDMasked256load", argLength: 4, reg: w2kwload, asm: "VPSRAVD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRAVDMasked512load", argLength: 4, reg: w2kwload, asm: "VPSRAVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRAVQ128load", argLength: 3, reg: w21load, asm: "VPSRAVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRAVQ256load", argLength: 3, reg: w21load, asm: "VPSRAVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRAVQ512load", argLength: 3, reg: w21load, asm: "VPSRAVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRAVQMasked128load", argLength: 4, reg: w2kwload, asm: "VPSRAVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRAVQMasked256load", argLength: 4, reg: w2kwload, asm: "VPSRAVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRAVQMasked512load", argLength: 4, reg: w2kwload, asm: "VPSRAVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRLVD512load", argLength: 3, reg: w21load, asm: "VPSRLVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRLVDMasked128load", argLength: 4, reg: w2kwload, asm: "VPSRLVD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRLVDMasked256load", argLength: 4, reg: w2kwload, asm: "VPSRLVD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRLVDMasked512load", argLength: 4, reg: w2kwload, asm: "VPSRLVD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRLVQ512load", argLength: 3, reg: w21load, asm: "VPSRLVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRLVQMasked128load", argLength: 4, reg: w2kwload, asm: "VPSRLVQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRLVQMasked256load", argLength: 4, reg: w2kwload, asm: "VPSRLVQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRLVQMasked512load", argLength: 4, reg: w2kwload, asm: "VPSRLVQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSQRTPS512load", argLength: 2, reg: w11load, asm: "VSQRTPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSQRTPD512load", argLength: 2, reg: w11load, asm: "VSQRTPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSQRTPSMasked128load", argLength: 3, reg: wkwload, asm: "VSQRTPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSQRTPSMasked256load", argLength: 3, reg: wkwload, asm: "VSQRTPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSQRTPSMasked512load", argLength: 3, reg: wkwload, asm: "VSQRTPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSQRTPDMasked128load", argLength: 3, reg: wkwload, asm: "VSQRTPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSQRTPDMasked256load", argLength: 3, reg: wkwload, asm: "VSQRTPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSQRTPDMasked512load", argLength: 3, reg: wkwload, asm: "VSQRTPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSUBPS512load", argLength: 3, reg: w21load, asm: "VSUBPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSUBPD512load", argLength: 3, reg: w21load, asm: "VSUBPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSUBD512load", argLength: 3, reg: w21load, asm: "VPSUBD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSUBQ512load", argLength: 3, reg: w21load, asm: "VPSUBQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSUBPSMasked128load", argLength: 4, reg: w2kwload, asm: "VSUBPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSUBPSMasked256load", argLength: 4, reg: w2kwload, asm: "VSUBPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSUBPSMasked512load", argLength: 4, reg: w2kwload, asm: "VSUBPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSUBPDMasked128load", argLength: 4, reg: w2kwload, asm: "VSUBPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSUBPDMasked256load", argLength: 4, reg: w2kwload, asm: "VSUBPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSUBPDMasked512load", argLength: 4, reg: w2kwload, asm: "VSUBPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSUBDMasked128load", argLength: 4, reg: w2kwload, asm: "VPSUBD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSUBDMasked256load", argLength: 4, reg: w2kwload, asm: "VPSUBD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSUBDMasked512load", argLength: 4, reg: w2kwload, asm: "VPSUBD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSUBQ512load", argLength: 3, reg: w21load, asm: "VPSUBQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSUBQMasked128load", argLength: 4, reg: w2kwload, asm: "VPSUBQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSUBQMasked256load", argLength: 4, reg: w2kwload, asm: "VPSUBQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSUBQMasked512load", argLength: 4, reg: w2kwload, asm: "VPSUBQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPUNPCKHDQ512load", argLength: 3, reg: w21load, asm: "VPUNPCKHDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPUNPCKHQDQ512load", argLength: 3, reg: w21load, asm: "VPUNPCKHQDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPUNPCKLDQ512load", argLength: 3, reg: w21load, asm: "VPUNPCKLDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPUNPCKLQDQ512load", argLength: 3, reg: w21load, asm: "VPUNPCKLQDQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPXORD512load", argLength: 3, reg: w21load, asm: "VPXORD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPXORQ512load", argLength: 3, reg: w21load, asm: "VPXORQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPXORDMasked128load", argLength: 4, reg: w2kwload, asm: "VPXORD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPXORDMasked256load", argLength: 4, reg: w2kwload, asm: "VPXORD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPXORDMasked512load", argLength: 4, reg: w2kwload, asm: "VPXORD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPXORQ512load", argLength: 3, reg: w21load, asm: "VPXORQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPXORQMasked128load", argLength: 4, reg: w2kwload, asm: "VPXORQ", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPXORQMasked256load", argLength: 4, reg: w2kwload, asm: "VPXORQ", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VPXORQMasked512load", argLength: 4, reg: w2kwload, asm: "VPXORQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPBLENDMDMasked512load", argLength: 4, reg: w2kwload, asm: "VPBLENDMD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPBLENDMQMasked512load", argLength: 4, reg: w2kwload, asm: "VPBLENDMQ", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRNDSCALEPS128load", argLength: 2, reg: w11load, asm: "VRNDSCALEPS", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRNDSCALEPS256load", argLength: 2, reg: w11load, asm: "VRNDSCALEPS", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRNDSCALEPS512load", argLength: 2, reg: w11load, asm: "VRNDSCALEPS", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRNDSCALEPD128load", argLength: 2, reg: w11load, asm: "VRNDSCALEPD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRNDSCALEPD256load", argLength: 2, reg: w11load, asm: "VRNDSCALEPD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRNDSCALEPD512load", argLength: 2, reg: w11load, asm: "VRNDSCALEPD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRNDSCALEPSMasked128load", argLength: 3, reg: wkwload, asm: "VRNDSCALEPS", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRNDSCALEPSMasked256load", argLength: 3, reg: wkwload, asm: "VRNDSCALEPS", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRNDSCALEPSMasked512load", argLength: 3, reg: wkwload, asm: "VRNDSCALEPS", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRNDSCALEPDMasked128load", argLength: 3, reg: wkwload, asm: "VRNDSCALEPD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRNDSCALEPDMasked256load", argLength: 3, reg: wkwload, asm: "VRNDSCALEPD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VRNDSCALEPDMasked512load", argLength: 3, reg: wkwload, asm: "VRNDSCALEPD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VREDUCEPS128load", argLength: 2, reg: w11load, asm: "VREDUCEPS", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VREDUCEPS256load", argLength: 2, reg: w11load, asm: "VREDUCEPS", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VREDUCEPS512load", argLength: 2, reg: w11load, asm: "VREDUCEPS", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VREDUCEPD128load", argLength: 2, reg: w11load, asm: "VREDUCEPD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VREDUCEPD256load", argLength: 2, reg: w11load, asm: "VREDUCEPD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VREDUCEPD512load", argLength: 2, reg: w11load, asm: "VREDUCEPD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VREDUCEPSMasked128load", argLength: 3, reg: wkwload, asm: "VREDUCEPS", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VREDUCEPSMasked256load", argLength: 3, reg: wkwload, asm: "VREDUCEPS", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VREDUCEPSMasked512load", argLength: 3, reg: wkwload, asm: "VREDUCEPS", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VREDUCEPDMasked128load", argLength: 3, reg: wkwload, asm: "VREDUCEPD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VREDUCEPDMasked256load", argLength: 3, reg: wkwload, asm: "VREDUCEPD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VREDUCEPDMasked512load", argLength: 3, reg: wkwload, asm: "VREDUCEPD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCMPPS512load", argLength: 3, reg: w2kload, asm: "VCMPPS", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRCP14PD128load", argLength: 2, reg: w11load, asm: "VRCP14PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRCP14PD256load", argLength: 2, reg: w11load, asm: "VRCP14PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRCP14PD512load", argLength: 2, reg: w11load, asm: "VRCP14PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRCP14PDMasked128load", argLength: 3, reg: wkwload, asm: "VRCP14PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRCP14PDMasked256load", argLength: 3, reg: wkwload, asm: "VRCP14PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRCP14PDMasked512load", argLength: 3, reg: wkwload, asm: "VRCP14PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRCP14PS512load", argLength: 2, reg: w11load, asm: "VRCP14PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRCP14PSMasked128load", argLength: 3, reg: wkwload, asm: "VRCP14PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRCP14PSMasked256load", argLength: 3, reg: wkwload, asm: "VRCP14PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRCP14PSMasked512load", argLength: 3, reg: wkwload, asm: "VRCP14PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRSQRT14PD128load", argLength: 2, reg: w11load, asm: "VRSQRT14PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRSQRT14PD256load", argLength: 2, reg: w11load, asm: "VRSQRT14PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRSQRT14PD512load", argLength: 2, reg: w11load, asm: "VRSQRT14PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRSQRT14PDMasked128load", argLength: 3, reg: wkwload, asm: "VRSQRT14PD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRSQRT14PDMasked256load", argLength: 3, reg: wkwload, asm: "VRSQRT14PD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRSQRT14PDMasked512load", argLength: 3, reg: wkwload, asm: "VRSQRT14PD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRSQRT14PS512load", argLength: 2, reg: w11load, asm: "VRSQRT14PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRSQRT14PSMasked128load", argLength: 3, reg: wkwload, asm: "VRSQRT14PS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRSQRT14PSMasked256load", argLength: 3, reg: wkwload, asm: "VRSQRT14PS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRSQRT14PSMasked512load", argLength: 3, reg: wkwload, asm: "VRSQRT14PS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSCALEFPD128load", argLength: 3, reg: w21load, asm: "VSCALEFPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSCALEFPD256load", argLength: 3, reg: w21load, asm: "VSCALEFPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSCALEFPD512load", argLength: 3, reg: w21load, asm: "VSCALEFPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSCALEFPDMasked128load", argLength: 4, reg: w2kwload, asm: "VSCALEFPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSCALEFPDMasked256load", argLength: 4, reg: w2kwload, asm: "VSCALEFPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSCALEFPDMasked512load", argLength: 4, reg: w2kwload, asm: "VSCALEFPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSCALEFPS128load", argLength: 3, reg: w21load, asm: "VSCALEFPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSCALEFPS256load", argLength: 3, reg: w21load, asm: "VSCALEFPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSCALEFPS512load", argLength: 3, reg: w21load, asm: "VSCALEFPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSCALEFPSMasked128load", argLength: 4, reg: w2kwload, asm: "VSCALEFPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSCALEFPSMasked256load", argLength: 4, reg: w2kwload, asm: "VSCALEFPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSCALEFPSMasked512load", argLength: 4, reg: w2kwload, asm: "VSCALEFPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSQRTPD512load", argLength: 2, reg: w11load, asm: "VSQRTPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSQRTPDMasked128load", argLength: 3, reg: wkwload, asm: "VSQRTPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSQRTPDMasked256load", argLength: 3, reg: wkwload, asm: "VSQRTPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSQRTPDMasked512load", argLength: 3, reg: wkwload, asm: "VSQRTPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSQRTPS512load", argLength: 2, reg: w11load, asm: "VSQRTPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSQRTPSMasked128load", argLength: 3, reg: wkwload, asm: "VSQRTPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSQRTPSMasked256load", argLength: 3, reg: wkwload, asm: "VSQRTPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSQRTPSMasked512load", argLength: 3, reg: wkwload, asm: "VSQRTPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSUBPD512load", argLength: 3, reg: w21load, asm: "VSUBPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSUBPDMasked128load", argLength: 4, reg: w2kwload, asm: "VSUBPD", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSUBPDMasked256load", argLength: 4, reg: w2kwload, asm: "VSUBPD", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSUBPDMasked512load", argLength: 4, reg: w2kwload, asm: "VSUBPD", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSUBPS512load", argLength: 3, reg: w21load, asm: "VSUBPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSUBPSMasked128load", argLength: 4, reg: w2kwload, asm: "VSUBPS", commutative: false, typ: "Vec128", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSUBPSMasked256load", argLength: 4, reg: w2kwload, asm: "VSUBPS", commutative: false, typ: "Vec256", aux: "SymOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSUBPSMasked512load", argLength: 4, reg: w2kwload, asm: "VSUBPS", commutative: false, typ: "Vec512", aux: "SymOff", symEffect: "Read", resultInArg0: false},
                {name: "VCMPPD512load", argLength: 3, reg: w2kload, asm: "VCMPPD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCMPPSMasked128load", argLength: 4, reg: w2kkload, asm: "VCMPPS", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCMPPSMasked256load", argLength: 4, reg: w2kkload, asm: "VCMPPS", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VCMPPSMasked512load", argLength: 4, reg: w2kkload, asm: "VCMPPS", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VCMPPDMasked128load", argLength: 4, reg: w2kkload, asm: "VCMPPD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VCMPPDMasked256load", argLength: 4, reg: w2kkload, asm: "VCMPPD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VCMPPDMasked512load", argLength: 4, reg: w2kkload, asm: "VCMPPD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCMPPS512load", argLength: 3, reg: w2kload, asm: "VCMPPS", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCMPPSMasked128load", argLength: 4, reg: w2kkload, asm: "VCMPPS", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCMPPSMasked256load", argLength: 4, reg: w2kkload, asm: "VCMPPS", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VCMPPSMasked512load", argLength: 4, reg: w2kkload, asm: "VCMPPS", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VGF2P8AFFINEINVQB128load", argLength: 3, reg: w21load, asm: "VGF2P8AFFINEINVQB", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VGF2P8AFFINEINVQB256load", argLength: 3, reg: w21load, asm: "VGF2P8AFFINEINVQB", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VGF2P8AFFINEINVQB512load", argLength: 3, reg: w21load, asm: "VGF2P8AFFINEINVQB", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VGF2P8AFFINEINVQBMasked128load", argLength: 4, reg: w2kwload, asm: "VGF2P8AFFINEINVQB", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VGF2P8AFFINEINVQBMasked256load", argLength: 4, reg: w2kwload, asm: "VGF2P8AFFINEINVQB", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VGF2P8AFFINEINVQBMasked512load", argLength: 4, reg: w2kwload, asm: "VGF2P8AFFINEINVQB", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VGF2P8AFFINEQB128load", argLength: 3, reg: w21load, asm: "VGF2P8AFFINEQB", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VGF2P8AFFINEQB256load", argLength: 3, reg: w21load, asm: "VGF2P8AFFINEQB", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VGF2P8AFFINEQB512load", argLength: 3, reg: w21load, asm: "VGF2P8AFFINEQB", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VGF2P8AFFINEQBMasked128load", argLength: 4, reg: w2kwload, asm: "VGF2P8AFFINEQB", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VGF2P8AFFINEQBMasked256load", argLength: 4, reg: w2kwload, asm: "VGF2P8AFFINEQB", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VGF2P8AFFINEQBMasked512load", argLength: 4, reg: w2kwload, asm: "VGF2P8AFFINEQB", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPCMPD512load", argLength: 3, reg: w2kload, asm: "VPCMPD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPDMasked128load", argLength: 4, reg: w2kkload, asm: "VPCMPD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPDMasked256load", argLength: 4, reg: w2kkload, asm: "VPCMPD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPDMasked512load", argLength: 4, reg: w2kkload, asm: "VPCMPD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPCMPQ512load", argLength: 3, reg: w2kload, asm: "VPCMPQ", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPQMasked128load", argLength: 4, reg: w2kkload, asm: "VPCMPQ", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPQMasked256load", argLength: 4, reg: w2kkload, asm: "VPCMPQ", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPQMasked512load", argLength: 4, reg: w2kkload, asm: "VPCMPQ", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPCMPUD512load", argLength: 3, reg: w2kload, asm: "VPCMPUD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPUDMasked128load", argLength: 4, reg: w2kkload, asm: "VPCMPUD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPUDMasked256load", argLength: 4, reg: w2kkload, asm: "VPCMPUD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPUDMasked512load", argLength: 4, reg: w2kkload, asm: "VPCMPUD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPCMPUQ512load", argLength: 3, reg: w2kload, asm: "VPCMPUQ", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPUQMasked128load", argLength: 4, reg: w2kkload, asm: "VPCMPUQ", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPUQMasked256load", argLength: 4, reg: w2kkload, asm: "VPCMPUQ", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPCMPUQMasked512load", argLength: 4, reg: w2kkload, asm: "VPCMPUQ", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VGF2P8AFFINEQB128load", argLength: 3, reg: w21load, asm: "VGF2P8AFFINEQB", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VGF2P8AFFINEQB256load", argLength: 3, reg: w21load, asm: "VGF2P8AFFINEQB", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VGF2P8AFFINEQB512load", argLength: 3, reg: w21load, asm: "VGF2P8AFFINEQB", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VGF2P8AFFINEINVQB128load", argLength: 3, reg: w21load, asm: "VGF2P8AFFINEINVQB", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VGF2P8AFFINEINVQB256load", argLength: 3, reg: w21load, asm: "VGF2P8AFFINEINVQB", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VGF2P8AFFINEINVQB512load", argLength: 3, reg: w21load, asm: "VGF2P8AFFINEINVQB", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VGF2P8AFFINEINVQBMasked128load", argLength: 4, reg: w2kwload, asm: "VGF2P8AFFINEINVQB", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VGF2P8AFFINEINVQBMasked256load", argLength: 4, reg: w2kwload, asm: "VGF2P8AFFINEINVQB", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VGF2P8AFFINEINVQBMasked512load", argLength: 4, reg: w2kwload, asm: "VGF2P8AFFINEINVQB", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VGF2P8AFFINEQBMasked128load", argLength: 4, reg: w2kwload, asm: "VGF2P8AFFINEQB", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VGF2P8AFFINEQBMasked256load", argLength: 4, reg: w2kwload, asm: "VGF2P8AFFINEQB", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VGF2P8AFFINEQBMasked512load", argLength: 4, reg: w2kwload, asm: "VGF2P8AFFINEQB", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPCMPUD512load", argLength: 3, reg: w2kload, asm: "VPCMPUD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPCMPUQ512load", argLength: 3, reg: w2kload, asm: "VPCMPUQ", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPCMPD512load", argLength: 3, reg: w2kload, asm: "VPCMPD", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPCMPQ512load", argLength: 3, reg: w2kload, asm: "VPCMPQ", commutative: false, typ: "Mask", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSHUFD512load", argLength: 2, reg: w11load, asm: "VPSHUFD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSHUFDMasked256load", argLength: 3, reg: wkwload, asm: "VPSHUFD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSHUFDMasked512load", argLength: 3, reg: wkwload, asm: "VPSHUFD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSHUFDMasked128load", argLength: 3, reg: wkwload, asm: "VPSHUFD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLD128load", argLength: 2, reg: w11load, asm: "VPROLD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLD256load", argLength: 2, reg: w11load, asm: "VPROLD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLD512load", argLength: 2, reg: w11load, asm: "VPROLD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPROLQ128load", argLength: 2, reg: w11load, asm: "VPROLQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPROLQ256load", argLength: 2, reg: w11load, asm: "VPROLQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPROLQ512load", argLength: 2, reg: w11load, asm: "VPROLQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLDMasked128load", argLength: 3, reg: wkwload, asm: "VPROLD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLDMasked256load", argLength: 3, reg: wkwload, asm: "VPROLD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLDMasked512load", argLength: 3, reg: wkwload, asm: "VPROLD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPROLQ128load", argLength: 2, reg: w11load, asm: "VPROLQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPROLQ256load", argLength: 2, reg: w11load, asm: "VPROLQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPROLQ512load", argLength: 2, reg: w11load, asm: "VPROLQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLQMasked128load", argLength: 3, reg: wkwload, asm: "VPROLQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLQMasked256load", argLength: 3, reg: wkwload, asm: "VPROLQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPROLQMasked512load", argLength: 3, reg: wkwload, asm: "VPROLQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORD128load", argLength: 2, reg: w11load, asm: "VPRORD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORD256load", argLength: 2, reg: w11load, asm: "VPRORD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORD512load", argLength: 2, reg: w11load, asm: "VPRORD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPRORQ128load", argLength: 2, reg: w11load, asm: "VPRORQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPRORQ256load", argLength: 2, reg: w11load, asm: "VPRORQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPRORQ512load", argLength: 2, reg: w11load, asm: "VPRORQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORDMasked128load", argLength: 3, reg: wkwload, asm: "VPRORD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORDMasked256load", argLength: 3, reg: wkwload, asm: "VPRORD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORDMasked512load", argLength: 3, reg: wkwload, asm: "VPRORD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPRORQ128load", argLength: 2, reg: w11load, asm: "VPRORQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPRORQ256load", argLength: 2, reg: w11load, asm: "VPRORQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPRORQ512load", argLength: 2, reg: w11load, asm: "VPRORQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORQMasked128load", argLength: 3, reg: wkwload, asm: "VPRORQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORQMasked256load", argLength: 3, reg: wkwload, asm: "VPRORQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPRORQMasked512load", argLength: 3, reg: wkwload, asm: "VPRORQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHLDD128load", argLength: 3, reg: w21load, asm: "VPSHLDD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHLDD256load", argLength: 3, reg: w21load, asm: "VPSHLDD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHLDD512load", argLength: 3, reg: w21load, asm: "VPSHLDD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSHLDQ128load", argLength: 3, reg: w21load, asm: "VPSHLDQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSHLDQ256load", argLength: 3, reg: w21load, asm: "VPSHLDQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSHLDQ512load", argLength: 3, reg: w21load, asm: "VPSHLDQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHLDDMasked128load", argLength: 4, reg: w2kwload, asm: "VPSHLDD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHLDDMasked256load", argLength: 4, reg: w2kwload, asm: "VPSHLDD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHLDDMasked512load", argLength: 4, reg: w2kwload, asm: "VPSHLDD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSHLDQ128load", argLength: 3, reg: w21load, asm: "VPSHLDQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSHLDQ256load", argLength: 3, reg: w21load, asm: "VPSHLDQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSHLDQ512load", argLength: 3, reg: w21load, asm: "VPSHLDQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHLDQMasked128load", argLength: 4, reg: w2kwload, asm: "VPSHLDQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHLDQMasked256load", argLength: 4, reg: w2kwload, asm: "VPSHLDQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHLDQMasked512load", argLength: 4, reg: w2kwload, asm: "VPSHLDQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHRDD128load", argLength: 3, reg: w21load, asm: "VPSHRDD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHRDD256load", argLength: 3, reg: w21load, asm: "VPSHRDD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHRDD512load", argLength: 3, reg: w21load, asm: "VPSHRDD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSHRDQ128load", argLength: 3, reg: w21load, asm: "VPSHRDQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSHRDQ256load", argLength: 3, reg: w21load, asm: "VPSHRDQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSHRDQ512load", argLength: 3, reg: w21load, asm: "VPSHRDQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHRDDMasked128load", argLength: 4, reg: w2kwload, asm: "VPSHRDD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHRDDMasked256load", argLength: 4, reg: w2kwload, asm: "VPSHRDD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHRDDMasked512load", argLength: 4, reg: w2kwload, asm: "VPSHRDD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSHRDQ128load", argLength: 3, reg: w21load, asm: "VPSHRDQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSHRDQ256load", argLength: 3, reg: w21load, asm: "VPSHRDQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSHRDQ512load", argLength: 3, reg: w21load, asm: "VPSHRDQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHRDQMasked128load", argLength: 4, reg: w2kwload, asm: "VPSHRDQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHRDQMasked256load", argLength: 4, reg: w2kwload, asm: "VPSHRDQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSHRDQMasked512load", argLength: 4, reg: w2kwload, asm: "VPSHRDQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSHUFPS512load", argLength: 3, reg: w21load, asm: "VSHUFPS", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VSHUFPD512load", argLength: 3, reg: w21load, asm: "VSHUFPD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSHUFD512load", argLength: 2, reg: w11load, asm: "VPSHUFD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSHUFDMasked128load", argLength: 3, reg: wkwload, asm: "VPSHUFD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSHUFDMasked256load", argLength: 3, reg: wkwload, asm: "VPSHUFD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSHUFDMasked512load", argLength: 3, reg: wkwload, asm: "VPSHUFD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSLLD512constload", argLength: 2, reg: w11load, asm: "VPSLLD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSLLQ512constload", argLength: 2, reg: w11load, asm: "VPSLLQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSLLDMasked128constload", argLength: 3, reg: wkwload, asm: "VPSLLD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSLLDMasked256constload", argLength: 3, reg: wkwload, asm: "VPSLLD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSLLDMasked512constload", argLength: 3, reg: wkwload, asm: "VPSLLD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSLLQ512constload", argLength: 2, reg: w11load, asm: "VPSLLQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSLLQMasked128constload", argLength: 3, reg: wkwload, asm: "VPSLLQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSLLQMasked256constload", argLength: 3, reg: wkwload, asm: "VPSLLQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSLLQMasked512constload", argLength: 3, reg: wkwload, asm: "VPSLLQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRLD512constload", argLength: 2, reg: w11load, asm: "VPSRLD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRLQ512constload", argLength: 2, reg: w11load, asm: "VPSRLQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRAD512constload", argLength: 2, reg: w11load, asm: "VPSRAD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRADMasked128constload", argLength: 3, reg: wkwload, asm: "VPSRAD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRADMasked256constload", argLength: 3, reg: wkwload, asm: "VPSRAD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRADMasked512constload", argLength: 3, reg: wkwload, asm: "VPSRAD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRAQ128constload", argLength: 2, reg: w11load, asm: "VPSRAQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRAQ256constload", argLength: 2, reg: w11load, asm: "VPSRAQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRAQ512constload", argLength: 2, reg: w11load, asm: "VPSRAQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRAQMasked128constload", argLength: 3, reg: wkwload, asm: "VPSRAQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRAQMasked256constload", argLength: 3, reg: wkwload, asm: "VPSRAQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRAQMasked512constload", argLength: 3, reg: wkwload, asm: "VPSRAQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRLD512constload", argLength: 2, reg: w11load, asm: "VPSRLD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRLDMasked128constload", argLength: 3, reg: wkwload, asm: "VPSRLD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRLDMasked256constload", argLength: 3, reg: wkwload, asm: "VPSRLD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRLDMasked512constload", argLength: 3, reg: wkwload, asm: "VPSRLD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VPSRLQ512constload", argLength: 2, reg: w11load, asm: "VPSRLQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRLQMasked128constload", argLength: 3, reg: wkwload, asm: "VPSRLQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRLQMasked256constload", argLength: 3, reg: wkwload, asm: "VPSRLQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPSRLQMasked512constload", argLength: 3, reg: wkwload, asm: "VPSRLQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRADMasked128constload", argLength: 3, reg: wkwload, asm: "VPSRAD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRADMasked256constload", argLength: 3, reg: wkwload, asm: "VPSRAD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRADMasked512constload", argLength: 3, reg: wkwload, asm: "VPSRAD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRAQMasked128constload", argLength: 3, reg: wkwload, asm: "VPSRAQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRAQMasked256constload", argLength: 3, reg: wkwload, asm: "VPSRAQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
-               {name: "VPSRAQMasked512constload", argLength: 3, reg: wkwload, asm: "VPSRAQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
                {name: "VPTERNLOGD128load", argLength: 4, reg: w31load, asm: "VPTERNLOGD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: true},
                {name: "VPTERNLOGD256load", argLength: 4, reg: w31load, asm: "VPTERNLOGD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: true},
                {name: "VPTERNLOGD512load", argLength: 4, reg: w31load, asm: "VPTERNLOGD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: true},
                {name: "VPTERNLOGQ128load", argLength: 4, reg: w31load, asm: "VPTERNLOGQ", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: true},
                {name: "VPTERNLOGQ256load", argLength: 4, reg: w31load, asm: "VPTERNLOGQ", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: true},
                {name: "VPTERNLOGQ512load", argLength: 4, reg: w31load, asm: "VPTERNLOGQ", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: true},
+               {name: "VREDUCEPD128load", argLength: 2, reg: w11load, asm: "VREDUCEPD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VREDUCEPD256load", argLength: 2, reg: w11load, asm: "VREDUCEPD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VREDUCEPD512load", argLength: 2, reg: w11load, asm: "VREDUCEPD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VREDUCEPDMasked128load", argLength: 3, reg: wkwload, asm: "VREDUCEPD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VREDUCEPDMasked256load", argLength: 3, reg: wkwload, asm: "VREDUCEPD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VREDUCEPDMasked512load", argLength: 3, reg: wkwload, asm: "VREDUCEPD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VREDUCEPS128load", argLength: 2, reg: w11load, asm: "VREDUCEPS", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VREDUCEPS256load", argLength: 2, reg: w11load, asm: "VREDUCEPS", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VREDUCEPS512load", argLength: 2, reg: w11load, asm: "VREDUCEPS", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VREDUCEPSMasked128load", argLength: 3, reg: wkwload, asm: "VREDUCEPS", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VREDUCEPSMasked256load", argLength: 3, reg: wkwload, asm: "VREDUCEPS", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VREDUCEPSMasked512load", argLength: 3, reg: wkwload, asm: "VREDUCEPS", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRNDSCALEPD128load", argLength: 2, reg: w11load, asm: "VRNDSCALEPD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRNDSCALEPD256load", argLength: 2, reg: w11load, asm: "VRNDSCALEPD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRNDSCALEPD512load", argLength: 2, reg: w11load, asm: "VRNDSCALEPD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRNDSCALEPDMasked128load", argLength: 3, reg: wkwload, asm: "VRNDSCALEPD", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRNDSCALEPDMasked256load", argLength: 3, reg: wkwload, asm: "VRNDSCALEPD", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRNDSCALEPDMasked512load", argLength: 3, reg: wkwload, asm: "VRNDSCALEPD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRNDSCALEPS128load", argLength: 2, reg: w11load, asm: "VRNDSCALEPS", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRNDSCALEPS256load", argLength: 2, reg: w11load, asm: "VRNDSCALEPS", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRNDSCALEPS512load", argLength: 2, reg: w11load, asm: "VRNDSCALEPS", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRNDSCALEPSMasked128load", argLength: 3, reg: wkwload, asm: "VRNDSCALEPS", commutative: false, typ: "Vec128", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRNDSCALEPSMasked256load", argLength: 3, reg: wkwload, asm: "VRNDSCALEPS", commutative: false, typ: "Vec256", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VRNDSCALEPSMasked512load", argLength: 3, reg: wkwload, asm: "VRNDSCALEPS", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSHUFPD512load", argLength: 3, reg: w21load, asm: "VSHUFPD", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
+               {name: "VSHUFPS512load", argLength: 3, reg: w21load, asm: "VSHUFPS", commutative: false, typ: "Vec512", aux: "SymValAndOff", symEffect: "Read", resultInArg0: false},
        }
 }

diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go
index 5d990224b3806a40d22319cecb11321ab92ef2bb..11f53f5a56e393ff76fdbbc6cd1dd0d5c71a9169 100644 (file)
--- a/src/cmd/compile/internal/ssa/opGen.go
+++ b/src/cmd/compile/internal/ssa/opGen.go
@@ -2332,802 +2332,802 @@ const (
        OpAMD64VSUBPSMasked128
        OpAMD64VSUBPSMasked256
        OpAMD64VSUBPSMasked512
+       OpAMD64SHA1RNDS4128
        OpAMD64VAESKEYGENASSIST128
-       OpAMD64VROUNDPS128
-       OpAMD64VROUNDPS256
-       OpAMD64VROUNDPD128
-       OpAMD64VROUNDPD256
-       OpAMD64VRNDSCALEPS128
-       OpAMD64VRNDSCALEPS256
-       OpAMD64VRNDSCALEPS512
-       OpAMD64VRNDSCALEPD128
-       OpAMD64VRNDSCALEPD256
-       OpAMD64VRNDSCALEPD512
-       OpAMD64VRNDSCALEPSMasked128
-       OpAMD64VRNDSCALEPSMasked256
-       OpAMD64VRNDSCALEPSMasked512
-       OpAMD64VRNDSCALEPDMasked128
-       OpAMD64VRNDSCALEPDMasked256
-       OpAMD64VRNDSCALEPDMasked512
-       OpAMD64VREDUCEPS128
-       OpAMD64VREDUCEPS256
-       OpAMD64VREDUCEPS512
-       OpAMD64VREDUCEPD128
-       OpAMD64VREDUCEPD256
-       OpAMD64VREDUCEPD512
-       OpAMD64VREDUCEPSMasked128
-       OpAMD64VREDUCEPSMasked256
-       OpAMD64VREDUCEPSMasked512
-       OpAMD64VREDUCEPDMasked128
-       OpAMD64VREDUCEPDMasked256
-       OpAMD64VREDUCEPDMasked512
-       OpAMD64VCMPPS128
-       OpAMD64VCMPPS256
-       OpAMD64VCMPPS512
        OpAMD64VCMPPD128
        OpAMD64VCMPPD256
        OpAMD64VCMPPD512
-       OpAMD64VCMPPSMasked128
-       OpAMD64VCMPPSMasked256
-       OpAMD64VCMPPSMasked512
        OpAMD64VCMPPDMasked128
        OpAMD64VCMPPDMasked256
        OpAMD64VCMPPDMasked512
+       OpAMD64VCMPPS128
+       OpAMD64VCMPPS256
+       OpAMD64VCMPPS512
+       OpAMD64VCMPPSMasked128
+       OpAMD64VCMPPSMasked256
+       OpAMD64VCMPPSMasked512
+       OpAMD64VEXTRACTF64X4256
+       OpAMD64VEXTRACTF128128
+       OpAMD64VEXTRACTI64X4256
+       OpAMD64VEXTRACTI128128
+       OpAMD64VGF2P8AFFINEINVQB128
+       OpAMD64VGF2P8AFFINEINVQB256
+       OpAMD64VGF2P8AFFINEINVQB512
+       OpAMD64VGF2P8AFFINEINVQBMasked128
+       OpAMD64VGF2P8AFFINEINVQBMasked256
+       OpAMD64VGF2P8AFFINEINVQBMasked512
+       OpAMD64VGF2P8AFFINEQB128
+       OpAMD64VGF2P8AFFINEQB256
+       OpAMD64VGF2P8AFFINEQB512
+       OpAMD64VGF2P8AFFINEQBMasked128
+       OpAMD64VGF2P8AFFINEQBMasked256
+       OpAMD64VGF2P8AFFINEQBMasked512
+       OpAMD64VINSERTF64X4512
+       OpAMD64VINSERTF128256
+       OpAMD64VINSERTI64X4512
+       OpAMD64VINSERTI128256
+       OpAMD64VPCMPB512
        OpAMD64VPCMPBMasked128
        OpAMD64VPCMPBMasked256
        OpAMD64VPCMPBMasked512
-       OpAMD64VPCMPWMasked128
-       OpAMD64VPCMPWMasked256
-       OpAMD64VPCMPWMasked512
+       OpAMD64VPCMPD512
        OpAMD64VPCMPDMasked128
        OpAMD64VPCMPDMasked256
        OpAMD64VPCMPDMasked512
+       OpAMD64VPCMPQ512
        OpAMD64VPCMPQMasked128
        OpAMD64VPCMPQMasked256
        OpAMD64VPCMPQMasked512
+       OpAMD64VPCMPUB512
        OpAMD64VPCMPUBMasked128
        OpAMD64VPCMPUBMasked256
        OpAMD64VPCMPUBMasked512
-       OpAMD64VPCMPUWMasked128
-       OpAMD64VPCMPUWMasked256
-       OpAMD64VPCMPUWMasked512
+       OpAMD64VPCMPUD512
        OpAMD64VPCMPUDMasked128
        OpAMD64VPCMPUDMasked256
        OpAMD64VPCMPUDMasked512
+       OpAMD64VPCMPUQ512
        OpAMD64VPCMPUQMasked128
        OpAMD64VPCMPUQMasked256
        OpAMD64VPCMPUQMasked512
-       OpAMD64VGF2P8AFFINEQB128
-       OpAMD64VGF2P8AFFINEQB256
-       OpAMD64VGF2P8AFFINEQB512
-       OpAMD64VGF2P8AFFINEINVQB128
-       OpAMD64VGF2P8AFFINEINVQB256
-       OpAMD64VGF2P8AFFINEINVQB512
-       OpAMD64VGF2P8AFFINEINVQBMasked128
-       OpAMD64VGF2P8AFFINEINVQBMasked256
-       OpAMD64VGF2P8AFFINEINVQBMasked512
-       OpAMD64VGF2P8AFFINEQBMasked128
-       OpAMD64VGF2P8AFFINEQBMasked256
-       OpAMD64VGF2P8AFFINEQBMasked512
+       OpAMD64VPCMPUW512
+       OpAMD64VPCMPUWMasked128
+       OpAMD64VPCMPUWMasked256
+       OpAMD64VPCMPUWMasked512
+       OpAMD64VPCMPW512
+       OpAMD64VPCMPWMasked128
+       OpAMD64VPCMPWMasked256
+       OpAMD64VPCMPWMasked512
+       OpAMD64VPERM2F128256
+       OpAMD64VPERM2I128256
+       OpAMD64VPEXTRB128
        OpAMD64VPEXTRD128
        OpAMD64VPEXTRQ128
-       OpAMD64VPEXTRB128
        OpAMD64VPEXTRW128
-       OpAMD64VEXTRACTF128128
-       OpAMD64VEXTRACTF64X4256
-       OpAMD64VEXTRACTI128128
-       OpAMD64VEXTRACTI64X4256
-       OpAMD64VPCMPUB512
-       OpAMD64VPCMPUW512
-       OpAMD64VPCMPUD512
-       OpAMD64VPCMPUQ512
-       OpAMD64VPCMPB512
-       OpAMD64VPCMPW512
-       OpAMD64VPCMPD512
-       OpAMD64VPCMPQ512
-       OpAMD64VPSHUFD128
-       OpAMD64VPSHUFD256
-       OpAMD64VPSHUFD512
-       OpAMD64VPSHUFDMasked256
-       OpAMD64VPSHUFDMasked512
-       OpAMD64VPSHUFHW128
-       OpAMD64VPSHUFHW256
-       OpAMD64VPSHUFHW512
-       OpAMD64VPSHUFHWMasked256
-       OpAMD64VPSHUFHWMasked512
-       OpAMD64VPSHUFHWMasked128
-       OpAMD64VPSHUFDMasked128
+       OpAMD64VPINSRB128
+       OpAMD64VPINSRD128
+       OpAMD64VPINSRQ128
+       OpAMD64VPINSRW128
        OpAMD64VPROLD128
        OpAMD64VPROLD256
        OpAMD64VPROLD512
-       OpAMD64VPROLQ128
-       OpAMD64VPROLQ256
-       OpAMD64VPROLQ512
        OpAMD64VPROLDMasked128
        OpAMD64VPROLDMasked256
        OpAMD64VPROLDMasked512
+       OpAMD64VPROLQ128
+       OpAMD64VPROLQ256
+       OpAMD64VPROLQ512
        OpAMD64VPROLQMasked128
        OpAMD64VPROLQMasked256
        OpAMD64VPROLQMasked512
        OpAMD64VPRORD128
        OpAMD64VPRORD256
        OpAMD64VPRORD512
-       OpAMD64VPRORQ128
-       OpAMD64VPRORQ256
-       OpAMD64VPRORQ512
        OpAMD64VPRORDMasked128
        OpAMD64VPRORDMasked256
        OpAMD64VPRORDMasked512
+       OpAMD64VPRORQ128
+       OpAMD64VPRORQ256
+       OpAMD64VPRORQ512
        OpAMD64VPRORQMasked128
        OpAMD64VPRORQMasked256
        OpAMD64VPRORQMasked512
-       OpAMD64SHA1RNDS4128
-       OpAMD64VPERM2F128256
-       OpAMD64VPERM2I128256
-       OpAMD64VPINSRD128
-       OpAMD64VPINSRQ128
-       OpAMD64VPINSRB128
-       OpAMD64VPINSRW128
-       OpAMD64VINSERTF128256
-       OpAMD64VINSERTF64X4512
-       OpAMD64VINSERTI128256
-       OpAMD64VINSERTI64X4512
-       OpAMD64VPSHLDW128
-       OpAMD64VPSHLDW256
-       OpAMD64VPSHLDW512
        OpAMD64VPSHLDD128
        OpAMD64VPSHLDD256
        OpAMD64VPSHLDD512
-       OpAMD64VPSHLDQ128
-       OpAMD64VPSHLDQ256
-       OpAMD64VPSHLDQ512
-       OpAMD64VPSHLDWMasked128
-       OpAMD64VPSHLDWMasked256
-       OpAMD64VPSHLDWMasked512
        OpAMD64VPSHLDDMasked128
        OpAMD64VPSHLDDMasked256
        OpAMD64VPSHLDDMasked512
+       OpAMD64VPSHLDQ128
+       OpAMD64VPSHLDQ256
+       OpAMD64VPSHLDQ512
        OpAMD64VPSHLDQMasked128
        OpAMD64VPSHLDQMasked256
        OpAMD64VPSHLDQMasked512
-       OpAMD64VPSHRDW128
-       OpAMD64VPSHRDW256
-       OpAMD64VPSHRDW512
+       OpAMD64VPSHLDW128
+       OpAMD64VPSHLDW256
+       OpAMD64VPSHLDW512
+       OpAMD64VPSHLDWMasked128
+       OpAMD64VPSHLDWMasked256
+       OpAMD64VPSHLDWMasked512
        OpAMD64VPSHRDD128
        OpAMD64VPSHRDD256
        OpAMD64VPSHRDD512
-       OpAMD64VPSHRDQ128
-       OpAMD64VPSHRDQ256
-       OpAMD64VPSHRDQ512
-       OpAMD64VPSHRDWMasked128
-       OpAMD64VPSHRDWMasked256
-       OpAMD64VPSHRDWMasked512
        OpAMD64VPSHRDDMasked128
        OpAMD64VPSHRDDMasked256
        OpAMD64VPSHRDDMasked512
+       OpAMD64VPSHRDQ128
+       OpAMD64VPSHRDQ256
+       OpAMD64VPSHRDQ512
        OpAMD64VPSHRDQMasked128
        OpAMD64VPSHRDQMasked256
        OpAMD64VPSHRDQMasked512
-       OpAMD64VSHUFPS128
-       OpAMD64VSHUFPD128
-       OpAMD64VSHUFPS256
-       OpAMD64VSHUFPS512
-       OpAMD64VSHUFPD256
-       OpAMD64VSHUFPD512
-       OpAMD64VPSLLW128const
-       OpAMD64VPSLLW256const
-       OpAMD64VPSLLW512const
+       OpAMD64VPSHRDW128
+       OpAMD64VPSHRDW256
+       OpAMD64VPSHRDW512
+       OpAMD64VPSHRDWMasked128
+       OpAMD64VPSHRDWMasked256
+       OpAMD64VPSHRDWMasked512
+       OpAMD64VPSHUFD128
+       OpAMD64VPSHUFD256
+       OpAMD64VPSHUFD512
+       OpAMD64VPSHUFDMasked128
+       OpAMD64VPSHUFDMasked256
+       OpAMD64VPSHUFDMasked512
+       OpAMD64VPSHUFHW128
+       OpAMD64VPSHUFHW256
+       OpAMD64VPSHUFHW512
+       OpAMD64VPSHUFHWMasked128
+       OpAMD64VPSHUFHWMasked256
+       OpAMD64VPSHUFHWMasked512
        OpAMD64VPSLLD128const
        OpAMD64VPSLLD256const
        OpAMD64VPSLLD512const
-       OpAMD64VPSLLQ128const
-       OpAMD64VPSLLQ256const
-       OpAMD64VPSLLQ512const
-       OpAMD64VPSLLWMasked128const
-       OpAMD64VPSLLWMasked256const
-       OpAMD64VPSLLWMasked512const
        OpAMD64VPSLLDMasked128const
        OpAMD64VPSLLDMasked256const
        OpAMD64VPSLLDMasked512const
+       OpAMD64VPSLLQ128const
+       OpAMD64VPSLLQ256const
+       OpAMD64VPSLLQ512const
        OpAMD64VPSLLQMasked128const
        OpAMD64VPSLLQMasked256const
        OpAMD64VPSLLQMasked512const
-       OpAMD64VPSRLW128const
-       OpAMD64VPSRLW256const
-       OpAMD64VPSRLW512const
-       OpAMD64VPSRLD128const
-       OpAMD64VPSRLD256const
-       OpAMD64VPSRLD512const
-       OpAMD64VPSRLQ128const
-       OpAMD64VPSRLQ256const
-       OpAMD64VPSRLQ512const
-       OpAMD64VPSRAW128const
-       OpAMD64VPSRAW256const
-       OpAMD64VPSRAW512const
+       OpAMD64VPSLLW128const
+       OpAMD64VPSLLW256const
+       OpAMD64VPSLLW512const
+       OpAMD64VPSLLWMasked128const
+       OpAMD64VPSLLWMasked256const
+       OpAMD64VPSLLWMasked512const
        OpAMD64VPSRAD128const
        OpAMD64VPSRAD256const
        OpAMD64VPSRAD512const
+       OpAMD64VPSRADMasked128const
+       OpAMD64VPSRADMasked256const
+       OpAMD64VPSRADMasked512const
        OpAMD64VPSRAQ128const
        OpAMD64VPSRAQ256const
        OpAMD64VPSRAQ512const
-       OpAMD64VPSRLWMasked128const
-       OpAMD64VPSRLWMasked256const
-       OpAMD64VPSRLWMasked512const
+       OpAMD64VPSRAQMasked128const
+       OpAMD64VPSRAQMasked256const
+       OpAMD64VPSRAQMasked512const
+       OpAMD64VPSRAW128const
+       OpAMD64VPSRAW256const
+       OpAMD64VPSRAW512const
+       OpAMD64VPSRAWMasked128const
+       OpAMD64VPSRAWMasked256const
+       OpAMD64VPSRAWMasked512const
+       OpAMD64VPSRLD128const
+       OpAMD64VPSRLD256const
+       OpAMD64VPSRLD512const
        OpAMD64VPSRLDMasked128const
        OpAMD64VPSRLDMasked256const
        OpAMD64VPSRLDMasked512const
+       OpAMD64VPSRLQ128const
+       OpAMD64VPSRLQ256const
+       OpAMD64VPSRLQ512const
        OpAMD64VPSRLQMasked128const
        OpAMD64VPSRLQMasked256const
        OpAMD64VPSRLQMasked512const
-       OpAMD64VPSRAWMasked128const
-       OpAMD64VPSRAWMasked256const
-       OpAMD64VPSRAWMasked512const
-       OpAMD64VPSRADMasked128const
-       OpAMD64VPSRADMasked256const
-       OpAMD64VPSRADMasked512const
-       OpAMD64VPSRAQMasked128const
-       OpAMD64VPSRAQMasked256const
-       OpAMD64VPSRAQMasked512const
+       OpAMD64VPSRLW128const
+       OpAMD64VPSRLW256const
+       OpAMD64VPSRLW512const
+       OpAMD64VPSRLWMasked128const
+       OpAMD64VPSRLWMasked256const
+       OpAMD64VPSRLWMasked512const
        OpAMD64VPTERNLOGD128
        OpAMD64VPTERNLOGD256
        OpAMD64VPTERNLOGD512
        OpAMD64VPTERNLOGQ128
        OpAMD64VPTERNLOGQ256
        OpAMD64VPTERNLOGQ512
+       OpAMD64VREDUCEPD128
+       OpAMD64VREDUCEPD256
+       OpAMD64VREDUCEPD512
+       OpAMD64VREDUCEPDMasked128
+       OpAMD64VREDUCEPDMasked256
+       OpAMD64VREDUCEPDMasked512
+       OpAMD64VREDUCEPS128
+       OpAMD64VREDUCEPS256
+       OpAMD64VREDUCEPS512
+       OpAMD64VREDUCEPSMasked128
+       OpAMD64VREDUCEPSMasked256
+       OpAMD64VREDUCEPSMasked512
+       OpAMD64VRNDSCALEPD128
+       OpAMD64VRNDSCALEPD256
+       OpAMD64VRNDSCALEPD512
+       OpAMD64VRNDSCALEPDMasked128
+       OpAMD64VRNDSCALEPDMasked256
+       OpAMD64VRNDSCALEPDMasked512
+       OpAMD64VRNDSCALEPS128
+       OpAMD64VRNDSCALEPS256
+       OpAMD64VRNDSCALEPS512
+       OpAMD64VRNDSCALEPSMasked128
+       OpAMD64VRNDSCALEPSMasked256
+       OpAMD64VRNDSCALEPSMasked512
+       OpAMD64VROUNDPD128
+       OpAMD64VROUNDPD256
+       OpAMD64VROUNDPS128
+       OpAMD64VROUNDPS256
+       OpAMD64VSHUFPD128
+       OpAMD64VSHUFPD256
+       OpAMD64VSHUFPD512
+       OpAMD64VSHUFPS128
+       OpAMD64VSHUFPS256
+       OpAMD64VSHUFPS512
+       OpAMD64VADDPD512load
+       OpAMD64VADDPDMasked128load
+       OpAMD64VADDPDMasked256load
+       OpAMD64VADDPDMasked512load
+       OpAMD64VADDPS512load
+       OpAMD64VADDPSMasked128load
+       OpAMD64VADDPSMasked256load
+       OpAMD64VADDPSMasked512load
+       OpAMD64VCVTPS2UDQ128load
+       OpAMD64VCVTPS2UDQ256load
+       OpAMD64VCVTPS2UDQ512load
+       OpAMD64VCVTPS2UDQMasked128load
+       OpAMD64VCVTPS2UDQMasked256load
+       OpAMD64VCVTPS2UDQMasked512load
+       OpAMD64VCVTTPS2DQ512load
+       OpAMD64VCVTTPS2DQMasked128load
+       OpAMD64VCVTTPS2DQMasked256load
+       OpAMD64VCVTTPS2DQMasked512load
+       OpAMD64VDIVPD512load
+       OpAMD64VDIVPDMasked128load
+       OpAMD64VDIVPDMasked256load
+       OpAMD64VDIVPDMasked512load
+       OpAMD64VDIVPS512load
+       OpAMD64VDIVPSMasked128load
+       OpAMD64VDIVPSMasked256load
+       OpAMD64VDIVPSMasked512load
+       OpAMD64VFMADD213PD128load
+       OpAMD64VFMADD213PD256load
+       OpAMD64VFMADD213PD512load
+       OpAMD64VFMADD213PDMasked128load
+       OpAMD64VFMADD213PDMasked256load
+       OpAMD64VFMADD213PDMasked512load
+       OpAMD64VFMADD213PS128load
+       OpAMD64VFMADD213PS256load
+       OpAMD64VFMADD213PS512load
+       OpAMD64VFMADD213PSMasked128load
+       OpAMD64VFMADD213PSMasked256load
+       OpAMD64VFMADD213PSMasked512load
+       OpAMD64VFMADDSUB213PD128load
+       OpAMD64VFMADDSUB213PD256load
+       OpAMD64VFMADDSUB213PD512load
+       OpAMD64VFMADDSUB213PDMasked128load
+       OpAMD64VFMADDSUB213PDMasked256load
+       OpAMD64VFMADDSUB213PDMasked512load
+       OpAMD64VFMADDSUB213PS128load
+       OpAMD64VFMADDSUB213PS256load
+       OpAMD64VFMADDSUB213PS512load
+       OpAMD64VFMADDSUB213PSMasked128load
+       OpAMD64VFMADDSUB213PSMasked256load
+       OpAMD64VFMADDSUB213PSMasked512load
+       OpAMD64VFMSUBADD213PD128load
+       OpAMD64VFMSUBADD213PD256load
+       OpAMD64VFMSUBADD213PD512load
+       OpAMD64VFMSUBADD213PDMasked128load
+       OpAMD64VFMSUBADD213PDMasked256load
+       OpAMD64VFMSUBADD213PDMasked512load
+       OpAMD64VFMSUBADD213PS128load
+       OpAMD64VFMSUBADD213PS256load
+       OpAMD64VFMSUBADD213PS512load
+       OpAMD64VFMSUBADD213PSMasked128load
+       OpAMD64VFMSUBADD213PSMasked256load
+       OpAMD64VFMSUBADD213PSMasked512load
+       OpAMD64VMAXPD512load
+       OpAMD64VMAXPDMasked128load
+       OpAMD64VMAXPDMasked256load
+       OpAMD64VMAXPDMasked512load
+       OpAMD64VMAXPS512load
+       OpAMD64VMAXPSMasked128load
+       OpAMD64VMAXPSMasked256load
+       OpAMD64VMAXPSMasked512load
+       OpAMD64VMINPD512load
+       OpAMD64VMINPDMasked128load
+       OpAMD64VMINPDMasked256load
+       OpAMD64VMINPDMasked512load
+       OpAMD64VMINPS512load
+       OpAMD64VMINPSMasked128load
+       OpAMD64VMINPSMasked256load
+       OpAMD64VMINPSMasked512load
+       OpAMD64VMULPD512load
+       OpAMD64VMULPDMasked128load
+       OpAMD64VMULPDMasked256load
+       OpAMD64VMULPDMasked512load
+       OpAMD64VMULPS512load
+       OpAMD64VMULPSMasked128load
+       OpAMD64VMULPSMasked256load
+       OpAMD64VMULPSMasked512load
        OpAMD64VPABSD512load
-       OpAMD64VPABSQ128load
-       OpAMD64VPABSQ256load
-       OpAMD64VPABSQ512load
        OpAMD64VPABSDMasked128load
        OpAMD64VPABSDMasked256load
        OpAMD64VPABSDMasked512load
+       OpAMD64VPABSQ128load
+       OpAMD64VPABSQ256load
+       OpAMD64VPABSQ512load
        OpAMD64VPABSQMasked128load
        OpAMD64VPABSQMasked256load
        OpAMD64VPABSQMasked512load
-       OpAMD64VADDPS512load
-       OpAMD64VADDPD512load
+       OpAMD64VPACKSSDW512load
+       OpAMD64VPACKSSDWMasked128load
+       OpAMD64VPACKSSDWMasked256load
+       OpAMD64VPACKSSDWMasked512load
+       OpAMD64VPACKUSDW512load
+       OpAMD64VPACKUSDWMasked128load
+       OpAMD64VPACKUSDWMasked256load
+       OpAMD64VPACKUSDWMasked512load
        OpAMD64VPADDD512load
-       OpAMD64VPADDQ512load
-       OpAMD64VPDPWSSD512load
-       OpAMD64VPDPWSSDMasked128load
-       OpAMD64VPDPWSSDMasked256load
-       OpAMD64VPDPWSSDMasked512load
-       OpAMD64VPDPBUSD512load
-       OpAMD64VPDPBUSDMasked128load
-       OpAMD64VPDPBUSDMasked256load
-       OpAMD64VPDPBUSDMasked512load
-       OpAMD64VPDPBUSDS512load
-       OpAMD64VPDPBUSDSMasked128load
-       OpAMD64VPDPBUSDSMasked256load
-       OpAMD64VPDPBUSDSMasked512load
-       OpAMD64VADDPSMasked128load
-       OpAMD64VADDPSMasked256load
-       OpAMD64VADDPSMasked512load
-       OpAMD64VADDPDMasked128load
-       OpAMD64VADDPDMasked256load
-       OpAMD64VADDPDMasked512load
        OpAMD64VPADDDMasked128load
        OpAMD64VPADDDMasked256load
        OpAMD64VPADDDMasked512load
+       OpAMD64VPADDQ512load
        OpAMD64VPADDQMasked128load
        OpAMD64VPADDQMasked256load
        OpAMD64VPADDQMasked512load
        OpAMD64VPANDD512load
-       OpAMD64VPANDQ512load
        OpAMD64VPANDDMasked128load
        OpAMD64VPANDDMasked256load
        OpAMD64VPANDDMasked512load
-       OpAMD64VPANDQMasked128load
-       OpAMD64VPANDQMasked256load
-       OpAMD64VPANDQMasked512load
        OpAMD64VPANDND512load
-       OpAMD64VPANDNQ512load
        OpAMD64VPANDNDMasked128load
        OpAMD64VPANDNDMasked256load
        OpAMD64VPANDNDMasked512load
+       OpAMD64VPANDNQ512load
        OpAMD64VPANDNQMasked128load
        OpAMD64VPANDNQMasked256load
        OpAMD64VPANDNQMasked512load
-       OpAMD64VPACKSSDW512load
-       OpAMD64VPACKSSDWMasked128load
-       OpAMD64VPACKSSDWMasked256load
-       OpAMD64VPACKSSDWMasked512load
-       OpAMD64VCVTTPS2DQ512load
-       OpAMD64VCVTTPS2DQMasked128load
-       OpAMD64VCVTTPS2DQMasked256load
-       OpAMD64VCVTTPS2DQMasked512load
-       OpAMD64VPACKUSDW512load
-       OpAMD64VPACKUSDWMasked128load
-       OpAMD64VPACKUSDWMasked256load
-       OpAMD64VPACKUSDWMasked512load
-       OpAMD64VCVTPS2UDQ128load
-       OpAMD64VCVTPS2UDQ256load
-       OpAMD64VCVTPS2UDQ512load
-       OpAMD64VCVTPS2UDQMasked128load
-       OpAMD64VCVTPS2UDQMasked256load
-       OpAMD64VCVTPS2UDQMasked512load
-       OpAMD64VDIVPS512load
-       OpAMD64VDIVPD512load
-       OpAMD64VDIVPSMasked128load
-       OpAMD64VDIVPSMasked256load
-       OpAMD64VDIVPSMasked512load
-       OpAMD64VDIVPDMasked128load
-       OpAMD64VDIVPDMasked256load
-       OpAMD64VDIVPDMasked512load
+       OpAMD64VPANDQ512load
+       OpAMD64VPANDQMasked128load
+       OpAMD64VPANDQMasked256load
+       OpAMD64VPANDQMasked512load
+       OpAMD64VPBLENDMDMasked512load
+       OpAMD64VPBLENDMQMasked512load
        OpAMD64VPCMPEQD512load
        OpAMD64VPCMPEQQ512load
        OpAMD64VPCMPGTD512load
        OpAMD64VPCMPGTQ512load
-       OpAMD64VPUNPCKHDQ512load
-       OpAMD64VPUNPCKHQDQ512load
-       OpAMD64VPUNPCKLDQ512load
-       OpAMD64VPUNPCKLQDQ512load
+       OpAMD64VPDPBUSD512load
+       OpAMD64VPDPBUSDMasked128load
+       OpAMD64VPDPBUSDMasked256load
+       OpAMD64VPDPBUSDMasked512load
+       OpAMD64VPDPBUSDS512load
+       OpAMD64VPDPBUSDSMasked128load
+       OpAMD64VPDPBUSDSMasked256load
+       OpAMD64VPDPBUSDSMasked512load
+       OpAMD64VPDPWSSD512load
+       OpAMD64VPDPWSSDMasked128load
+       OpAMD64VPDPWSSDMasked256load
+       OpAMD64VPDPWSSDMasked512load
+       OpAMD64VPERMD512load
+       OpAMD64VPERMDMasked256load
+       OpAMD64VPERMDMasked512load
+       OpAMD64VPERMI2D128load
+       OpAMD64VPERMI2D256load
+       OpAMD64VPERMI2D512load
+       OpAMD64VPERMI2DMasked128load
+       OpAMD64VPERMI2DMasked256load
+       OpAMD64VPERMI2DMasked512load
+       OpAMD64VPERMI2PD128load
+       OpAMD64VPERMI2PD256load
+       OpAMD64VPERMI2PD512load
+       OpAMD64VPERMI2PDMasked128load
+       OpAMD64VPERMI2PDMasked256load
+       OpAMD64VPERMI2PDMasked512load
+       OpAMD64VPERMI2PS128load
+       OpAMD64VPERMI2PS256load
+       OpAMD64VPERMI2PS512load
+       OpAMD64VPERMI2PSMasked128load
+       OpAMD64VPERMI2PSMasked256load
+       OpAMD64VPERMI2PSMasked512load
+       OpAMD64VPERMI2Q128load
+       OpAMD64VPERMI2Q256load
+       OpAMD64VPERMI2Q512load
+       OpAMD64VPERMI2QMasked128load
+       OpAMD64VPERMI2QMasked256load
+       OpAMD64VPERMI2QMasked512load
+       OpAMD64VPERMPD256load
+       OpAMD64VPERMPD512load
+       OpAMD64VPERMPDMasked256load
+       OpAMD64VPERMPDMasked512load
+       OpAMD64VPERMPS512load
+       OpAMD64VPERMPSMasked256load
+       OpAMD64VPERMPSMasked512load
+       OpAMD64VPERMQ256load
+       OpAMD64VPERMQ512load
+       OpAMD64VPERMQMasked256load
+       OpAMD64VPERMQMasked512load
        OpAMD64VPLZCNTD128load
        OpAMD64VPLZCNTD256load
        OpAMD64VPLZCNTD512load
-       OpAMD64VPLZCNTQ128load
-       OpAMD64VPLZCNTQ256load
-       OpAMD64VPLZCNTQ512load
        OpAMD64VPLZCNTDMasked128load
        OpAMD64VPLZCNTDMasked256load
        OpAMD64VPLZCNTDMasked512load
+       OpAMD64VPLZCNTQ128load
+       OpAMD64VPLZCNTQ256load
+       OpAMD64VPLZCNTQ512load
        OpAMD64VPLZCNTQMasked128load
        OpAMD64VPLZCNTQMasked256load
        OpAMD64VPLZCNTQMasked512load
-       OpAMD64VMAXPS512load
-       OpAMD64VMAXPD512load
        OpAMD64VPMAXSD512load
-       OpAMD64VPMAXSQ128load
-       OpAMD64VPMAXSQ256load
-       OpAMD64VPMAXSQ512load
-       OpAMD64VPMAXUD512load
-       OpAMD64VPMAXUQ128load
-       OpAMD64VPMAXUQ256load
-       OpAMD64VPMAXUQ512load
-       OpAMD64VMAXPSMasked128load
-       OpAMD64VMAXPSMasked256load
-       OpAMD64VMAXPSMasked512load
-       OpAMD64VMAXPDMasked128load
-       OpAMD64VMAXPDMasked256load
-       OpAMD64VMAXPDMasked512load
        OpAMD64VPMAXSDMasked128load
        OpAMD64VPMAXSDMasked256load
        OpAMD64VPMAXSDMasked512load
+       OpAMD64VPMAXSQ128load
+       OpAMD64VPMAXSQ256load
+       OpAMD64VPMAXSQ512load
        OpAMD64VPMAXSQMasked128load
        OpAMD64VPMAXSQMasked256load
        OpAMD64VPMAXSQMasked512load
+       OpAMD64VPMAXUD512load
        OpAMD64VPMAXUDMasked128load
        OpAMD64VPMAXUDMasked256load
        OpAMD64VPMAXUDMasked512load
+       OpAMD64VPMAXUQ128load
+       OpAMD64VPMAXUQ256load
+       OpAMD64VPMAXUQ512load
        OpAMD64VPMAXUQMasked128load
        OpAMD64VPMAXUQMasked256load
        OpAMD64VPMAXUQMasked512load
-       OpAMD64VMINPS512load
-       OpAMD64VMINPD512load
        OpAMD64VPMINSD512load
-       OpAMD64VPMINSQ128load
-       OpAMD64VPMINSQ256load
-       OpAMD64VPMINSQ512load
-       OpAMD64VPMINUD512load
-       OpAMD64VPMINUQ128load
-       OpAMD64VPMINUQ256load
-       OpAMD64VPMINUQ512load
-       OpAMD64VMINPSMasked128load
-       OpAMD64VMINPSMasked256load
-       OpAMD64VMINPSMasked512load
-       OpAMD64VMINPDMasked128load
-       OpAMD64VMINPDMasked256load
-       OpAMD64VMINPDMasked512load
        OpAMD64VPMINSDMasked128load
        OpAMD64VPMINSDMasked256load
        OpAMD64VPMINSDMasked512load
+       OpAMD64VPMINSQ128load
+       OpAMD64VPMINSQ256load
+       OpAMD64VPMINSQ512load
        OpAMD64VPMINSQMasked128load
        OpAMD64VPMINSQMasked256load
        OpAMD64VPMINSQMasked512load
+       OpAMD64VPMINUD512load
        OpAMD64VPMINUDMasked128load
        OpAMD64VPMINUDMasked256load
        OpAMD64VPMINUDMasked512load
+       OpAMD64VPMINUQ128load
+       OpAMD64VPMINUQ256load
+       OpAMD64VPMINUQ512load
        OpAMD64VPMINUQMasked128load
        OpAMD64VPMINUQMasked256load
        OpAMD64VPMINUQMasked512load
-       OpAMD64VMULPS512load
-       OpAMD64VMULPD512load
        OpAMD64VPMULLD512load
-       OpAMD64VPMULLQ128load
-       OpAMD64VPMULLQ256load
-       OpAMD64VPMULLQ512load
-       OpAMD64VFMADD213PS128load
-       OpAMD64VFMADD213PS256load
-       OpAMD64VFMADD213PS512load
-       OpAMD64VFMADD213PD128load
-       OpAMD64VFMADD213PD256load
-       OpAMD64VFMADD213PD512load
-       OpAMD64VFMADD213PSMasked128load
-       OpAMD64VFMADD213PSMasked256load
-       OpAMD64VFMADD213PSMasked512load
-       OpAMD64VFMADD213PDMasked128load
-       OpAMD64VFMADD213PDMasked256load
-       OpAMD64VFMADD213PDMasked512load
-       OpAMD64VFMADDSUB213PS128load
-       OpAMD64VFMADDSUB213PS256load
-       OpAMD64VFMADDSUB213PS512load
-       OpAMD64VFMADDSUB213PD128load
-       OpAMD64VFMADDSUB213PD256load
-       OpAMD64VFMADDSUB213PD512load
-       OpAMD64VFMADDSUB213PSMasked128load
-       OpAMD64VFMADDSUB213PSMasked256load
-       OpAMD64VFMADDSUB213PSMasked512load
-       OpAMD64VFMADDSUB213PDMasked128load
-       OpAMD64VFMADDSUB213PDMasked256load
-       OpAMD64VFMADDSUB213PDMasked512load
-       OpAMD64VMULPSMasked128load
-       OpAMD64VMULPSMasked256load
-       OpAMD64VMULPSMasked512load
-       OpAMD64VMULPDMasked128load
-       OpAMD64VMULPDMasked256load
-       OpAMD64VMULPDMasked512load
        OpAMD64VPMULLDMasked128load
        OpAMD64VPMULLDMasked256load
        OpAMD64VPMULLDMasked512load
+       OpAMD64VPMULLQ128load
+       OpAMD64VPMULLQ256load
+       OpAMD64VPMULLQ512load
        OpAMD64VPMULLQMasked128load
        OpAMD64VPMULLQMasked256load
        OpAMD64VPMULLQMasked512load
-       OpAMD64VFMSUBADD213PS128load
-       OpAMD64VFMSUBADD213PS256load
-       OpAMD64VFMSUBADD213PS512load
-       OpAMD64VFMSUBADD213PD128load
-       OpAMD64VFMSUBADD213PD256load
-       OpAMD64VFMSUBADD213PD512load
-       OpAMD64VFMSUBADD213PSMasked128load
-       OpAMD64VFMSUBADD213PSMasked256load
-       OpAMD64VFMSUBADD213PSMasked512load
-       OpAMD64VFMSUBADD213PDMasked128load
-       OpAMD64VFMSUBADD213PDMasked256load
-       OpAMD64VFMSUBADD213PDMasked512load
        OpAMD64VPOPCNTD128load
        OpAMD64VPOPCNTD256load
        OpAMD64VPOPCNTD512load
-       OpAMD64VPOPCNTQ128load
-       OpAMD64VPOPCNTQ256load
-       OpAMD64VPOPCNTQ512load
        OpAMD64VPOPCNTDMasked128load
        OpAMD64VPOPCNTDMasked256load
        OpAMD64VPOPCNTDMasked512load
+       OpAMD64VPOPCNTQ128load
+       OpAMD64VPOPCNTQ256load
+       OpAMD64VPOPCNTQ512load
        OpAMD64VPOPCNTQMasked128load
        OpAMD64VPOPCNTQMasked256load
        OpAMD64VPOPCNTQMasked512load
        OpAMD64VPORD512load
-       OpAMD64VPORQ512load
        OpAMD64VPORDMasked128load
        OpAMD64VPORDMasked256load
        OpAMD64VPORDMasked512load
+       OpAMD64VPORQ512load
        OpAMD64VPORQMasked128load
        OpAMD64VPORQMasked256load
        OpAMD64VPORQMasked512load
-       OpAMD64VPERMPS512load
-       OpAMD64VPERMD512load
-       OpAMD64VPERMPD256load
-       OpAMD64VPERMQ256load
-       OpAMD64VPERMPD512load
-       OpAMD64VPERMQ512load
-       OpAMD64VPERMI2PS128load
-       OpAMD64VPERMI2D128load
-       OpAMD64VPERMI2PS256load
-       OpAMD64VPERMI2D256load
-       OpAMD64VPERMI2PS512load
-       OpAMD64VPERMI2D512load
-       OpAMD64VPERMI2PD128load
-       OpAMD64VPERMI2Q128load
-       OpAMD64VPERMI2PD256load
-       OpAMD64VPERMI2Q256load
-       OpAMD64VPERMI2PD512load
-       OpAMD64VPERMI2Q512load
-       OpAMD64VPERMI2PSMasked128load
-       OpAMD64VPERMI2DMasked128load
-       OpAMD64VPERMI2PSMasked256load
-       OpAMD64VPERMI2DMasked256load
-       OpAMD64VPERMI2PSMasked512load
-       OpAMD64VPERMI2DMasked512load
-       OpAMD64VPERMI2PDMasked128load
-       OpAMD64VPERMI2QMasked128load
-       OpAMD64VPERMI2PDMasked256load
-       OpAMD64VPERMI2QMasked256load
-       OpAMD64VPERMI2PDMasked512load
-       OpAMD64VPERMI2QMasked512load
-       OpAMD64VPERMPSMasked256load
-       OpAMD64VPERMDMasked256load
-       OpAMD64VPERMPSMasked512load
-       OpAMD64VPERMDMasked512load
-       OpAMD64VPERMPDMasked256load
-       OpAMD64VPERMQMasked256load
-       OpAMD64VPERMPDMasked512load
-       OpAMD64VPERMQMasked512load
-       OpAMD64VRCP14PS512load
-       OpAMD64VRCP14PD128load
-       OpAMD64VRCP14PD256load
-       OpAMD64VRCP14PD512load
-       OpAMD64VRCP14PSMasked128load
-       OpAMD64VRCP14PSMasked256load
-       OpAMD64VRCP14PSMasked512load
-       OpAMD64VRCP14PDMasked128load
-       OpAMD64VRCP14PDMasked256load
-       OpAMD64VRCP14PDMasked512load
-       OpAMD64VRSQRT14PS512load
-       OpAMD64VRSQRT14PD128load
-       OpAMD64VRSQRT14PD256load
-       OpAMD64VRSQRT14PD512load
-       OpAMD64VRSQRT14PSMasked128load
-       OpAMD64VRSQRT14PSMasked256load
-       OpAMD64VRSQRT14PSMasked512load
-       OpAMD64VRSQRT14PDMasked128load
-       OpAMD64VRSQRT14PDMasked256load
-       OpAMD64VRSQRT14PDMasked512load
        OpAMD64VPROLVD128load
        OpAMD64VPROLVD256load
        OpAMD64VPROLVD512load
-       OpAMD64VPROLVQ128load
-       OpAMD64VPROLVQ256load
-       OpAMD64VPROLVQ512load
        OpAMD64VPROLVDMasked128load
        OpAMD64VPROLVDMasked256load
        OpAMD64VPROLVDMasked512load
+       OpAMD64VPROLVQ128load
+       OpAMD64VPROLVQ256load
+       OpAMD64VPROLVQ512load
        OpAMD64VPROLVQMasked128load
        OpAMD64VPROLVQMasked256load
        OpAMD64VPROLVQMasked512load
        OpAMD64VPRORVD128load
        OpAMD64VPRORVD256load
        OpAMD64VPRORVD512load
-       OpAMD64VPRORVQ128load
-       OpAMD64VPRORVQ256load
-       OpAMD64VPRORVQ512load
        OpAMD64VPRORVDMasked128load
        OpAMD64VPRORVDMasked256load
        OpAMD64VPRORVDMasked512load
+       OpAMD64VPRORVQ128load
+       OpAMD64VPRORVQ256load
+       OpAMD64VPRORVQ512load
        OpAMD64VPRORVQMasked128load
        OpAMD64VPRORVQMasked256load
        OpAMD64VPRORVQMasked512load
-       OpAMD64VSCALEFPS128load
-       OpAMD64VSCALEFPS256load
-       OpAMD64VSCALEFPS512load
-       OpAMD64VSCALEFPD128load
-       OpAMD64VSCALEFPD256load
-       OpAMD64VSCALEFPD512load
-       OpAMD64VSCALEFPSMasked128load
-       OpAMD64VSCALEFPSMasked256load
-       OpAMD64VSCALEFPSMasked512load
-       OpAMD64VSCALEFPDMasked128load
-       OpAMD64VSCALEFPDMasked256load
-       OpAMD64VSCALEFPDMasked512load
-       OpAMD64VPSLLVD512load
-       OpAMD64VPSLLVQ512load
        OpAMD64VPSHLDVD128load
        OpAMD64VPSHLDVD256load
        OpAMD64VPSHLDVD512load
-       OpAMD64VPSHLDVQ128load
-       OpAMD64VPSHLDVQ256load
-       OpAMD64VPSHLDVQ512load
        OpAMD64VPSHLDVDMasked128load
        OpAMD64VPSHLDVDMasked256load
        OpAMD64VPSHLDVDMasked512load
+       OpAMD64VPSHLDVQ128load
+       OpAMD64VPSHLDVQ256load
+       OpAMD64VPSHLDVQ512load
        OpAMD64VPSHLDVQMasked128load
        OpAMD64VPSHLDVQMasked256load
        OpAMD64VPSHLDVQMasked512load
-       OpAMD64VPSLLVDMasked128load
-       OpAMD64VPSLLVDMasked256load
-       OpAMD64VPSLLVDMasked512load
-       OpAMD64VPSLLVQMasked128load
-       OpAMD64VPSLLVQMasked256load
-       OpAMD64VPSLLVQMasked512load
-       OpAMD64VPSRAVD512load
-       OpAMD64VPSRAVQ128load
-       OpAMD64VPSRAVQ256load
-       OpAMD64VPSRAVQ512load
-       OpAMD64VPSRLVD512load
-       OpAMD64VPSRLVQ512load
        OpAMD64VPSHRDVD128load
        OpAMD64VPSHRDVD256load
        OpAMD64VPSHRDVD512load
-       OpAMD64VPSHRDVQ128load
-       OpAMD64VPSHRDVQ256load
-       OpAMD64VPSHRDVQ512load
        OpAMD64VPSHRDVDMasked128load
        OpAMD64VPSHRDVDMasked256load
        OpAMD64VPSHRDVDMasked512load
+       OpAMD64VPSHRDVQ128load
+       OpAMD64VPSHRDVQ256load
+       OpAMD64VPSHRDVQ512load
        OpAMD64VPSHRDVQMasked128load
        OpAMD64VPSHRDVQMasked256load
        OpAMD64VPSHRDVQMasked512load
+       OpAMD64VPSLLVD512load
+       OpAMD64VPSLLVDMasked128load
+       OpAMD64VPSLLVDMasked256load
+       OpAMD64VPSLLVDMasked512load
+       OpAMD64VPSLLVQ512load
+       OpAMD64VPSLLVQMasked128load
+       OpAMD64VPSLLVQMasked256load
+       OpAMD64VPSLLVQMasked512load
+       OpAMD64VPSRAVD512load
        OpAMD64VPSRAVDMasked128load
        OpAMD64VPSRAVDMasked256load
        OpAMD64VPSRAVDMasked512load
+       OpAMD64VPSRAVQ128load
+       OpAMD64VPSRAVQ256load
+       OpAMD64VPSRAVQ512load
        OpAMD64VPSRAVQMasked128load
        OpAMD64VPSRAVQMasked256load
        OpAMD64VPSRAVQMasked512load
+       OpAMD64VPSRLVD512load
        OpAMD64VPSRLVDMasked128load
        OpAMD64VPSRLVDMasked256load
        OpAMD64VPSRLVDMasked512load
+       OpAMD64VPSRLVQ512load
        OpAMD64VPSRLVQMasked128load
        OpAMD64VPSRLVQMasked256load
        OpAMD64VPSRLVQMasked512load
-       OpAMD64VSQRTPS512load
-       OpAMD64VSQRTPD512load
-       OpAMD64VSQRTPSMasked128load
-       OpAMD64VSQRTPSMasked256load
-       OpAMD64VSQRTPSMasked512load
-       OpAMD64VSQRTPDMasked128load
-       OpAMD64VSQRTPDMasked256load
-       OpAMD64VSQRTPDMasked512load
-       OpAMD64VSUBPS512load
-       OpAMD64VSUBPD512load
        OpAMD64VPSUBD512load
-       OpAMD64VPSUBQ512load
-       OpAMD64VSUBPSMasked128load
-       OpAMD64VSUBPSMasked256load
-       OpAMD64VSUBPSMasked512load
-       OpAMD64VSUBPDMasked128load
-       OpAMD64VSUBPDMasked256load
-       OpAMD64VSUBPDMasked512load
        OpAMD64VPSUBDMasked128load
        OpAMD64VPSUBDMasked256load
        OpAMD64VPSUBDMasked512load
+       OpAMD64VPSUBQ512load
        OpAMD64VPSUBQMasked128load
        OpAMD64VPSUBQMasked256load
        OpAMD64VPSUBQMasked512load
+       OpAMD64VPUNPCKHDQ512load
+       OpAMD64VPUNPCKHQDQ512load
+       OpAMD64VPUNPCKLDQ512load
+       OpAMD64VPUNPCKLQDQ512load
        OpAMD64VPXORD512load
-       OpAMD64VPXORQ512load
        OpAMD64VPXORDMasked128load
        OpAMD64VPXORDMasked256load
        OpAMD64VPXORDMasked512load
+       OpAMD64VPXORQ512load
        OpAMD64VPXORQMasked128load
        OpAMD64VPXORQMasked256load
        OpAMD64VPXORQMasked512load
-       OpAMD64VPBLENDMDMasked512load
-       OpAMD64VPBLENDMQMasked512load
-       OpAMD64VRNDSCALEPS128load
-       OpAMD64VRNDSCALEPS256load
-       OpAMD64VRNDSCALEPS512load
-       OpAMD64VRNDSCALEPD128load
-       OpAMD64VRNDSCALEPD256load
-       OpAMD64VRNDSCALEPD512load
-       OpAMD64VRNDSCALEPSMasked128load
-       OpAMD64VRNDSCALEPSMasked256load
-       OpAMD64VRNDSCALEPSMasked512load
-       OpAMD64VRNDSCALEPDMasked128load
-       OpAMD64VRNDSCALEPDMasked256load
-       OpAMD64VRNDSCALEPDMasked512load
-       OpAMD64VREDUCEPS128load
-       OpAMD64VREDUCEPS256load
-       OpAMD64VREDUCEPS512load
-       OpAMD64VREDUCEPD128load
-       OpAMD64VREDUCEPD256load
-       OpAMD64VREDUCEPD512load
-       OpAMD64VREDUCEPSMasked128load
-       OpAMD64VREDUCEPSMasked256load
-       OpAMD64VREDUCEPSMasked512load
-       OpAMD64VREDUCEPDMasked128load
-       OpAMD64VREDUCEPDMasked256load
-       OpAMD64VREDUCEPDMasked512load
-       OpAMD64VCMPPS512load
+       OpAMD64VRCP14PD128load
+       OpAMD64VRCP14PD256load
+       OpAMD64VRCP14PD512load
+       OpAMD64VRCP14PDMasked128load
+       OpAMD64VRCP14PDMasked256load
+       OpAMD64VRCP14PDMasked512load
+       OpAMD64VRCP14PS512load
+       OpAMD64VRCP14PSMasked128load
+       OpAMD64VRCP14PSMasked256load
+       OpAMD64VRCP14PSMasked512load
+       OpAMD64VRSQRT14PD128load
+       OpAMD64VRSQRT14PD256load
+       OpAMD64VRSQRT14PD512load
+       OpAMD64VRSQRT14PDMasked128load
+       OpAMD64VRSQRT14PDMasked256load
+       OpAMD64VRSQRT14PDMasked512load
+       OpAMD64VRSQRT14PS512load
+       OpAMD64VRSQRT14PSMasked128load
+       OpAMD64VRSQRT14PSMasked256load
+       OpAMD64VRSQRT14PSMasked512load
+       OpAMD64VSCALEFPD128load
+       OpAMD64VSCALEFPD256load
+       OpAMD64VSCALEFPD512load
+       OpAMD64VSCALEFPDMasked128load
+       OpAMD64VSCALEFPDMasked256load
+       OpAMD64VSCALEFPDMasked512load
+       OpAMD64VSCALEFPS128load
+       OpAMD64VSCALEFPS256load
+       OpAMD64VSCALEFPS512load
+       OpAMD64VSCALEFPSMasked128load
+       OpAMD64VSCALEFPSMasked256load
+       OpAMD64VSCALEFPSMasked512load
+       OpAMD64VSQRTPD512load
+       OpAMD64VSQRTPDMasked128load
+       OpAMD64VSQRTPDMasked256load
+       OpAMD64VSQRTPDMasked512load
+       OpAMD64VSQRTPS512load
+       OpAMD64VSQRTPSMasked128load
+       OpAMD64VSQRTPSMasked256load
+       OpAMD64VSQRTPSMasked512load
+       OpAMD64VSUBPD512load
+       OpAMD64VSUBPDMasked128load
+       OpAMD64VSUBPDMasked256load
+       OpAMD64VSUBPDMasked512load
+       OpAMD64VSUBPS512load
+       OpAMD64VSUBPSMasked128load
+       OpAMD64VSUBPSMasked256load
+       OpAMD64VSUBPSMasked512load
        OpAMD64VCMPPD512load
-       OpAMD64VCMPPSMasked128load
-       OpAMD64VCMPPSMasked256load
-       OpAMD64VCMPPSMasked512load
        OpAMD64VCMPPDMasked128load
        OpAMD64VCMPPDMasked256load
        OpAMD64VCMPPDMasked512load
+       OpAMD64VCMPPS512load
+       OpAMD64VCMPPSMasked128load
+       OpAMD64VCMPPSMasked256load
+       OpAMD64VCMPPSMasked512load
+       OpAMD64VGF2P8AFFINEINVQB128load
+       OpAMD64VGF2P8AFFINEINVQB256load
+       OpAMD64VGF2P8AFFINEINVQB512load
+       OpAMD64VGF2P8AFFINEINVQBMasked128load
+       OpAMD64VGF2P8AFFINEINVQBMasked256load
+       OpAMD64VGF2P8AFFINEINVQBMasked512load
+       OpAMD64VGF2P8AFFINEQB128load
+       OpAMD64VGF2P8AFFINEQB256load
+       OpAMD64VGF2P8AFFINEQB512load
+       OpAMD64VGF2P8AFFINEQBMasked128load
+       OpAMD64VGF2P8AFFINEQBMasked256load
+       OpAMD64VGF2P8AFFINEQBMasked512load
+       OpAMD64VPCMPD512load
        OpAMD64VPCMPDMasked128load
        OpAMD64VPCMPDMasked256load
        OpAMD64VPCMPDMasked512load
+       OpAMD64VPCMPQ512load
        OpAMD64VPCMPQMasked128load
        OpAMD64VPCMPQMasked256load
        OpAMD64VPCMPQMasked512load
+       OpAMD64VPCMPUD512load
        OpAMD64VPCMPUDMasked128load
        OpAMD64VPCMPUDMasked256load
        OpAMD64VPCMPUDMasked512load
+       OpAMD64VPCMPUQ512load
        OpAMD64VPCMPUQMasked128load
        OpAMD64VPCMPUQMasked256load
        OpAMD64VPCMPUQMasked512load
-       OpAMD64VGF2P8AFFINEQB128load
-       OpAMD64VGF2P8AFFINEQB256load
-       OpAMD64VGF2P8AFFINEQB512load
-       OpAMD64VGF2P8AFFINEINVQB128load
-       OpAMD64VGF2P8AFFINEINVQB256load
-       OpAMD64VGF2P8AFFINEINVQB512load
-       OpAMD64VGF2P8AFFINEINVQBMasked128load
-       OpAMD64VGF2P8AFFINEINVQBMasked256load
-       OpAMD64VGF2P8AFFINEINVQBMasked512load
-       OpAMD64VGF2P8AFFINEQBMasked128load
-       OpAMD64VGF2P8AFFINEQBMasked256load
-       OpAMD64VGF2P8AFFINEQBMasked512load
-       OpAMD64VPCMPUD512load
-       OpAMD64VPCMPUQ512load
-       OpAMD64VPCMPD512load
-       OpAMD64VPCMPQ512load
-       OpAMD64VPSHUFD512load
-       OpAMD64VPSHUFDMasked256load
-       OpAMD64VPSHUFDMasked512load
-       OpAMD64VPSHUFDMasked128load
        OpAMD64VPROLD128load
        OpAMD64VPROLD256load
        OpAMD64VPROLD512load
-       OpAMD64VPROLQ128load
-       OpAMD64VPROLQ256load
-       OpAMD64VPROLQ512load
        OpAMD64VPROLDMasked128load
        OpAMD64VPROLDMasked256load
        OpAMD64VPROLDMasked512load
+       OpAMD64VPROLQ128load
+       OpAMD64VPROLQ256load
+       OpAMD64VPROLQ512load
        OpAMD64VPROLQMasked128load
        OpAMD64VPROLQMasked256load
        OpAMD64VPROLQMasked512load
        OpAMD64VPRORD128load
        OpAMD64VPRORD256load
        OpAMD64VPRORD512load
-       OpAMD64VPRORQ128load
-       OpAMD64VPRORQ256load
-       OpAMD64VPRORQ512load
        OpAMD64VPRORDMasked128load
        OpAMD64VPRORDMasked256load
        OpAMD64VPRORDMasked512load
+       OpAMD64VPRORQ128load
+       OpAMD64VPRORQ256load
+       OpAMD64VPRORQ512load
        OpAMD64VPRORQMasked128load
        OpAMD64VPRORQMasked256load
        OpAMD64VPRORQMasked512load
        OpAMD64VPSHLDD128load
        OpAMD64VPSHLDD256load
        OpAMD64VPSHLDD512load
-       OpAMD64VPSHLDQ128load
-       OpAMD64VPSHLDQ256load
-       OpAMD64VPSHLDQ512load
        OpAMD64VPSHLDDMasked128load
        OpAMD64VPSHLDDMasked256load
        OpAMD64VPSHLDDMasked512load
+       OpAMD64VPSHLDQ128load
+       OpAMD64VPSHLDQ256load
+       OpAMD64VPSHLDQ512load
        OpAMD64VPSHLDQMasked128load
        OpAMD64VPSHLDQMasked256load
        OpAMD64VPSHLDQMasked512load
        OpAMD64VPSHRDD128load
        OpAMD64VPSHRDD256load
        OpAMD64VPSHRDD512load
-       OpAMD64VPSHRDQ128load
-       OpAMD64VPSHRDQ256load
-       OpAMD64VPSHRDQ512load
        OpAMD64VPSHRDDMasked128load
        OpAMD64VPSHRDDMasked256load
        OpAMD64VPSHRDDMasked512load
+       OpAMD64VPSHRDQ128load
+       OpAMD64VPSHRDQ256load
+       OpAMD64VPSHRDQ512load
        OpAMD64VPSHRDQMasked128load
        OpAMD64VPSHRDQMasked256load
        OpAMD64VPSHRDQMasked512load
-       OpAMD64VSHUFPS512load
-       OpAMD64VSHUFPD512load
+       OpAMD64VPSHUFD512load
+       OpAMD64VPSHUFDMasked128load
+       OpAMD64VPSHUFDMasked256load
+       OpAMD64VPSHUFDMasked512load
        OpAMD64VPSLLD512constload
-       OpAMD64VPSLLQ512constload
        OpAMD64VPSLLDMasked128constload
        OpAMD64VPSLLDMasked256constload
        OpAMD64VPSLLDMasked512constload
+       OpAMD64VPSLLQ512constload
        OpAMD64VPSLLQMasked128constload
        OpAMD64VPSLLQMasked256constload
        OpAMD64VPSLLQMasked512constload
-       OpAMD64VPSRLD512constload
-       OpAMD64VPSRLQ512constload
        OpAMD64VPSRAD512constload
+       OpAMD64VPSRADMasked128constload
+       OpAMD64VPSRADMasked256constload
+       OpAMD64VPSRADMasked512constload
        OpAMD64VPSRAQ128constload
        OpAMD64VPSRAQ256constload
        OpAMD64VPSRAQ512constload
+       OpAMD64VPSRAQMasked128constload
+       OpAMD64VPSRAQMasked256constload
+       OpAMD64VPSRAQMasked512constload
+       OpAMD64VPSRLD512constload
        OpAMD64VPSRLDMasked128constload
        OpAMD64VPSRLDMasked256constload
        OpAMD64VPSRLDMasked512constload
+       OpAMD64VPSRLQ512constload
        OpAMD64VPSRLQMasked128constload
        OpAMD64VPSRLQMasked256constload
        OpAMD64VPSRLQMasked512constload
-       OpAMD64VPSRADMasked128constload
-       OpAMD64VPSRADMasked256constload
-       OpAMD64VPSRADMasked512constload
-       OpAMD64VPSRAQMasked128constload
-       OpAMD64VPSRAQMasked256constload
-       OpAMD64VPSRAQMasked512constload
        OpAMD64VPTERNLOGD128load
        OpAMD64VPTERNLOGD256load
        OpAMD64VPTERNLOGD512load
        OpAMD64VPTERNLOGQ128load
        OpAMD64VPTERNLOGQ256load
        OpAMD64VPTERNLOGQ512load
+       OpAMD64VREDUCEPD128load
+       OpAMD64VREDUCEPD256load
+       OpAMD64VREDUCEPD512load
+       OpAMD64VREDUCEPDMasked128load
+       OpAMD64VREDUCEPDMasked256load
+       OpAMD64VREDUCEPDMasked512load
+       OpAMD64VREDUCEPS128load
+       OpAMD64VREDUCEPS256load
+       OpAMD64VREDUCEPS512load
+       OpAMD64VREDUCEPSMasked128load
+       OpAMD64VREDUCEPSMasked256load
+       OpAMD64VREDUCEPSMasked512load
+       OpAMD64VRNDSCALEPD128load
+       OpAMD64VRNDSCALEPD256load
+       OpAMD64VRNDSCALEPD512load
+       OpAMD64VRNDSCALEPDMasked128load
+       OpAMD64VRNDSCALEPDMasked256load
+       OpAMD64VRNDSCALEPDMasked512load
+       OpAMD64VRNDSCALEPS128load
+       OpAMD64VRNDSCALEPS256load
+       OpAMD64VRNDSCALEPS512load
+       OpAMD64VRNDSCALEPSMasked128load
+       OpAMD64VRNDSCALEPSMasked256load
+       OpAMD64VRNDSCALEPSMasked512load
+       OpAMD64VSHUFPD512load
+       OpAMD64VSHUFPS512load
 
        OpARMADD
        OpARMADDconst
@@ -35489,345 +35489,9 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:   "VSCALEFPDMasked256",
-               argLen: 3,
-               asm:    x86.AVSCALEFPD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSCALEFPDMasked512",
-               argLen: 3,
-               asm:    x86.AVSCALEFPD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSCALEFPS128",
-               argLen: 2,
-               asm:    x86.AVSCALEFPS,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSCALEFPS256",
-               argLen: 2,
-               asm:    x86.AVSCALEFPS,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSCALEFPS512",
-               argLen: 2,
-               asm:    x86.AVSCALEFPS,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSCALEFPSMasked128",
-               argLen: 3,
-               asm:    x86.AVSCALEFPS,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSCALEFPSMasked256",
-               argLen: 3,
-               asm:    x86.AVSCALEFPS,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSCALEFPSMasked512",
-               argLen: 3,
-               asm:    x86.AVSCALEFPS,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSQRTPD128",
-               argLen: 1,
-               asm:    x86.AVSQRTPD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:   "VSQRTPD256",
-               argLen: 1,
-               asm:    x86.AVSQRTPD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:   "VSQRTPD512",
-               argLen: 1,
-               asm:    x86.AVSQRTPD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSQRTPDMasked128",
-               argLen: 2,
-               asm:    x86.AVSQRTPD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSQRTPDMasked256",
-               argLen: 2,
-               asm:    x86.AVSQRTPD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSQRTPDMasked512",
-               argLen: 2,
-               asm:    x86.AVSQRTPD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSQRTPS128",
-               argLen: 1,
-               asm:    x86.AVSQRTPS,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:   "VSQRTPS256",
-               argLen: 1,
-               asm:    x86.AVSQRTPS,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:   "VSQRTPS512",
-               argLen: 1,
-               asm:    x86.AVSQRTPS,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSQRTPSMasked128",
-               argLen: 2,
-               asm:    x86.AVSQRTPS,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSQRTPSMasked256",
-               argLen: 2,
-               asm:    x86.AVSQRTPS,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSQRTPSMasked512",
-               argLen: 2,
-               asm:    x86.AVSQRTPS,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSUBPD128",
-               argLen: 2,
-               asm:    x86.AVSUBPD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:   "VSUBPD256",
-               argLen: 2,
-               asm:    x86.AVSUBPD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:   "VSUBPD512",
-               argLen: 2,
-               asm:    x86.AVSUBPD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSUBPDMasked128",
-               argLen: 3,
-               asm:    x86.AVSUBPD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:   "VSUBPDMasked256",
+               name:   "VSCALEFPDMasked256",
                argLen: 3,
-               asm:    x86.AVSUBPD,
+               asm:    x86.AVSCALEFPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -35840,9 +35504,9 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:   "VSUBPDMasked512",
+               name:   "VSCALEFPDMasked512",
                argLen: 3,
-               asm:    x86.AVSUBPD,
+               asm:    x86.AVSCALEFPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -35855,37 +35519,37 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:   "VSUBPS128",
+               name:   "VSCALEFPS128",
                argLen: 2,
-               asm:    x86.AVSUBPS,
+               asm:    x86.AVSCALEFPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:   "VSUBPS256",
+               name:   "VSCALEFPS256",
                argLen: 2,
-               asm:    x86.AVSUBPS,
+               asm:    x86.AVSCALEFPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:   "VSUBPS512",
+               name:   "VSCALEFPS512",
                argLen: 2,
-               asm:    x86.AVSUBPS,
+               asm:    x86.AVSCALEFPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -35897,9 +35561,9 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:   "VSUBPSMasked128",
+               name:   "VSCALEFPSMasked128",
                argLen: 3,
-               asm:    x86.AVSUBPS,
+               asm:    x86.AVSCALEFPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -35912,9 +35576,9 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:   "VSUBPSMasked256",
+               name:   "VSCALEFPSMasked256",
                argLen: 3,
-               asm:    x86.AVSUBPS,
+               asm:    x86.AVSCALEFPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -35927,9 +35591,9 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:   "VSUBPSMasked512",
+               name:   "VSCALEFPSMasked512",
                argLen: 3,
-               asm:    x86.AVSUBPS,
+               asm:    x86.AVSCALEFPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -35942,10 +35606,9 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VAESKEYGENASSIST128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVAESKEYGENASSIST,
+               name:   "VSQRTPD128",
+               argLen: 1,
+               asm:    x86.AVSQRTPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
@@ -35956,10 +35619,9 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VROUNDPS128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVROUNDPS,
+               name:   "VSQRTPD256",
+               argLen: 1,
+               asm:    x86.AVSQRTPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
@@ -35970,55 +35632,54 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VROUNDPS256",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVROUNDPS,
+               name:   "VSQRTPD512",
+               argLen: 1,
+               asm:    x86.AVSQRTPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VROUNDPD128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVROUNDPD,
+               name:   "VSQRTPDMasked128",
+               argLen: 2,
+               asm:    x86.AVSQRTPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VROUNDPD256",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVROUNDPD,
+               name:   "VSQRTPDMasked256",
+               argLen: 2,
+               asm:    x86.AVSQRTPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VRNDSCALEPS128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVRNDSCALEPS,
+               name:   "VSQRTPDMasked512",
+               argLen: 2,
+               asm:    x86.AVSQRTPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36026,38 +35687,35 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VRNDSCALEPS256",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVRNDSCALEPS,
+               name:   "VSQRTPS128",
+               argLen: 1,
+               asm:    x86.AVSQRTPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VRNDSCALEPS512",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVRNDSCALEPS,
+               name:   "VSQRTPS256",
+               argLen: 1,
+               asm:    x86.AVSQRTPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VRNDSCALEPD128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVRNDSCALEPD,
+               name:   "VSQRTPS512",
+               argLen: 1,
+               asm:    x86.AVSQRTPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36068,13 +35726,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VRNDSCALEPD256",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVRNDSCALEPD,
+               name:   "VSQRTPSMasked128",
+               argLen: 2,
+               asm:    x86.AVSQRTPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36082,13 +35740,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VRNDSCALEPD512",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVRNDSCALEPD,
+               name:   "VSQRTPSMasked256",
+               argLen: 2,
+               asm:    x86.AVSQRTPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36096,10 +35754,9 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VRNDSCALEPSMasked128",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVRNDSCALEPS,
+               name:   "VSQRTPSMasked512",
+               argLen: 2,
+               asm:    x86.AVSQRTPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36111,44 +35768,41 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VRNDSCALEPSMasked256",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVRNDSCALEPS,
+               name:   "VSUBPD128",
+               argLen: 2,
+               asm:    x86.AVSUBPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VRNDSCALEPSMasked512",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVRNDSCALEPS,
+               name:   "VSUBPD256",
+               argLen: 2,
+               asm:    x86.AVSUBPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VRNDSCALEPDMasked128",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVRNDSCALEPD,
+               name:   "VSUBPD512",
+               argLen: 2,
+               asm:    x86.AVSUBPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36156,14 +35810,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VRNDSCALEPDMasked256",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVRNDSCALEPD,
+               name:   "VSUBPDMasked128",
+               argLen: 3,
+               asm:    x86.AVSUBPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36171,14 +35825,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VRNDSCALEPDMasked512",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVRNDSCALEPD,
+               name:   "VSUBPDMasked256",
+               argLen: 3,
+               asm:    x86.AVSUBPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36186,13 +35840,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VREDUCEPS128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVREDUCEPS,
+               name:   "VSUBPDMasked512",
+               argLen: 3,
+               asm:    x86.AVSUBPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36200,41 +35855,41 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VREDUCEPS256",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVREDUCEPS,
+               name:   "VSUBPS128",
+               argLen: 2,
+               asm:    x86.AVSUBPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VREDUCEPS512",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVREDUCEPS,
+               name:   "VSUBPS256",
+               argLen: 2,
+               asm:    x86.AVSUBPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VREDUCEPD128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVREDUCEPD,
+               name:   "VSUBPS512",
+               argLen: 2,
+               asm:    x86.AVSUBPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36242,13 +35897,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VREDUCEPD256",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVREDUCEPD,
+               name:   "VSUBPSMasked128",
+               argLen: 3,
+               asm:    x86.AVSUBPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36256,13 +35912,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VREDUCEPD512",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVREDUCEPD,
+               name:   "VSUBPSMasked256",
+               argLen: 3,
+               asm:    x86.AVSUBPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36270,14 +35927,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VREDUCEPSMasked128",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVREDUCEPS,
+               name:   "VSUBPSMasked512",
+               argLen: 3,
+               asm:    x86.AVSUBPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36285,122 +35942,128 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VREDUCEPSMasked256",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVREDUCEPS,
+               name:         "SHA1RNDS4128",
+               auxType:      auxUInt8,
+               argLen:       2,
+               resultInArg0: true,
+               asm:          x86.ASHA1RNDS4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VREDUCEPSMasked512",
+               name:    "VAESKEYGENASSIST128",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVREDUCEPS,
+               argLen:  1,
+               asm:     x86.AVAESKEYGENASSIST,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VREDUCEPDMasked128",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVREDUCEPD,
+               name:        "VCMPPD128",
+               auxType:     auxUInt8,
+               argLen:      2,
+               commutative: true,
+               asm:         x86.AVCMPPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VREDUCEPDMasked256",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVREDUCEPD,
+               name:        "VCMPPD256",
+               auxType:     auxUInt8,
+               argLen:      2,
+               commutative: true,
+               asm:         x86.AVCMPPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VREDUCEPDMasked512",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVREDUCEPD,
+               name:        "VCMPPD512",
+               auxType:     auxUInt8,
+               argLen:      2,
+               commutative: true,
+               asm:         x86.AVCMPPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:        "VCMPPS128",
+               name:        "VCMPPDMasked128",
                auxType:     auxUInt8,
-               argLen:      2,
+               argLen:      3,
                commutative: true,
-               asm:         x86.AVCMPPS,
+               asm:         x86.AVCMPPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:        "VCMPPS256",
+               name:        "VCMPPDMasked256",
                auxType:     auxUInt8,
-               argLen:      2,
+               argLen:      3,
                commutative: true,
-               asm:         x86.AVCMPPS,
+               asm:         x86.AVCMPPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:        "VCMPPS512",
+               name:        "VCMPPDMasked512",
                auxType:     auxUInt8,
-               argLen:      2,
+               argLen:      3,
                commutative: true,
-               asm:         x86.AVCMPPS,
+               asm:         x86.AVCMPPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36408,11 +36071,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VCMPPD128",
+               name:        "VCMPPS128",
                auxType:     auxUInt8,
                argLen:      2,
                commutative: true,
-               asm:         x86.AVCMPPD,
+               asm:         x86.AVCMPPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -36424,11 +36087,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VCMPPD256",
+               name:        "VCMPPS256",
                auxType:     auxUInt8,
                argLen:      2,
                commutative: true,
-               asm:         x86.AVCMPPD,
+               asm:         x86.AVCMPPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -36440,11 +36103,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VCMPPD512",
+               name:        "VCMPPS512",
                auxType:     auxUInt8,
                argLen:      2,
                commutative: true,
-               asm:         x86.AVCMPPD,
+               asm:         x86.AVCMPPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -36507,45 +36170,111 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VCMPPDMasked128",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVCMPPD,
+               name:    "VEXTRACTF64X4256",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVEXTRACTF64X4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VCMPPDMasked256",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVCMPPD,
+               name:    "VEXTRACTF128128",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVEXTRACTF128,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:    "VEXTRACTI64X4256",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVEXTRACTI64X4,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:    "VEXTRACTI128128",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVEXTRACTI128,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:    "VGF2P8AFFINEINVQB128",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVGF2P8AFFINEINVQB,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:    "VGF2P8AFFINEINVQB256",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVGF2P8AFFINEINVQB,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:    "VGF2P8AFFINEINVQB512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVGF2P8AFFINEINVQB,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VCMPPDMasked512",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVCMPPD,
+               name:    "VGF2P8AFFINEINVQBMasked128",
+               auxType: auxUInt8,
+               argLen:  3,
+               asm:     x86.AVGF2P8AFFINEINVQB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36553,16 +36282,15 @@ var opcodeTable = [...]opInfo{
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VPCMPBMasked128",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPB,
+               name:    "VGF2P8AFFINEINVQBMasked256",
+               auxType: auxUInt8,
+               argLen:  3,
+               asm:     x86.AVGF2P8AFFINEINVQB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36570,16 +36298,15 @@ var opcodeTable = [...]opInfo{
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VPCMPBMasked256",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPB,
+               name:    "VGF2P8AFFINEINVQBMasked512",
+               auxType: auxUInt8,
+               argLen:  3,
+               asm:     x86.AVGF2P8AFFINEINVQB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36587,67 +36314,60 @@ var opcodeTable = [...]opInfo{
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VPCMPBMasked512",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPB,
+               name:    "VGF2P8AFFINEQB128",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVGF2P8AFFINEQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VPCMPWMasked128",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPW,
+               name:    "VGF2P8AFFINEQB256",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVGF2P8AFFINEQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VPCMPWMasked256",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPW,
+               name:    "VGF2P8AFFINEQB512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVGF2P8AFFINEQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VPCMPWMasked512",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPW,
+               name:    "VGF2P8AFFINEQBMasked128",
+               auxType: auxUInt8,
+               argLen:  3,
+               asm:     x86.AVGF2P8AFFINEQB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36655,16 +36375,15 @@ var opcodeTable = [...]opInfo{
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VPCMPDMasked128",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPD,
+               name:    "VGF2P8AFFINEQBMasked256",
+               auxType: auxUInt8,
+               argLen:  3,
+               asm:     x86.AVGF2P8AFFINEQB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36672,16 +36391,15 @@ var opcodeTable = [...]opInfo{
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VPCMPDMasked256",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPD,
+               name:    "VGF2P8AFFINEQBMasked512",
+               auxType: auxUInt8,
+               argLen:  3,
+               asm:     x86.AVGF2P8AFFINEQB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36689,89 +36407,79 @@ var opcodeTable = [...]opInfo{
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VPCMPDMasked512",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPD,
+               name:    "VINSERTF64X4512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVINSERTF64X4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VPCMPQMasked128",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPQ,
+               name:    "VINSERTF128256",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVINSERTF128,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:        "VPCMPQMasked256",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPQ,
+               name:    "VINSERTI64X4512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVINSERTI64X4,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:        "VPCMPQMasked512",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPQ,
+               name:    "VINSERTI128256",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVINSERTI128,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:        "VPCMPUBMasked128",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPUB,
+               name:    "VPCMPB512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVPCMPB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36779,11 +36487,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VPCMPUBMasked256",
+               name:        "VPCMPBMasked128",
                auxType:     auxUInt8,
                argLen:      3,
                commutative: true,
-               asm:         x86.AVPCMPUB,
+               asm:         x86.AVPCMPB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36796,11 +36504,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VPCMPUBMasked512",
+               name:        "VPCMPBMasked256",
                auxType:     auxUInt8,
                argLen:      3,
                commutative: true,
-               asm:         x86.AVPCMPUB,
+               asm:         x86.AVPCMPB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36813,11 +36521,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VPCMPUWMasked128",
+               name:        "VPCMPBMasked512",
                auxType:     auxUInt8,
                argLen:      3,
                commutative: true,
-               asm:         x86.AVPCMPUW,
+               asm:         x86.AVPCMPB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36830,16 +36538,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VPCMPUWMasked256",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPUW,
+               name:    "VPCMPD512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVPCMPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36847,11 +36553,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VPCMPUWMasked512",
+               name:        "VPCMPDMasked128",
                auxType:     auxUInt8,
                argLen:      3,
                commutative: true,
-               asm:         x86.AVPCMPUW,
+               asm:         x86.AVPCMPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36864,11 +36570,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VPCMPUDMasked128",
+               name:        "VPCMPDMasked256",
                auxType:     auxUInt8,
                argLen:      3,
                commutative: true,
-               asm:         x86.AVPCMPUD,
+               asm:         x86.AVPCMPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36881,11 +36587,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VPCMPUDMasked256",
+               name:        "VPCMPDMasked512",
                auxType:     auxUInt8,
                argLen:      3,
                commutative: true,
-               asm:         x86.AVPCMPUD,
+               asm:         x86.AVPCMPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36898,16 +36604,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VPCMPUDMasked512",
-               auxType:     auxUInt8,
-               argLen:      3,
-               commutative: true,
-               asm:         x86.AVPCMPUD,
+               name:    "VPCMPQ512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVPCMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36915,11 +36619,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VPCMPUQMasked128",
+               name:        "VPCMPQMasked128",
                auxType:     auxUInt8,
                argLen:      3,
                commutative: true,
-               asm:         x86.AVPCMPUQ,
+               asm:         x86.AVPCMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36932,11 +36636,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VPCMPUQMasked256",
+               name:        "VPCMPQMasked256",
                auxType:     auxUInt8,
                argLen:      3,
                commutative: true,
-               asm:         x86.AVPCMPUQ,
+               asm:         x86.AVPCMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36949,11 +36653,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:        "VPCMPUQMasked512",
+               name:        "VPCMPQMasked512",
                auxType:     auxUInt8,
                argLen:      3,
                commutative: true,
-               asm:         x86.AVPCMPUQ,
+               asm:         x86.AVPCMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -36966,100 +36670,26 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VGF2P8AFFINEQB128",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVGF2P8AFFINEQB,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:    "VGF2P8AFFINEQB256",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVGF2P8AFFINEQB,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:    "VGF2P8AFFINEQB512",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVGF2P8AFFINEQB,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:    "VGF2P8AFFINEINVQB128",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVGF2P8AFFINEINVQB,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:    "VGF2P8AFFINEINVQB256",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVGF2P8AFFINEINVQB,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:    "VGF2P8AFFINEINVQB512",
+               name:    "VPCMPUB512",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVGF2P8AFFINEINVQB,
+               asm:     x86.AVPCMPUB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:    "VGF2P8AFFINEINVQBMasked128",
-               auxType: auxUInt8,
-               argLen:  3,
-               asm:     x86.AVGF2P8AFFINEINVQB,
+               name:        "VPCMPUBMasked128",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPUB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -37067,15 +36697,16 @@ var opcodeTable = [...]opInfo{
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:    "VGF2P8AFFINEINVQBMasked256",
-               auxType: auxUInt8,
-               argLen:  3,
-               asm:     x86.AVGF2P8AFFINEINVQB,
+               name:        "VPCMPUBMasked256",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPUB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -37083,15 +36714,16 @@ var opcodeTable = [...]opInfo{
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:    "VGF2P8AFFINEINVQBMasked512",
-               auxType: auxUInt8,
-               argLen:  3,
-               asm:     x86.AVGF2P8AFFINEINVQB,
+               name:        "VPCMPUBMasked512",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPUB,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -37099,31 +36731,31 @@ var opcodeTable = [...]opInfo{
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:    "VGF2P8AFFINEQBMasked128",
+               name:    "VPCMPUD512",
                auxType: auxUInt8,
-               argLen:  3,
-               asm:     x86.AVGF2P8AFFINEQB,
+               argLen:  2,
+               asm:     x86.AVPCMPUD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:    "VGF2P8AFFINEQBMasked256",
-               auxType: auxUInt8,
-               argLen:  3,
-               asm:     x86.AVGF2P8AFFINEQB,
+               name:        "VPCMPUDMasked128",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPUD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -37131,15 +36763,16 @@ var opcodeTable = [...]opInfo{
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:    "VGF2P8AFFINEQBMasked512",
-               auxType: auxUInt8,
-               argLen:  3,
-               asm:     x86.AVGF2P8AFFINEQB,
+               name:        "VPCMPUDMasked256",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPUD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -37147,131 +36780,87 @@ var opcodeTable = [...]opInfo{
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:    "VPEXTRD128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPEXTRD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-                       outputs: []outputInfo{
-                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                       },
-               },
-       },
-       {
-               name:    "VPEXTRQ128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPEXTRQ,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-                       outputs: []outputInfo{
-                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                       },
-               },
-       },
-       {
-               name:    "VPEXTRB128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPEXTRB,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                       },
-               },
-       },
-       {
-               name:    "VPEXTRW128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPEXTRW,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:    "VEXTRACTF128128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVEXTRACTF128,
+               name:        "VPCMPUDMasked512",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPUD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:    "VEXTRACTF64X4256",
+               name:    "VPCMPUQ512",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVEXTRACTF64X4,
+               argLen:  2,
+               asm:     x86.AVPCMPUQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:    "VEXTRACTI128128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVEXTRACTI128,
+               name:        "VPCMPUQMasked128",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPUQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:    "VEXTRACTI64X4256",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVEXTRACTI64X4,
+               name:        "VPCMPUQMasked256",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPUQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:    "VPCMPUB512",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPCMPUB,
+               name:        "VPCMPUQMasked512",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPUQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -37294,14 +36883,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPCMPUD512",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPCMPUD,
+               name:        "VPCMPUWMasked128",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPUW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -37309,14 +36900,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPCMPUQ512",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPCMPUQ,
+               name:        "VPCMPUWMasked256",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPUW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -37324,14 +36917,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPCMPB512",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPCMPB,
+               name:        "VPCMPUWMasked512",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPUW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -37354,14 +36949,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPCMPD512",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPCMPD,
+               name:        "VPCMPWMasked128",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -37369,14 +36966,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPCMPQ512",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPCMPQ,
+               name:        "VPCMPWMasked256",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -37384,176 +36983,165 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHUFD128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPSHUFD,
+               name:        "VPCMPWMasked512",
+               auxType:     auxUInt8,
+               argLen:      3,
+               commutative: true,
+               asm:         x86.AVPCMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:    "VPSHUFD256",
+               name:    "VPERM2F128256",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPSHUFD,
+               argLen:  2,
+               asm:     x86.AVPERM2F128,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:    "VPSHUFD512",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPSHUFD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSHUFDMasked256",
+               name:    "VPERM2I128256",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSHUFD,
+               asm:     x86.AVPERM2I128,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSHUFDMasked512",
+               name:    "VPEXTRB128",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPSHUFD,
+               argLen:  1,
+               asm:     x86.AVPEXTRB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
        {
-               name:    "VPSHUFHW128",
+               name:    "VPEXTRD128",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSHUFHW,
+               asm:     x86.AVPEXTRD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
        {
-               name:    "VPSHUFHW256",
+               name:    "VPEXTRQ128",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSHUFHW,
+               asm:     x86.AVPEXTRQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
        {
-               name:    "VPSHUFHW512",
+               name:    "VPEXTRW128",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSHUFHW,
+               asm:     x86.AVPEXTRW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 49135}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
                        },
                },
        },
        {
-               name:    "VPSHUFHWMasked256",
+               name:    "VPINSRB128",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSHUFHW,
+               asm:     x86.AVPINSRB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSHUFHWMasked512",
+               name:    "VPINSRD128",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSHUFHW,
+               asm:     x86.AVPINSRD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSHUFHWMasked128",
+               name:    "VPINSRQ128",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSHUFHW,
+               asm:     x86.AVPINSRQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSHUFDMasked128",
+               name:    "VPINSRW128",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSHUFD,
+               asm:     x86.AVPINSRW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
@@ -37600,13 +37188,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPROLQ128",
+               name:    "VPROLDMasked128",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPROLQ,
+               argLen:  2,
+               asm:     x86.AVPROLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -37614,13 +37203,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPROLQ256",
+               name:    "VPROLDMasked256",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPROLQ,
+               argLen:  2,
+               asm:     x86.AVPROLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -37628,13 +37218,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPROLQ512",
+               name:    "VPROLDMasked512",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPROLQ,
+               argLen:  2,
+               asm:     x86.AVPROLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -37642,14 +37233,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPROLDMasked128",
+               name:    "VPROLQ128",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPROLD,
+               argLen:  1,
+               asm:     x86.AVPROLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -37657,14 +37247,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPROLDMasked256",
+               name:    "VPROLQ256",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPROLD,
+               argLen:  1,
+               asm:     x86.AVPROLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -37672,14 +37261,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPROLDMasked512",
+               name:    "VPROLQ512",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPROLD,
+               argLen:  1,
+               asm:     x86.AVPROLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -37773,48 +37361,6 @@ var opcodeTable = [...]opInfo{
                        },
                },
        },
-       {
-               name:    "VPRORQ128",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPRORQ,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:    "VPRORQ256",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPRORQ,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:    "VPRORQ512",
-               auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPRORQ,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
        {
                name:    "VPRORDMasked128",
                auxType: auxUInt8,
@@ -37861,14 +37407,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPRORQMasked128",
+               name:    "VPRORQ128",
                auxType: auxUInt8,
-               argLen:  2,
+               argLen:  1,
                asm:     x86.AVPRORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -37876,14 +37421,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPRORQMasked256",
+               name:    "VPRORQ256",
                auxType: auxUInt8,
-               argLen:  2,
+               argLen:  1,
                asm:     x86.AVPRORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -37891,14 +37435,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPRORQMasked512",
+               name:    "VPRORQ512",
                auxType: auxUInt8,
-               argLen:  2,
+               argLen:  1,
                asm:     x86.AVPRORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -37906,135 +37449,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "SHA1RNDS4128",
-               auxType:      auxUInt8,
-               argLen:       2,
-               resultInArg0: true,
-               asm:          x86.ASHA1RNDS4,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:    "VPERM2F128256",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPERM2F128,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:    "VPERM2I128256",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPERM2I128,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:    "VPINSRD128",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPINSRD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:    "VPINSRQ128",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPINSRQ,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:    "VPINSRB128",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPINSRB,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:    "VPINSRW128",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPINSRW,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {1, 49135},      // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R15
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:    "VINSERTF128256",
-               auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVINSERTF128,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
-                       },
-                       outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                       },
-               },
-       },
-       {
-               name:    "VINSERTF64X4512",
+               name:    "VPRORQMasked128",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVINSERTF64X4,
+               asm:     x86.AVPRORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38042,29 +37464,29 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VINSERTI128256",
+               name:    "VPRORQMasked256",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVINSERTI128,
+               asm:     x86.AVPRORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VINSERTI64X4512",
+               name:    "VPRORQMasked512",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVINSERTI64X4,
+               asm:     x86.AVPRORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38072,10 +37494,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDW128",
+               name:    "VPSHLDD128",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSHLDW,
+               asm:     x86.AVPSHLDD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38087,10 +37509,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDW256",
+               name:    "VPSHLDD256",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSHLDW,
+               asm:     x86.AVPSHLDD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38102,10 +37524,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDW512",
+               name:    "VPSHLDD512",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSHLDW,
+               asm:     x86.AVPSHLDD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38117,14 +37539,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDD128",
+               name:    "VPSHLDDMasked128",
                auxType: auxUInt8,
-               argLen:  2,
+               argLen:  3,
                asm:     x86.AVPSHLDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38132,14 +37555,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDD256",
+               name:    "VPSHLDDMasked256",
                auxType: auxUInt8,
-               argLen:  2,
+               argLen:  3,
                asm:     x86.AVPSHLDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38147,14 +37571,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDD512",
+               name:    "VPSHLDDMasked512",
                auxType: auxUInt8,
-               argLen:  2,
+               argLen:  3,
                asm:     x86.AVPSHLDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38207,10 +37632,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDWMasked128",
+               name:    "VPSHLDQMasked128",
                auxType: auxUInt8,
                argLen:  3,
-               asm:     x86.AVPSHLDW,
+               asm:     x86.AVPSHLDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38223,10 +37648,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDWMasked256",
+               name:    "VPSHLDQMasked256",
                auxType: auxUInt8,
                argLen:  3,
-               asm:     x86.AVPSHLDW,
+               asm:     x86.AVPSHLDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38239,10 +37664,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDWMasked512",
+               name:    "VPSHLDQMasked512",
                auxType: auxUInt8,
                argLen:  3,
-               asm:     x86.AVPSHLDW,
+               asm:     x86.AVPSHLDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38255,15 +37680,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDDMasked128",
+               name:    "VPSHLDW128",
                auxType: auxUInt8,
-               argLen:  3,
-               asm:     x86.AVPSHLDD,
+               argLen:  2,
+               asm:     x86.AVPSHLDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38271,15 +37695,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDDMasked256",
+               name:    "VPSHLDW256",
                auxType: auxUInt8,
-               argLen:  3,
-               asm:     x86.AVPSHLDD,
+               argLen:  2,
+               asm:     x86.AVPSHLDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38287,15 +37710,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDDMasked512",
+               name:    "VPSHLDW512",
                auxType: auxUInt8,
-               argLen:  3,
-               asm:     x86.AVPSHLDD,
+               argLen:  2,
+               asm:     x86.AVPSHLDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38303,10 +37725,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDQMasked128",
+               name:    "VPSHLDWMasked128",
                auxType: auxUInt8,
                argLen:  3,
-               asm:     x86.AVPSHLDQ,
+               asm:     x86.AVPSHLDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38319,10 +37741,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDQMasked256",
+               name:    "VPSHLDWMasked256",
                auxType: auxUInt8,
                argLen:  3,
-               asm:     x86.AVPSHLDQ,
+               asm:     x86.AVPSHLDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38335,10 +37757,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHLDQMasked512",
+               name:    "VPSHLDWMasked512",
                auxType: auxUInt8,
                argLen:  3,
-               asm:     x86.AVPSHLDQ,
+               asm:     x86.AVPSHLDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38351,10 +37773,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDW128",
+               name:    "VPSHRDD128",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSHRDW,
+               asm:     x86.AVPSHRDD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38366,10 +37788,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDW256",
+               name:    "VPSHRDD256",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSHRDW,
+               asm:     x86.AVPSHRDD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38381,10 +37803,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDW512",
+               name:    "VPSHRDD512",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSHRDW,
+               asm:     x86.AVPSHRDD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38396,14 +37818,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDD128",
+               name:    "VPSHRDDMasked128",
                auxType: auxUInt8,
-               argLen:  2,
+               argLen:  3,
                asm:     x86.AVPSHRDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38411,14 +37834,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDD256",
+               name:    "VPSHRDDMasked256",
                auxType: auxUInt8,
-               argLen:  2,
+               argLen:  3,
                asm:     x86.AVPSHRDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38426,14 +37850,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDD512",
+               name:    "VPSHRDDMasked512",
                auxType: auxUInt8,
-               argLen:  2,
+               argLen:  3,
                asm:     x86.AVPSHRDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38486,10 +37911,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDWMasked128",
+               name:    "VPSHRDQMasked128",
                auxType: auxUInt8,
                argLen:  3,
-               asm:     x86.AVPSHRDW,
+               asm:     x86.AVPSHRDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38502,10 +37927,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDWMasked256",
+               name:    "VPSHRDQMasked256",
                auxType: auxUInt8,
                argLen:  3,
-               asm:     x86.AVPSHRDW,
+               asm:     x86.AVPSHRDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38518,10 +37943,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDWMasked512",
+               name:    "VPSHRDQMasked512",
                auxType: auxUInt8,
                argLen:  3,
-               asm:     x86.AVPSHRDW,
+               asm:     x86.AVPSHRDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38534,15 +37959,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDDMasked128",
+               name:    "VPSHRDW128",
                auxType: auxUInt8,
-               argLen:  3,
-               asm:     x86.AVPSHRDD,
+               argLen:  2,
+               asm:     x86.AVPSHRDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38550,15 +37974,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDDMasked256",
+               name:    "VPSHRDW256",
                auxType: auxUInt8,
-               argLen:  3,
-               asm:     x86.AVPSHRDD,
+               argLen:  2,
+               asm:     x86.AVPSHRDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38566,15 +37989,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDDMasked512",
+               name:    "VPSHRDW512",
                auxType: auxUInt8,
-               argLen:  3,
-               asm:     x86.AVPSHRDD,
+               argLen:  2,
+               asm:     x86.AVPSHRDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38582,10 +38004,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDQMasked128",
+               name:    "VPSHRDWMasked128",
                auxType: auxUInt8,
                argLen:  3,
-               asm:     x86.AVPSHRDQ,
+               asm:     x86.AVPSHRDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38598,10 +38020,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDQMasked256",
+               name:    "VPSHRDWMasked256",
                auxType: auxUInt8,
                argLen:  3,
-               asm:     x86.AVPSHRDQ,
+               asm:     x86.AVPSHRDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38614,10 +38036,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSHRDQMasked512",
+               name:    "VPSHRDWMasked512",
                auxType: auxUInt8,
                argLen:  3,
-               asm:     x86.AVPSHRDQ,
+               asm:     x86.AVPSHRDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38630,14 +38052,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VSHUFPS128",
+               name:    "VPSHUFD128",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVSHUFPS,
+               argLen:  1,
+               asm:     x86.AVPSHUFD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -38645,14 +38066,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VSHUFPD128",
+               name:    "VPSHUFD256",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVSHUFPD,
+               argLen:  1,
+               asm:     x86.AVPSHUFD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
                                {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
@@ -38660,29 +38080,28 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VSHUFPS256",
+               name:    "VPSHUFD512",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVSHUFPS,
+               argLen:  1,
+               asm:     x86.AVPSHUFD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VSHUFPS512",
+               name:    "VPSHUFDMasked128",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVSHUFPS,
+               asm:     x86.AVPSHUFD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38690,29 +38109,29 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VSHUFPD256",
+               name:    "VPSHUFDMasked256",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVSHUFPD,
+               asm:     x86.AVPSHUFD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
-                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VSHUFPD512",
+               name:    "VPSHUFDMasked512",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVSHUFPD,
+               asm:     x86.AVPSHUFD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38720,24 +38139,24 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSLLW128const",
+               name:    "VPSHUFHW128",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSLLW,
+               asm:     x86.AVPSHUFHW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VPSLLW256const",
+               name:    "VPSHUFHW256",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSLLW,
+               asm:     x86.AVPSHUFHW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
@@ -38748,10 +38167,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSLLW512const",
+               name:    "VPSHUFHW512",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSLLW,
+               asm:     x86.AVPSHUFHW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38761,6 +38180,51 @@ var opcodeTable = [...]opInfo{
                        },
                },
        },
+       {
+               name:    "VPSHUFHWMasked128",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVPSHUFHW,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:    "VPSHUFHWMasked256",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVPSHUFHW,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:    "VPSHUFHWMasked512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVPSHUFHW,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
        {
                name:    "VPSLLD128const",
                auxType: auxUInt8,
@@ -38803,6 +38267,51 @@ var opcodeTable = [...]opInfo{
                        },
                },
        },
+       {
+               name:    "VPSLLDMasked128const",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVPSLLD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:    "VPSLLDMasked256const",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVPSLLD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:    "VPSLLDMasked512const",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVPSLLD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
        {
                name:    "VPSLLQ128const",
                auxType: auxUInt8,
@@ -38846,10 +38355,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSLLWMasked128const",
+               name:    "VPSLLQMasked128const",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSLLW,
+               asm:     x86.AVPSLLQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38861,10 +38370,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSLLWMasked256const",
+               name:    "VPSLLQMasked256const",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSLLW,
+               asm:     x86.AVPSLLQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38876,10 +38385,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSLLWMasked512const",
+               name:    "VPSLLQMasked512const",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSLLW,
+               asm:     x86.AVPSLLQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38891,44 +38400,41 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSLLDMasked128const",
+               name:    "VPSLLW128const",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPSLLD,
+               argLen:  1,
+               asm:     x86.AVPSLLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSLLDMasked256const",
+               name:    "VPSLLW256const",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPSLLD,
+               argLen:  1,
+               asm:     x86.AVPSLLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSLLDMasked512const",
+               name:    "VPSLLW512const",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPSLLD,
+               argLen:  1,
+               asm:     x86.AVPSLLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -38936,10 +38442,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSLLQMasked128const",
+               name:    "VPSLLWMasked128const",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSLLQ,
+               asm:     x86.AVPSLLW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38951,10 +38457,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSLLQMasked256const",
+               name:    "VPSLLWMasked256const",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSLLQ,
+               asm:     x86.AVPSLLW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38966,10 +38472,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSLLQMasked512const",
+               name:    "VPSLLWMasked512const",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSLLQ,
+               asm:     x86.AVPSLLW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -38981,10 +38487,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRLW128const",
+               name:    "VPSRAD128const",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSRLW,
+               asm:     x86.AVPSRAD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
@@ -38995,10 +38501,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRLW256const",
+               name:    "VPSRAD256const",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSRLW,
+               asm:     x86.AVPSRAD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
@@ -39009,10 +38515,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRLW512const",
+               name:    "VPSRAD512const",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSRLW,
+               asm:     x86.AVPSRAD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39023,41 +38529,44 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRLD128const",
+               name:    "VPSRADMasked128const",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPSRLD,
+               argLen:  2,
+               asm:     x86.AVPSRAD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VPSRLD256const",
+               name:    "VPSRADMasked256const",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPSRLD,
+               argLen:  2,
+               asm:     x86.AVPSRAD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VPSRLD512const",
+               name:    "VPSRADMasked512const",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPSRLD,
+               argLen:  2,
+               asm:     x86.AVPSRAD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39065,38 +38574,38 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRLQ128const",
+               name:    "VPSRAQ128const",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSRLQ,
+               asm:     x86.AVPSRAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VPSRLQ256const",
+               name:    "VPSRAQ256const",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSRLQ,
+               asm:     x86.AVPSRAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VPSRLQ512const",
+               name:    "VPSRAQ512const",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSRLQ,
+               asm:     x86.AVPSRAQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39107,41 +38616,44 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAW128const",
+               name:    "VPSRAQMasked128const",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPSRAW,
+               argLen:  2,
+               asm:     x86.AVPSRAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VPSRAW256const",
+               name:    "VPSRAQMasked256const",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPSRAW,
+               argLen:  2,
+               asm:     x86.AVPSRAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:    "VPSRAW512const",
+               name:    "VPSRAQMasked512const",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPSRAW,
+               argLen:  2,
+               asm:     x86.AVPSRAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39149,10 +38661,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAD128const",
+               name:    "VPSRAW128const",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSRAD,
+               asm:     x86.AVPSRAW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
@@ -39163,10 +38675,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAD256const",
+               name:    "VPSRAW256const",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSRAD,
+               asm:     x86.AVPSRAW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
@@ -39177,10 +38689,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAD512const",
+               name:    "VPSRAW512const",
                auxType: auxUInt8,
                argLen:  1,
-               asm:     x86.AVPSRAD,
+               asm:     x86.AVPSRAW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39191,13 +38703,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAQ128const",
+               name:    "VPSRAWMasked128const",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPSRAQ,
+               argLen:  2,
+               asm:     x86.AVPSRAW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39205,13 +38718,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAQ256const",
+               name:    "VPSRAWMasked256const",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPSRAQ,
+               argLen:  2,
+               asm:     x86.AVPSRAW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39219,13 +38733,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAQ512const",
+               name:    "VPSRAWMasked512const",
                auxType: auxUInt8,
-               argLen:  1,
-               asm:     x86.AVPSRAQ,
+               argLen:  2,
+               asm:     x86.AVPSRAW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39233,44 +38748,41 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRLWMasked128const",
+               name:    "VPSRLD128const",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPSRLW,
+               argLen:  1,
+               asm:     x86.AVPSRLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSRLWMasked256const",
+               name:    "VPSRLD256const",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPSRLW,
+               argLen:  1,
+               asm:     x86.AVPSRLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSRLWMasked512const",
+               name:    "VPSRLD512const",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPSRLW,
+               argLen:  1,
+               asm:     x86.AVPSRLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39323,44 +38835,41 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRLQMasked128const",
+               name:    "VPSRLQ128const",
                auxType: auxUInt8,
-               argLen:  2,
+               argLen:  1,
                asm:     x86.AVPSRLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSRLQMasked256const",
+               name:    "VPSRLQ256const",
                auxType: auxUInt8,
-               argLen:  2,
+               argLen:  1,
                asm:     x86.AVPSRLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSRLQMasked512const",
+               name:    "VPSRLQ512const",
                auxType: auxUInt8,
-               argLen:  2,
+               argLen:  1,
                asm:     x86.AVPSRLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39368,10 +38877,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAWMasked128const",
+               name:    "VPSRLQMasked128const",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSRAW,
+               asm:     x86.AVPSRLQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -39383,10 +38892,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAWMasked256const",
+               name:    "VPSRLQMasked256const",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSRAW,
+               asm:     x86.AVPSRLQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -39398,10 +38907,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAWMasked512const",
+               name:    "VPSRLQMasked512const",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSRAW,
+               asm:     x86.AVPSRLQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -39413,44 +38922,41 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRADMasked128const",
+               name:    "VPSRLW128const",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPSRAD,
+               argLen:  1,
+               asm:     x86.AVPSRLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSRADMasked256const",
+               name:    "VPSRLW256const",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPSRAD,
+               argLen:  1,
+               asm:     x86.AVPSRLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
                        },
                },
        },
        {
-               name:    "VPSRADMasked512const",
+               name:    "VPSRLW512const",
                auxType: auxUInt8,
-               argLen:  2,
-               asm:     x86.AVPSRAD,
+               argLen:  1,
+               asm:     x86.AVPSRLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39458,10 +38964,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAQMasked128const",
+               name:    "VPSRLWMasked128const",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSRAQ,
+               asm:     x86.AVPSRLW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -39473,10 +38979,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAQMasked256const",
+               name:    "VPSRLWMasked256const",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSRAQ,
+               asm:     x86.AVPSRLW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -39488,10 +38994,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:    "VPSRAQMasked512const",
+               name:    "VPSRLWMasked512const",
                auxType: auxUInt8,
                argLen:  2,
-               asm:     x86.AVPSRAQ,
+               asm:     x86.AVPSRLW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -39605,14 +39111,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPABSD512load",
-               auxType:   auxSymOff,
-               argLen:    2,
-               symEffect: SymRead,
-               asm:       x86.AVPABSD,
+               name:    "VREDUCEPD128",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVREDUCEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39620,14 +39125,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPABSQ128load",
-               auxType:   auxSymOff,
-               argLen:    2,
-               symEffect: SymRead,
-               asm:       x86.AVPABSQ,
+               name:    "VREDUCEPD256",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVREDUCEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39635,14 +39139,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPABSQ256load",
-               auxType:   auxSymOff,
-               argLen:    2,
-               symEffect: SymRead,
-               asm:       x86.AVPABSQ,
+               name:    "VREDUCEPD512",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVREDUCEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39650,14 +39153,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPABSQ512load",
-               auxType:   auxSymOff,
-               argLen:    2,
-               symEffect: SymRead,
-               asm:       x86.AVPABSQ,
+               name:    "VREDUCEPDMasked128",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVREDUCEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39665,15 +39168,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPABSDMasked128load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPABSD,
+               name:    "VREDUCEPDMasked256",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVREDUCEPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39681,15 +39183,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPABSDMasked256load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPABSD,
+               name:    "VREDUCEPDMasked512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVREDUCEPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39697,15 +39198,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPABSDMasked512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPABSD,
+               name:    "VREDUCEPS128",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVREDUCEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39713,15 +39212,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPABSQMasked128load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPABSQ,
+               name:    "VREDUCEPS256",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVREDUCEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39729,15 +39226,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPABSQMasked256load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPABSQ,
+               name:    "VREDUCEPS512",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVREDUCEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39745,15 +39240,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPABSQMasked512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPABSQ,
+               name:    "VREDUCEPSMasked128",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVREDUCEPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39761,14 +39255,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VADDPS512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVADDPS,
+               name:    "VREDUCEPSMasked256",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVREDUCEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
@@ -39777,14 +39270,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VADDPD512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVADDPD,
+               name:    "VREDUCEPSMasked512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVREDUCEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
@@ -39793,15 +39285,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPADDD512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPADDD,
+               name:    "VRNDSCALEPD128",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVRNDSCALEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39809,15 +39299,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPADDQ512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPADDQ,
+               name:    "VRNDSCALEPD256",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVRNDSCALEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39825,17 +39313,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPDPWSSD512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPDPWSSD,
+               name:    "VRNDSCALEPD512",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVRNDSCALEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39843,18 +39327,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPDPWSSDMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPDPWSSD,
+               name:    "VRNDSCALEPDMasked128",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVRNDSCALEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39862,18 +39342,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPDPWSSDMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPDPWSSD,
+               name:    "VRNDSCALEPDMasked256",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVRNDSCALEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39881,18 +39357,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPDPWSSDMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPDPWSSD,
+               name:    "VRNDSCALEPDMasked512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVRNDSCALEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39900,17 +39372,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPDPBUSD512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPDPBUSD,
+               name:    "VRNDSCALEPS128",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVRNDSCALEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39918,18 +39386,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPDPBUSDMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPDPBUSD,
+               name:    "VRNDSCALEPS256",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVRNDSCALEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39937,18 +39400,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPDPBUSDMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPDPBUSD,
+               name:    "VRNDSCALEPS512",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVRNDSCALEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39956,18 +39414,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPDPBUSDMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPDPBUSD,
+               name:    "VRNDSCALEPSMasked128",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVRNDSCALEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39975,17 +39429,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPDPBUSDS512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPDPBUSDS,
+               name:    "VRNDSCALEPSMasked256",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVRNDSCALEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -39993,18 +39444,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPDPBUSDSMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPDPBUSDS,
+               name:    "VRNDSCALEPSMasked512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVRNDSCALEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40012,18 +39459,145 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPDPBUSDSMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPDPBUSDS,
+               name:    "VROUNDPD128",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVROUNDPD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:    "VROUNDPD256",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVROUNDPD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:    "VROUNDPS128",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVROUNDPS,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:    "VROUNDPS256",
+               auxType: auxUInt8,
+               argLen:  1,
+               asm:     x86.AVROUNDPS,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:    "VSHUFPD128",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVSHUFPD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:    "VSHUFPD256",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVSHUFPD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:    "VSHUFPD512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVSHUFPD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:    "VSHUFPS128",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVSHUFPS,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:    "VSHUFPS256",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVSHUFPS,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                               {1, 4294901760}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
+                       },
+                       outputs: []outputInfo{
+                               {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14
+                       },
+               },
+       },
+       {
+               name:    "VSHUFPS512",
+               auxType: auxUInt8,
+               argLen:  2,
+               asm:     x86.AVSHUFPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40031,18 +39605,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPDPBUSDSMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPDPBUSDS,
+               name:      "VADDPD512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVADDPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40050,11 +39621,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VADDPSMasked128load",
+               name:      "VADDPDMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVADDPS,
+               asm:       x86.AVADDPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40067,11 +39638,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VADDPSMasked256load",
+               name:      "VADDPDMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVADDPS,
+               asm:       x86.AVADDPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40084,11 +39655,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VADDPSMasked512load",
+               name:      "VADDPDMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVADDPS,
+               asm:       x86.AVADDPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40101,14 +39672,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VADDPDMasked128load",
+               name:      "VADDPS512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVADDPD,
+               asm:       x86.AVADDPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -40118,11 +39688,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VADDPDMasked256load",
+               name:      "VADDPSMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVADDPD,
+               asm:       x86.AVADDPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40135,11 +39705,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VADDPDMasked512load",
+               name:      "VADDPSMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVADDPD,
+               asm:       x86.AVADDPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40152,11 +39722,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPADDDMasked128load",
+               name:      "VADDPSMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPADDD,
+               asm:       x86.AVADDPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40169,16 +39739,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPADDDMasked256load",
+               name:      "VCVTPS2UDQ128load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPADDD,
+               asm:       x86.AVCVTPS2UDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40186,16 +39754,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPADDDMasked512load",
+               name:      "VCVTPS2UDQ256load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPADDD,
+               asm:       x86.AVCVTPS2UDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40203,16 +39769,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPADDQMasked128load",
+               name:      "VCVTPS2UDQ512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPADDQ,
+               asm:       x86.AVCVTPS2UDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40220,16 +39784,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPADDQMasked256load",
+               name:      "VCVTPS2UDQMasked128load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPADDQ,
+               asm:       x86.AVCVTPS2UDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40237,16 +39800,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPADDQMasked512load",
+               name:      "VCVTPS2UDQMasked256load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPADDQ,
+               asm:       x86.AVCVTPS2UDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40254,15 +39816,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDD512load",
+               name:      "VCVTPS2UDQMasked512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPANDD,
+               asm:       x86.AVCVTPS2UDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40270,15 +39832,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDQ512load",
+               name:      "VCVTTPS2DQ512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPANDQ,
+               asm:       x86.AVCVTTPS2DQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40286,16 +39847,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDDMasked128load",
+               name:      "VCVTTPS2DQMasked128load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPANDD,
+               asm:       x86.AVCVTTPS2DQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40303,16 +39863,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDDMasked256load",
+               name:      "VCVTTPS2DQMasked256load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPANDD,
+               asm:       x86.AVCVTTPS2DQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40320,16 +39879,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDDMasked512load",
+               name:      "VCVTTPS2DQMasked512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPANDD,
+               asm:       x86.AVCVTTPS2DQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40337,14 +39895,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDQMasked128load",
+               name:      "VDIVPD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPANDQ,
+               asm:       x86.AVDIVPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -40354,11 +39911,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDQMasked256load",
+               name:      "VDIVPDMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPANDQ,
+               asm:       x86.AVDIVPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40371,11 +39928,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDQMasked512load",
+               name:      "VDIVPDMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPANDQ,
+               asm:       x86.AVDIVPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40388,13 +39945,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDND512load",
+               name:      "VDIVPDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPANDND,
+               asm:       x86.AVDIVPD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -40404,11 +39962,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDNQ512load",
+               name:      "VDIVPS512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPANDNQ,
+               asm:       x86.AVDIVPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -40420,11 +39978,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDNDMasked128load",
+               name:      "VDIVPSMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPANDND,
+               asm:       x86.AVDIVPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40437,11 +39995,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDNDMasked256load",
+               name:      "VDIVPSMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPANDND,
+               asm:       x86.AVDIVPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40454,11 +40012,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDNDMasked512load",
+               name:      "VDIVPSMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPANDND,
+               asm:       x86.AVDIVPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40471,16 +40029,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDNQMasked128load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPANDNQ,
+               name:         "VFMADD213PD128load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADD213PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40488,16 +40047,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDNQMasked256load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPANDNQ,
+               name:         "VFMADD213PD256load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADD213PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40505,16 +40065,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPANDNQMasked512load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPANDNQ,
+               name:         "VFMADD213PD512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADD213PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40522,15 +40083,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPACKSSDW512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPACKSSDW,
+               name:         "VFMADD213PDMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADD213PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40538,16 +40102,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPACKSSDWMasked128load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPACKSSDW,
+               name:         "VFMADD213PDMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADD213PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40555,16 +40121,240 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPACKSSDWMasked256load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPACKSSDW,
+               name:         "VFMADD213PDMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADD213PD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VFMADD213PS128load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADD213PS,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VFMADD213PS256load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADD213PS,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VFMADD213PS512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADD213PS,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VFMADD213PSMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADD213PS,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VFMADD213PSMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADD213PS,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VFMADD213PSMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADD213PS,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VFMADDSUB213PD128load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADDSUB213PD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VFMADDSUB213PD256load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADDSUB213PD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VFMADDSUB213PD512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADDSUB213PD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VFMADDSUB213PDMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADDSUB213PD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VFMADDSUB213PDMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADDSUB213PD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VFMADDSUB213PDMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADDSUB213PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40572,16 +40362,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPACKSSDWMasked512load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPACKSSDW,
+               name:         "VFMADDSUB213PS128load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADDSUB213PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40589,14 +40380,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCVTTPS2DQ512load",
-               auxType:   auxSymOff,
-               argLen:    2,
-               symEffect: SymRead,
-               asm:       x86.AVCVTTPS2DQ,
+               name:         "VFMADDSUB213PS256load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADDSUB213PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40604,15 +40398,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCVTTPS2DQMasked128load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVCVTTPS2DQ,
+               name:         "VFMADDSUB213PS512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADDSUB213PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40620,15 +40416,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCVTTPS2DQMasked256load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVCVTTPS2DQ,
+               name:         "VFMADDSUB213PSMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADDSUB213PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40636,15 +40435,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCVTTPS2DQMasked512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVCVTTPS2DQ,
+               name:         "VFMADDSUB213PSMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADDSUB213PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40652,15 +40454,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPACKUSDW512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPACKUSDW,
+               name:         "VFMADDSUB213PSMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMADDSUB213PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40668,16 +40473,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPACKUSDWMasked128load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPACKUSDW,
+               name:         "VFMSUBADD213PD128load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMSUBADD213PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40685,16 +40491,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPACKUSDWMasked256load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPACKUSDW,
+               name:         "VFMSUBADD213PD256load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMSUBADD213PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40702,16 +40509,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPACKUSDWMasked512load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPACKUSDW,
+               name:         "VFMSUBADD213PD512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMSUBADD213PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40719,14 +40527,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCVTPS2UDQ128load",
-               auxType:   auxSymOff,
-               argLen:    2,
-               symEffect: SymRead,
-               asm:       x86.AVCVTPS2UDQ,
+               name:         "VFMSUBADD213PDMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMSUBADD213PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40734,14 +40546,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCVTPS2UDQ256load",
-               auxType:   auxSymOff,
-               argLen:    2,
-               symEffect: SymRead,
-               asm:       x86.AVCVTPS2UDQ,
+               name:         "VFMSUBADD213PDMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMSUBADD213PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40749,14 +40565,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCVTPS2UDQ512load",
-               auxType:   auxSymOff,
-               argLen:    2,
-               symEffect: SymRead,
-               asm:       x86.AVCVTPS2UDQ,
+               name:         "VFMSUBADD213PDMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMSUBADD213PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40764,15 +40584,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCVTPS2UDQMasked128load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVCVTPS2UDQ,
+               name:         "VFMSUBADD213PS128load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMSUBADD213PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40780,15 +40602,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCVTPS2UDQMasked256load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVCVTPS2UDQ,
+               name:         "VFMSUBADD213PS256load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMSUBADD213PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40796,15 +40620,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCVTPS2UDQMasked512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVCVTPS2UDQ,
+               name:         "VFMSUBADD213PS512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMSUBADD213PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40812,15 +40638,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VDIVPS512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVDIVPS,
+               name:         "VFMSUBADD213PSMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMSUBADD213PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40828,15 +40657,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VDIVPD512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVDIVPD,
+               name:         "VFMSUBADD213PSMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMSUBADD213PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40844,16 +40676,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VDIVPSMasked128load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVDIVPS,
+               name:         "VFMSUBADD213PSMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVFMSUBADD213PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -40861,14 +40695,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VDIVPSMasked256load",
+               name:      "VMAXPD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVDIVPS,
+               asm:       x86.AVMAXPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -40878,11 +40711,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VDIVPSMasked512load",
+               name:      "VMAXPDMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVDIVPS,
+               asm:       x86.AVMAXPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40895,11 +40728,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VDIVPDMasked128load",
+               name:      "VMAXPDMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVDIVPD,
+               asm:       x86.AVMAXPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40912,11 +40745,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VDIVPDMasked256load",
+               name:      "VMAXPDMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVDIVPD,
+               asm:       x86.AVMAXPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -40929,14 +40762,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VDIVPDMasked512load",
+               name:      "VMAXPS512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVDIVPD,
+               asm:       x86.AVMAXPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -40946,77 +40778,81 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPCMPEQD512load",
+               name:      "VMAXPSMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPCMPEQD,
+               asm:       x86.AVMAXPS,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPEQQ512load",
+               name:      "VMAXPSMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPCMPEQQ,
+               asm:       x86.AVMAXPS,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPGTD512load",
+               name:      "VMAXPSMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPCMPGTD,
+               asm:       x86.AVMAXPS,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPGTQ512load",
+               name:      "VMINPD512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPCMPGTQ,
+               asm:       x86.AVMINPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPUNPCKHDQ512load",
+               name:      "VMINPDMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPUNPCKHDQ,
+               asm:       x86.AVMINPD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41026,13 +40862,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPUNPCKHQDQ512load",
+               name:      "VMINPDMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPUNPCKHQDQ,
+               asm:       x86.AVMINPD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41042,13 +40879,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPUNPCKLDQ512load",
+               name:      "VMINPDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPUNPCKLDQ,
+               asm:       x86.AVMINPD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41058,11 +40896,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPUNPCKLQDQ512load",
+               name:      "VMINPS512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPUNPCKLQDQ,
+               asm:       x86.AVMINPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -41074,14 +40912,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPLZCNTD128load",
+               name:      "VMINPSMasked128load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPLZCNTD,
+               asm:       x86.AVMINPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41089,14 +40929,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPLZCNTD256load",
+               name:      "VMINPSMasked256load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPLZCNTD,
+               asm:       x86.AVMINPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41104,14 +40946,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPLZCNTD512load",
+               name:      "VMINPSMasked512load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPLZCNTD,
+               asm:       x86.AVMINPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41119,14 +40963,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPLZCNTQ128load",
+               name:      "VMULPD512load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPLZCNTQ,
+               asm:       x86.AVMULPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41134,14 +40979,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPLZCNTQ256load",
+               name:      "VMULPDMasked128load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPLZCNTQ,
+               asm:       x86.AVMULPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41149,14 +40996,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPLZCNTQ512load",
+               name:      "VMULPDMasked256load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPLZCNTQ,
+               asm:       x86.AVMULPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41164,15 +41013,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPLZCNTDMasked128load",
+               name:      "VMULPDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPLZCNTD,
+               asm:       x86.AVMULPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41180,15 +41030,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPLZCNTDMasked256load",
+               name:      "VMULPS512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPLZCNTD,
+               asm:       x86.AVMULPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41196,15 +41046,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPLZCNTDMasked512load",
+               name:      "VMULPSMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPLZCNTD,
+               asm:       x86.AVMULPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41212,15 +41063,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPLZCNTQMasked128load",
+               name:      "VMULPSMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPLZCNTQ,
+               asm:       x86.AVMULPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41228,15 +41080,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPLZCNTQMasked256load",
+               name:      "VMULPSMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPLZCNTQ,
+               asm:       x86.AVMULPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41244,14 +41097,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPLZCNTQMasked512load",
+               name:      "VPABSD512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPLZCNTQ,
+               asm:       x86.AVPABSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -41260,15 +41112,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMAXPS512load",
+               name:      "VPABSDMasked128load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVMAXPS,
+               asm:       x86.AVPABSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41276,15 +41128,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMAXPD512load",
+               name:      "VPABSDMasked256load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVMAXPD,
+               asm:       x86.AVPABSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41292,15 +41144,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXSD512load",
+               name:      "VPABSDMasked512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMAXSD,
+               asm:       x86.AVPABSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41308,15 +41160,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXSQ128load",
+               name:      "VPABSQ128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPMAXSQ,
+               asm:       x86.AVPABSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41324,15 +41175,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXSQ256load",
+               name:      "VPABSQ256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPMAXSQ,
+               asm:       x86.AVPABSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41340,15 +41190,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXSQ512load",
+               name:      "VPABSQ512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPMAXSQ,
+               asm:       x86.AVPABSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41356,15 +41205,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXUD512load",
+               name:      "VPABSQMasked128load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMAXUD,
+               asm:       x86.AVPABSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41372,15 +41221,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXUQ128load",
+               name:      "VPABSQMasked256load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMAXUQ,
+               asm:       x86.AVPABSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41388,15 +41237,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXUQ256load",
+               name:      "VPABSQMasked512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMAXUQ,
+               asm:       x86.AVPABSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -41404,11 +41253,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXUQ512load",
+               name:      "VPACKSSDW512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMAXUQ,
+               asm:       x86.AVPACKSSDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -41420,11 +41269,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMAXPSMasked128load",
+               name:      "VPACKSSDWMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMAXPS,
+               asm:       x86.AVPACKSSDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41437,11 +41286,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMAXPSMasked256load",
+               name:      "VPACKSSDWMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMAXPS,
+               asm:       x86.AVPACKSSDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41454,11 +41303,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMAXPSMasked512load",
+               name:      "VPACKSSDWMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMAXPS,
+               asm:       x86.AVPACKSSDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41471,14 +41320,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMAXPDMasked128load",
+               name:      "VPACKUSDW512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVMAXPD,
+               asm:       x86.AVPACKUSDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41488,11 +41336,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMAXPDMasked256load",
+               name:      "VPACKUSDWMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMAXPD,
+               asm:       x86.AVPACKUSDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41505,11 +41353,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMAXPDMasked512load",
+               name:      "VPACKUSDWMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMAXPD,
+               asm:       x86.AVPACKUSDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41522,11 +41370,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXSDMasked128load",
+               name:      "VPACKUSDWMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMAXSD,
+               asm:       x86.AVPACKUSDW,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41539,14 +41387,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXSDMasked256load",
+               name:      "VPADDD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMAXSD,
+               asm:       x86.AVPADDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41556,11 +41403,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXSDMasked512load",
+               name:      "VPADDDMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMAXSD,
+               asm:       x86.AVPADDD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41573,11 +41420,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXSQMasked128load",
+               name:      "VPADDDMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMAXSQ,
+               asm:       x86.AVPADDD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41590,11 +41437,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXSQMasked256load",
+               name:      "VPADDDMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMAXSQ,
+               asm:       x86.AVPADDD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41607,14 +41454,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXSQMasked512load",
+               name:      "VPADDQ512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMAXSQ,
+               asm:       x86.AVPADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41624,11 +41470,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXUDMasked128load",
+               name:      "VPADDQMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMAXUD,
+               asm:       x86.AVPADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41641,11 +41487,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXUDMasked256load",
+               name:      "VPADDQMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMAXUD,
+               asm:       x86.AVPADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41658,11 +41504,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXUDMasked512load",
+               name:      "VPADDQMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMAXUD,
+               asm:       x86.AVPADDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41675,14 +41521,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXUQMasked128load",
+               name:      "VPANDD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMAXUQ,
+               asm:       x86.AVPANDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41692,11 +41537,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXUQMasked256load",
+               name:      "VPANDDMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMAXUQ,
+               asm:       x86.AVPANDD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41709,11 +41554,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMAXUQMasked512load",
+               name:      "VPANDDMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMAXUQ,
+               asm:       x86.AVPANDD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41726,13 +41571,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMINPS512load",
+               name:      "VPANDDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMINPS,
+               asm:       x86.AVPANDD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41742,11 +41588,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMINPD512load",
+               name:      "VPANDND512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVMINPD,
+               asm:       x86.AVPANDND,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -41758,13 +41604,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINSD512load",
+               name:      "VPANDNDMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMINSD,
+               asm:       x86.AVPANDND,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41774,13 +41621,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINSQ128load",
+               name:      "VPANDNDMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMINSQ,
+               asm:       x86.AVPANDND,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41790,13 +41638,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINSQ256load",
+               name:      "VPANDNDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMINSQ,
+               asm:       x86.AVPANDND,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41806,11 +41655,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINSQ512load",
+               name:      "VPANDNQ512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMINSQ,
+               asm:       x86.AVPANDNQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -41822,13 +41671,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINUD512load",
+               name:      "VPANDNQMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMINUD,
+               asm:       x86.AVPANDNQ,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41838,13 +41688,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINUQ128load",
+               name:      "VPANDNQMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMINUQ,
+               asm:       x86.AVPANDNQ,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41854,13 +41705,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINUQ256load",
+               name:      "VPANDNQMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMINUQ,
+               asm:       x86.AVPANDNQ,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -41870,11 +41722,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINUQ512load",
+               name:      "VPANDQ512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMINUQ,
+               asm:       x86.AVPANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -41886,11 +41738,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMINPSMasked128load",
+               name:      "VPANDQMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMINPS,
+               asm:       x86.AVPANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41903,11 +41755,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMINPSMasked256load",
+               name:      "VPANDQMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMINPS,
+               asm:       x86.AVPANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41920,11 +41772,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMINPSMasked512load",
+               name:      "VPANDQMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMINPS,
+               asm:       x86.AVPANDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41937,11 +41789,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMINPDMasked128load",
+               name:      "VPBLENDMDMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMINPD,
+               asm:       x86.AVPBLENDMD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41954,11 +41806,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMINPDMasked256load",
+               name:      "VPBLENDMQMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMINPD,
+               asm:       x86.AVPBLENDMQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -41971,84 +41823,81 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMINPDMasked512load",
+               name:      "VPCMPEQD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVMINPD,
+               asm:       x86.AVPCMPEQD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VPMINSDMasked128load",
+               name:      "VPCMPEQQ512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMINSD,
+               asm:       x86.AVPCMPEQQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VPMINSDMasked256load",
+               name:      "VPCMPGTD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMINSD,
+               asm:       x86.AVPCMPGTD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VPMINSDMasked512load",
+               name:      "VPCMPGTQ512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMINSD,
+               asm:       x86.AVPCMPGTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VPMINSQMasked128load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPMINSQ,
+               name:         "VPDPBUSD512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPDPBUSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42056,16 +41905,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINSQMasked256load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPMINSQ,
+               name:         "VPDPBUSDMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPDPBUSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42073,16 +41924,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINSQMasked512load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPMINSQ,
+               name:         "VPDPBUSDMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPDPBUSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42090,16 +41943,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINUDMasked128load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPMINUD,
+               name:         "VPDPBUSDMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPDPBUSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42107,16 +41962,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINUDMasked256load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPMINUD,
+               name:         "VPDPBUSDS512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPDPBUSDS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42124,16 +41980,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINUDMasked512load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPMINUD,
+               name:         "VPDPBUSDSMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPDPBUSDS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42141,16 +41999,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINUQMasked128load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPMINUQ,
+               name:         "VPDPBUSDSMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPDPBUSDS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42158,16 +42018,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINUQMasked256load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPMINUQ,
+               name:         "VPDPBUSDSMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPDPBUSDS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42175,16 +42037,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMINUQMasked512load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPMINUQ,
+               name:         "VPDPWSSD512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPDPWSSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42192,15 +42055,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMULPS512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVMULPS,
+               name:         "VPDPWSSDMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPDPWSSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42208,15 +42074,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMULPD512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVMULPD,
+               name:         "VPDPWSSDMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPDPWSSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42224,15 +42093,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMULLD512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPMULLD,
+               name:         "VPDPWSSDMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPDPWSSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42240,11 +42112,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMULLQ128load",
+               name:      "VPERMD512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMULLQ,
+               asm:       x86.AVPERMD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -42256,13 +42128,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMULLQ256load",
+               name:      "VPERMDMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMULLQ,
+               asm:       x86.AVPERMD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -42272,13 +42145,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMULLQ512load",
+               name:      "VPERMDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMULLQ,
+               asm:       x86.AVPERMD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -42288,12 +42162,12 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADD213PS128load",
+               name:         "VPERMI2D128load",
                auxType:      auxSymOff,
                argLen:       4,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADD213PS,
+               asm:          x86.AVPERMI2D,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -42306,12 +42180,12 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADD213PS256load",
+               name:         "VPERMI2D256load",
                auxType:      auxSymOff,
                argLen:       4,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADD213PS,
+               asm:          x86.AVPERMI2D,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -42324,12 +42198,12 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADD213PS512load",
+               name:         "VPERMI2D512load",
                auxType:      auxSymOff,
                argLen:       4,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADD213PS,
+               asm:          x86.AVPERMI2D,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -42342,14 +42216,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADD213PD128load",
+               name:         "VPERMI2DMasked128load",
                auxType:      auxSymOff,
-               argLen:       4,
+               argLen:       5,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADD213PD,
+               asm:          x86.AVPERMI2D,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42360,14 +42235,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADD213PD256load",
+               name:         "VPERMI2DMasked256load",
                auxType:      auxSymOff,
-               argLen:       4,
+               argLen:       5,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADD213PD,
+               asm:          x86.AVPERMI2D,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42378,14 +42254,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADD213PD512load",
+               name:         "VPERMI2DMasked512load",
                auxType:      auxSymOff,
-               argLen:       4,
+               argLen:       5,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADD213PD,
+               asm:          x86.AVPERMI2D,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42396,15 +42273,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADD213PSMasked128load",
+               name:         "VPERMI2PD128load",
                auxType:      auxSymOff,
-               argLen:       5,
+               argLen:       4,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADD213PS,
+               asm:          x86.AVPERMI2PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42415,15 +42291,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADD213PSMasked256load",
+               name:         "VPERMI2PD256load",
                auxType:      auxSymOff,
-               argLen:       5,
+               argLen:       4,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADD213PS,
+               asm:          x86.AVPERMI2PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42434,15 +42309,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADD213PSMasked512load",
+               name:         "VPERMI2PD512load",
                auxType:      auxSymOff,
-               argLen:       5,
+               argLen:       4,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADD213PS,
+               asm:          x86.AVPERMI2PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42453,12 +42327,12 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADD213PDMasked128load",
+               name:         "VPERMI2PDMasked128load",
                auxType:      auxSymOff,
                argLen:       5,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADD213PD,
+               asm:          x86.AVPERMI2PD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -42472,12 +42346,12 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADD213PDMasked256load",
+               name:         "VPERMI2PDMasked256load",
                auxType:      auxSymOff,
                argLen:       5,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADD213PD,
+               asm:          x86.AVPERMI2PD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -42491,12 +42365,12 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADD213PDMasked512load",
+               name:         "VPERMI2PDMasked512load",
                auxType:      auxSymOff,
                argLen:       5,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADD213PD,
+               asm:          x86.AVPERMI2PD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -42510,12 +42384,12 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADDSUB213PS128load",
+               name:         "VPERMI2PS128load",
                auxType:      auxSymOff,
                argLen:       4,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADDSUB213PS,
+               asm:          x86.AVPERMI2PS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -42528,12 +42402,12 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADDSUB213PS256load",
+               name:         "VPERMI2PS256load",
                auxType:      auxSymOff,
                argLen:       4,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADDSUB213PS,
+               asm:          x86.AVPERMI2PS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -42546,12 +42420,12 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADDSUB213PS512load",
+               name:         "VPERMI2PS512load",
                auxType:      auxSymOff,
                argLen:       4,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADDSUB213PS,
+               asm:          x86.AVPERMI2PS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -42564,14 +42438,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADDSUB213PD128load",
+               name:         "VPERMI2PSMasked128load",
                auxType:      auxSymOff,
-               argLen:       4,
+               argLen:       5,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADDSUB213PD,
+               asm:          x86.AVPERMI2PS,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42582,14 +42457,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADDSUB213PD256load",
+               name:         "VPERMI2PSMasked256load",
                auxType:      auxSymOff,
-               argLen:       4,
+               argLen:       5,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADDSUB213PD,
+               asm:          x86.AVPERMI2PS,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42600,14 +42476,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADDSUB213PD512load",
+               name:         "VPERMI2PSMasked512load",
                auxType:      auxSymOff,
-               argLen:       4,
+               argLen:       5,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADDSUB213PD,
+               asm:          x86.AVPERMI2PS,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42618,15 +42495,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADDSUB213PSMasked128load",
+               name:         "VPERMI2Q128load",
                auxType:      auxSymOff,
-               argLen:       5,
+               argLen:       4,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADDSUB213PS,
+               asm:          x86.AVPERMI2Q,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42637,15 +42513,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADDSUB213PSMasked256load",
+               name:         "VPERMI2Q256load",
                auxType:      auxSymOff,
-               argLen:       5,
+               argLen:       4,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADDSUB213PS,
+               asm:          x86.AVPERMI2Q,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42656,15 +42531,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADDSUB213PSMasked512load",
+               name:         "VPERMI2Q512load",
                auxType:      auxSymOff,
-               argLen:       5,
+               argLen:       4,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADDSUB213PS,
+               asm:          x86.AVPERMI2Q,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                                {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42675,12 +42549,12 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADDSUB213PDMasked128load",
+               name:         "VPERMI2QMasked128load",
                auxType:      auxSymOff,
                argLen:       5,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADDSUB213PD,
+               asm:          x86.AVPERMI2Q,
                reg: regInfo{
                        inputs: []inputInfo{
                                {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -42694,12 +42568,12 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADDSUB213PDMasked256load",
+               name:         "VPERMI2QMasked256load",
                auxType:      auxSymOff,
                argLen:       5,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADDSUB213PD,
+               asm:          x86.AVPERMI2Q,
                reg: regInfo{
                        inputs: []inputInfo{
                                {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -42713,12 +42587,12 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMADDSUB213PDMasked512load",
+               name:         "VPERMI2QMasked512load",
                auxType:      auxSymOff,
                argLen:       5,
                resultInArg0: true,
                symEffect:    SymRead,
-               asm:          x86.AVFMADDSUB213PD,
+               asm:          x86.AVPERMI2Q,
                reg: regInfo{
                        inputs: []inputInfo{
                                {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -42732,14 +42606,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMULPSMasked128load",
+               name:      "VPERMPD256load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVMULPS,
+               asm:       x86.AVPERMPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -42749,14 +42622,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMULPSMasked256load",
+               name:      "VPERMPD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVMULPS,
+               asm:       x86.AVPERMPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -42766,11 +42638,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMULPSMasked512load",
+               name:      "VPERMPDMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMULPS,
+               asm:       x86.AVPERMPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -42783,11 +42655,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMULPDMasked128load",
+               name:      "VPERMPDMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMULPD,
+               asm:       x86.AVPERMPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -42800,14 +42672,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMULPDMasked256load",
+               name:      "VPERMPS512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVMULPD,
+               asm:       x86.AVPERMPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -42817,11 +42688,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VMULPDMasked512load",
+               name:      "VPERMPSMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVMULPD,
+               asm:       x86.AVPERMPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -42834,11 +42705,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMULLDMasked128load",
+               name:      "VPERMPSMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMULLD,
+               asm:       x86.AVPERMPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -42851,14 +42722,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMULLDMasked256load",
+               name:      "VPERMQ256load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMULLD,
+               asm:       x86.AVPERMQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -42868,14 +42738,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMULLDMasked512load",
+               name:      "VPERMQ512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPMULLD,
+               asm:       x86.AVPERMQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -42885,11 +42754,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMULLQMasked128load",
+               name:      "VPERMQMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMULLQ,
+               asm:       x86.AVPERMQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -42902,11 +42771,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMULLQMasked256load",
+               name:      "VPERMQMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPMULLQ,
+               asm:       x86.AVPERMQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -42919,16 +42788,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPMULLQMasked512load",
+               name:      "VPLZCNTD128load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPMULLQ,
+               asm:       x86.AVPLZCNTD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42936,17 +42803,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMSUBADD213PS128load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVFMSUBADD213PS,
+               name:      "VPLZCNTD256load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVPLZCNTD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42954,17 +42818,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMSUBADD213PS256load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVFMSUBADD213PS,
+               name:      "VPLZCNTD512load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVPLZCNTD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42972,17 +42833,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMSUBADD213PS512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVFMSUBADD213PS,
+               name:      "VPLZCNTDMasked128load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPLZCNTD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -42990,17 +42849,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMSUBADD213PD128load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVFMSUBADD213PD,
+               name:      "VPLZCNTDMasked256load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPLZCNTD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43008,17 +42865,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMSUBADD213PD256load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVFMSUBADD213PD,
+               name:      "VPLZCNTDMasked512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPLZCNTD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43026,17 +42881,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMSUBADD213PD512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVFMSUBADD213PD,
+               name:      "VPLZCNTQ128load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVPLZCNTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43044,18 +42896,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMSUBADD213PSMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVFMSUBADD213PS,
+               name:      "VPLZCNTQ256load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVPLZCNTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43063,18 +42911,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMSUBADD213PSMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVFMSUBADD213PS,
+               name:      "VPLZCNTQ512load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVPLZCNTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43082,18 +42926,196 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMSUBADD213PSMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVFMSUBADD213PS,
+               name:      "VPLZCNTQMasked128load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPLZCNTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:      "VPLZCNTQMasked256load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPLZCNTQ,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:      "VPLZCNTQMasked512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPLZCNTQ,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:      "VPMAXSD512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPMAXSD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:      "VPMAXSDMasked128load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMAXSD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:      "VPMAXSDMasked256load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMAXSD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:      "VPMAXSDMasked512load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMAXSD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:      "VPMAXSQ128load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPMAXSQ,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:      "VPMAXSQ256load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPMAXSQ,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:      "VPMAXSQ512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPMAXSQ,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:      "VPMAXSQMasked128load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMAXSQ,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:      "VPMAXSQMasked256load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMAXSQ,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43101,18 +43123,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMSUBADD213PDMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVFMSUBADD213PD,
+               name:      "VPMAXSQMasked512load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMAXSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43120,18 +43140,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMSUBADD213PDMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVFMSUBADD213PD,
+               name:      "VPMAXUD512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPMAXUD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43139,18 +43156,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VFMSUBADD213PDMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVFMSUBADD213PD,
+               name:      "VPMAXUDMasked128load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMAXUD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43158,14 +43173,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPOPCNTD128load",
+               name:      "VPMAXUDMasked256load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPOPCNTD,
+               asm:       x86.AVPMAXUD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43173,14 +43190,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPOPCNTD256load",
+               name:      "VPMAXUDMasked512load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPOPCNTD,
+               asm:       x86.AVPMAXUD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43188,14 +43207,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPOPCNTD512load",
+               name:      "VPMAXUQ128load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPOPCNTD,
+               asm:       x86.AVPMAXUQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43203,14 +43223,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPOPCNTQ128load",
+               name:      "VPMAXUQ256load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPOPCNTQ,
+               asm:       x86.AVPMAXUQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43218,14 +43239,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPOPCNTQ256load",
+               name:      "VPMAXUQ512load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPOPCNTQ,
+               asm:       x86.AVPMAXUQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43233,14 +43255,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPOPCNTQ512load",
+               name:      "VPMAXUQMasked128load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPOPCNTQ,
+               asm:       x86.AVPMAXUQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43248,15 +43272,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPOPCNTDMasked128load",
+               name:      "VPMAXUQMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPOPCNTD,
+               asm:       x86.AVPMAXUQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43264,15 +43289,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPOPCNTDMasked256load",
+               name:      "VPMAXUQMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPOPCNTD,
+               asm:       x86.AVPMAXUQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43280,15 +43306,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPOPCNTDMasked512load",
+               name:      "VPMINSD512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPOPCNTD,
+               asm:       x86.AVPMINSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43296,15 +43322,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPOPCNTQMasked128load",
+               name:      "VPMINSDMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPOPCNTQ,
+               asm:       x86.AVPMINSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43312,15 +43339,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPOPCNTQMasked256load",
+               name:      "VPMINSDMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPOPCNTQ,
+               asm:       x86.AVPMINSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43328,15 +43356,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPOPCNTQMasked512load",
+               name:      "VPMINSDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPOPCNTQ,
+               asm:       x86.AVPMINSD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43344,11 +43373,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPORD512load",
+               name:      "VPMINSQ128load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPORD,
+               asm:       x86.AVPMINSQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -43360,11 +43389,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPORQ512load",
+               name:      "VPMINSQ256load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPORQ,
+               asm:       x86.AVPMINSQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -43376,14 +43405,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPORDMasked128load",
+               name:      "VPMINSQ512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPORD,
+               asm:       x86.AVPMINSQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -43393,11 +43421,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPORDMasked256load",
+               name:      "VPMINSQMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPORD,
+               asm:       x86.AVPMINSQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -43410,11 +43438,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPORDMasked512load",
+               name:      "VPMINSQMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPORD,
+               asm:       x86.AVPMINSQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -43427,11 +43455,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPORQMasked128load",
+               name:      "VPMINSQMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPORQ,
+               asm:       x86.AVPMINSQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -43444,14 +43472,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPORQMasked256load",
+               name:      "VPMINUD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPORQ,
+               asm:       x86.AVPMINUD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -43461,11 +43488,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPORQMasked512load",
+               name:      "VPMINUDMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPORQ,
+               asm:       x86.AVPMINUD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -43478,13 +43505,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMPS512load",
+               name:      "VPMINUDMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPERMPS,
+               asm:       x86.AVPMINUD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -43494,13 +43522,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMD512load",
+               name:      "VPMINUDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPERMD,
+               asm:       x86.AVPMINUD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -43510,11 +43539,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMPD256load",
+               name:      "VPMINUQ128load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPERMPD,
+               asm:       x86.AVPMINUQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -43526,11 +43555,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMQ256load",
+               name:      "VPMINUQ256load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPERMQ,
+               asm:       x86.AVPMINUQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -43542,11 +43571,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMPD512load",
+               name:      "VPMINUQ512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPERMPD,
+               asm:       x86.AVPMINUQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -43558,13 +43587,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMQ512load",
+               name:      "VPMINUQMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPERMQ,
+               asm:       x86.AVPMINUQ,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -43574,17 +43604,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2PS128load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2PS,
+               name:      "VPMINUQMasked256load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMINUQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43592,17 +43621,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2D128load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2D,
+               name:      "VPMINUQMasked512load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMINUQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43610,17 +43638,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2PS256load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2PS,
+               name:      "VPMULLD512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPMULLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43628,17 +43654,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2D256load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2D,
+               name:      "VPMULLDMasked128load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMULLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43646,17 +43671,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2PS512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2PS,
+               name:      "VPMULLDMasked256load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMULLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43664,17 +43688,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2D512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2D,
+               name:      "VPMULLDMasked512load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMULLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43682,17 +43705,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2PD128load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2PD,
+               name:      "VPMULLQ128load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPMULLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43700,17 +43721,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2Q128load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2Q,
+               name:      "VPMULLQ256load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPMULLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43718,17 +43737,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2PD256load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2PD,
+               name:      "VPMULLQ512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPMULLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43736,17 +43753,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2Q256load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2Q,
+               name:      "VPMULLQMasked128load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMULLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43754,17 +43770,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2PD512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2PD,
+               name:      "VPMULLQMasked256load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMULLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43772,17 +43787,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2Q512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2Q,
+               name:      "VPMULLQMasked512load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPMULLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43790,18 +43804,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2PSMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2PS,
+               name:      "VPOPCNTD128load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVPOPCNTD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43809,18 +43819,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2DMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2D,
+               name:      "VPOPCNTD256load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVPOPCNTD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43828,18 +43834,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2PSMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2PS,
+               name:      "VPOPCNTD512load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVPOPCNTD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43847,18 +43849,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2DMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2D,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+               name:      "VPOPCNTDMasked128load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPOPCNTD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43866,18 +43865,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2PSMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2PS,
+               name:      "VPOPCNTDMasked256load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPOPCNTD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43885,18 +43881,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2DMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2D,
+               name:      "VPOPCNTDMasked512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPOPCNTD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43904,18 +43897,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2PDMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2PD,
+               name:      "VPOPCNTQ128load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVPOPCNTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43923,18 +43912,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2QMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2Q,
+               name:      "VPOPCNTQ256load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVPOPCNTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43942,18 +43927,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2PDMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2PD,
+               name:      "VPOPCNTQ512load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVPOPCNTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43961,18 +43942,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2QMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2Q,
+               name:      "VPOPCNTQMasked128load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPOPCNTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43980,18 +43958,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2PDMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2PD,
+               name:      "VPOPCNTQMasked256load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPOPCNTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -43999,18 +43974,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPERMI2QMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPERMI2Q,
+               name:      "VPOPCNTQMasked512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPOPCNTQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44018,14 +43990,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMPSMasked256load",
+               name:      "VPORD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPERMPS,
+               asm:       x86.AVPORD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -44035,11 +44006,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMDMasked256load",
+               name:      "VPORDMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPERMD,
+               asm:       x86.AVPORD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -44052,11 +44023,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMPSMasked512load",
+               name:      "VPORDMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPERMPS,
+               asm:       x86.AVPORD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -44069,11 +44040,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMDMasked512load",
+               name:      "VPORDMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPERMD,
+               asm:       x86.AVPORD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -44086,14 +44057,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMPDMasked256load",
+               name:      "VPORQ512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPERMPD,
+               asm:       x86.AVPORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -44103,11 +44073,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMQMasked256load",
+               name:      "VPORQMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPERMQ,
+               asm:       x86.AVPORQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -44120,11 +44090,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMPDMasked512load",
+               name:      "VPORQMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPERMPD,
+               asm:       x86.AVPORQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -44137,11 +44107,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPERMQMasked512load",
+               name:      "VPORQMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPERMQ,
+               asm:       x86.AVPORQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -44154,14 +44124,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRCP14PS512load",
+               name:      "VPROLVD128load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRCP14PS,
+               asm:       x86.AVPROLVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44169,14 +44140,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRCP14PD128load",
+               name:      "VPROLVD256load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRCP14PD,
+               asm:       x86.AVPROLVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44184,14 +44156,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRCP14PD256load",
+               name:      "VPROLVD512load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRCP14PD,
+               asm:       x86.AVPROLVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44199,14 +44172,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRCP14PD512load",
+               name:      "VPROLVDMasked128load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRCP14PD,
+               asm:       x86.AVPROLVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44214,15 +44189,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRCP14PSMasked128load",
+               name:      "VPROLVDMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRCP14PS,
+               asm:       x86.AVPROLVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44230,15 +44206,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRCP14PSMasked256load",
+               name:      "VPROLVDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRCP14PS,
+               asm:       x86.AVPROLVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44246,15 +44223,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRCP14PSMasked512load",
+               name:      "VPROLVQ128load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRCP14PS,
+               asm:       x86.AVPROLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44262,15 +44239,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRCP14PDMasked128load",
+               name:      "VPROLVQ256load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRCP14PD,
+               asm:       x86.AVPROLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44278,15 +44255,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRCP14PDMasked256load",
+               name:      "VPROLVQ512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRCP14PD,
+               asm:       x86.AVPROLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44294,15 +44271,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRCP14PDMasked512load",
+               name:      "VPROLVQMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRCP14PD,
+               asm:       x86.AVPROLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44310,14 +44288,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRSQRT14PS512load",
+               name:      "VPROLVQMasked256load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRSQRT14PS,
+               asm:       x86.AVPROLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44325,14 +44305,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRSQRT14PD128load",
+               name:      "VPROLVQMasked512load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRSQRT14PD,
+               asm:       x86.AVPROLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44340,14 +44322,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRSQRT14PD256load",
+               name:      "VPRORVD128load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRSQRT14PD,
+               asm:       x86.AVPRORVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44355,14 +44338,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRSQRT14PD512load",
+               name:      "VPRORVD256load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRSQRT14PD,
+               asm:       x86.AVPRORVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44370,15 +44354,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRSQRT14PSMasked128load",
+               name:      "VPRORVD512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRSQRT14PS,
+               asm:       x86.AVPRORVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44386,15 +44370,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRSQRT14PSMasked256load",
+               name:      "VPRORVDMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRSQRT14PS,
+               asm:       x86.AVPRORVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44402,15 +44387,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRSQRT14PSMasked512load",
+               name:      "VPRORVDMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRSQRT14PS,
+               asm:       x86.AVPRORVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44418,15 +44404,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRSQRT14PDMasked128load",
+               name:      "VPRORVDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRSQRT14PD,
+               asm:       x86.AVPRORVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44434,15 +44421,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRSQRT14PDMasked256load",
+               name:      "VPRORVQ128load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRSQRT14PD,
+               asm:       x86.AVPRORVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44450,15 +44437,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRSQRT14PDMasked512load",
+               name:      "VPRORVQ256load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRSQRT14PD,
+               asm:       x86.AVPRORVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44466,11 +44453,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLVD128load",
+               name:      "VPRORVQ512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPROLVD,
+               asm:       x86.AVPRORVQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -44482,13 +44469,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLVD256load",
+               name:      "VPRORVQMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPROLVD,
+               asm:       x86.AVPRORVQ,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -44498,13 +44486,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLVD512load",
+               name:      "VPRORVQMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPROLVD,
+               asm:       x86.AVPRORVQ,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -44514,13 +44503,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLVQ128load",
+               name:      "VPRORVQMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPROLVQ,
+               asm:       x86.AVPRORVQ,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -44530,15 +44520,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLVQ256load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPROLVQ,
+               name:         "VPSHLDVD128load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHLDVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44546,15 +44538,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLVQ512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPROLVQ,
+               name:         "VPSHLDVD256load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHLDVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44562,16 +44556,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLVDMasked128load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPROLVD,
+               name:         "VPSHLDVD512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHLDVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44579,16 +44574,74 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLVDMasked256load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPROLVD,
+               name:         "VPSHLDVDMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHLDVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VPSHLDVDMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHLDVD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VPSHLDVDMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHLDVD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:         "VPSHLDVQ128load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHLDVQ,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44596,16 +44649,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLVDMasked512load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPROLVD,
+               name:         "VPSHLDVQ256load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHLDVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44613,16 +44667,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLVQMasked128load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPROLVQ,
+               name:         "VPSHLDVQ512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHLDVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44630,16 +44685,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLVQMasked256load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPROLVQ,
+               name:         "VPSHLDVQMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHLDVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44647,16 +44704,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLVQMasked512load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPROLVQ,
+               name:         "VPSHLDVQMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHLDVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44664,15 +44723,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORVD128load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPRORVD,
+               name:         "VPSHLDVQMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHLDVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44680,15 +44742,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORVD256load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPRORVD,
+               name:         "VPSHRDVD128load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHRDVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44696,15 +44760,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORVD512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPRORVD,
+               name:         "VPSHRDVD256load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHRDVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44712,15 +44778,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORVQ128load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPRORVQ,
+               name:         "VPSHRDVD512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHRDVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44728,15 +44796,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORVQ256load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPRORVQ,
+               name:         "VPSHRDVDMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHRDVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44744,15 +44815,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORVQ512load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPRORVQ,
+               name:         "VPSHRDVDMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHRDVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44760,16 +44834,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORVDMasked128load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPRORVD,
+               name:         "VPSHRDVDMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHRDVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44777,16 +44853,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORVDMasked256load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPRORVD,
+               name:         "VPSHRDVQ128load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHRDVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44794,16 +44871,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORVDMasked512load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPRORVD,
+               name:         "VPSHRDVQ256load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHRDVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44811,16 +44889,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORVQMasked128load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPRORVQ,
+               name:         "VPSHRDVQ512load",
+               auxType:      auxSymOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHRDVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44828,16 +44907,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORVQMasked256load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPRORVQ,
+               name:         "VPSHRDVQMasked128load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHRDVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44845,16 +44926,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORVQMasked512load",
-               auxType:   auxSymOff,
-               argLen:    4,
-               symEffect: SymRead,
-               asm:       x86.AVPRORVQ,
+               name:         "VPSHRDVQMasked256load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHRDVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44862,15 +44945,18 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSCALEFPS128load",
-               auxType:   auxSymOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVSCALEFPS,
+               name:         "VPSHRDVQMasked512load",
+               auxType:      auxSymOff,
+               argLen:       5,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPSHRDVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -44878,11 +44964,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSCALEFPS256load",
+               name:      "VPSLLVD512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSCALEFPS,
+               asm:       x86.AVPSLLVD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -44894,13 +44980,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSCALEFPS512load",
+               name:      "VPSLLVDMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVSCALEFPS,
+               asm:       x86.AVPSLLVD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -44910,13 +44997,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSCALEFPD128load",
+               name:      "VPSLLVDMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVSCALEFPD,
+               asm:       x86.AVPSLLVD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -44926,13 +45014,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSCALEFPD256load",
+               name:      "VPSLLVDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVSCALEFPD,
+               asm:       x86.AVPSLLVD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -44942,11 +45031,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSCALEFPD512load",
+               name:      "VPSLLVQ512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSCALEFPD,
+               asm:       x86.AVPSLLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -44958,11 +45047,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSCALEFPSMasked128load",
+               name:      "VPSLLVQMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVSCALEFPS,
+               asm:       x86.AVPSLLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -44975,11 +45064,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSCALEFPSMasked256load",
+               name:      "VPSLLVQMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVSCALEFPS,
+               asm:       x86.AVPSLLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -44992,11 +45081,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSCALEFPSMasked512load",
+               name:      "VPSLLVQMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVSCALEFPS,
+               asm:       x86.AVPSLLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -45009,14 +45098,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSCALEFPDMasked128load",
+               name:      "VPSRAVD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSCALEFPD,
+               asm:       x86.AVPSRAVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -45026,11 +45114,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSCALEFPDMasked256load",
+               name:      "VPSRAVDMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVSCALEFPD,
+               asm:       x86.AVPSRAVD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -45043,11 +45131,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSCALEFPDMasked512load",
+               name:      "VPSRAVDMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVSCALEFPD,
+               asm:       x86.AVPSRAVD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -45060,13 +45148,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLVD512load",
+               name:      "VPSRAVDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSLLVD,
+               asm:       x86.AVPSRAVD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -45076,11 +45165,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLVQ512load",
+               name:      "VPSRAVQ128load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSLLVQ,
+               asm:       x86.AVPSRAVQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -45092,53 +45181,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHLDVD128load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHLDVD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:         "VPSHLDVD256load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHLDVD,
-               reg: regInfo{
-                       inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-                       outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                       },
-               },
-       },
-       {
-               name:         "VPSHLDVD512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHLDVD,
+               name:      "VPSRAVQ256load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPSRAVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45146,17 +45197,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHLDVQ128load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHLDVQ,
+               name:      "VPSRAVQ512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPSRAVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45164,17 +45213,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHLDVQ256load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHLDVQ,
+               name:      "VPSRAVQMasked128load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPSRAVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45182,17 +45230,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHLDVQ512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHLDVQ,
+               name:      "VPSRAVQMasked256load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPSRAVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45200,18 +45247,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHLDVDMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHLDVD,
+               name:      "VPSRAVQMasked512load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPSRAVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45219,18 +45264,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHLDVDMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHLDVD,
+               name:      "VPSRLVD512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPSRLVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45238,18 +45280,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHLDVDMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHLDVD,
+               name:      "VPSRLVDMasked128load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPSRLVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45257,18 +45297,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHLDVQMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHLDVQ,
+               name:      "VPSRLVDMasked256load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPSRLVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45276,18 +45314,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHLDVQMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHLDVQ,
+               name:      "VPSRLVDMasked512load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPSRLVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45295,18 +45331,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHLDVQMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHLDVQ,
+               name:      "VPSRLVQ512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPSRLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45314,11 +45347,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLVDMasked128load",
+               name:      "VPSRLVQMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSLLVD,
+               asm:       x86.AVPSRLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -45331,11 +45364,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLVDMasked256load",
+               name:      "VPSRLVQMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSLLVD,
+               asm:       x86.AVPSRLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -45348,11 +45381,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLVDMasked512load",
+               name:      "VPSRLVQMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSLLVD,
+               asm:       x86.AVPSRLVQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -45365,11 +45398,27 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLVQMasked128load",
+               name:      "VPSUBD512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPSUBD,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+                       outputs: []outputInfo{
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                       },
+               },
+       },
+       {
+               name:      "VPSUBDMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSLLVQ,
+               asm:       x86.AVPSUBD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -45382,11 +45431,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLVQMasked256load",
+               name:      "VPSUBDMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSLLVQ,
+               asm:       x86.AVPSUBD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -45399,11 +45448,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLVQMasked512load",
+               name:      "VPSUBDMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSLLVQ,
+               asm:       x86.AVPSUBD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -45416,11 +45465,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAVD512load",
+               name:      "VPSUBQ512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRAVD,
+               asm:       x86.AVPSUBQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -45432,13 +45481,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAVQ128load",
+               name:      "VPSUBQMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSRAVQ,
+               asm:       x86.AVPSUBQ,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -45448,13 +45498,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAVQ256load",
+               name:      "VPSUBQMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSRAVQ,
+               asm:       x86.AVPSUBQ,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -45464,13 +45515,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAVQ512load",
+               name:      "VPSUBQMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSRAVQ,
+               asm:       x86.AVPSUBQ,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -45480,11 +45532,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLVD512load",
+               name:      "VPUNPCKHDQ512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRLVD,
+               asm:       x86.AVPUNPCKHDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -45496,11 +45548,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLVQ512load",
+               name:      "VPUNPCKHQDQ512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRLVQ,
+               asm:       x86.AVPUNPCKHQDQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -45512,17 +45564,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHRDVD128load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHRDVD,
+               name:      "VPUNPCKLDQ512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPUNPCKLDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45530,17 +45580,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHRDVD256load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHRDVD,
+               name:      "VPUNPCKLQDQ512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPUNPCKLQDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45548,17 +45596,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHRDVD512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHRDVD,
+               name:      "VPXORD512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPXORD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45566,17 +45612,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHRDVQ128load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHRDVQ,
+               name:      "VPXORDMasked128load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPXORD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45584,17 +45629,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHRDVQ256load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHRDVQ,
+               name:      "VPXORDMasked256load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPXORD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45602,17 +45646,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHRDVQ512load",
-               auxType:      auxSymOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHRDVQ,
+               name:      "VPXORDMasked512load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPXORD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45620,18 +45663,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHRDVDMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHRDVD,
+               name:      "VPXORQ512load",
+               auxType:   auxSymOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVPXORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45639,18 +45679,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHRDVDMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHRDVD,
+               name:      "VPXORQMasked128load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPXORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45658,18 +45696,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHRDVDMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHRDVD,
+               name:      "VPXORQMasked256load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPXORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45677,18 +45713,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHRDVQMasked128load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHRDVQ,
+               name:      "VPXORQMasked512load",
+               auxType:   auxSymOff,
+               argLen:    4,
+               symEffect: SymRead,
+               asm:       x86.AVPXORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45696,18 +45730,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHRDVQMasked256load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHRDVQ,
+               name:      "VRCP14PD128load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVRCP14PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45715,18 +45745,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPSHRDVQMasked512load",
-               auxType:      auxSymOff,
-               argLen:       5,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPSHRDVQ,
+               name:      "VRCP14PD256load",
+               auxType:   auxSymOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVRCP14PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {3, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45734,16 +45760,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAVDMasked128load",
+               name:      "VRCP14PD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRAVD,
+               asm:       x86.AVRCP14PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45751,16 +45775,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAVDMasked256load",
+               name:      "VRCP14PDMasked128load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRAVD,
+               asm:       x86.AVRCP14PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45768,16 +45791,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAVDMasked512load",
+               name:      "VRCP14PDMasked256load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRAVD,
+               asm:       x86.AVRCP14PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45785,16 +45807,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAVQMasked128load",
+               name:      "VRCP14PDMasked512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRAVQ,
+               asm:       x86.AVRCP14PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45802,16 +45823,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAVQMasked256load",
+               name:      "VRCP14PS512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRAVQ,
+               asm:       x86.AVRCP14PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45819,16 +45838,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAVQMasked512load",
+               name:      "VRCP14PSMasked128load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRAVQ,
+               asm:       x86.AVRCP14PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45836,16 +45854,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLVDMasked128load",
+               name:      "VRCP14PSMasked256load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRLVD,
+               asm:       x86.AVRCP14PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45853,16 +45870,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLVDMasked256load",
+               name:      "VRCP14PSMasked512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRLVD,
+               asm:       x86.AVRCP14PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45870,16 +45886,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLVDMasked512load",
+               name:      "VRSQRT14PD128load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRLVD,
+               asm:       x86.AVRSQRT14PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45887,16 +45901,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLVQMasked128load",
+               name:      "VRSQRT14PD256load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRLVQ,
+               asm:       x86.AVRSQRT14PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45904,16 +45916,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLVQMasked256load",
+               name:      "VRSQRT14PD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRLVQ,
+               asm:       x86.AVRSQRT14PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45921,16 +45931,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLVQMasked512load",
+               name:      "VRSQRT14PDMasked128load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRLVQ,
+               asm:       x86.AVRSQRT14PD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -45938,13 +45947,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSQRTPS512load",
+               name:      "VRSQRT14PDMasked256load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSQRTPS,
+               asm:       x86.AVRSQRT14PD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -45953,13 +45963,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSQRTPD512load",
+               name:      "VRSQRT14PDMasked512load",
                auxType:   auxSymOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSQRTPD,
+               asm:       x86.AVRSQRT14PD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -45968,14 +45979,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSQRTPSMasked128load",
+               name:      "VRSQRT14PS512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVSQRTPS,
+               asm:       x86.AVRSQRT14PS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -45984,11 +45994,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSQRTPSMasked256load",
+               name:      "VRSQRT14PSMasked128load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSQRTPS,
+               asm:       x86.AVRSQRT14PS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46000,11 +46010,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSQRTPSMasked512load",
+               name:      "VRSQRT14PSMasked256load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSQRTPS,
+               asm:       x86.AVRSQRT14PS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46016,11 +46026,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSQRTPDMasked128load",
+               name:      "VRSQRT14PSMasked512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSQRTPD,
+               asm:       x86.AVRSQRT14PS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46032,15 +46042,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSQRTPDMasked256load",
+               name:      "VSCALEFPD128load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSQRTPD,
+               asm:       x86.AVSCALEFPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46048,15 +46058,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSQRTPDMasked512load",
+               name:      "VSCALEFPD256load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSQRTPD,
+               asm:       x86.AVSCALEFPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46064,11 +46074,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSUBPS512load",
+               name:      "VSCALEFPD512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSUBPS,
+               asm:       x86.AVSCALEFPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -46080,13 +46090,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSUBPD512load",
+               name:      "VSCALEFPDMasked128load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVSUBPD,
+               asm:       x86.AVSCALEFPD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -46096,13 +46107,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSUBD512load",
+               name:      "VSCALEFPDMasked256load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSUBD,
+               asm:       x86.AVSCALEFPD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -46112,13 +46124,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSUBQ512load",
+               name:      "VSCALEFPDMasked512load",
                auxType:   auxSymOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSUBQ,
+               asm:       x86.AVSCALEFPD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -46128,14 +46141,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSUBPSMasked128load",
+               name:      "VSCALEFPS128load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSUBPS,
+               asm:       x86.AVSCALEFPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -46145,14 +46157,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSUBPSMasked256load",
+               name:      "VSCALEFPS256load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSUBPS,
+               asm:       x86.AVSCALEFPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -46162,14 +46173,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSUBPSMasked512load",
+               name:      "VSCALEFPS512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSUBPS,
+               asm:       x86.AVSCALEFPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -46179,11 +46189,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSUBPDMasked128load",
+               name:      "VSCALEFPSMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVSUBPD,
+               asm:       x86.AVSCALEFPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46196,11 +46206,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSUBPDMasked256load",
+               name:      "VSCALEFPSMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVSUBPD,
+               asm:       x86.AVSCALEFPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46213,11 +46223,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSUBPDMasked512load",
+               name:      "VSCALEFPSMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVSUBPD,
+               asm:       x86.AVSCALEFPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46230,16 +46240,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSUBDMasked128load",
+               name:      "VSQRTPD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSUBD,
+               asm:       x86.AVSQRTPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46247,16 +46255,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSUBDMasked256load",
+               name:      "VSQRTPDMasked128load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSUBD,
+               asm:       x86.AVSQRTPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46264,16 +46271,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSUBDMasked512load",
+               name:      "VSQRTPDMasked256load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSUBD,
+               asm:       x86.AVSQRTPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46281,16 +46287,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSUBQMasked128load",
+               name:      "VSQRTPDMasked512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSUBQ,
+               asm:       x86.AVSQRTPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46298,16 +46303,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSUBQMasked256load",
+               name:      "VSQRTPS512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSUBQ,
+               asm:       x86.AVSQRTPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46315,16 +46318,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSUBQMasked512load",
+               name:      "VSQRTPSMasked128load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSUBQ,
+               asm:       x86.AVSQRTPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46332,15 +46334,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPXORD512load",
+               name:      "VSQRTPSMasked256load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPXORD,
+               asm:       x86.AVSQRTPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46348,15 +46350,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPXORQ512load",
+               name:      "VSQRTPSMasked512load",
                auxType:   auxSymOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPXORQ,
+               asm:       x86.AVSQRTPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46364,14 +46366,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPXORDMasked128load",
+               name:      "VSUBPD512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPXORD,
+               asm:       x86.AVSUBPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -46381,11 +46382,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPXORDMasked256load",
+               name:      "VSUBPDMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPXORD,
+               asm:       x86.AVSUBPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46398,11 +46399,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPXORDMasked512load",
+               name:      "VSUBPDMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPXORD,
+               asm:       x86.AVSUBPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46415,11 +46416,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPXORQMasked128load",
+               name:      "VSUBPDMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPXORQ,
+               asm:       x86.AVSUBPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46432,14 +46433,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPXORQMasked256load",
+               name:      "VSUBPS512load",
                auxType:   auxSymOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPXORQ,
+               asm:       x86.AVSUBPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -46449,11 +46449,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPXORQMasked512load",
+               name:      "VSUBPSMasked128load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPXORQ,
+               asm:       x86.AVSUBPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46466,11 +46466,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPBLENDMDMasked512load",
+               name:      "VSUBPSMasked256load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPBLENDMD,
+               asm:       x86.AVSUBPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46483,11 +46483,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPBLENDMQMasked512load",
+               name:      "VSUBPSMasked512load",
                auxType:   auxSymOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPBLENDMQ,
+               asm:       x86.AVSUBPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46500,137 +46500,149 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRNDSCALEPS128load",
+               name:      "VCMPPD512load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRNDSCALEPS,
+               asm:       x86.AVCMPPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VRNDSCALEPS256load",
+               name:      "VCMPPDMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRNDSCALEPS,
+               asm:       x86.AVCMPPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VRNDSCALEPS512load",
+               name:      "VCMPPDMasked256load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRNDSCALEPS,
+               asm:       x86.AVCMPPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VRNDSCALEPD128load",
+               name:      "VCMPPDMasked512load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRNDSCALEPD,
+               asm:       x86.AVCMPPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VRNDSCALEPD256load",
+               name:      "VCMPPS512load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRNDSCALEPD,
+               asm:       x86.AVCMPPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VRNDSCALEPD512load",
+               name:      "VCMPPSMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRNDSCALEPD,
+               asm:       x86.AVCMPPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VRNDSCALEPSMasked128load",
+               name:      "VCMPPSMasked256load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRNDSCALEPS,
+               asm:       x86.AVCMPPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VRNDSCALEPSMasked256load",
+               name:      "VCMPPSMasked512load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRNDSCALEPS,
+               asm:       x86.AVCMPPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VRNDSCALEPSMasked512load",
+               name:      "VGF2P8AFFINEINVQB128load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRNDSCALEPS,
+               asm:       x86.AVGF2P8AFFINEINVQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46638,15 +46650,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRNDSCALEPDMasked128load",
+               name:      "VGF2P8AFFINEINVQB256load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRNDSCALEPD,
+               asm:       x86.AVGF2P8AFFINEINVQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46654,15 +46666,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRNDSCALEPDMasked256load",
+               name:      "VGF2P8AFFINEINVQB512load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVRNDSCALEPD,
+               asm:       x86.AVGF2P8AFFINEINVQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46670,15 +46682,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VRNDSCALEPDMasked512load",
+               name:      "VGF2P8AFFINEINVQBMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVRNDSCALEPD,
+               asm:       x86.AVGF2P8AFFINEINVQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46686,14 +46699,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VREDUCEPS128load",
+               name:      "VGF2P8AFFINEINVQBMasked256load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVREDUCEPS,
+               asm:       x86.AVGF2P8AFFINEINVQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46701,14 +46716,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VREDUCEPS256load",
+               name:      "VGF2P8AFFINEINVQBMasked512load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVREDUCEPS,
+               asm:       x86.AVGF2P8AFFINEINVQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46716,14 +46733,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VREDUCEPS512load",
+               name:      "VGF2P8AFFINEQB128load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVREDUCEPS,
+               asm:       x86.AVGF2P8AFFINEQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46731,14 +46749,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VREDUCEPD128load",
+               name:      "VGF2P8AFFINEQB256load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVREDUCEPD,
+               asm:       x86.AVGF2P8AFFINEQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46746,14 +46765,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VREDUCEPD256load",
+               name:      "VGF2P8AFFINEQB512load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVREDUCEPD,
+               asm:       x86.AVGF2P8AFFINEQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46761,14 +46781,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VREDUCEPD512load",
+               name:      "VGF2P8AFFINEQBMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVREDUCEPD,
+               asm:       x86.AVGF2P8AFFINEQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46776,15 +46798,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VREDUCEPSMasked128load",
+               name:      "VGF2P8AFFINEQBMasked256load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVREDUCEPS,
+               asm:       x86.AVGF2P8AFFINEQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46792,15 +46815,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VREDUCEPSMasked256load",
+               name:      "VGF2P8AFFINEQBMasked512load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVREDUCEPS,
+               asm:       x86.AVGF2P8AFFINEQB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -46808,75 +46832,78 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VREDUCEPSMasked512load",
+               name:      "VPCMPD512load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVREDUCEPS,
+               asm:       x86.AVPCMPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VREDUCEPDMasked128load",
+               name:      "VPCMPDMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVREDUCEPD,
+               asm:       x86.AVPCMPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VREDUCEPDMasked256load",
+               name:      "VPCMPDMasked256load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVREDUCEPD,
+               asm:       x86.AVPCMPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VREDUCEPDMasked512load",
+               name:      "VPCMPDMasked512load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVREDUCEPD,
+               asm:       x86.AVPCMPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
-                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                        },
                },
        },
        {
-               name:      "VCMPPS512load",
+               name:      "VPCMPQ512load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVCMPPS,
+               asm:       x86.AVPCMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -46888,13 +46915,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCMPPD512load",
+               name:      "VPCMPQMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVCMPPD,
+               asm:       x86.AVPCMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -46904,11 +46932,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCMPPSMasked128load",
+               name:      "VPCMPQMasked256load",
                auxType:   auxSymValAndOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVCMPPS,
+               asm:       x86.AVPCMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46921,11 +46949,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCMPPSMasked256load",
+               name:      "VPCMPQMasked512load",
                auxType:   auxSymValAndOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVCMPPS,
+               asm:       x86.AVPCMPQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46938,14 +46966,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCMPPSMasked512load",
+               name:      "VPCMPUD512load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVCMPPS,
+               asm:       x86.AVPCMPUD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -46955,11 +46982,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCMPPDMasked128load",
+               name:      "VPCMPUDMasked128load",
                auxType:   auxSymValAndOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVCMPPD,
+               asm:       x86.AVPCMPUD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46972,11 +46999,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCMPPDMasked256load",
+               name:      "VPCMPUDMasked256load",
                auxType:   auxSymValAndOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVCMPPD,
+               asm:       x86.AVPCMPUD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -46989,11 +47016,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VCMPPDMasked512load",
+               name:      "VPCMPUDMasked512load",
                auxType:   auxSymValAndOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVCMPPD,
+               asm:       x86.AVPCMPUD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -47006,14 +47033,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPCMPDMasked128load",
+               name:      "VPCMPUQ512load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPCMPD,
+               asm:       x86.AVPCMPUQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                                {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
@@ -47023,11 +47049,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPCMPDMasked256load",
+               name:      "VPCMPUQMasked128load",
                auxType:   auxSymValAndOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPCMPD,
+               asm:       x86.AVPCMPUQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -47040,11 +47066,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPCMPDMasked512load",
+               name:      "VPCMPUQMasked256load",
                auxType:   auxSymValAndOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPCMPD,
+               asm:       x86.AVPCMPUQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -47057,11 +47083,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPCMPQMasked128load",
+               name:      "VPCMPUQMasked512load",
                auxType:   auxSymValAndOff,
                argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPCMPQ,
+               asm:       x86.AVPCMPUQ,
                reg: regInfo{
                        inputs: []inputInfo{
                                {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -47074,151 +47100,137 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPCMPQMasked256load",
+               name:      "VPROLD128load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPCMPQ,
+               asm:       x86.AVPROLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPQMasked512load",
+               name:      "VPROLD256load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPCMPQ,
+               asm:       x86.AVPROLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPUDMasked128load",
+               name:      "VPROLD512load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPCMPUD,
+               asm:       x86.AVPROLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPUDMasked256load",
+               name:      "VPROLDMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPCMPUD,
+               asm:       x86.AVPROLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPUDMasked512load",
+               name:      "VPROLDMasked256load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPCMPUD,
+               asm:       x86.AVPROLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPUQMasked128load",
+               name:      "VPROLDMasked512load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPCMPUQ,
+               asm:       x86.AVPROLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPUQMasked256load",
+               name:      "VPROLQ128load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPCMPUQ,
+               asm:       x86.AVPROLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPUQMasked512load",
+               name:      "VPROLQ256load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPCMPUQ,
+               asm:       x86.AVPROLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VGF2P8AFFINEQB128load",
+               name:      "VPROLQ512load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVGF2P8AFFINEQB,
+               asm:       x86.AVPROLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47226,15 +47238,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VGF2P8AFFINEQB256load",
+               name:      "VPROLQMasked128load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVGF2P8AFFINEQB,
+               asm:       x86.AVPROLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47242,15 +47254,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VGF2P8AFFINEQB512load",
+               name:      "VPROLQMasked256load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVGF2P8AFFINEQB,
+               asm:       x86.AVPROLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47258,15 +47270,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VGF2P8AFFINEINVQB128load",
+               name:      "VPROLQMasked512load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVGF2P8AFFINEINVQB,
+               asm:       x86.AVPROLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47274,15 +47286,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VGF2P8AFFINEINVQB256load",
+               name:      "VPRORD128load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVGF2P8AFFINEINVQB,
+               asm:       x86.AVPRORD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47290,15 +47301,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VGF2P8AFFINEINVQB512load",
+               name:      "VPRORD256load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVGF2P8AFFINEINVQB,
+               asm:       x86.AVPRORD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47306,16 +47316,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VGF2P8AFFINEINVQBMasked128load",
+               name:      "VPRORD512load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVGF2P8AFFINEINVQB,
+               asm:       x86.AVPRORD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47323,16 +47331,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VGF2P8AFFINEINVQBMasked256load",
+               name:      "VPRORDMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVGF2P8AFFINEINVQB,
+               asm:       x86.AVPRORD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47340,16 +47347,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VGF2P8AFFINEINVQBMasked512load",
+               name:      "VPRORDMasked256load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVGF2P8AFFINEINVQB,
+               asm:       x86.AVPRORD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47357,16 +47363,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VGF2P8AFFINEQBMasked128load",
+               name:      "VPRORDMasked512load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVGF2P8AFFINEQB,
+               asm:       x86.AVPRORD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47374,16 +47379,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VGF2P8AFFINEQBMasked256load",
+               name:      "VPRORQ128load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVGF2P8AFFINEQB,
+               asm:       x86.AVPRORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47391,16 +47394,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VGF2P8AFFINEQBMasked512load",
+               name:      "VPRORQ256load",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVGF2P8AFFINEQB,
+               asm:       x86.AVPRORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47408,78 +47409,78 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPCMPUD512load",
+               name:      "VPRORQ512load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPCMPUD,
+               asm:       x86.AVPRORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPUQ512load",
+               name:      "VPRORQMasked128load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPCMPUQ,
+               asm:       x86.AVPRORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPD512load",
+               name:      "VPRORQMasked256load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPCMPD,
+               asm:       x86.AVPRORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPCMPQ512load",
+               name:      "VPRORQMasked512load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPCMPQ,
+               asm:       x86.AVPRORQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
-                               {0, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                },
        },
        {
-               name:      "VPSHUFD512load",
+               name:      "VPSHLDD128load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHUFD,
+               asm:       x86.AVPSHLDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47487,15 +47488,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHUFDMasked256load",
+               name:      "VPSHLDD256load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHUFD,
+               asm:       x86.AVPSHLDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47503,15 +47504,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHUFDMasked512load",
+               name:      "VPSHLDD512load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHUFD,
+               asm:       x86.AVPSHLDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47519,15 +47520,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHUFDMasked128load",
+               name:      "VPSHLDDMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPSHUFD,
+               asm:       x86.AVPSHLDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47535,14 +47537,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLD128load",
+               name:      "VPSHLDDMasked256load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPROLD,
+               asm:       x86.AVPSHLDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47550,14 +47554,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLD256load",
+               name:      "VPSHLDDMasked512load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPROLD,
+               asm:       x86.AVPSHLDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47565,14 +47571,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLD512load",
+               name:      "VPSHLDQ128load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPROLD,
+               asm:       x86.AVPSHLDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47580,14 +47587,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLQ128load",
+               name:      "VPSHLDQ256load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPROLQ,
+               asm:       x86.AVPSHLDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47595,14 +47603,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLQ256load",
+               name:      "VPSHLDQ512load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPROLQ,
+               asm:       x86.AVPSHLDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47610,14 +47619,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLQ512load",
+               name:      "VPSHLDQMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPROLQ,
+               asm:       x86.AVPSHLDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47625,15 +47636,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLDMasked128load",
+               name:      "VPSHLDQMasked256load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPROLD,
+               asm:       x86.AVPSHLDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47641,15 +47653,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLDMasked256load",
+               name:      "VPSHLDQMasked512load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPROLD,
+               asm:       x86.AVPSHLDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47657,15 +47670,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLDMasked512load",
+               name:      "VPSHRDD128load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPROLD,
+               asm:       x86.AVPSHRDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47673,15 +47686,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLQMasked128load",
+               name:      "VPSHRDD256load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPROLQ,
+               asm:       x86.AVPSHRDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47689,15 +47702,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLQMasked256load",
+               name:      "VPSHRDD512load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPROLQ,
+               asm:       x86.AVPSHRDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47705,15 +47718,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPROLQMasked512load",
+               name:      "VPSHRDDMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPROLQ,
+               asm:       x86.AVPSHRDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47721,14 +47735,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORD128load",
+               name:      "VPSHRDDMasked256load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPRORD,
+               asm:       x86.AVPSHRDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47736,14 +47752,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORD256load",
+               name:      "VPSHRDDMasked512load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPRORD,
+               asm:       x86.AVPSHRDD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47751,14 +47769,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORD512load",
+               name:      "VPSHRDQ128load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPRORD,
+               asm:       x86.AVPSHRDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47766,14 +47785,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORQ128load",
+               name:      "VPSHRDQ256load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPRORQ,
+               asm:       x86.AVPSHRDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47781,14 +47801,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORQ256load",
+               name:      "VPSHRDQ512load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPRORQ,
+               asm:       x86.AVPSHRDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47796,14 +47817,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORQ512load",
+               name:      "VPSHRDQMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPRORQ,
+               asm:       x86.AVPSHRDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47811,15 +47834,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORDMasked128load",
+               name:      "VPSHRDQMasked256load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPRORD,
+               asm:       x86.AVPSHRDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47827,15 +47851,16 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORDMasked256load",
+               name:      "VPSHRDQMasked512load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    4,
                symEffect: SymRead,
-               asm:       x86.AVPRORD,
+               asm:       x86.AVPSHRDQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47843,14 +47868,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORDMasked512load",
+               name:      "VPSHUFD512load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPRORD,
+               asm:       x86.AVPSHUFD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -47859,11 +47883,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORQMasked128load",
+               name:      "VPSHUFDMasked128load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPRORQ,
+               asm:       x86.AVPSHUFD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -47875,11 +47899,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORQMasked256load",
+               name:      "VPSHUFDMasked256load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPRORQ,
+               asm:       x86.AVPSHUFD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -47891,11 +47915,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPRORQMasked512load",
+               name:      "VPSHUFDMasked512load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPRORQ,
+               asm:       x86.AVPSHUFD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -47907,15 +47931,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHLDD128load",
+               name:      "VPSLLD512constload",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSHLDD,
+               asm:       x86.AVPSLLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47923,15 +47946,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHLDD256load",
+               name:      "VPSLLDMasked128constload",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHLDD,
+               asm:       x86.AVPSLLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47939,15 +47962,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHLDD512load",
+               name:      "VPSLLDMasked256constload",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHLDD,
+               asm:       x86.AVPSLLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47955,15 +47978,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHLDQ128load",
+               name:      "VPSLLDMasked512constload",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHLDQ,
+               asm:       x86.AVPSLLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47971,15 +47994,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHLDQ256load",
+               name:      "VPSLLQ512constload",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSHLDQ,
+               asm:       x86.AVPSLLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -47987,15 +48009,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHLDQ512load",
+               name:      "VPSLLQMasked128constload",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHLDQ,
+               asm:       x86.AVPSLLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48003,16 +48025,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHLDDMasked128load",
+               name:      "VPSLLQMasked256constload",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHLDD,
+               asm:       x86.AVPSLLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48020,16 +48041,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHLDDMasked256load",
+               name:      "VPSLLQMasked512constload",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHLDD,
+               asm:       x86.AVPSLLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48037,16 +48057,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHLDDMasked512load",
+               name:      "VPSRAD512constload",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSHLDD,
+               asm:       x86.AVPSRAD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48054,16 +48072,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHLDQMasked128load",
+               name:      "VPSRADMasked128constload",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHLDQ,
+               asm:       x86.AVPSRAD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48071,16 +48088,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHLDQMasked256load",
+               name:      "VPSRADMasked256constload",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHLDQ,
+               asm:       x86.AVPSRAD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48088,16 +48104,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHLDQMasked512load",
+               name:      "VPSRADMasked512constload",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHLDQ,
+               asm:       x86.AVPSRAD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48105,15 +48120,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHRDD128load",
+               name:      "VPSRAQ128constload",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSHRDD,
+               asm:       x86.AVPSRAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48121,15 +48135,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHRDD256load",
+               name:      "VPSRAQ256constload",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSHRDD,
+               asm:       x86.AVPSRAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48137,15 +48150,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHRDD512load",
+               name:      "VPSRAQ512constload",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSHRDD,
+               asm:       x86.AVPSRAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48153,15 +48165,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHRDQ128load",
+               name:      "VPSRAQMasked128constload",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHRDQ,
+               asm:       x86.AVPSRAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48169,15 +48181,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHRDQ256load",
+               name:      "VPSRAQMasked256constload",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHRDQ,
+               asm:       x86.AVPSRAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48185,15 +48197,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHRDQ512load",
+               name:      "VPSRAQMasked512constload",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHRDQ,
+               asm:       x86.AVPSRAQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48201,16 +48213,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHRDDMasked128load",
+               name:      "VPSRLD512constload",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSHRDD,
+               asm:       x86.AVPSRLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48218,16 +48228,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHRDDMasked256load",
+               name:      "VPSRLDMasked128constload",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHRDD,
+               asm:       x86.AVPSRLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48235,16 +48244,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHRDDMasked512load",
+               name:      "VPSRLDMasked256constload",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHRDD,
+               asm:       x86.AVPSRLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48252,16 +48260,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHRDQMasked128load",
+               name:      "VPSRLDMasked512constload",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHRDQ,
+               asm:       x86.AVPSRLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48269,16 +48276,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHRDQMasked256load",
+               name:      "VPSRLQ512constload",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSHRDQ,
+               asm:       x86.AVPSRLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48286,16 +48291,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSHRDQMasked512load",
+               name:      "VPSRLQMasked128constload",
                auxType:   auxSymValAndOff,
-               argLen:    4,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSHRDQ,
+               asm:       x86.AVPSRLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48303,15 +48307,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSHUFPS512load",
+               name:      "VPSRLQMasked256constload",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSHUFPS,
+               asm:       x86.AVPSRLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48319,15 +48323,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VSHUFPD512load",
+               name:      "VPSRLQMasked512constload",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVSHUFPD,
+               asm:       x86.AVPSRLQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48335,14 +48339,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLD512constload",
-               auxType:   auxSymValAndOff,
-               argLen:    2,
-               symEffect: SymRead,
-               asm:       x86.AVPSLLD,
+               name:         "VPTERNLOGD128load",
+               auxType:      auxSymValAndOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPTERNLOGD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48350,14 +48357,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLQ512constload",
-               auxType:   auxSymValAndOff,
-               argLen:    2,
-               symEffect: SymRead,
-               asm:       x86.AVPSLLQ,
+               name:         "VPTERNLOGD256load",
+               auxType:      auxSymValAndOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPTERNLOGD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48365,15 +48375,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLDMasked128constload",
-               auxType:   auxSymValAndOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPSLLD,
+               name:         "VPTERNLOGD512load",
+               auxType:      auxSymValAndOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPTERNLOGD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48381,15 +48393,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLDMasked256constload",
-               auxType:   auxSymValAndOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPSLLD,
+               name:         "VPTERNLOGQ128load",
+               auxType:      auxSymValAndOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPTERNLOGQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48397,15 +48411,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLDMasked512constload",
-               auxType:   auxSymValAndOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPSLLD,
+               name:         "VPTERNLOGQ256load",
+               auxType:      auxSymValAndOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPTERNLOGQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48413,15 +48429,17 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLQMasked128constload",
-               auxType:   auxSymValAndOff,
-               argLen:    3,
-               symEffect: SymRead,
-               asm:       x86.AVPSLLQ,
+               name:         "VPTERNLOGQ512load",
+               auxType:      auxSymValAndOff,
+               argLen:       4,
+               resultInArg0: true,
+               symEffect:    SymRead,
+               asm:          x86.AVPTERNLOGQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
-                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48429,14 +48447,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLQMasked256constload",
+               name:      "VREDUCEPD128load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSLLQ,
+               asm:       x86.AVREDUCEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -48445,14 +48462,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSLLQMasked512constload",
+               name:      "VREDUCEPD256load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSLLQ,
+               asm:       x86.AVREDUCEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -48461,11 +48477,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLD512constload",
+               name:      "VREDUCEPD512load",
                auxType:   auxSymValAndOff,
                argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRLD,
+               asm:       x86.AVREDUCEPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -48476,13 +48492,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLQ512constload",
+               name:      "VREDUCEPDMasked128load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRLQ,
+               asm:       x86.AVREDUCEPD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -48491,13 +48508,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAD512constload",
+               name:      "VREDUCEPDMasked256load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRAD,
+               asm:       x86.AVREDUCEPD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -48506,13 +48524,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAQ128constload",
+               name:      "VREDUCEPDMasked512load",
                auxType:   auxSymValAndOff,
-               argLen:    2,
+               argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRAQ,
+               asm:       x86.AVREDUCEPD,
                reg: regInfo{
                        inputs: []inputInfo{
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -48521,11 +48540,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAQ256constload",
+               name:      "VREDUCEPS128load",
                auxType:   auxSymValAndOff,
                argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRAQ,
+               asm:       x86.AVREDUCEPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -48536,11 +48555,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAQ512constload",
+               name:      "VREDUCEPS256load",
                auxType:   auxSymValAndOff,
                argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRAQ,
+               asm:       x86.AVREDUCEPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
@@ -48551,14 +48570,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLDMasked128constload",
+               name:      "VREDUCEPS512load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRLD,
+               asm:       x86.AVREDUCEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -48567,11 +48585,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLDMasked256constload",
+               name:      "VREDUCEPSMasked128load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRLD,
+               asm:       x86.AVREDUCEPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -48583,11 +48601,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLDMasked512constload",
+               name:      "VREDUCEPSMasked256load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRLD,
+               asm:       x86.AVREDUCEPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -48599,11 +48617,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLQMasked128constload",
+               name:      "VREDUCEPSMasked512load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRLQ,
+               asm:       x86.AVREDUCEPS,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -48615,14 +48633,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLQMasked256constload",
+               name:      "VRNDSCALEPD128load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRLQ,
+               asm:       x86.AVRNDSCALEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -48631,14 +48648,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRLQMasked512constload",
+               name:      "VRNDSCALEPD256load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRLQ,
+               asm:       x86.AVRNDSCALEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -48647,14 +48663,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRADMasked128constload",
+               name:      "VRNDSCALEPD512load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRAD,
+               asm:       x86.AVRNDSCALEPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -48663,11 +48678,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRADMasked256constload",
+               name:      "VRNDSCALEPDMasked128load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRAD,
+               asm:       x86.AVRNDSCALEPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -48679,11 +48694,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRADMasked512constload",
+               name:      "VRNDSCALEPDMasked256load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRAD,
+               asm:       x86.AVRNDSCALEPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -48695,11 +48710,11 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAQMasked128constload",
+               name:      "VRNDSCALEPDMasked512load",
                auxType:   auxSymValAndOff,
                argLen:    3,
                symEffect: SymRead,
-               asm:       x86.AVPSRAQ,
+               asm:       x86.AVRNDSCALEPD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
@@ -48711,14 +48726,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAQMasked256constload",
+               name:      "VRNDSCALEPS128load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRAQ,
+               asm:       x86.AVRNDSCALEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -48727,14 +48741,13 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "VPSRAQMasked512constload",
+               name:      "VRNDSCALEPS256load",
                auxType:   auxSymValAndOff,
-               argLen:    3,
+               argLen:    2,
                symEffect: SymRead,
-               asm:       x86.AVPSRAQ,
+               asm:       x86.AVRNDSCALEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
                                {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
@@ -48743,17 +48756,14 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPTERNLOGD128load",
-               auxType:      auxSymValAndOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPTERNLOGD,
+               name:      "VRNDSCALEPS512load",
+               auxType:   auxSymValAndOff,
+               argLen:    2,
+               symEffect: SymRead,
+               asm:       x86.AVRNDSCALEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48761,17 +48771,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPTERNLOGD256load",
-               auxType:      auxSymValAndOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPTERNLOGD,
+               name:      "VRNDSCALEPSMasked128load",
+               auxType:   auxSymValAndOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVRNDSCALEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48779,17 +48787,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPTERNLOGD512load",
-               auxType:      auxSymValAndOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPTERNLOGD,
+               name:      "VRNDSCALEPSMasked256load",
+               auxType:   auxSymValAndOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVRNDSCALEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48797,17 +48803,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPTERNLOGQ128load",
-               auxType:      auxSymValAndOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPTERNLOGQ,
+               name:      "VRNDSCALEPSMasked512load",
+               auxType:   auxSymValAndOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVRNDSCALEPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7
+                               {0, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48815,17 +48819,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPTERNLOGQ256load",
-               auxType:      auxSymValAndOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPTERNLOGQ,
+               name:      "VSHUFPD512load",
+               auxType:   auxSymValAndOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVSHUFPD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
@@ -48833,17 +48835,15 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:         "VPTERNLOGQ512load",
-               auxType:      auxSymValAndOff,
-               argLen:       4,
-               resultInArg0: true,
-               symEffect:    SymRead,
-               asm:          x86.AVPTERNLOGQ,
+               name:      "VSHUFPS512load",
+               auxType:   auxSymValAndOff,
+               argLen:    3,
+               symEffect: SymRead,
+               asm:       x86.AVSHUFPS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {2, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
-                               {0, 281472829161472},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
-                               {1, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
+                               {1, 72057594037977087}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R15 SB
+                               {0, 281474976645120},   // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31
                        },
                        outputs: []outputInfo{
                                {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31

diff --git a/src/simd/_gen/simdgen/gen_simdMachineOps.go b/src/simd/_gen/simdgen/gen_simdMachineOps.go
index b1286ad604532bfb6f2f60f5b6f9c2201b658f93..240227b27d10927a84e7f1144688fdc49330c131 100644 (file)
--- a/src/simd/_gen/simdgen/gen_simdMachineOps.go
+++ b/src/simd/_gen/simdgen/gen_simdMachineOps.go
@@ -185,13 +185,13 @@ func writeSIMDMachineOps(ops []Operation) *bytes.Buffer {
                return compareNatural(opsData[i].OpName, opsData[j].OpName) < 0
        })
        sort.Slice(opsDataImm, func(i, j int) bool {
-               return compareNatural(opsData[i].OpName, opsData[j].OpName) < 0
+               return compareNatural(opsDataImm[i].OpName, opsDataImm[j].OpName) < 0
        })
        sort.Slice(opsDataLoad, func(i, j int) bool {
-               return compareNatural(opsData[i].OpName, opsData[j].OpName) < 0
+               return compareNatural(opsDataLoad[i].OpName, opsDataLoad[j].OpName) < 0
        })
        sort.Slice(opsDataImmLoad, func(i, j int) bool {
-               return compareNatural(opsData[i].OpName, opsData[j].OpName) < 0
+               return compareNatural(opsDataImmLoad[i].OpName, opsDataImmLoad[j].OpName) < 0
        })
        err := t.Execute(buffer, machineOpsData{opsData, opsDataImm, opsDataLoad, opsDataImmLoad})
        if err != nil {