From: Junyang Shao Date: Thu, 21 Aug 2025 17:33:50 +0000 (+0000) Subject: [dev.simd] cmd/compile, simd: add saturated u?int conversions X-Git-Tag: go1.26rc1~147^2~101 X-Git-Url: http://www.git.cypherpunks.su/?a=commitdiff_plain;h=4fa23b0d29;p=gostls13.git [dev.simd] cmd/compile, simd: add saturated u?int conversions Change-Id: I0c7f2d7ec31c59c95568ff8d4560989de849427e Reviewed-on: https://go-review.googlesource.com/c/go/+/698235 Reviewed-by: David Chase LUCI-TryBot-Result: Go LUCI --- diff --git a/src/cmd/compile/internal/amd64/simdssa.go b/src/cmd/compile/internal/amd64/simdssa.go index e5ff346011..b12690ca03 100644 --- a/src/cmd/compile/internal/amd64/simdssa.go +++ b/src/cmd/compile/internal/amd64/simdssa.go @@ -45,11 +45,18 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPMOVWB256, ssa.OpAMD64VPMOVDB128, ssa.OpAMD64VPMOVQB128, + ssa.OpAMD64VPMOVSWB128, + ssa.OpAMD64VPMOVSWB256, + ssa.OpAMD64VPMOVSDB128, + ssa.OpAMD64VPMOVSQB128, ssa.OpAMD64VPMOVSXBW256, ssa.OpAMD64VPMOVSXBW512, ssa.OpAMD64VPMOVDW128, ssa.OpAMD64VPMOVDW256, ssa.OpAMD64VPMOVQW128, + ssa.OpAMD64VPMOVSDW128, + ssa.OpAMD64VPMOVSDW256, + ssa.OpAMD64VPMOVSQW128, ssa.OpAMD64VPMOVSXBW128, ssa.OpAMD64VCVTTPS2DQ128, ssa.OpAMD64VCVTTPS2DQ256, @@ -59,6 +66,8 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPMOVSXWD512, ssa.OpAMD64VPMOVQD128, ssa.OpAMD64VPMOVQD256, + ssa.OpAMD64VPMOVSQD128, + ssa.OpAMD64VPMOVSQD256, ssa.OpAMD64VPMOVSXBD128, ssa.OpAMD64VPMOVSXWD128, ssa.OpAMD64VPMOVSXBD256, @@ -70,8 +79,15 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPMOVSXDQ128, ssa.OpAMD64VPMOVSXBQ256, ssa.OpAMD64VPMOVSXBQ512, + ssa.OpAMD64VPMOVUSWB128, + ssa.OpAMD64VPMOVUSWB256, + ssa.OpAMD64VPMOVUSDB128, + ssa.OpAMD64VPMOVUSQB128, ssa.OpAMD64VPMOVZXBW256, ssa.OpAMD64VPMOVZXBW512, + ssa.OpAMD64VPMOVUSDW128, + ssa.OpAMD64VPMOVUSDW256, + ssa.OpAMD64VPMOVUSQW128, ssa.OpAMD64VPMOVZXBW128, ssa.OpAMD64VCVTPS2UDQ128, ssa.OpAMD64VCVTPS2UDQ256, @@ -79,6 +95,8 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPMOVZXBD512, ssa.OpAMD64VPMOVZXWD256, ssa.OpAMD64VPMOVZXWD512, + ssa.OpAMD64VPMOVUSQD128, + ssa.OpAMD64VPMOVUSQD256, ssa.OpAMD64VPMOVZXBD128, ssa.OpAMD64VPMOVZXWD128, ssa.OpAMD64VPMOVZXBD256, @@ -728,11 +746,18 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPMOVWBMasked256, ssa.OpAMD64VPMOVDBMasked128, ssa.OpAMD64VPMOVQBMasked128, + ssa.OpAMD64VPMOVSWBMasked128, + ssa.OpAMD64VPMOVSWBMasked256, + ssa.OpAMD64VPMOVSDBMasked128, + ssa.OpAMD64VPMOVSQBMasked128, ssa.OpAMD64VPMOVSXBWMasked256, ssa.OpAMD64VPMOVSXBWMasked512, ssa.OpAMD64VPMOVDWMasked128, ssa.OpAMD64VPMOVDWMasked256, ssa.OpAMD64VPMOVQWMasked128, + ssa.OpAMD64VPMOVSDWMasked128, + ssa.OpAMD64VPMOVSDWMasked256, + ssa.OpAMD64VPMOVSQWMasked128, ssa.OpAMD64VPMOVSXBWMasked128, ssa.OpAMD64VCVTTPS2DQMasked128, ssa.OpAMD64VCVTTPS2DQMasked256, @@ -742,6 +767,8 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPMOVSXWDMasked512, ssa.OpAMD64VPMOVQDMasked128, ssa.OpAMD64VPMOVQDMasked256, + ssa.OpAMD64VPMOVSQDMasked128, + ssa.OpAMD64VPMOVSQDMasked256, ssa.OpAMD64VPMOVSXBDMasked128, ssa.OpAMD64VPMOVSXWDMasked128, ssa.OpAMD64VPMOVSXBDMasked256, @@ -753,8 +780,15 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPMOVSXDQMasked128, ssa.OpAMD64VPMOVSXBQMasked256, ssa.OpAMD64VPMOVSXBQMasked512, + ssa.OpAMD64VPMOVUSWBMasked128, + ssa.OpAMD64VPMOVUSWBMasked256, + ssa.OpAMD64VPMOVUSDBMasked128, + ssa.OpAMD64VPMOVUSQBMasked128, ssa.OpAMD64VPMOVZXBWMasked256, ssa.OpAMD64VPMOVZXBWMasked512, + ssa.OpAMD64VPMOVUSDWMasked128, + ssa.OpAMD64VPMOVUSDWMasked256, + ssa.OpAMD64VPMOVUSQWMasked128, ssa.OpAMD64VPMOVZXBWMasked128, ssa.OpAMD64VCVTPS2UDQMasked128, ssa.OpAMD64VCVTPS2UDQMasked256, @@ -762,6 +796,8 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPMOVZXBDMasked512, ssa.OpAMD64VPMOVZXWDMasked256, ssa.OpAMD64VPMOVZXWDMasked512, + ssa.OpAMD64VPMOVUSQDMasked128, + ssa.OpAMD64VPMOVUSQDMasked256, ssa.OpAMD64VPMOVZXBDMasked128, ssa.OpAMD64VPMOVZXWDMasked128, ssa.OpAMD64VPMOVZXBDMasked256, @@ -1389,11 +1425,18 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPMOVWBMasked256, ssa.OpAMD64VPMOVDBMasked128, ssa.OpAMD64VPMOVQBMasked128, + ssa.OpAMD64VPMOVSWBMasked128, + ssa.OpAMD64VPMOVSWBMasked256, + ssa.OpAMD64VPMOVSDBMasked128, + ssa.OpAMD64VPMOVSQBMasked128, ssa.OpAMD64VPMOVSXBWMasked256, ssa.OpAMD64VPMOVSXBWMasked512, ssa.OpAMD64VPMOVDWMasked128, ssa.OpAMD64VPMOVDWMasked256, ssa.OpAMD64VPMOVQWMasked128, + ssa.OpAMD64VPMOVSDWMasked128, + ssa.OpAMD64VPMOVSDWMasked256, + ssa.OpAMD64VPMOVSQWMasked128, ssa.OpAMD64VPMOVSXBWMasked128, ssa.OpAMD64VCVTTPS2DQMasked128, ssa.OpAMD64VCVTTPS2DQMasked256, @@ -1403,6 +1446,8 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPMOVSXWDMasked512, ssa.OpAMD64VPMOVQDMasked128, ssa.OpAMD64VPMOVQDMasked256, + ssa.OpAMD64VPMOVSQDMasked128, + ssa.OpAMD64VPMOVSQDMasked256, ssa.OpAMD64VPMOVSXBDMasked128, ssa.OpAMD64VPMOVSXWDMasked128, ssa.OpAMD64VPMOVSXBDMasked256, @@ -1414,8 +1459,15 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPMOVSXDQMasked128, ssa.OpAMD64VPMOVSXBQMasked256, ssa.OpAMD64VPMOVSXBQMasked512, + ssa.OpAMD64VPMOVUSWBMasked128, + ssa.OpAMD64VPMOVUSWBMasked256, + ssa.OpAMD64VPMOVUSDBMasked128, + ssa.OpAMD64VPMOVUSQBMasked128, ssa.OpAMD64VPMOVZXBWMasked256, ssa.OpAMD64VPMOVZXBWMasked512, + ssa.OpAMD64VPMOVUSDWMasked128, + ssa.OpAMD64VPMOVUSDWMasked256, + ssa.OpAMD64VPMOVUSQWMasked128, ssa.OpAMD64VPMOVZXBWMasked128, ssa.OpAMD64VCVTPS2UDQMasked128, ssa.OpAMD64VCVTPS2UDQMasked256, @@ -1423,6 +1475,8 @@ func ssaGenSIMDValue(s *ssagen.State, v *ssa.Value) bool { ssa.OpAMD64VPMOVZXBDMasked512, ssa.OpAMD64VPMOVZXWDMasked256, ssa.OpAMD64VPMOVZXWDMasked512, + ssa.OpAMD64VPMOVUSQDMasked128, + ssa.OpAMD64VPMOVUSQDMasked256, ssa.OpAMD64VPMOVZXBDMasked128, ssa.OpAMD64VPMOVZXWDMasked128, ssa.OpAMD64VPMOVZXBDMasked256, diff --git a/src/cmd/compile/internal/ssa/_gen/simdAMD64.rules b/src/cmd/compile/internal/ssa/_gen/simdAMD64.rules index 66bb69eaf5..372b5a79f6 100644 --- a/src/cmd/compile/internal/ssa/_gen/simdAMD64.rules +++ b/src/cmd/compile/internal/ssa/_gen/simdAMD64.rules @@ -220,6 +220,15 @@ (ConvertToInt8Int64x2 ...) => (VPMOVQB128 ...) (ConvertToInt8Int64x4 ...) => (VPMOVQB128 ...) (ConvertToInt8Int64x8 ...) => (VPMOVQB128 ...) +(ConvertToInt8SaturatedInt16x8 ...) => (VPMOVSWB128 ...) +(ConvertToInt8SaturatedInt16x16 ...) => (VPMOVSWB128 ...) +(ConvertToInt8SaturatedInt16x32 ...) => (VPMOVSWB256 ...) +(ConvertToInt8SaturatedInt32x4 ...) => (VPMOVSDB128 ...) +(ConvertToInt8SaturatedInt32x8 ...) => (VPMOVSDB128 ...) +(ConvertToInt8SaturatedInt32x16 ...) => (VPMOVSDB128 ...) +(ConvertToInt8SaturatedInt64x2 ...) => (VPMOVSQB128 ...) +(ConvertToInt8SaturatedInt64x4 ...) => (VPMOVSQB128 ...) +(ConvertToInt8SaturatedInt64x8 ...) => (VPMOVSQB128 ...) (ConvertToInt16Int8x16 ...) => (VPMOVSXBW256 ...) (ConvertToInt16Int8x32 ...) => (VPMOVSXBW512 ...) (ConvertToInt16Int32x4 ...) => (VPMOVDW128 ...) @@ -228,6 +237,12 @@ (ConvertToInt16Int64x2 ...) => (VPMOVQW128 ...) (ConvertToInt16Int64x4 ...) => (VPMOVQW128 ...) (ConvertToInt16Int64x8 ...) => (VPMOVQW128 ...) +(ConvertToInt16SaturatedInt32x4 ...) => (VPMOVSDW128 ...) +(ConvertToInt16SaturatedInt32x8 ...) => (VPMOVSDW128 ...) +(ConvertToInt16SaturatedInt32x16 ...) => (VPMOVSDW256 ...) +(ConvertToInt16SaturatedInt64x2 ...) => (VPMOVSQW128 ...) +(ConvertToInt16SaturatedInt64x4 ...) => (VPMOVSQW128 ...) +(ConvertToInt16SaturatedInt64x8 ...) => (VPMOVSQW128 ...) (ConvertToInt16x8Int8x16 ...) => (VPMOVSXBW128 ...) (ConvertToInt32Float32x4 ...) => (VCVTTPS2DQ128 ...) (ConvertToInt32Float32x8 ...) => (VCVTTPS2DQ256 ...) @@ -238,6 +253,9 @@ (ConvertToInt32Int64x2 ...) => (VPMOVQD128 ...) (ConvertToInt32Int64x4 ...) => (VPMOVQD128 ...) (ConvertToInt32Int64x8 ...) => (VPMOVQD256 ...) +(ConvertToInt32SaturatedInt64x2 ...) => (VPMOVSQD128 ...) +(ConvertToInt32SaturatedInt64x4 ...) => (VPMOVSQD128 ...) +(ConvertToInt32SaturatedInt64x8 ...) => (VPMOVSQD256 ...) (ConvertToInt32x4Int8x16 ...) => (VPMOVSXBD128 ...) (ConvertToInt32x4Int16x8 ...) => (VPMOVSXWD128 ...) (ConvertToInt32x8Int8x16 ...) => (VPMOVSXBD256 ...) @@ -258,6 +276,15 @@ (ConvertToUint8Uint64x2 ...) => (VPMOVQB128 ...) (ConvertToUint8Uint64x4 ...) => (VPMOVQB128 ...) (ConvertToUint8Uint64x8 ...) => (VPMOVQB128 ...) +(ConvertToUint8SaturatedUint16x8 ...) => (VPMOVUSWB128 ...) +(ConvertToUint8SaturatedUint16x16 ...) => (VPMOVUSWB128 ...) +(ConvertToUint8SaturatedUint16x32 ...) => (VPMOVUSWB256 ...) +(ConvertToUint8SaturatedUint32x4 ...) => (VPMOVUSDB128 ...) +(ConvertToUint8SaturatedUint32x8 ...) => (VPMOVUSDB128 ...) +(ConvertToUint8SaturatedUint32x16 ...) => (VPMOVUSDB128 ...) +(ConvertToUint8SaturatedUint64x2 ...) => (VPMOVUSQB128 ...) +(ConvertToUint8SaturatedUint64x4 ...) => (VPMOVUSQB128 ...) +(ConvertToUint8SaturatedUint64x8 ...) => (VPMOVUSQB128 ...) (ConvertToUint16Uint8x16 ...) => (VPMOVZXBW256 ...) (ConvertToUint16Uint8x32 ...) => (VPMOVZXBW512 ...) (ConvertToUint16Uint32x4 ...) => (VPMOVDW128 ...) @@ -266,6 +293,12 @@ (ConvertToUint16Uint64x2 ...) => (VPMOVQW128 ...) (ConvertToUint16Uint64x4 ...) => (VPMOVQW128 ...) (ConvertToUint16Uint64x8 ...) => (VPMOVQW128 ...) +(ConvertToUint16SaturatedUint32x4 ...) => (VPMOVUSDW128 ...) +(ConvertToUint16SaturatedUint32x8 ...) => (VPMOVUSDW128 ...) +(ConvertToUint16SaturatedUint32x16 ...) => (VPMOVUSDW256 ...) +(ConvertToUint16SaturatedUint64x2 ...) => (VPMOVUSQW128 ...) +(ConvertToUint16SaturatedUint64x4 ...) => (VPMOVUSQW128 ...) +(ConvertToUint16SaturatedUint64x8 ...) => (VPMOVUSQW128 ...) (ConvertToUint16x8Uint8x16 ...) => (VPMOVZXBW128 ...) (ConvertToUint32Float32x4 ...) => (VCVTPS2UDQ128 ...) (ConvertToUint32Float32x8 ...) => (VCVTPS2UDQ256 ...) @@ -276,6 +309,9 @@ (ConvertToUint32Uint64x2 ...) => (VPMOVQD128 ...) (ConvertToUint32Uint64x4 ...) => (VPMOVQD128 ...) (ConvertToUint32Uint64x8 ...) => (VPMOVQD256 ...) +(ConvertToUint32SaturatedUint64x2 ...) => (VPMOVUSQD128 ...) +(ConvertToUint32SaturatedUint64x4 ...) => (VPMOVUSQD128 ...) +(ConvertToUint32SaturatedUint64x8 ...) => (VPMOVUSQD256 ...) (ConvertToUint32x4Uint8x16 ...) => (VPMOVZXBD128 ...) (ConvertToUint32x4Uint16x8 ...) => (VPMOVZXWD128 ...) (ConvertToUint32x8Uint8x16 ...) => (VPMOVZXBD256 ...) diff --git a/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go b/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go index d8094fdd8f..773cb2063a 100644 --- a/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go +++ b/src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go @@ -562,6 +562,24 @@ func simdAMD64Ops(v11, v21, v2k, vkv, v2kv, v2kk, v31, v3kv, vgpv, vgp, vfpv, vf {name: "VPMOVQDMasked256", argLength: 2, reg: wkw, asm: "VPMOVQD", commutative: false, typ: "Vec256", resultInArg0: false}, {name: "VPMOVQW128", argLength: 1, reg: w11, asm: "VPMOVQW", commutative: false, typ: "Vec128", resultInArg0: false}, {name: "VPMOVQWMasked128", argLength: 2, reg: wkw, asm: "VPMOVQW", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSDB128", argLength: 1, reg: w11, asm: "VPMOVSDB", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSDBMasked128", argLength: 2, reg: wkw, asm: "VPMOVSDB", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSDW128", argLength: 1, reg: w11, asm: "VPMOVSDW", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSDW256", argLength: 1, reg: w11, asm: "VPMOVSDW", commutative: false, typ: "Vec256", resultInArg0: false}, + {name: "VPMOVSDWMasked128", argLength: 2, reg: wkw, asm: "VPMOVSDW", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSDWMasked256", argLength: 2, reg: wkw, asm: "VPMOVSDW", commutative: false, typ: "Vec256", resultInArg0: false}, + {name: "VPMOVSQB128", argLength: 1, reg: w11, asm: "VPMOVSQB", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSQBMasked128", argLength: 2, reg: wkw, asm: "VPMOVSQB", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSQD128", argLength: 1, reg: w11, asm: "VPMOVSQD", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSQD256", argLength: 1, reg: w11, asm: "VPMOVSQD", commutative: false, typ: "Vec256", resultInArg0: false}, + {name: "VPMOVSQDMasked128", argLength: 2, reg: wkw, asm: "VPMOVSQD", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSQDMasked256", argLength: 2, reg: wkw, asm: "VPMOVSQD", commutative: false, typ: "Vec256", resultInArg0: false}, + {name: "VPMOVSQW128", argLength: 1, reg: w11, asm: "VPMOVSQW", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSQWMasked128", argLength: 2, reg: wkw, asm: "VPMOVSQW", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSWB128", argLength: 1, reg: w11, asm: "VPMOVSWB", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSWB256", argLength: 1, reg: w11, asm: "VPMOVSWB", commutative: false, typ: "Vec256", resultInArg0: false}, + {name: "VPMOVSWBMasked128", argLength: 2, reg: wkw, asm: "VPMOVSWB", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVSWBMasked256", argLength: 2, reg: wkw, asm: "VPMOVSWB", commutative: false, typ: "Vec256", resultInArg0: false}, {name: "VPMOVSXBD128", argLength: 1, reg: v11, asm: "VPMOVSXBD", commutative: false, typ: "Vec128", resultInArg0: false}, {name: "VPMOVSXBD256", argLength: 1, reg: v11, asm: "VPMOVSXBD", commutative: false, typ: "Vec256", resultInArg0: false}, {name: "VPMOVSXBD512", argLength: 1, reg: w11, asm: "VPMOVSXBD", commutative: false, typ: "Vec512", resultInArg0: false}, @@ -598,6 +616,24 @@ func simdAMD64Ops(v11, v21, v2k, vkv, v2kv, v2kk, v31, v3kv, vgpv, vgp, vfpv, vf {name: "VPMOVSXWQMasked128", argLength: 2, reg: wkw, asm: "VPMOVSXWQ", commutative: false, typ: "Vec128", resultInArg0: false}, {name: "VPMOVSXWQMasked256", argLength: 2, reg: wkw, asm: "VPMOVSXWQ", commutative: false, typ: "Vec256", resultInArg0: false}, {name: "VPMOVSXWQMasked512", argLength: 2, reg: wkw, asm: "VPMOVSXWQ", commutative: false, typ: "Vec512", resultInArg0: false}, + {name: "VPMOVUSDB128", argLength: 1, reg: w11, asm: "VPMOVUSDB", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVUSDBMasked128", argLength: 2, reg: wkw, asm: "VPMOVUSDB", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVUSDW128", argLength: 1, reg: w11, asm: "VPMOVUSDW", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVUSDW256", argLength: 1, reg: w11, asm: "VPMOVUSDW", commutative: false, typ: "Vec256", resultInArg0: false}, + {name: "VPMOVUSDWMasked128", argLength: 2, reg: wkw, asm: "VPMOVUSDW", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVUSDWMasked256", argLength: 2, reg: wkw, asm: "VPMOVUSDW", commutative: false, typ: "Vec256", resultInArg0: false}, + {name: "VPMOVUSQB128", argLength: 1, reg: w11, asm: "VPMOVUSQB", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVUSQBMasked128", argLength: 2, reg: wkw, asm: "VPMOVUSQB", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVUSQD128", argLength: 1, reg: w11, asm: "VPMOVUSQD", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVUSQD256", argLength: 1, reg: w11, asm: "VPMOVUSQD", commutative: false, typ: "Vec256", resultInArg0: false}, + {name: "VPMOVUSQDMasked128", argLength: 2, reg: wkw, asm: "VPMOVUSQD", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVUSQDMasked256", argLength: 2, reg: wkw, asm: "VPMOVUSQD", commutative: false, typ: "Vec256", resultInArg0: false}, + {name: "VPMOVUSQW128", argLength: 1, reg: w11, asm: "VPMOVUSQW", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVUSQWMasked128", argLength: 2, reg: wkw, asm: "VPMOVUSQW", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVUSWB128", argLength: 1, reg: w11, asm: "VPMOVUSWB", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVUSWB256", argLength: 1, reg: w11, asm: "VPMOVUSWB", commutative: false, typ: "Vec256", resultInArg0: false}, + {name: "VPMOVUSWBMasked128", argLength: 2, reg: wkw, asm: "VPMOVUSWB", commutative: false, typ: "Vec128", resultInArg0: false}, + {name: "VPMOVUSWBMasked256", argLength: 2, reg: wkw, asm: "VPMOVUSWB", commutative: false, typ: "Vec256", resultInArg0: false}, {name: "VPMOVWB128", argLength: 1, reg: w11, asm: "VPMOVWB", commutative: false, typ: "Vec128", resultInArg0: false}, {name: "VPMOVWB256", argLength: 1, reg: w11, asm: "VPMOVWB", commutative: false, typ: "Vec256", resultInArg0: false}, {name: "VPMOVWBMasked128", argLength: 2, reg: wkw, asm: "VPMOVWB", commutative: false, typ: "Vec128", resultInArg0: false}, diff --git a/src/cmd/compile/internal/ssa/_gen/simdgenericOps.go b/src/cmd/compile/internal/ssa/_gen/simdgenericOps.go index 54f21b584d..08dbf85771 100644 --- a/src/cmd/compile/internal/ssa/_gen/simdgenericOps.go +++ b/src/cmd/compile/internal/ssa/_gen/simdgenericOps.go @@ -212,6 +212,15 @@ func simdGenericOps() []opData { {name: "ConvertToInt8Int64x2", argLength: 1, commutative: false}, {name: "ConvertToInt8Int64x4", argLength: 1, commutative: false}, {name: "ConvertToInt8Int64x8", argLength: 1, commutative: false}, + {name: "ConvertToInt8SaturatedInt16x8", argLength: 1, commutative: false}, + {name: "ConvertToInt8SaturatedInt16x16", argLength: 1, commutative: false}, + {name: "ConvertToInt8SaturatedInt16x32", argLength: 1, commutative: false}, + {name: "ConvertToInt8SaturatedInt32x4", argLength: 1, commutative: false}, + {name: "ConvertToInt8SaturatedInt32x8", argLength: 1, commutative: false}, + {name: "ConvertToInt8SaturatedInt32x16", argLength: 1, commutative: false}, + {name: "ConvertToInt8SaturatedInt64x2", argLength: 1, commutative: false}, + {name: "ConvertToInt8SaturatedInt64x4", argLength: 1, commutative: false}, + {name: "ConvertToInt8SaturatedInt64x8", argLength: 1, commutative: false}, {name: "ConvertToInt16Int8x16", argLength: 1, commutative: false}, {name: "ConvertToInt16Int8x32", argLength: 1, commutative: false}, {name: "ConvertToInt16Int32x4", argLength: 1, commutative: false}, @@ -220,6 +229,12 @@ func simdGenericOps() []opData { {name: "ConvertToInt16Int64x2", argLength: 1, commutative: false}, {name: "ConvertToInt16Int64x4", argLength: 1, commutative: false}, {name: "ConvertToInt16Int64x8", argLength: 1, commutative: false}, + {name: "ConvertToInt16SaturatedInt32x4", argLength: 1, commutative: false}, + {name: "ConvertToInt16SaturatedInt32x8", argLength: 1, commutative: false}, + {name: "ConvertToInt16SaturatedInt32x16", argLength: 1, commutative: false}, + {name: "ConvertToInt16SaturatedInt64x2", argLength: 1, commutative: false}, + {name: "ConvertToInt16SaturatedInt64x4", argLength: 1, commutative: false}, + {name: "ConvertToInt16SaturatedInt64x8", argLength: 1, commutative: false}, {name: "ConvertToInt16x8Int8x16", argLength: 1, commutative: false}, {name: "ConvertToInt32Float32x4", argLength: 1, commutative: false}, {name: "ConvertToInt32Float32x8", argLength: 1, commutative: false}, @@ -230,6 +245,9 @@ func simdGenericOps() []opData { {name: "ConvertToInt32Int64x2", argLength: 1, commutative: false}, {name: "ConvertToInt32Int64x4", argLength: 1, commutative: false}, {name: "ConvertToInt32Int64x8", argLength: 1, commutative: false}, + {name: "ConvertToInt32SaturatedInt64x2", argLength: 1, commutative: false}, + {name: "ConvertToInt32SaturatedInt64x4", argLength: 1, commutative: false}, + {name: "ConvertToInt32SaturatedInt64x8", argLength: 1, commutative: false}, {name: "ConvertToInt32x4Int8x16", argLength: 1, commutative: false}, {name: "ConvertToInt32x4Int16x8", argLength: 1, commutative: false}, {name: "ConvertToInt32x8Int8x16", argLength: 1, commutative: false}, @@ -241,6 +259,15 @@ func simdGenericOps() []opData { {name: "ConvertToInt64x2Int32x4", argLength: 1, commutative: false}, {name: "ConvertToInt64x4Int8x16", argLength: 1, commutative: false}, {name: "ConvertToInt64x8Int8x16", argLength: 1, commutative: false}, + {name: "ConvertToUint8SaturatedUint16x8", argLength: 1, commutative: false}, + {name: "ConvertToUint8SaturatedUint16x16", argLength: 1, commutative: false}, + {name: "ConvertToUint8SaturatedUint16x32", argLength: 1, commutative: false}, + {name: "ConvertToUint8SaturatedUint32x4", argLength: 1, commutative: false}, + {name: "ConvertToUint8SaturatedUint32x8", argLength: 1, commutative: false}, + {name: "ConvertToUint8SaturatedUint32x16", argLength: 1, commutative: false}, + {name: "ConvertToUint8SaturatedUint64x2", argLength: 1, commutative: false}, + {name: "ConvertToUint8SaturatedUint64x4", argLength: 1, commutative: false}, + {name: "ConvertToUint8SaturatedUint64x8", argLength: 1, commutative: false}, {name: "ConvertToUint8Uint16x8", argLength: 1, commutative: false}, {name: "ConvertToUint8Uint16x16", argLength: 1, commutative: false}, {name: "ConvertToUint8Uint16x32", argLength: 1, commutative: false}, @@ -250,6 +277,12 @@ func simdGenericOps() []opData { {name: "ConvertToUint8Uint64x2", argLength: 1, commutative: false}, {name: "ConvertToUint8Uint64x4", argLength: 1, commutative: false}, {name: "ConvertToUint8Uint64x8", argLength: 1, commutative: false}, + {name: "ConvertToUint16SaturatedUint32x4", argLength: 1, commutative: false}, + {name: "ConvertToUint16SaturatedUint32x8", argLength: 1, commutative: false}, + {name: "ConvertToUint16SaturatedUint32x16", argLength: 1, commutative: false}, + {name: "ConvertToUint16SaturatedUint64x2", argLength: 1, commutative: false}, + {name: "ConvertToUint16SaturatedUint64x4", argLength: 1, commutative: false}, + {name: "ConvertToUint16SaturatedUint64x8", argLength: 1, commutative: false}, {name: "ConvertToUint16Uint8x16", argLength: 1, commutative: false}, {name: "ConvertToUint16Uint8x32", argLength: 1, commutative: false}, {name: "ConvertToUint16Uint32x4", argLength: 1, commutative: false}, @@ -262,6 +295,9 @@ func simdGenericOps() []opData { {name: "ConvertToUint32Float32x4", argLength: 1, commutative: false}, {name: "ConvertToUint32Float32x8", argLength: 1, commutative: false}, {name: "ConvertToUint32Float32x16", argLength: 1, commutative: false}, + {name: "ConvertToUint32SaturatedUint64x2", argLength: 1, commutative: false}, + {name: "ConvertToUint32SaturatedUint64x4", argLength: 1, commutative: false}, + {name: "ConvertToUint32SaturatedUint64x8", argLength: 1, commutative: false}, {name: "ConvertToUint32Uint8x16", argLength: 1, commutative: false}, {name: "ConvertToUint32Uint16x8", argLength: 1, commutative: false}, {name: "ConvertToUint32Uint16x16", argLength: 1, commutative: false}, diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go index 06084d9c47..aefe6a88da 100644 --- a/src/cmd/compile/internal/ssa/opGen.go +++ b/src/cmd/compile/internal/ssa/opGen.go @@ -1785,6 +1785,24 @@ const ( OpAMD64VPMOVQDMasked256 OpAMD64VPMOVQW128 OpAMD64VPMOVQWMasked128 + OpAMD64VPMOVSDB128 + OpAMD64VPMOVSDBMasked128 + OpAMD64VPMOVSDW128 + OpAMD64VPMOVSDW256 + OpAMD64VPMOVSDWMasked128 + OpAMD64VPMOVSDWMasked256 + OpAMD64VPMOVSQB128 + OpAMD64VPMOVSQBMasked128 + OpAMD64VPMOVSQD128 + OpAMD64VPMOVSQD256 + OpAMD64VPMOVSQDMasked128 + OpAMD64VPMOVSQDMasked256 + OpAMD64VPMOVSQW128 + OpAMD64VPMOVSQWMasked128 + OpAMD64VPMOVSWB128 + OpAMD64VPMOVSWB256 + OpAMD64VPMOVSWBMasked128 + OpAMD64VPMOVSWBMasked256 OpAMD64VPMOVSXBD128 OpAMD64VPMOVSXBD256 OpAMD64VPMOVSXBD512 @@ -1821,6 +1839,24 @@ const ( OpAMD64VPMOVSXWQMasked128 OpAMD64VPMOVSXWQMasked256 OpAMD64VPMOVSXWQMasked512 + OpAMD64VPMOVUSDB128 + OpAMD64VPMOVUSDBMasked128 + OpAMD64VPMOVUSDW128 + OpAMD64VPMOVUSDW256 + OpAMD64VPMOVUSDWMasked128 + OpAMD64VPMOVUSDWMasked256 + OpAMD64VPMOVUSQB128 + OpAMD64VPMOVUSQBMasked128 + OpAMD64VPMOVUSQD128 + OpAMD64VPMOVUSQD256 + OpAMD64VPMOVUSQDMasked128 + OpAMD64VPMOVUSQDMasked256 + OpAMD64VPMOVUSQW128 + OpAMD64VPMOVUSQWMasked128 + OpAMD64VPMOVUSWB128 + OpAMD64VPMOVUSWB256 + OpAMD64VPMOVUSWBMasked128 + OpAMD64VPMOVUSWBMasked256 OpAMD64VPMOVWB128 OpAMD64VPMOVWB256 OpAMD64VPMOVWBMasked128 @@ -4943,6 +4979,15 @@ const ( OpConvertToInt8Int64x2 OpConvertToInt8Int64x4 OpConvertToInt8Int64x8 + OpConvertToInt8SaturatedInt16x8 + OpConvertToInt8SaturatedInt16x16 + OpConvertToInt8SaturatedInt16x32 + OpConvertToInt8SaturatedInt32x4 + OpConvertToInt8SaturatedInt32x8 + OpConvertToInt8SaturatedInt32x16 + OpConvertToInt8SaturatedInt64x2 + OpConvertToInt8SaturatedInt64x4 + OpConvertToInt8SaturatedInt64x8 OpConvertToInt16Int8x16 OpConvertToInt16Int8x32 OpConvertToInt16Int32x4 @@ -4951,6 +4996,12 @@ const ( OpConvertToInt16Int64x2 OpConvertToInt16Int64x4 OpConvertToInt16Int64x8 + OpConvertToInt16SaturatedInt32x4 + OpConvertToInt16SaturatedInt32x8 + OpConvertToInt16SaturatedInt32x16 + OpConvertToInt16SaturatedInt64x2 + OpConvertToInt16SaturatedInt64x4 + OpConvertToInt16SaturatedInt64x8 OpConvertToInt16x8Int8x16 OpConvertToInt32Float32x4 OpConvertToInt32Float32x8 @@ -4961,6 +5012,9 @@ const ( OpConvertToInt32Int64x2 OpConvertToInt32Int64x4 OpConvertToInt32Int64x8 + OpConvertToInt32SaturatedInt64x2 + OpConvertToInt32SaturatedInt64x4 + OpConvertToInt32SaturatedInt64x8 OpConvertToInt32x4Int8x16 OpConvertToInt32x4Int16x8 OpConvertToInt32x8Int8x16 @@ -4972,6 +5026,15 @@ const ( OpConvertToInt64x2Int32x4 OpConvertToInt64x4Int8x16 OpConvertToInt64x8Int8x16 + OpConvertToUint8SaturatedUint16x8 + OpConvertToUint8SaturatedUint16x16 + OpConvertToUint8SaturatedUint16x32 + OpConvertToUint8SaturatedUint32x4 + OpConvertToUint8SaturatedUint32x8 + OpConvertToUint8SaturatedUint32x16 + OpConvertToUint8SaturatedUint64x2 + OpConvertToUint8SaturatedUint64x4 + OpConvertToUint8SaturatedUint64x8 OpConvertToUint8Uint16x8 OpConvertToUint8Uint16x16 OpConvertToUint8Uint16x32 @@ -4981,6 +5044,12 @@ const ( OpConvertToUint8Uint64x2 OpConvertToUint8Uint64x4 OpConvertToUint8Uint64x8 + OpConvertToUint16SaturatedUint32x4 + OpConvertToUint16SaturatedUint32x8 + OpConvertToUint16SaturatedUint32x16 + OpConvertToUint16SaturatedUint64x2 + OpConvertToUint16SaturatedUint64x4 + OpConvertToUint16SaturatedUint64x8 OpConvertToUint16Uint8x16 OpConvertToUint16Uint8x32 OpConvertToUint16Uint32x4 @@ -4993,6 +5062,9 @@ const ( OpConvertToUint32Float32x4 OpConvertToUint32Float32x8 OpConvertToUint32Float32x16 + OpConvertToUint32SaturatedUint64x2 + OpConvertToUint32SaturatedUint64x4 + OpConvertToUint32SaturatedUint64x8 OpConvertToUint32Uint8x16 OpConvertToUint32Uint16x8 OpConvertToUint32Uint16x16 @@ -27281,6 +27353,249 @@ var opcodeTable = [...]opInfo{ }, }, }, + { + name: "VPMOVSDB128", + argLen: 1, + asm: x86.AVPMOVSDB, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVSDBMasked128", + argLen: 2, + asm: x86.AVPMOVSDB, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVSDW128", + argLen: 1, + asm: x86.AVPMOVSDW, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVSDW256", + argLen: 1, + asm: x86.AVPMOVSDW, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVSDWMasked128", + argLen: 2, + asm: x86.AVPMOVSDW, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVSDWMasked256", + argLen: 2, + asm: x86.AVPMOVSDW, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVSQB128", + argLen: 1, + asm: x86.AVPMOVSQB, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVSQBMasked128", + argLen: 2, + asm: x86.AVPMOVSQB, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVSQD128", + argLen: 1, + asm: x86.AVPMOVSQD, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVSQD256", + argLen: 1, + asm: x86.AVPMOVSQD, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVSQDMasked128", + argLen: 2, + asm: x86.AVPMOVSQD, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVSQDMasked256", + argLen: 2, + asm: x86.AVPMOVSQD, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVSQW128", + argLen: 1, + asm: x86.AVPMOVSQW, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVSQWMasked128", + argLen: 2, + asm: x86.AVPMOVSQW, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVSWB128", + argLen: 1, + asm: x86.AVPMOVSWB, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVSWB256", + argLen: 1, + asm: x86.AVPMOVSWB, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVSWBMasked128", + argLen: 2, + asm: x86.AVPMOVSWB, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVSWBMasked256", + argLen: 2, + asm: x86.AVPMOVSWB, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, { name: "VPMOVSXBD128", argLen: 1, @@ -27767,6 +28082,249 @@ var opcodeTable = [...]opInfo{ }, }, }, + { + name: "VPMOVUSDB128", + argLen: 1, + asm: x86.AVPMOVUSDB, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVUSDBMasked128", + argLen: 2, + asm: x86.AVPMOVUSDB, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVUSDW128", + argLen: 1, + asm: x86.AVPMOVUSDW, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVUSDW256", + argLen: 1, + asm: x86.AVPMOVUSDW, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVUSDWMasked128", + argLen: 2, + asm: x86.AVPMOVUSDW, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVUSDWMasked256", + argLen: 2, + asm: x86.AVPMOVUSDW, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVUSQB128", + argLen: 1, + asm: x86.AVPMOVUSQB, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVUSQBMasked128", + argLen: 2, + asm: x86.AVPMOVUSQB, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVUSQD128", + argLen: 1, + asm: x86.AVPMOVUSQD, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVUSQD256", + argLen: 1, + asm: x86.AVPMOVUSQD, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVUSQDMasked128", + argLen: 2, + asm: x86.AVPMOVUSQD, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVUSQDMasked256", + argLen: 2, + asm: x86.AVPMOVUSQD, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVUSQW128", + argLen: 1, + asm: x86.AVPMOVUSQW, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVUSQWMasked128", + argLen: 2, + asm: x86.AVPMOVUSQW, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVUSWB128", + argLen: 1, + asm: x86.AVPMOVUSWB, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVUSWB256", + argLen: 1, + asm: x86.AVPMOVUSWB, + reg: regInfo{ + inputs: []inputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + outputs: []outputInfo{ + {0, 281472829161472}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30 X31 + }, + }, + }, + { + name: "VPMOVUSWBMasked128", + argLen: 2, + asm: x86.AVPMOVUSWB, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, + { + name: "VPMOVUSWBMasked256", + argLen: 2, + asm: x86.AVPMOVUSWB, + reg: regInfo{ + inputs: []inputInfo{ + {1, 71494644084506624}, // K1 K2 K3 K4 K5 K6 K7 + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + outputs: []outputInfo{ + {0, 2147418112}, // X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 + }, + }, + }, { name: "VPMOVWB128", argLen: 1, @@ -65565,6 +66123,51 @@ var opcodeTable = [...]opInfo{ argLen: 1, generic: true, }, + { + name: "ConvertToInt8SaturatedInt16x8", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt8SaturatedInt16x16", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt8SaturatedInt16x32", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt8SaturatedInt32x4", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt8SaturatedInt32x8", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt8SaturatedInt32x16", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt8SaturatedInt64x2", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt8SaturatedInt64x4", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt8SaturatedInt64x8", + argLen: 1, + generic: true, + }, { name: "ConvertToInt16Int8x16", argLen: 1, @@ -65605,6 +66208,36 @@ var opcodeTable = [...]opInfo{ argLen: 1, generic: true, }, + { + name: "ConvertToInt16SaturatedInt32x4", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt16SaturatedInt32x8", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt16SaturatedInt32x16", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt16SaturatedInt64x2", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt16SaturatedInt64x4", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt16SaturatedInt64x8", + argLen: 1, + generic: true, + }, { name: "ConvertToInt16x8Int8x16", argLen: 1, @@ -65655,6 +66288,21 @@ var opcodeTable = [...]opInfo{ argLen: 1, generic: true, }, + { + name: "ConvertToInt32SaturatedInt64x2", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt32SaturatedInt64x4", + argLen: 1, + generic: true, + }, + { + name: "ConvertToInt32SaturatedInt64x8", + argLen: 1, + generic: true, + }, { name: "ConvertToInt32x4Int8x16", argLen: 1, @@ -65710,6 +66358,51 @@ var opcodeTable = [...]opInfo{ argLen: 1, generic: true, }, + { + name: "ConvertToUint8SaturatedUint16x8", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint8SaturatedUint16x16", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint8SaturatedUint16x32", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint8SaturatedUint32x4", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint8SaturatedUint32x8", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint8SaturatedUint32x16", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint8SaturatedUint64x2", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint8SaturatedUint64x4", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint8SaturatedUint64x8", + argLen: 1, + generic: true, + }, { name: "ConvertToUint8Uint16x8", argLen: 1, @@ -65755,6 +66448,36 @@ var opcodeTable = [...]opInfo{ argLen: 1, generic: true, }, + { + name: "ConvertToUint16SaturatedUint32x4", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint16SaturatedUint32x8", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint16SaturatedUint32x16", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint16SaturatedUint64x2", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint16SaturatedUint64x4", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint16SaturatedUint64x8", + argLen: 1, + generic: true, + }, { name: "ConvertToUint16Uint8x16", argLen: 1, @@ -65815,6 +66538,21 @@ var opcodeTable = [...]opInfo{ argLen: 1, generic: true, }, + { + name: "ConvertToUint32SaturatedUint64x2", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint32SaturatedUint64x4", + argLen: 1, + generic: true, + }, + { + name: "ConvertToUint32SaturatedUint64x8", + argLen: 1, + generic: true, + }, { name: "ConvertToUint32Uint8x16", argLen: 1, diff --git a/src/cmd/compile/internal/ssa/rewriteAMD64.go b/src/cmd/compile/internal/ssa/rewriteAMD64.go index 9d347b4c7d..53afacebf8 100644 --- a/src/cmd/compile/internal/ssa/rewriteAMD64.go +++ b/src/cmd/compile/internal/ssa/rewriteAMD64.go @@ -1394,6 +1394,24 @@ func rewriteValueAMD64(v *Value) bool { case OpConvertToInt16Int8x32: v.Op = OpAMD64VPMOVSXBW512 return true + case OpConvertToInt16SaturatedInt32x16: + v.Op = OpAMD64VPMOVSDW256 + return true + case OpConvertToInt16SaturatedInt32x4: + v.Op = OpAMD64VPMOVSDW128 + return true + case OpConvertToInt16SaturatedInt32x8: + v.Op = OpAMD64VPMOVSDW128 + return true + case OpConvertToInt16SaturatedInt64x2: + v.Op = OpAMD64VPMOVSQW128 + return true + case OpConvertToInt16SaturatedInt64x4: + v.Op = OpAMD64VPMOVSQW128 + return true + case OpConvertToInt16SaturatedInt64x8: + v.Op = OpAMD64VPMOVSQW128 + return true case OpConvertToInt16x8Int8x16: v.Op = OpAMD64VPMOVSXBW128 return true @@ -1424,6 +1442,15 @@ func rewriteValueAMD64(v *Value) bool { case OpConvertToInt32Int8x16: v.Op = OpAMD64VPMOVSXBD512 return true + case OpConvertToInt32SaturatedInt64x2: + v.Op = OpAMD64VPMOVSQD128 + return true + case OpConvertToInt32SaturatedInt64x4: + v.Op = OpAMD64VPMOVSQD128 + return true + case OpConvertToInt32SaturatedInt64x8: + v.Op = OpAMD64VPMOVSQD256 + return true case OpConvertToInt32x4Int16x8: v.Op = OpAMD64VPMOVSXWD128 return true @@ -1484,6 +1511,51 @@ func rewriteValueAMD64(v *Value) bool { case OpConvertToInt8Int64x8: v.Op = OpAMD64VPMOVQB128 return true + case OpConvertToInt8SaturatedInt16x16: + v.Op = OpAMD64VPMOVSWB128 + return true + case OpConvertToInt8SaturatedInt16x32: + v.Op = OpAMD64VPMOVSWB256 + return true + case OpConvertToInt8SaturatedInt16x8: + v.Op = OpAMD64VPMOVSWB128 + return true + case OpConvertToInt8SaturatedInt32x16: + v.Op = OpAMD64VPMOVSDB128 + return true + case OpConvertToInt8SaturatedInt32x4: + v.Op = OpAMD64VPMOVSDB128 + return true + case OpConvertToInt8SaturatedInt32x8: + v.Op = OpAMD64VPMOVSDB128 + return true + case OpConvertToInt8SaturatedInt64x2: + v.Op = OpAMD64VPMOVSQB128 + return true + case OpConvertToInt8SaturatedInt64x4: + v.Op = OpAMD64VPMOVSQB128 + return true + case OpConvertToInt8SaturatedInt64x8: + v.Op = OpAMD64VPMOVSQB128 + return true + case OpConvertToUint16SaturatedUint32x16: + v.Op = OpAMD64VPMOVUSDW256 + return true + case OpConvertToUint16SaturatedUint32x4: + v.Op = OpAMD64VPMOVUSDW128 + return true + case OpConvertToUint16SaturatedUint32x8: + v.Op = OpAMD64VPMOVUSDW128 + return true + case OpConvertToUint16SaturatedUint64x2: + v.Op = OpAMD64VPMOVUSQW128 + return true + case OpConvertToUint16SaturatedUint64x4: + v.Op = OpAMD64VPMOVUSQW128 + return true + case OpConvertToUint16SaturatedUint64x8: + v.Op = OpAMD64VPMOVUSQW128 + return true case OpConvertToUint16Uint32x16: v.Op = OpAMD64VPMOVDW256 return true @@ -1520,6 +1592,15 @@ func rewriteValueAMD64(v *Value) bool { case OpConvertToUint32Float32x8: v.Op = OpAMD64VCVTPS2UDQ256 return true + case OpConvertToUint32SaturatedUint64x2: + v.Op = OpAMD64VPMOVUSQD128 + return true + case OpConvertToUint32SaturatedUint64x4: + v.Op = OpAMD64VPMOVUSQD128 + return true + case OpConvertToUint32SaturatedUint64x8: + v.Op = OpAMD64VPMOVUSQD256 + return true case OpConvertToUint32Uint16x16: v.Op = OpAMD64VPMOVZXWD512 return true @@ -1577,6 +1658,33 @@ func rewriteValueAMD64(v *Value) bool { case OpConvertToUint64x8Uint8x16: v.Op = OpAMD64VPMOVZXBQ512 return true + case OpConvertToUint8SaturatedUint16x16: + v.Op = OpAMD64VPMOVUSWB128 + return true + case OpConvertToUint8SaturatedUint16x32: + v.Op = OpAMD64VPMOVUSWB256 + return true + case OpConvertToUint8SaturatedUint16x8: + v.Op = OpAMD64VPMOVUSWB128 + return true + case OpConvertToUint8SaturatedUint32x16: + v.Op = OpAMD64VPMOVUSDB128 + return true + case OpConvertToUint8SaturatedUint32x4: + v.Op = OpAMD64VPMOVUSDB128 + return true + case OpConvertToUint8SaturatedUint32x8: + v.Op = OpAMD64VPMOVUSDB128 + return true + case OpConvertToUint8SaturatedUint64x2: + v.Op = OpAMD64VPMOVUSQB128 + return true + case OpConvertToUint8SaturatedUint64x4: + v.Op = OpAMD64VPMOVUSQB128 + return true + case OpConvertToUint8SaturatedUint64x8: + v.Op = OpAMD64VPMOVUSQB128 + return true case OpConvertToUint8Uint16x16: v.Op = OpAMD64VPMOVWB128 return true diff --git a/src/cmd/compile/internal/ssagen/simdintrinsics.go b/src/cmd/compile/internal/ssagen/simdintrinsics.go index a535fa0688..2e31fdec19 100644 --- a/src/cmd/compile/internal/ssagen/simdintrinsics.go +++ b/src/cmd/compile/internal/ssagen/simdintrinsics.go @@ -232,6 +232,15 @@ func simdIntrinsics(addF func(pkg, fn string, b intrinsicBuilder, archFamilies . addF(simdPackage, "Int64x2.ConvertToInt8", opLen1(ssa.OpConvertToInt8Int64x2, types.TypeVec128), sys.AMD64) addF(simdPackage, "Int64x4.ConvertToInt8", opLen1(ssa.OpConvertToInt8Int64x4, types.TypeVec128), sys.AMD64) addF(simdPackage, "Int64x8.ConvertToInt8", opLen1(ssa.OpConvertToInt8Int64x8, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int16x8.ConvertToInt8Saturated", opLen1(ssa.OpConvertToInt8SaturatedInt16x8, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int16x16.ConvertToInt8Saturated", opLen1(ssa.OpConvertToInt8SaturatedInt16x16, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int16x32.ConvertToInt8Saturated", opLen1(ssa.OpConvertToInt8SaturatedInt16x32, types.TypeVec256), sys.AMD64) + addF(simdPackage, "Int32x4.ConvertToInt8Saturated", opLen1(ssa.OpConvertToInt8SaturatedInt32x4, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int32x8.ConvertToInt8Saturated", opLen1(ssa.OpConvertToInt8SaturatedInt32x8, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int32x16.ConvertToInt8Saturated", opLen1(ssa.OpConvertToInt8SaturatedInt32x16, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int64x2.ConvertToInt8Saturated", opLen1(ssa.OpConvertToInt8SaturatedInt64x2, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int64x4.ConvertToInt8Saturated", opLen1(ssa.OpConvertToInt8SaturatedInt64x4, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int64x8.ConvertToInt8Saturated", opLen1(ssa.OpConvertToInt8SaturatedInt64x8, types.TypeVec128), sys.AMD64) addF(simdPackage, "Int8x16.ConvertToInt16", opLen1(ssa.OpConvertToInt16Int8x16, types.TypeVec256), sys.AMD64) addF(simdPackage, "Int8x32.ConvertToInt16", opLen1(ssa.OpConvertToInt16Int8x32, types.TypeVec512), sys.AMD64) addF(simdPackage, "Int32x4.ConvertToInt16", opLen1(ssa.OpConvertToInt16Int32x4, types.TypeVec128), sys.AMD64) @@ -240,6 +249,12 @@ func simdIntrinsics(addF func(pkg, fn string, b intrinsicBuilder, archFamilies . addF(simdPackage, "Int64x2.ConvertToInt16", opLen1(ssa.OpConvertToInt16Int64x2, types.TypeVec128), sys.AMD64) addF(simdPackage, "Int64x4.ConvertToInt16", opLen1(ssa.OpConvertToInt16Int64x4, types.TypeVec128), sys.AMD64) addF(simdPackage, "Int64x8.ConvertToInt16", opLen1(ssa.OpConvertToInt16Int64x8, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int32x4.ConvertToInt16Saturated", opLen1(ssa.OpConvertToInt16SaturatedInt32x4, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int32x8.ConvertToInt16Saturated", opLen1(ssa.OpConvertToInt16SaturatedInt32x8, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int32x16.ConvertToInt16Saturated", opLen1(ssa.OpConvertToInt16SaturatedInt32x16, types.TypeVec256), sys.AMD64) + addF(simdPackage, "Int64x2.ConvertToInt16Saturated", opLen1(ssa.OpConvertToInt16SaturatedInt64x2, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int64x4.ConvertToInt16Saturated", opLen1(ssa.OpConvertToInt16SaturatedInt64x4, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int64x8.ConvertToInt16Saturated", opLen1(ssa.OpConvertToInt16SaturatedInt64x8, types.TypeVec128), sys.AMD64) addF(simdPackage, "Int8x16.ConvertToInt16x8", opLen1(ssa.OpConvertToInt16x8Int8x16, types.TypeVec128), sys.AMD64) addF(simdPackage, "Float32x4.ConvertToInt32", opLen1(ssa.OpConvertToInt32Float32x4, types.TypeVec128), sys.AMD64) addF(simdPackage, "Float32x8.ConvertToInt32", opLen1(ssa.OpConvertToInt32Float32x8, types.TypeVec256), sys.AMD64) @@ -250,6 +265,9 @@ func simdIntrinsics(addF func(pkg, fn string, b intrinsicBuilder, archFamilies . addF(simdPackage, "Int64x2.ConvertToInt32", opLen1(ssa.OpConvertToInt32Int64x2, types.TypeVec128), sys.AMD64) addF(simdPackage, "Int64x4.ConvertToInt32", opLen1(ssa.OpConvertToInt32Int64x4, types.TypeVec128), sys.AMD64) addF(simdPackage, "Int64x8.ConvertToInt32", opLen1(ssa.OpConvertToInt32Int64x8, types.TypeVec256), sys.AMD64) + addF(simdPackage, "Int64x2.ConvertToInt32Saturated", opLen1(ssa.OpConvertToInt32SaturatedInt64x2, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int64x4.ConvertToInt32Saturated", opLen1(ssa.OpConvertToInt32SaturatedInt64x4, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Int64x8.ConvertToInt32Saturated", opLen1(ssa.OpConvertToInt32SaturatedInt64x8, types.TypeVec256), sys.AMD64) addF(simdPackage, "Int8x16.ConvertToInt32x4", opLen1(ssa.OpConvertToInt32x4Int8x16, types.TypeVec128), sys.AMD64) addF(simdPackage, "Int16x8.ConvertToInt32x4", opLen1(ssa.OpConvertToInt32x4Int16x8, types.TypeVec128), sys.AMD64) addF(simdPackage, "Int8x16.ConvertToInt32x8", opLen1(ssa.OpConvertToInt32x8Int8x16, types.TypeVec256), sys.AMD64) @@ -270,6 +288,15 @@ func simdIntrinsics(addF func(pkg, fn string, b intrinsicBuilder, archFamilies . addF(simdPackage, "Uint64x2.ConvertToUint8", opLen1(ssa.OpConvertToUint8Uint64x2, types.TypeVec128), sys.AMD64) addF(simdPackage, "Uint64x4.ConvertToUint8", opLen1(ssa.OpConvertToUint8Uint64x4, types.TypeVec128), sys.AMD64) addF(simdPackage, "Uint64x8.ConvertToUint8", opLen1(ssa.OpConvertToUint8Uint64x8, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint16x8.ConvertToUint8Saturated", opLen1(ssa.OpConvertToUint8SaturatedUint16x8, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint16x16.ConvertToUint8Saturated", opLen1(ssa.OpConvertToUint8SaturatedUint16x16, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint16x32.ConvertToUint8Saturated", opLen1(ssa.OpConvertToUint8SaturatedUint16x32, types.TypeVec256), sys.AMD64) + addF(simdPackage, "Uint32x4.ConvertToUint8Saturated", opLen1(ssa.OpConvertToUint8SaturatedUint32x4, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint32x8.ConvertToUint8Saturated", opLen1(ssa.OpConvertToUint8SaturatedUint32x8, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint32x16.ConvertToUint8Saturated", opLen1(ssa.OpConvertToUint8SaturatedUint32x16, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint64x2.ConvertToUint8Saturated", opLen1(ssa.OpConvertToUint8SaturatedUint64x2, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint64x4.ConvertToUint8Saturated", opLen1(ssa.OpConvertToUint8SaturatedUint64x4, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint64x8.ConvertToUint8Saturated", opLen1(ssa.OpConvertToUint8SaturatedUint64x8, types.TypeVec128), sys.AMD64) addF(simdPackage, "Uint8x16.ConvertToUint16", opLen1(ssa.OpConvertToUint16Uint8x16, types.TypeVec256), sys.AMD64) addF(simdPackage, "Uint8x32.ConvertToUint16", opLen1(ssa.OpConvertToUint16Uint8x32, types.TypeVec512), sys.AMD64) addF(simdPackage, "Uint32x4.ConvertToUint16", opLen1(ssa.OpConvertToUint16Uint32x4, types.TypeVec128), sys.AMD64) @@ -278,6 +305,12 @@ func simdIntrinsics(addF func(pkg, fn string, b intrinsicBuilder, archFamilies . addF(simdPackage, "Uint64x2.ConvertToUint16", opLen1(ssa.OpConvertToUint16Uint64x2, types.TypeVec128), sys.AMD64) addF(simdPackage, "Uint64x4.ConvertToUint16", opLen1(ssa.OpConvertToUint16Uint64x4, types.TypeVec128), sys.AMD64) addF(simdPackage, "Uint64x8.ConvertToUint16", opLen1(ssa.OpConvertToUint16Uint64x8, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint32x4.ConvertToUint16Saturated", opLen1(ssa.OpConvertToUint16SaturatedUint32x4, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint32x8.ConvertToUint16Saturated", opLen1(ssa.OpConvertToUint16SaturatedUint32x8, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint32x16.ConvertToUint16Saturated", opLen1(ssa.OpConvertToUint16SaturatedUint32x16, types.TypeVec256), sys.AMD64) + addF(simdPackage, "Uint64x2.ConvertToUint16Saturated", opLen1(ssa.OpConvertToUint16SaturatedUint64x2, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint64x4.ConvertToUint16Saturated", opLen1(ssa.OpConvertToUint16SaturatedUint64x4, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint64x8.ConvertToUint16Saturated", opLen1(ssa.OpConvertToUint16SaturatedUint64x8, types.TypeVec128), sys.AMD64) addF(simdPackage, "Uint8x16.ConvertToUint16x8", opLen1(ssa.OpConvertToUint16x8Uint8x16, types.TypeVec128), sys.AMD64) addF(simdPackage, "Float32x4.ConvertToUint32", opLen1(ssa.OpConvertToUint32Float32x4, types.TypeVec128), sys.AMD64) addF(simdPackage, "Float32x8.ConvertToUint32", opLen1(ssa.OpConvertToUint32Float32x8, types.TypeVec256), sys.AMD64) @@ -288,6 +321,9 @@ func simdIntrinsics(addF func(pkg, fn string, b intrinsicBuilder, archFamilies . addF(simdPackage, "Uint64x2.ConvertToUint32", opLen1(ssa.OpConvertToUint32Uint64x2, types.TypeVec128), sys.AMD64) addF(simdPackage, "Uint64x4.ConvertToUint32", opLen1(ssa.OpConvertToUint32Uint64x4, types.TypeVec128), sys.AMD64) addF(simdPackage, "Uint64x8.ConvertToUint32", opLen1(ssa.OpConvertToUint32Uint64x8, types.TypeVec256), sys.AMD64) + addF(simdPackage, "Uint64x2.ConvertToUint32Saturated", opLen1(ssa.OpConvertToUint32SaturatedUint64x2, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint64x4.ConvertToUint32Saturated", opLen1(ssa.OpConvertToUint32SaturatedUint64x4, types.TypeVec128), sys.AMD64) + addF(simdPackage, "Uint64x8.ConvertToUint32Saturated", opLen1(ssa.OpConvertToUint32SaturatedUint64x8, types.TypeVec256), sys.AMD64) addF(simdPackage, "Uint8x16.ConvertToUint32x4", opLen1(ssa.OpConvertToUint32x4Uint8x16, types.TypeVec128), sys.AMD64) addF(simdPackage, "Uint16x8.ConvertToUint32x4", opLen1(ssa.OpConvertToUint32x4Uint16x8, types.TypeVec128), sys.AMD64) addF(simdPackage, "Uint8x16.ConvertToUint32x8", opLen1(ssa.OpConvertToUint32x8Uint8x16, types.TypeVec256), sys.AMD64) diff --git a/src/simd/_gen/simdgen/ops/Converts/categories.yaml b/src/simd/_gen/simdgen/ops/Converts/categories.yaml index b172d72dbf..38e320b3d9 100644 --- a/src/simd/_gen/simdgen/ops/Converts/categories.yaml +++ b/src/simd/_gen/simdgen/ops/Converts/categories.yaml @@ -4,7 +4,7 @@ - go: ConvertToInt8 commutative: false documentation: !string |- - // NAME converts element values to int16. + // NAME converts element values to int8. - go: ConvertToInt16 commutative: false documentation: !string |- @@ -20,7 +20,7 @@ - go: ConvertToUint8 commutative: false documentation: !string |- - // NAME converts element values to uint16. + // NAME converts element values to uint8. - go: ConvertToUint16 commutative: false documentation: !string |- @@ -33,6 +33,30 @@ commutative: false documentation: !string |- // NAME converts element values to uint64. +- go: ConvertToInt8Saturated + commutative: false + documentation: !string |- + // NAME converts element values to int8 with saturation. +- go: ConvertToInt16Saturated + commutative: false + documentation: !string |- + // NAME converts element values to int16 with saturation. +- go: ConvertToInt32Saturated + commutative: false + documentation: !string |- + // NAME converts element values to int32 with saturation. +- go: ConvertToUint8Saturated + commutative: false + documentation: !string |- + // NAME converts element values to uint8 with saturation. +- go: ConvertToUint16Saturated + commutative: false + documentation: !string |- + // NAME converts element values to uint16 with saturation. +- go: ConvertToUint32Saturated + commutative: false + documentation: !string |- + // NAME converts element values to uint32 with saturation. # low-part only conversions # int<->int or uint<->uint widening conversions. diff --git a/src/simd/_gen/simdgen/ops/Converts/go.yaml b/src/simd/_gen/simdgen/ops/Converts/go.yaml index 56cb0e45df..b4eb1eb122 100644 --- a/src/simd/_gen/simdgen/ops/Converts/go.yaml +++ b/src/simd/_gen/simdgen/ops/Converts/go.yaml @@ -235,6 +235,51 @@ - base: uint out: - base: uint +# Saturated conversions. +- go: ConvertToInt8Saturated + asm: "VPMOVS[WDQ]B" + addDoc: &satDoc + !string |- + // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. + in: + - base: int + out: + - base: int +- go: ConvertToUint8Saturated + asm: "VPMOVUS[WDQ]B" + addDoc: *satDoc + in: + - base: uint + out: + - base: uint +- go: ConvertToInt16Saturated + asm: "VPMOVS[DQ]W" + addDoc: *satDoc + in: + - base: int + out: + - base: int +- go: ConvertToUint16Saturated + asm: "VPMOVUS[DQ]W" + addDoc: *satDoc + in: + - base: uint + out: + - base: uint +- go: ConvertToInt32Saturated + asm: "VPMOVSQD" + addDoc: *satDoc + in: + - base: int + out: + - base: int +- go: ConvertToUint32Saturated + asm: "VPMOVUSQD" + addDoc: *satDoc + in: + - base: uint + out: + - base: uint # low-part only conversions. # uint8->uint16 diff --git a/src/simd/ops_amd64.go b/src/simd/ops_amd64.go index 2c2b55299c..ba46b88027 100644 --- a/src/simd/ops_amd64.go +++ b/src/simd/ops_amd64.go @@ -1197,69 +1197,125 @@ func (x Uint64x8) Compress(mask Mask64x8) Uint64x8 /* ConvertToInt8 */ -// ConvertToInt8 converts element values to int16. +// ConvertToInt8 converts element values to int8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVWB, CPU Feature: AVX512 func (x Int16x8) ConvertToInt8() Int8x16 -// ConvertToInt8 converts element values to int16. +// ConvertToInt8 converts element values to int8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVWB, CPU Feature: AVX512 func (x Int16x16) ConvertToInt8() Int8x16 -// ConvertToInt8 converts element values to int16. +// ConvertToInt8 converts element values to int8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVWB, CPU Feature: AVX512 func (x Int16x32) ConvertToInt8() Int8x32 -// ConvertToInt8 converts element values to int16. +// ConvertToInt8 converts element values to int8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVDB, CPU Feature: AVX512 func (x Int32x4) ConvertToInt8() Int8x16 -// ConvertToInt8 converts element values to int16. +// ConvertToInt8 converts element values to int8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVDB, CPU Feature: AVX512 func (x Int32x8) ConvertToInt8() Int8x16 -// ConvertToInt8 converts element values to int16. +// ConvertToInt8 converts element values to int8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVDB, CPU Feature: AVX512 func (x Int32x16) ConvertToInt8() Int8x16 -// ConvertToInt8 converts element values to int16. +// ConvertToInt8 converts element values to int8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVQB, CPU Feature: AVX512 func (x Int64x2) ConvertToInt8() Int8x16 -// ConvertToInt8 converts element values to int16. +// ConvertToInt8 converts element values to int8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVQB, CPU Feature: AVX512 func (x Int64x4) ConvertToInt8() Int8x16 -// ConvertToInt8 converts element values to int16. +// ConvertToInt8 converts element values to int8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVQB, CPU Feature: AVX512 func (x Int64x8) ConvertToInt8() Int8x16 +/* ConvertToInt8Saturated */ + +// ConvertToInt8Saturated converts element values to int8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSWB, CPU Feature: AVX512 +func (x Int16x8) ConvertToInt8Saturated() Int8x16 + +// ConvertToInt8Saturated converts element values to int8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSWB, CPU Feature: AVX512 +func (x Int16x16) ConvertToInt8Saturated() Int8x16 + +// ConvertToInt8Saturated converts element values to int8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSWB, CPU Feature: AVX512 +func (x Int16x32) ConvertToInt8Saturated() Int8x32 + +// ConvertToInt8Saturated converts element values to int8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSDB, CPU Feature: AVX512 +func (x Int32x4) ConvertToInt8Saturated() Int8x16 + +// ConvertToInt8Saturated converts element values to int8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSDB, CPU Feature: AVX512 +func (x Int32x8) ConvertToInt8Saturated() Int8x16 + +// ConvertToInt8Saturated converts element values to int8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSDB, CPU Feature: AVX512 +func (x Int32x16) ConvertToInt8Saturated() Int8x16 + +// ConvertToInt8Saturated converts element values to int8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSQB, CPU Feature: AVX512 +func (x Int64x2) ConvertToInt8Saturated() Int8x16 + +// ConvertToInt8Saturated converts element values to int8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSQB, CPU Feature: AVX512 +func (x Int64x4) ConvertToInt8Saturated() Int8x16 + +// ConvertToInt8Saturated converts element values to int8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSQB, CPU Feature: AVX512 +func (x Int64x8) ConvertToInt8Saturated() Int8x16 + /* ConvertToInt16 */ // ConvertToInt16 converts element values to int16. @@ -1314,6 +1370,44 @@ func (x Int64x4) ConvertToInt16() Int16x8 // Asm: VPMOVQW, CPU Feature: AVX512 func (x Int64x8) ConvertToInt16() Int16x8 +/* ConvertToInt16Saturated */ + +// ConvertToInt16Saturated converts element values to int16 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSDW, CPU Feature: AVX512 +func (x Int32x4) ConvertToInt16Saturated() Int16x8 + +// ConvertToInt16Saturated converts element values to int16 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSDW, CPU Feature: AVX512 +func (x Int32x8) ConvertToInt16Saturated() Int16x8 + +// ConvertToInt16Saturated converts element values to int16 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSDW, CPU Feature: AVX512 +func (x Int32x16) ConvertToInt16Saturated() Int16x16 + +// ConvertToInt16Saturated converts element values to int16 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSQW, CPU Feature: AVX512 +func (x Int64x2) ConvertToInt16Saturated() Int16x8 + +// ConvertToInt16Saturated converts element values to int16 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSQW, CPU Feature: AVX512 +func (x Int64x4) ConvertToInt16Saturated() Int16x8 + +// ConvertToInt16Saturated converts element values to int16 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSQW, CPU Feature: AVX512 +func (x Int64x8) ConvertToInt16Saturated() Int16x8 + /* ConvertToInt16x8 */ // ConvertToInt16x8 converts 8 lowest vector element values to int16. @@ -1374,6 +1468,26 @@ func (x Int64x4) ConvertToInt32() Int32x4 // Asm: VPMOVQD, CPU Feature: AVX512 func (x Int64x8) ConvertToInt32() Int32x8 +/* ConvertToInt32Saturated */ + +// ConvertToInt32Saturated converts element values to int32 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSQD, CPU Feature: AVX512 +func (x Int64x2) ConvertToInt32Saturated() Int32x4 + +// ConvertToInt32Saturated converts element values to int32 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSQD, CPU Feature: AVX512 +func (x Int64x4) ConvertToInt32Saturated() Int32x4 + +// ConvertToInt32Saturated converts element values to int32 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVSQD, CPU Feature: AVX512 +func (x Int64x8) ConvertToInt32Saturated() Int32x8 + /* ConvertToInt32x4 */ // ConvertToInt32x4 converts 4 lowest vector element values to int32. @@ -1443,69 +1557,125 @@ func (x Int8x16) ConvertToInt64x8() Int64x8 /* ConvertToUint8 */ -// ConvertToUint8 converts element values to uint16. +// ConvertToUint8 converts element values to uint8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVWB, CPU Feature: AVX512 func (x Uint16x8) ConvertToUint8() Uint8x16 -// ConvertToUint8 converts element values to uint16. +// ConvertToUint8 converts element values to uint8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVWB, CPU Feature: AVX512 func (x Uint16x16) ConvertToUint8() Uint8x16 -// ConvertToUint8 converts element values to uint16. +// ConvertToUint8 converts element values to uint8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVWB, CPU Feature: AVX512 func (x Uint16x32) ConvertToUint8() Uint8x32 -// ConvertToUint8 converts element values to uint16. +// ConvertToUint8 converts element values to uint8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVDB, CPU Feature: AVX512 func (x Uint32x4) ConvertToUint8() Uint8x16 -// ConvertToUint8 converts element values to uint16. +// ConvertToUint8 converts element values to uint8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVDB, CPU Feature: AVX512 func (x Uint32x8) ConvertToUint8() Uint8x16 -// ConvertToUint8 converts element values to uint16. +// ConvertToUint8 converts element values to uint8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVDB, CPU Feature: AVX512 func (x Uint32x16) ConvertToUint8() Uint8x16 -// ConvertToUint8 converts element values to uint16. +// ConvertToUint8 converts element values to uint8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVQB, CPU Feature: AVX512 func (x Uint64x2) ConvertToUint8() Uint8x16 -// ConvertToUint8 converts element values to uint16. +// ConvertToUint8 converts element values to uint8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVQB, CPU Feature: AVX512 func (x Uint64x4) ConvertToUint8() Uint8x16 -// ConvertToUint8 converts element values to uint16. +// ConvertToUint8 converts element values to uint8. // Conversion is done with truncation on the vector elements. // Results are packed to low elements in the returned vector, its upper elements are zero-cleared. // // Asm: VPMOVQB, CPU Feature: AVX512 func (x Uint64x8) ConvertToUint8() Uint8x16 +/* ConvertToUint8Saturated */ + +// ConvertToUint8Saturated converts element values to uint8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSWB, CPU Feature: AVX512 +func (x Uint16x8) ConvertToUint8Saturated() Uint8x16 + +// ConvertToUint8Saturated converts element values to uint8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSWB, CPU Feature: AVX512 +func (x Uint16x16) ConvertToUint8Saturated() Uint8x16 + +// ConvertToUint8Saturated converts element values to uint8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSWB, CPU Feature: AVX512 +func (x Uint16x32) ConvertToUint8Saturated() Uint8x32 + +// ConvertToUint8Saturated converts element values to uint8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSDB, CPU Feature: AVX512 +func (x Uint32x4) ConvertToUint8Saturated() Uint8x16 + +// ConvertToUint8Saturated converts element values to uint8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSDB, CPU Feature: AVX512 +func (x Uint32x8) ConvertToUint8Saturated() Uint8x16 + +// ConvertToUint8Saturated converts element values to uint8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSDB, CPU Feature: AVX512 +func (x Uint32x16) ConvertToUint8Saturated() Uint8x16 + +// ConvertToUint8Saturated converts element values to uint8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSQB, CPU Feature: AVX512 +func (x Uint64x2) ConvertToUint8Saturated() Uint8x16 + +// ConvertToUint8Saturated converts element values to uint8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSQB, CPU Feature: AVX512 +func (x Uint64x4) ConvertToUint8Saturated() Uint8x16 + +// ConvertToUint8Saturated converts element values to uint8 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSQB, CPU Feature: AVX512 +func (x Uint64x8) ConvertToUint8Saturated() Uint8x16 + /* ConvertToUint16 */ // ConvertToUint16 converts element values to uint16. @@ -1560,6 +1730,44 @@ func (x Uint64x4) ConvertToUint16() Uint16x8 // Asm: VPMOVQW, CPU Feature: AVX512 func (x Uint64x8) ConvertToUint16() Uint16x8 +/* ConvertToUint16Saturated */ + +// ConvertToUint16Saturated converts element values to uint16 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSDW, CPU Feature: AVX512 +func (x Uint32x4) ConvertToUint16Saturated() Uint16x8 + +// ConvertToUint16Saturated converts element values to uint16 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSDW, CPU Feature: AVX512 +func (x Uint32x8) ConvertToUint16Saturated() Uint16x8 + +// ConvertToUint16Saturated converts element values to uint16 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSDW, CPU Feature: AVX512 +func (x Uint32x16) ConvertToUint16Saturated() Uint16x16 + +// ConvertToUint16Saturated converts element values to uint16 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSQW, CPU Feature: AVX512 +func (x Uint64x2) ConvertToUint16Saturated() Uint16x8 + +// ConvertToUint16Saturated converts element values to uint16 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSQW, CPU Feature: AVX512 +func (x Uint64x4) ConvertToUint16Saturated() Uint16x8 + +// ConvertToUint16Saturated converts element values to uint16 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSQW, CPU Feature: AVX512 +func (x Uint64x8) ConvertToUint16Saturated() Uint16x8 + /* ConvertToUint16x8 */ // ConvertToUint16x8 converts 8 lowest vector element values to uint16. @@ -1620,6 +1828,26 @@ func (x Uint64x4) ConvertToUint32() Uint32x4 // Asm: VPMOVQD, CPU Feature: AVX512 func (x Uint64x8) ConvertToUint32() Uint32x8 +/* ConvertToUint32Saturated */ + +// ConvertToUint32Saturated converts element values to uint32 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSQD, CPU Feature: AVX512 +func (x Uint64x2) ConvertToUint32Saturated() Uint32x4 + +// ConvertToUint32Saturated converts element values to uint32 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSQD, CPU Feature: AVX512 +func (x Uint64x4) ConvertToUint32Saturated() Uint32x4 + +// ConvertToUint32Saturated converts element values to uint32 with saturation. +// Results are packed to low elements in the returned vector, its upper elements are zero-cleared. +// +// Asm: VPMOVUSQD, CPU Feature: AVX512 +func (x Uint64x8) ConvertToUint32Saturated() Uint32x8 + /* ConvertToUint32x4 */ // ConvertToUint32x4 converts 4 lowest vector element values to uint32.