From: limeidan <limeidan@loongson.cn>
Date: Fri, 18 Jul 2025 02:36:06 +0000 (+0800)
Subject: cmd/compile/internal: optimizing add+sll rule using ALSLV instruction on loong64
X-Git-Tag: go1.26rc1~1023
X-Git-Url: http://www.git.cypherpunks.su/?a=commitdiff_plain;h=bd71b94659;p=gostls13.git

cmd/compile/internal: optimizing add+sll rule using ALSLV instruction on loong64

Reduce the number of go toolchain instructions on loong64 as follows:

	file	    before	after	    Δ 	     %
	go	    1573148	1571708	   -1,440  -0.0915%
	gofmt	    320578	320090	   -488    -0.1522%
	asm	    555066	554406	   -660    -0.1189%
	cgo	    481566	480926	   -640    -0.1329%
	compile	    2475962	2473880	   -2,082  -0.0841%
	cover	    516536	515920	   -616    -0.1193%
	link	    702172	701404	   -768    -0.1094%
	preprofile  238626	238274	   -352    -0.1475%
	vet	    792928	792100	   -828    -0.1044%

Change-Id: I61e462726835959c60e1b4e5256d4020202418ab
Reviewed-on: https://go-review.googlesource.com/c/go/+/693877
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Keith Randall <khr@google.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: abner chenc <chenguoqi@loongson.cn>
---

diff --git a/src/cmd/compile/internal/ssa/_gen/LOONG64.rules b/src/cmd/compile/internal/ssa/_gen/LOONG64.rules
index ba506ea24b..ca04bdcd42 100644
--- a/src/cmd/compile/internal/ssa/_gen/LOONG64.rules
+++ b/src/cmd/compile/internal/ssa/_gen/LOONG64.rules
@@ -766,6 +766,8 @@
 (MULV (NEGV x) (MOVVconst [c])) => (MULV x (MOVVconst [-c]))
 (MULV (NEGV x) (NEGV y)) => (MULV x y)
 
+(ADDV x0 x1:(SLLVconst [c] y)) && x1.Uses == 1 && c > 0 && c <= 4 => (ADDshiftLLV x0 y [c])
+
 // div by constant
 (DIVVU x (MOVVconst [1])) => x
 (DIVVU x (MOVVconst [c])) && isPowerOfTwo(c) => (SRLVconst [log64(c)] x)
diff --git a/src/cmd/compile/internal/ssa/rewriteLOONG64.go b/src/cmd/compile/internal/ssa/rewriteLOONG64.go
index e36ac4f78a..eb134789f7 100644
--- a/src/cmd/compile/internal/ssa/rewriteLOONG64.go
+++ b/src/cmd/compile/internal/ssa/rewriteLOONG64.go
@@ -1931,6 +1931,28 @@ func rewriteValueLOONG64_OpLOONG64ADDV(v *Value) bool {
 		}
 		break
 	}
+	// match: (ADDV x0 x1:(SLLVconst [c] y))
+	// cond: x1.Uses == 1 && c > 0 && c <= 4
+	// result: (ADDshiftLLV x0 y [c])
+	for {
+		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
+			x0 := v_0
+			x1 := v_1
+			if x1.Op != OpLOONG64SLLVconst {
+				continue
+			}
+			c := auxIntToInt64(x1.AuxInt)
+			y := x1.Args[0]
+			if !(x1.Uses == 1 && c > 0 && c <= 4) {
+				continue
+			}
+			v.reset(OpLOONG64ADDshiftLLV)
+			v.AuxInt = int64ToAuxInt(c)
+			v.AddArg2(x0, y)
+			return true
+		}
+		break
+	}
 	// match: (ADDV x (NEGV y))
 	// result: (SUBV x y)
 	for {
diff --git a/test/codegen/arithmetic.go b/test/codegen/arithmetic.go
index 67adb50fa5..beabfe24eb 100644
--- a/test/codegen/arithmetic.go
+++ b/test/codegen/arithmetic.go
@@ -624,6 +624,11 @@ func AddMul(x int) int {
 	return 2*x + 1
 }
 
+func AddShift(a, b int) int {
+	// loong64: "ALSLV"
+	return a + (b << 4)
+}
+
 func MULA(a, b, c uint32) (uint32, uint32, uint32) {
 	// arm:`MULA`,-`MUL\s`
 	// arm64:`MADDW`,-`MULW`