From 8e3104dc269b959083f7e7133841e3366a477ef1 Mon Sep 17 00:00:00 2001 From: jjpinto Date: Sat, 27 Dec 2025 14:09:40 +0000 Subject: [PATCH] simd/archsimd/_gen/simdgen: fix typos in error messages simdgen: fix typos in error messages Change-Id: I921eea63c4847b2af43a1d5a1ea075e86f58aa77 GitHub-Last-Rev: 8c9dae51fd906aee04f52a5d44c6d4c923fc52d0 GitHub-Pull-Request: golang/go#77012 Reviewed-on: https://go-review.googlesource.com/c/go/+/732880 Reviewed-by: Keith Randall Reviewed-by: Keith Randall Auto-Submit: Keith Randall LUCI-TryBot-Result: Go LUCI Reviewed-by: Carlos Amedee --- src/simd/archsimd/_gen/simdgen/gen_utility.go | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/simd/archsimd/_gen/simdgen/gen_utility.go b/src/simd/archsimd/_gen/simdgen/gen_utility.go index 50dcdd2618..60d5900608 100644 --- a/src/simd/archsimd/_gen/simdgen/gen_utility.go +++ b/src/simd/archsimd/_gen/simdgen/gen_utility.go @@ -157,7 +157,7 @@ func (op *Operation) shape() (shapeIn inShape, shapeOut outShape, maskType maskS if shapeOut != OneVregOutAtIn && in.AsmPos == 0 && in.Class == "vreg" { shapeOut = OneVregOutAtIn } else { - panic(fmt.Errorf("simdgen only support output and input sharing the same position case of \"the first input is vreg and the only output\": %s", op)) + panic(fmt.Errorf("simdgen only supports output and input sharing the same position case of \"the first input is vreg and the only output\": %s", op)) } } if in.Class == "immediate" { @@ -204,7 +204,7 @@ func (op *Operation) shape() (shapeIn inShape, shapeOut outShape, maskType maskS panic(fmt.Errorf("simdgen does not support immediates in pure mask operations: %s", op)) } if hasVreg { - panic(fmt.Errorf("simdgen does not support more than 1 masks in non-pure mask operations: %s", op)) + panic(fmt.Errorf("simdgen does not support more than 1 mask in non-pure mask operations: %s", op)) } return false } @@ -734,7 +734,7 @@ func overwrite(ops []Operation) error { oBase := *op[idx].OverwriteBase oClass := *op[idx].OverwriteClass if oClass != "mask" { - panic(fmt.Errorf("simdgen: [Class] overwrite only supports overwritting to mask: %s", op[idx])) + panic(fmt.Errorf("simdgen: [Class] overwrite only supports overwriting to mask: %s", op[idx])) } if oBase != "int" { panic(fmt.Errorf("simdgen: [Class] overwrite must set [OverwriteBase] to int: %s", op[idx])) -- 2.52.0