From ffc85ee1f1c865c953920f966a8401d963b102ca Mon Sep 17 00:00:00 2001 From: Joel Sing Date: Fri, 25 Jul 2025 20:40:24 +1000 Subject: [PATCH] cmd/internal/objabi,cmd/link: add support for additional riscv64 relocations These additional relocation types are encountered when using the Go race detector with riscv64. Updates #64345 Change-Id: I6de6430165fb378463da1af9402198a3a31485ca Reviewed-on: https://go-review.googlesource.com/c/go/+/690496 Reviewed-by: Dmitri Shuralyov Reviewed-by: Cherry Mui LUCI-TryBot-Result: Go LUCI Reviewed-by: Meng Zhuo --- src/cmd/internal/objabi/reloctype.go | 8 +++ src/cmd/internal/objabi/reloctype_string.go | 62 +++++++++++---------- src/cmd/link/internal/loadelf/ldelf.go | 1 + src/cmd/link/internal/riscv64/asm.go | 33 +++++++++++ 4 files changed, 74 insertions(+), 30 deletions(-) diff --git a/src/cmd/internal/objabi/reloctype.go b/src/cmd/internal/objabi/reloctype.go index 9b9b4b7ee3..2fbd19e20c 100644 --- a/src/cmd/internal/objabi/reloctype.go +++ b/src/cmd/internal/objabi/reloctype.go @@ -305,6 +305,14 @@ const ( // R_RISCV_BRANCH resolves a 12-bit PC-relative branch offset. R_RISCV_BRANCH + // R_RISCV_ADD32 resolves a 32-bit label addition, being the stored value, + // plus the symbol address plus the addend (V + S + A). + R_RISCV_ADD32 + + // R_RISCV_SUB32 resolves a 32-bit label subtraction, being the stored value, + // minus the symbol address minus the addend (V - S - A). + R_RISCV_SUB32 + // R_RISCV_RVC_BRANCH resolves an 8-bit PC-relative offset for a CB-type // instruction. R_RISCV_RVC_BRANCH diff --git a/src/cmd/internal/objabi/reloctype_string.go b/src/cmd/internal/objabi/reloctype_string.go index ae7941c441..1ad1d06633 100644 --- a/src/cmd/internal/objabi/reloctype_string.go +++ b/src/cmd/internal/objabi/reloctype_string.go @@ -79,39 +79,41 @@ func _() { _ = x[R_RISCV_PCREL_LO12_I-69] _ = x[R_RISCV_PCREL_LO12_S-70] _ = x[R_RISCV_BRANCH-71] - _ = x[R_RISCV_RVC_BRANCH-72] - _ = x[R_RISCV_RVC_JUMP-73] - _ = x[R_PCRELDBL-74] - _ = x[R_LOONG64_ADDR_HI-75] - _ = x[R_LOONG64_ADDR_LO-76] - _ = x[R_LOONG64_TLS_LE_HI-77] - _ = x[R_LOONG64_TLS_LE_LO-78] - _ = x[R_CALLLOONG64-79] - _ = x[R_LOONG64_TLS_IE_HI-80] - _ = x[R_LOONG64_TLS_IE_LO-81] - _ = x[R_LOONG64_GOT_HI-82] - _ = x[R_LOONG64_GOT_LO-83] - _ = x[R_LOONG64_ADD64-84] - _ = x[R_LOONG64_SUB64-85] - _ = x[R_JMP16LOONG64-86] - _ = x[R_JMP21LOONG64-87] - _ = x[R_JMPLOONG64-88] - _ = x[R_ADDRMIPSU-89] - _ = x[R_ADDRMIPSTLS-90] - _ = x[R_ADDRCUOFF-91] - _ = x[R_WASMIMPORT-92] - _ = x[R_XCOFFREF-93] - _ = x[R_PEIMAGEOFF-94] - _ = x[R_INITORDER-95] - _ = x[R_DWTXTADDR_U1-96] - _ = x[R_DWTXTADDR_U2-97] - _ = x[R_DWTXTADDR_U3-98] - _ = x[R_DWTXTADDR_U4-99] + _ = x[R_RISCV_ADD32-72] + _ = x[R_RISCV_SUB32-73] + _ = x[R_RISCV_RVC_BRANCH-74] + _ = x[R_RISCV_RVC_JUMP-75] + _ = x[R_PCRELDBL-76] + _ = x[R_LOONG64_ADDR_HI-77] + _ = x[R_LOONG64_ADDR_LO-78] + _ = x[R_LOONG64_TLS_LE_HI-79] + _ = x[R_LOONG64_TLS_LE_LO-80] + _ = x[R_CALLLOONG64-81] + _ = x[R_LOONG64_TLS_IE_HI-82] + _ = x[R_LOONG64_TLS_IE_LO-83] + _ = x[R_LOONG64_GOT_HI-84] + _ = x[R_LOONG64_GOT_LO-85] + _ = x[R_LOONG64_ADD64-86] + _ = x[R_LOONG64_SUB64-87] + _ = x[R_JMP16LOONG64-88] + _ = x[R_JMP21LOONG64-89] + _ = x[R_JMPLOONG64-90] + _ = x[R_ADDRMIPSU-91] + _ = x[R_ADDRMIPSTLS-92] + _ = x[R_ADDRCUOFF-93] + _ = x[R_WASMIMPORT-94] + _ = x[R_XCOFFREF-95] + _ = x[R_PEIMAGEOFF-96] + _ = x[R_INITORDER-97] + _ = x[R_DWTXTADDR_U1-98] + _ = x[R_DWTXTADDR_U2-99] + _ = x[R_DWTXTADDR_U3-100] + _ = x[R_DWTXTADDR_U4-101] } -const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USENAMEDMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_JALR_RISCV_JAL_TRAMPR_RISCV_CALLR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IER_RISCV_TLS_LER_RISCV_GOT_HI20R_RISCV_GOT_PCREL_ITYPER_RISCV_PCREL_HI20R_RISCV_PCREL_LO12_IR_RISCV_PCREL_LO12_SR_RISCV_BRANCHR_RISCV_RVC_BRANCHR_RISCV_RVC_JUMPR_PCRELDBLR_LOONG64_ADDR_HIR_LOONG64_ADDR_LOR_LOONG64_TLS_LE_HIR_LOONG64_TLS_LE_LOR_CALLLOONG64R_LOONG64_TLS_IE_HIR_LOONG64_TLS_IE_LOR_LOONG64_GOT_HIR_LOONG64_GOT_LOR_LOONG64_ADD64R_LOONG64_SUB64R_JMP16LOONG64R_JMP21LOONG64R_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREFR_PEIMAGEOFFR_INITORDERR_DWTXTADDR_U1R_DWTXTADDR_U2R_DWTXTADDR_U3R_DWTXTADDR_U4" +const _RelocType_name = "R_ADDRR_ADDRPOWERR_ADDRARM64R_ADDRMIPSR_ADDROFFR_SIZER_CALLR_CALLARMR_CALLARM64R_CALLINDR_CALLPOWERR_CALLMIPSR_CONSTR_PCRELR_TLS_LER_TLS_IER_GOTOFFR_PLT0R_PLT1R_PLT2R_USEFIELDR_USETYPER_USEIFACER_USEIFACEMETHODR_USENAMEDMETHODR_METHODOFFR_KEEPR_POWER_TOCR_GOTPCRELR_JMPMIPSR_DWARFSECREFR_ARM64_TLS_LER_ARM64_TLS_IER_ARM64_GOTPCRELR_ARM64_GOTR_ARM64_PCRELR_ARM64_PCREL_LDST8R_ARM64_PCREL_LDST16R_ARM64_PCREL_LDST32R_ARM64_PCREL_LDST64R_ARM64_LDST8R_ARM64_LDST16R_ARM64_LDST32R_ARM64_LDST64R_ARM64_LDST128R_POWER_TLS_LER_POWER_TLS_IER_POWER_TLSR_POWER_TLS_IE_PCREL34R_POWER_TLS_LE_TPREL34R_ADDRPOWER_DSR_ADDRPOWER_GOTR_ADDRPOWER_GOT_PCREL34R_ADDRPOWER_PCRELR_ADDRPOWER_TOCRELR_ADDRPOWER_TOCREL_DSR_ADDRPOWER_D34R_ADDRPOWER_PCREL34R_RISCV_JALR_RISCV_JAL_TRAMPR_RISCV_CALLR_RISCV_PCREL_ITYPER_RISCV_PCREL_STYPER_RISCV_TLS_IER_RISCV_TLS_LER_RISCV_GOT_HI20R_RISCV_GOT_PCREL_ITYPER_RISCV_PCREL_HI20R_RISCV_PCREL_LO12_IR_RISCV_PCREL_LO12_SR_RISCV_BRANCHR_RISCV_ADD32R_RISCV_SUB32R_RISCV_RVC_BRANCHR_RISCV_RVC_JUMPR_PCRELDBLR_LOONG64_ADDR_HIR_LOONG64_ADDR_LOR_LOONG64_TLS_LE_HIR_LOONG64_TLS_LE_LOR_CALLLOONG64R_LOONG64_TLS_IE_HIR_LOONG64_TLS_IE_LOR_LOONG64_GOT_HIR_LOONG64_GOT_LOR_LOONG64_ADD64R_LOONG64_SUB64R_JMP16LOONG64R_JMP21LOONG64R_JMPLOONG64R_ADDRMIPSUR_ADDRMIPSTLSR_ADDRCUOFFR_WASMIMPORTR_XCOFFREFR_PEIMAGEOFFR_INITORDERR_DWTXTADDR_U1R_DWTXTADDR_U2R_DWTXTADDR_U3R_DWTXTADDR_U4" -var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 226, 237, 243, 254, 264, 273, 286, 300, 314, 330, 341, 354, 373, 393, 413, 433, 446, 460, 474, 488, 503, 517, 531, 542, 564, 586, 600, 615, 638, 655, 673, 694, 709, 728, 739, 756, 768, 787, 806, 820, 834, 850, 873, 891, 911, 931, 945, 963, 979, 989, 1006, 1023, 1042, 1061, 1074, 1093, 1112, 1128, 1144, 1159, 1174, 1188, 1202, 1214, 1225, 1238, 1249, 1261, 1271, 1283, 1294, 1308, 1322, 1336, 1350} +var _RelocType_index = [...]uint16{0, 6, 17, 28, 38, 47, 53, 59, 68, 79, 88, 99, 109, 116, 123, 131, 139, 147, 153, 159, 165, 175, 184, 194, 210, 226, 237, 243, 254, 264, 273, 286, 300, 314, 330, 341, 354, 373, 393, 413, 433, 446, 460, 474, 488, 503, 517, 531, 542, 564, 586, 600, 615, 638, 655, 673, 694, 709, 728, 739, 756, 768, 787, 806, 820, 834, 850, 873, 891, 911, 931, 945, 958, 971, 989, 1005, 1015, 1032, 1049, 1068, 1087, 1100, 1119, 1138, 1154, 1170, 1185, 1200, 1214, 1228, 1240, 1251, 1264, 1275, 1287, 1297, 1309, 1320, 1334, 1348, 1362, 1376} func (i RelocType) String() string { i -= 1 diff --git a/src/cmd/link/internal/loadelf/ldelf.go b/src/cmd/link/internal/loadelf/ldelf.go index 22c5dbc007..bb0c22da7e 100644 --- a/src/cmd/link/internal/loadelf/ldelf.go +++ b/src/cmd/link/internal/loadelf/ldelf.go @@ -1178,6 +1178,7 @@ func relSize(arch *sys.Arch, pn string, elftype uint32) (uint8, uint8, error) { RISCV64 | uint32(elf.R_RISCV_SET32)<<16, RISCV64 | uint32(elf.R_RISCV_SUB32)<<16, RISCV64 | uint32(elf.R_RISCV_32_PCREL)<<16, + RISCV64 | uint32(elf.R_RISCV_JAL)<<16, RISCV64 | uint32(elf.R_RISCV_RELAX)<<16: return 4, 4, nil diff --git a/src/cmd/link/internal/riscv64/asm.go b/src/cmd/link/internal/riscv64/asm.go index 527f09e17c..f856583727 100644 --- a/src/cmd/link/internal/riscv64/asm.go +++ b/src/cmd/link/internal/riscv64/asm.go @@ -118,6 +118,26 @@ func adddynrel(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s loade su.SetRelocType(rIdx, objabi.R_RISCV_PCREL_LO12_S) return true + case objabi.ElfRelocOffset + objabi.RelocType(elf.R_RISCV_32_PCREL): + su := ldr.MakeSymbolUpdater(s) + su.SetRelocType(rIdx, objabi.R_PCREL) + return true + + case objabi.ElfRelocOffset + objabi.RelocType(elf.R_RISCV_64): + su := ldr.MakeSymbolUpdater(s) + su.SetRelocType(rIdx, objabi.R_ADDR) + return true + + case objabi.ElfRelocOffset + objabi.RelocType(elf.R_RISCV_ADD32): + su := ldr.MakeSymbolUpdater(s) + su.SetRelocType(rIdx, objabi.R_RISCV_ADD32) + return true + + case objabi.ElfRelocOffset + objabi.RelocType(elf.R_RISCV_SUB32): + su := ldr.MakeSymbolUpdater(s) + su.SetRelocType(rIdx, objabi.R_RISCV_SUB32) + return true + case objabi.ElfRelocOffset + objabi.RelocType(elf.R_RISCV_RVC_BRANCH): su := ldr.MakeSymbolUpdater(s) su.SetRelocType(rIdx, objabi.R_RISCV_RVC_BRANCH) @@ -137,6 +157,11 @@ func adddynrel(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, s loade // Ignore relaxations, at least for now. return true + case objabi.ElfRelocOffset + objabi.RelocType(elf.R_RISCV_JAL): + su := ldr.MakeSymbolUpdater(s) + su.SetRelocType(rIdx, objabi.R_RISCV_JAL) + return true + default: if r.Type() >= objabi.ElfRelocOffset { ldr.Errorf(s, "unexpected relocation type %d (%s)", r.Type(), sym.RelocName(target.Arch, r.Type())) @@ -639,6 +664,14 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade second = (second &^ secondImmMask) | int64(uint32(secondImm)) return second<<32 | auipc, 0, true + + case objabi.R_RISCV_ADD32: + addr := val + ldr.SymValue(rs) + r.Add() + return int64(uint32(addr)), 0, true + + case objabi.R_RISCV_SUB32: + addr := val - ldr.SymValue(rs) - r.Add() + return int64(uint32(addr)), 0, true } return val, 0, false -- 2.52.0