]> Cypherpunks repositories - gostls13.git/commit
cmd/compile,cmd/internal/obj/riscv: always provide ANDN, ORN and XNOR for riscv64
authorJoel Sing <joel@sing.id.au>
Mon, 9 Sep 2024 15:04:51 +0000 (01:04 +1000)
committerJoel Sing <joel@sing.id.au>
Thu, 12 Sep 2024 15:03:44 +0000 (15:03 +0000)
commit0ee5d20b1fe617e425d1798a4f7439cf8c337459
tree85249af50ba49787e645e701780d9cb28201061e
parent301499ff7babb4a5137069510b16bb51b08af2c6
cmd/compile,cmd/internal/obj/riscv: always provide ANDN, ORN and XNOR for riscv64

The ANDN, ORN and XNOR RISC-V Zbb extension instructions are easily
synthesised. Make them always available by adding support to the
riscv64 assembler so that we either emit two instruction sequences,
or a single instruction, when permitted by the GORISCV64 profile.
This means that these instructions can be used unconditionally,
simplifying compiler rewrite rules, codegen tests and manually
written assembly.

Around 180 instructions are removed from the Go binary on riscv64
when built with rva22u64.

Change-Id: Ib2d90f2593a306530dc0ed08a981acde4d01be20
Reviewed-on: https://go-review.googlesource.com/c/go/+/611895
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
Reviewed-by: Tim King <taking@google.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
src/cmd/asm/internal/asm/testdata/riscv64.s
src/cmd/compile/internal/riscv64/ssa.go
src/cmd/compile/internal/ssa/_gen/RISCV64.rules
src/cmd/compile/internal/ssa/_gen/RISCV64Ops.go
src/cmd/compile/internal/ssa/_gen/RISCV64latelower.rules
src/cmd/compile/internal/ssa/opGen.go
src/cmd/compile/internal/ssa/rewriteRISCV64latelower.go
src/cmd/internal/obj/riscv/obj.go