XVMULWODWHUH X1, X2, X3 // 4384a274
XVMULWODVWUW X1, X2, X3 // 4304a374
XVMULWODQVUV X1, X2, X3 // 4384a374
+
+ // [X]VSHUF4I.{B/H/W/D} instructions
+ VSHUF4IB $0, V2, V1 // 41009073
+ VSHUF4IB $16, V2, V1 // 41409073
+ VSHUF4IB $255, V2, V1 // 41fc9373
+ VSHUF4IH $0, V2, V1 // 41009473
+ VSHUF4IH $128, V2, V1 // 41009673
+ VSHUF4IH $255, V2, V1 // 41fc9773
+ VSHUF4IW $0, V2, V1 // 41009873
+ VSHUF4IW $96, V2, V1 // 41809973
+ VSHUF4IW $255, V2, V1 // 41fc9b73
+ VSHUF4IV $0, V2, V1 // 41009c73
+ VSHUF4IV $8, V2, V1 // 41209c73
+ VSHUF4IV $15, V2, V1 // 413c9c73
+ XVSHUF4IB $0, X1, X2 // 22009077
+ XVSHUF4IB $16, X1, X2 // 22409077
+ XVSHUF4IB $255, X1, X2 // 22fc9377
+ XVSHUF4IH $0, X1, X2 // 22009477
+ XVSHUF4IH $128, X1, X2 // 22009677
+ XVSHUF4IH $255, X1, X2 // 22fc9777
+ XVSHUF4IW $0, X1, X2 // 22009877
+ XVSHUF4IW $96, X1, X2 // 22809977
+ XVSHUF4IW $255, X1, X2 // 22fc9b77
+ XVSHUF4IV $0, X1, X2 // 22009c77
+ XVSHUF4IV $8, X1, X2 // 22209c77
+ XVSHUF4IV $15, X1, X2 // 223c9c77
opset(AVORB, r0)
opset(AVXORB, r0)
opset(AVNORB, r0)
+ opset(AVSHUF4IB, r0)
+ opset(AVSHUF4IH, r0)
+ opset(AVSHUF4IW, r0)
+ opset(AVSHUF4IV, r0)
case AXVANDB:
opset(AXVORB, r0)
opset(AXVXORB, r0)
opset(AXVNORB, r0)
+ opset(AXVSHUF4IB, r0)
+ opset(AXVSHUF4IH, r0)
+ opset(AXVSHUF4IW, r0)
+ opset(AXVSHUF4IV, r0)
case AVANDV:
opset(AVORV, r0)
r = int(p.To.Reg)
}
+ // the operand range available for instructions VSHUF4IV and XVSHUF4IV is [0, 15]
+ if p.As == AVSHUF4IV || p.As == AXVSHUF4IV {
+ operand := uint32(v)
+ c.checkoperand(p, operand, 15)
+ }
+
o1 = OP_8IRR(c.opirr(p.As), uint32(v), uint32(r), uint32(p.To.Reg))
case 24: // add $lcon,r1,r2
out[4] = o5
}
+// checkoperand checks if operand >= 0 && operand <= maxoperand
+func (c *ctxt0) checkoperand(p *obj.Prog, operand uint32, mask uint32) {
+ if (operand & ^mask) != 0 {
+ c.ctxt.Diag("operand out of range 0 to %d: %v", mask, p)
+ }
+}
+
// checkindex checks if index >= 0 && index <= maxindex
func (c *ctxt0) checkindex(p *obj.Prog, index uint32, mask uint32) {
if (index & ^mask) != 0 {
return 0xed1a << 15 // xvsubi.wu
case AXVSUBVU:
return 0xed1b << 15 // xvsubi.du
+ case AVSHUF4IB:
+ return 0x1ce4 << 18 // vshuf4i.b
+ case AVSHUF4IH:
+ return 0x1ce5 << 18 // vshuf4i.h
+ case AVSHUF4IW:
+ return 0x1ce6 << 18 // vshuf4i.w
+ case AVSHUF4IV:
+ return 0x1ce7 << 18 // vshuf4i.d
+ case AXVSHUF4IB:
+ return 0x1de4 << 18 // xvshuf4i.b
+ case AXVSHUF4IH:
+ return 0x1de5 << 18 // xvshuf4i.h
+ case AXVSHUF4IW:
+ return 0x1de6 << 18 // xvshuf4i.w
+ case AXVSHUF4IV:
+ return 0x1de7 << 18 // xvshuf4i.d
}
if a < 0 {