cmd/compile: make link register allocatable in non-leaf functions

We save and restore the link register in non-leaf functions because
it is clobbered by CALLs. It is therefore available for general
purpose use.

Only enabled on s390x currently. The RC4 benchmarks in particular
benefit from the extra register:

name     old speed     new speed     delta
RC4_128  243MB/s ± 2%  341MB/s ± 2%  +40.46%  (p=0.008 n=5+5)
RC4_1K   267MB/s ± 0%  359MB/s ± 1%  +34.32%  (p=0.008 n=5+5)
RC4_8K   271MB/s ± 0%  362MB/s ± 0%  +33.61%  (p=0.008 n=5+5)

Change-Id: Id23bff95e771da9425353da2f32668b8e34ba09f
Reviewed-on: https://go-review.googlesource.com/30597
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Michael Munday <munday@ca.ibm.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>

diff --git a/src/cmd/compile/internal/ssa/config.go b/src/cmd/compile/internal/ssa/config.go
index 9ce8f6922f78d6b6fb26b8030258c46f07785a51..e72c72dcc78f9445a11d9108a5623f0bbf636082 100644 (file)
--- a/src/cmd/compile/internal/ssa/config.go
+++ b/src/cmd/compile/internal/ssa/config.go
@@ -25,6 +25,7 @@ type Config struct {
        fpRegMask       regMask                    // floating point register mask
        specialRegMask  regMask                    // special register mask
        FPReg           int8                       // register number of frame pointer, -1 if not used
+       LinkReg         int8                       // register number of link register if it is a general purpose register, -1 if not used
        hasGReg         bool                       // has hardware g register
        fe              Frontend                   // callbacks into compiler frontend
        HTML            *HTMLWriter                // html writer, for debugging
@@ -143,6 +144,7 @@ func NewConfig(arch string, fe Frontend, ctxt *obj.Link, optimize bool) *Config
                c.gpRegMask = gpRegMaskAMD64
                c.fpRegMask = fpRegMaskAMD64
                c.FPReg = framepointerRegAMD64
+               c.LinkReg = linkRegAMD64
                c.hasGReg = false
        case "amd64p32":
                c.IntSize = 4
@@ -154,6 +156,7 @@ func NewConfig(arch string, fe Frontend, ctxt *obj.Link, optimize bool) *Config
                c.gpRegMask = gpRegMaskAMD64
                c.fpRegMask = fpRegMaskAMD64
                c.FPReg = framepointerRegAMD64
+               c.LinkReg = linkRegAMD64
                c.hasGReg = false
                c.noDuffDevice = true
        case "386":
@@ -166,6 +169,7 @@ func NewConfig(arch string, fe Frontend, ctxt *obj.Link, optimize bool) *Config
                c.gpRegMask = gpRegMask386
                c.fpRegMask = fpRegMask386
                c.FPReg = framepointerReg386
+               c.LinkReg = linkReg386
                c.hasGReg = false
        case "arm":
                c.IntSize = 4
@@ -177,6 +181,7 @@ func NewConfig(arch string, fe Frontend, ctxt *obj.Link, optimize bool) *Config
                c.gpRegMask = gpRegMaskARM
                c.fpRegMask = fpRegMaskARM
                c.FPReg = framepointerRegARM
+               c.LinkReg = linkRegARM
                c.hasGReg = true
        case "arm64":
                c.IntSize = 8
@@ -188,6 +193,7 @@ func NewConfig(arch string, fe Frontend, ctxt *obj.Link, optimize bool) *Config
                c.gpRegMask = gpRegMaskARM64
                c.fpRegMask = fpRegMaskARM64
                c.FPReg = framepointerRegARM64
+               c.LinkReg = linkRegARM64
                c.hasGReg = true
                c.noDuffDevice = obj.GOOS == "darwin" // darwin linker cannot handle BR26 reloc with non-zero addend
        case "ppc64":
@@ -203,6 +209,7 @@ func NewConfig(arch string, fe Frontend, ctxt *obj.Link, optimize bool) *Config
                c.gpRegMask = gpRegMaskPPC64
                c.fpRegMask = fpRegMaskPPC64
                c.FPReg = framepointerRegPPC64
+               c.LinkReg = linkRegPPC64
                c.noDuffDevice = true // TODO: Resolve PPC64 DuffDevice (has zero, but not copy)
                c.NeedsFpScratch = true
                c.hasGReg = true
@@ -217,6 +224,7 @@ func NewConfig(arch string, fe Frontend, ctxt *obj.Link, optimize bool) *Config
                c.fpRegMask = fpRegMaskMIPS64
                c.specialRegMask = specialRegMaskMIPS64
                c.FPReg = framepointerRegMIPS64
+               c.LinkReg = linkRegMIPS64
                c.hasGReg = true
        case "s390x":
                c.IntSize = 8
@@ -228,6 +236,7 @@ func NewConfig(arch string, fe Frontend, ctxt *obj.Link, optimize bool) *Config
                c.gpRegMask = gpRegMaskS390X
                c.fpRegMask = fpRegMaskS390X
                c.FPReg = framepointerRegS390X
+               c.LinkReg = linkRegS390X
                c.hasGReg = true
                c.noDuffDevice = true
        default:

diff --git a/src/cmd/compile/internal/ssa/gen/386Ops.go b/src/cmd/compile/internal/ssa/gen/386Ops.go
index 7ff521476c789a32c5d166c6308ff730f5f89e6d..d09f497413bcb47284866d88979ded6b4f34fe77 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/386Ops.go
+++ b/src/cmd/compile/internal/ssa/gen/386Ops.go
@@ -501,5 +501,6 @@ func init() {
                gpregmask:       gp,
                fpregmask:       fp,
                framepointerreg: int8(num["BP"]),
+               linkreg:         -1, // not used
        })
 }

diff --git a/src/cmd/compile/internal/ssa/gen/AMD64Ops.go b/src/cmd/compile/internal/ssa/gen/AMD64Ops.go
index 7dacfe3cf2630730b05dc32b60f5c42e060afa16..5a293d1b6a3fb2aea79c3aa667bd491104b3e49a 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/AMD64Ops.go
+++ b/src/cmd/compile/internal/ssa/gen/AMD64Ops.go
@@ -588,5 +588,6 @@ func init() {
                gpregmask:       gp,
                fpregmask:       fp,
                framepointerreg: int8(num["BP"]),
+               linkreg:         -1, // not used
        })
 }

diff --git a/src/cmd/compile/internal/ssa/gen/ARM64Ops.go b/src/cmd/compile/internal/ssa/gen/ARM64Ops.go
index 70cb9290c8b7cba147a6e9d6678595407310ae9c..bf4b9772af3faa8936751f6f93970d4055a12fd6 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/ARM64Ops.go
+++ b/src/cmd/compile/internal/ssa/gen/ARM64Ops.go
@@ -530,5 +530,6 @@ func init() {
                gpregmask:       gp,
                fpregmask:       fp,
                framepointerreg: -1, // not used
+               linkreg:         -1, // not used
        })
 }

diff --git a/src/cmd/compile/internal/ssa/gen/ARMOps.go b/src/cmd/compile/internal/ssa/gen/ARMOps.go
index a6db703d59bdfc0726db341aa2ec05dd3a0e0f9a..d4f3659aed6a1c6e2d84852df2a344521b4e430e 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/ARMOps.go
+++ b/src/cmd/compile/internal/ssa/gen/ARMOps.go
@@ -526,5 +526,6 @@ func init() {
                gpregmask:       gp,
                fpregmask:       fp,
                framepointerreg: -1, // not used
+               linkreg:         -1, // not used
        })
 }

diff --git a/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go b/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go
index 537408779e67f91ce8ec3db2569e1354d700e23f..2550f2118674ab774c419c021cb0966cce4fa630 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go
+++ b/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go
@@ -376,5 +376,6 @@ func init() {
                fpregmask:       fp,
                specialregmask:  hi | lo,
                framepointerreg: -1, // not used
+               linkreg:         -1, // not used
        })
 }

diff --git a/src/cmd/compile/internal/ssa/gen/PPC64Ops.go b/src/cmd/compile/internal/ssa/gen/PPC64Ops.go
index 4b4f799668243db598746d2241c70cd8bbfb312c..d7a1363c0cf8bae135790bafdd2277f6e77d3eef 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/PPC64Ops.go
+++ b/src/cmd/compile/internal/ssa/gen/PPC64Ops.go
@@ -393,5 +393,6 @@ func init() {
                gpregmask:       gp,
                fpregmask:       fp,
                framepointerreg: int8(num["SP"]),
+               linkreg:         -1, // not used
        })
 }

diff --git a/src/cmd/compile/internal/ssa/gen/S390XOps.go b/src/cmd/compile/internal/ssa/gen/S390XOps.go
index f5eb7ec74fd94ff794fab7bd925af84ef82133ac..d05dcc27a2919a4879b965f666899d1cc7554480 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/S390XOps.go
+++ b/src/cmd/compile/internal/ssa/gen/S390XOps.go
@@ -91,7 +91,7 @@ func init() {
                r0 = buildReg("R0")
 
                // R10 and R11 are reserved by the assembler.
-               gp   = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12")
+               gp   = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14")
                gpsp = gp | sp
 
                // R0 is considered to contain the value 0 in address calculations.
@@ -547,5 +547,6 @@ func init() {
                gpregmask:       gp,
                fpregmask:       fp,
                framepointerreg: -1, // not used
+               linkreg:         int8(num["R14"]),
        })
 }

diff --git a/src/cmd/compile/internal/ssa/gen/main.go b/src/cmd/compile/internal/ssa/gen/main.go
index fd6ef7f73188872cddfbb797131c84990fb3b04c..ac9a87ea96acfe620a025b144de8899dbda5e9a6 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/main.go
+++ b/src/cmd/compile/internal/ssa/gen/main.go
@@ -31,6 +31,7 @@ type arch struct {
        fpregmask       regMask
        specialregmask  regMask
        framepointerreg int8
+       linkreg         int8
        generic         bool
 }
 
@@ -295,6 +296,7 @@ func genOp() {
                fmt.Fprintf(w, "var fpRegMask%s = regMask(%d)\n", a.name, a.fpregmask)
                fmt.Fprintf(w, "var specialRegMask%s = regMask(%d)\n", a.name, a.specialregmask)
                fmt.Fprintf(w, "var framepointerReg%s = int8(%d)\n", a.name, a.framepointerreg)
+               fmt.Fprintf(w, "var linkReg%s = int8(%d)\n", a.name, a.linkreg)
        }
 
        // gofmt result

diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go
index 1a0e989c3d8e2e456e7608194e69d4e9bf4046cc..debe4373a0f24d4018554af920a9ce566e6de175 100644 (file)
--- a/src/cmd/compile/internal/ssa/opGen.go
+++ b/src/cmd/compile/internal/ssa/opGen.go
@@ -15572,7 +15572,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AFMOVS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -15587,7 +15587,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AFMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -15625,8 +15625,8 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.AFMOVS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -15640,8 +15640,8 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.AFMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -15656,7 +15656,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AFMOVS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                                {1, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                },
@@ -15669,7 +15669,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AFMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                                {1, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                },
@@ -15681,8 +15681,8 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.AFMOVS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37886},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                                {2, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                },
@@ -15694,8 +15694,8 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.AFMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37886},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                                {2, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                },
@@ -15708,11 +15708,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AADD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 5119},  // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15724,11 +15724,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AADDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 5119},  // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15740,10 +15740,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AADD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15755,10 +15755,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AADDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15769,11 +15769,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASUB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15784,11 +15784,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASUBW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15801,10 +15801,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASUB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15817,10 +15817,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASUBW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15833,11 +15833,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMULLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15850,11 +15850,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMULLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15867,10 +15867,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMULLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15883,10 +15883,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMULLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15898,11 +15898,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMULHD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15914,11 +15914,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMULHDU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15930,11 +15930,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ADIVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15946,11 +15946,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ADIVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15962,11 +15962,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ADIVDU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15978,11 +15978,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ADIVWU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -15994,11 +15994,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMODD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16010,11 +16010,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMODW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16026,11 +16026,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMODDU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16042,11 +16042,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMODWU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16058,11 +16058,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AAND,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16074,11 +16074,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AANDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16091,10 +16091,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AAND,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16107,10 +16107,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AANDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16122,11 +16122,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AOR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16138,11 +16138,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AORW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16155,10 +16155,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AOR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16171,10 +16171,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AORW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16186,11 +16186,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AXOR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16202,11 +16202,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AXORW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16219,10 +16219,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AXOR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16235,10 +16235,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AXORW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16248,8 +16248,8 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACMP,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -16259,8 +16259,8 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -16270,8 +16270,8 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACMPU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -16281,8 +16281,8 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACMPWU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -16293,7 +16293,7 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ACMP,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -16304,7 +16304,7 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ACMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -16315,7 +16315,7 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ACMPU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -16326,7 +16326,7 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ACMPWU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -16358,11 +16358,11 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ASLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 5118}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {1, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16372,11 +16372,11 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ASLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 5118}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {1, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16387,10 +16387,10 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ASLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16401,10 +16401,10 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ASLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16414,11 +16414,11 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ASRD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 5118}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {1, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16428,11 +16428,11 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ASRW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 5118}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {1, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16443,10 +16443,10 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ASRD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16457,10 +16457,10 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ASRW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16471,11 +16471,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASRAD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 5118}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {1, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16486,11 +16486,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASRAW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 5118}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {1, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16502,10 +16502,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASRAD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16517,10 +16517,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASRAW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16531,10 +16531,10 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ARLLG,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16545,10 +16545,10 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ARLL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16559,10 +16559,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ANEG,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16573,10 +16573,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ANEGW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16587,10 +16587,10 @@ var opcodeTable = [...]opInfo{
                clobberFlags: true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16601,10 +16601,10 @@ var opcodeTable = [...]opInfo{
                clobberFlags: true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16627,7 +16627,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ASUBE,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16637,7 +16637,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ASUBE,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16648,11 +16648,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDEQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16663,11 +16663,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16678,11 +16678,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDLT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16693,11 +16693,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDLE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16708,11 +16708,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDGT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16723,11 +16723,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDGE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16738,11 +16738,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDGT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16753,11 +16753,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDGE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
-                               {1, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16767,10 +16767,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16780,10 +16780,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVBZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16793,10 +16793,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVH,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16806,10 +16806,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVHZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16819,10 +16819,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16832,10 +16832,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVWZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16847,7 +16847,7 @@ var opcodeTable = [...]opInfo{
                asm:               s390x.AMOVD,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16860,7 +16860,7 @@ var opcodeTable = [...]opInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16873,7 +16873,7 @@ var opcodeTable = [...]opInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16886,7 +16886,7 @@ var opcodeTable = [...]opInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16899,7 +16899,7 @@ var opcodeTable = [...]opInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -16909,7 +16909,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACEFBRA,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -16922,7 +16922,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACDFBRA,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -16935,7 +16935,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACEGBRA,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -16948,7 +16948,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACDGBRA,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -16992,7 +16992,7 @@ var opcodeTable = [...]opInfo{
                                {0, 4295000064}, // SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17004,10 +17004,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 4295000064}, // SP SB
-                               {1, 37886},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17020,10 +17020,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVBZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17036,10 +17036,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17052,10 +17052,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVHZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17068,10 +17068,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVH,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17084,10 +17084,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVWZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17100,10 +17100,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17116,10 +17116,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17129,10 +17129,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVWBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17142,10 +17142,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVDBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17158,10 +17158,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVHBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17174,10 +17174,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVWBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17190,10 +17190,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVDBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17206,8 +17206,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
-                               {1, 37887},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 54271},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17220,8 +17220,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVH,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
-                               {1, 37887},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 54271},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17234,8 +17234,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
-                               {1, 37887},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 54271},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17248,8 +17248,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
-                               {1, 37887},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 54271},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17262,8 +17262,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVHBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17276,8 +17276,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVWBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17290,8 +17290,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVDBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17305,8 +17305,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMVC,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17318,11 +17318,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVBZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 37886},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17334,11 +17334,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVHZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 37886},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17350,11 +17350,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVWZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 37886},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17366,11 +17366,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 37886},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17382,11 +17382,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVHBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 37886},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17398,11 +17398,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVWBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 37886},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17414,11 +17414,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 37886},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17430,9 +17430,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {2, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17444,9 +17444,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVH,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {2, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17458,9 +17458,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {2, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17472,9 +17472,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {2, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17486,9 +17486,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVHBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {2, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17500,9 +17500,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVWBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {2, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17514,9 +17514,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {1, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
-                               {2, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17529,7 +17529,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                },
        },
@@ -17542,7 +17542,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVH,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                },
        },
@@ -17555,7 +17555,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                },
        },
@@ -17568,7 +17568,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295005182}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP SB
+                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
                        },
                },
        },
@@ -17581,7 +17581,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.ACLEAR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5118}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17592,7 +17592,7 @@ var opcodeTable = [...]opInfo{
                clobberFlags: true,
                call:         true,
                reg: regInfo{
-                       clobbers: 4294906879, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+                       clobbers: 4294923263, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                },
        },
        {
@@ -17604,9 +17604,9 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 4096},  // R12
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
-                       clobbers: 4294906879, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+                       clobbers: 4294923263, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                },
        },
        {
@@ -17616,7 +17616,7 @@ var opcodeTable = [...]opInfo{
                clobberFlags: true,
                call:         true,
                reg: regInfo{
-                       clobbers: 4294906879, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+                       clobbers: 4294923263, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                },
        },
        {
@@ -17626,7 +17626,7 @@ var opcodeTable = [...]opInfo{
                clobberFlags: true,
                call:         true,
                reg: regInfo{
-                       clobbers: 4294906879, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+                       clobbers: 4294923263, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                },
        },
        {
@@ -17637,9 +17637,9 @@ var opcodeTable = [...]opInfo{
                call:         true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5118}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
-                       clobbers: 4294906879, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+                       clobbers: 4294923263, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                },
        },
        {
@@ -17652,7 +17652,7 @@ var opcodeTable = [...]opInfo{
                argLen: 1,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17673,7 +17673,7 @@ var opcodeTable = [...]opInfo{
                faultOnNilArg0: true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17683,10 +17683,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                },
        },
@@ -17712,7 +17712,7 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AFLOGR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 5119}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12
+                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
                        clobbers: 2, // R1
                        outputs: []outputInfo{
@@ -17730,7 +17730,7 @@ var opcodeTable = [...]opInfo{
                        inputs: []inputInfo{
                                {1, 2},     // R1
                                {2, 4},     // R2
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17745,7 +17745,7 @@ var opcodeTable = [...]opInfo{
                                {1, 2},     // R1
                                {2, 4},     // R2
                                {3, 8},     // R3
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17761,7 +17761,7 @@ var opcodeTable = [...]opInfo{
                                {2, 4},     // R2
                                {3, 8},     // R3
                                {4, 16},    // R4
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17775,7 +17775,7 @@ var opcodeTable = [...]opInfo{
                        inputs: []inputInfo{
                                {1, 2},     // R1
                                {2, 4},     // R2
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17790,7 +17790,7 @@ var opcodeTable = [...]opInfo{
                                {1, 2},     // R1
                                {2, 4},     // R2
                                {3, 8},     // R3
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17806,7 +17806,7 @@ var opcodeTable = [...]opInfo{
                                {2, 4},     // R2
                                {3, 8},     // R3
                                {4, 16},    // R4
-                               {0, 37886}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                },
        },
@@ -17819,7 +17819,7 @@ var opcodeTable = [...]opInfo{
                        inputs: []inputInfo{
                                {0, 2},     // R1
                                {1, 4},     // R2
-                               {2, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        clobbers: 6, // R1 R2
                },
@@ -17832,7 +17832,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 2},     // R1
-                               {1, 37887}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 SP
+                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
                        },
                        clobbers: 2, // R1
                },
@@ -19524,6 +19524,7 @@ var gpRegMask386 = regMask(239)
 var fpRegMask386 = regMask(65280)
 var specialRegMask386 = regMask(0)
 var framepointerReg386 = int8(5)
+var linkReg386 = int8(-1)
 var registersAMD64 = [...]Register{
        {0, x86.REG_AX, "AX"},
        {1, x86.REG_CX, "CX"},
@@ -19563,6 +19564,7 @@ var gpRegMaskAMD64 = regMask(65519)
 var fpRegMaskAMD64 = regMask(4294901760)
 var specialRegMaskAMD64 = regMask(0)
 var framepointerRegAMD64 = int8(5)
+var linkRegAMD64 = int8(-1)
 var registersARM = [...]Register{
        {0, arm.REG_R0, "R0"},
        {1, arm.REG_R1, "R1"},
@@ -19602,6 +19604,7 @@ var gpRegMaskARM = regMask(5119)
 var fpRegMaskARM = regMask(4294901760)
 var specialRegMaskARM = regMask(0)
 var framepointerRegARM = int8(-1)
+var linkRegARM = int8(-1)
 var registersARM64 = [...]Register{
        {0, arm64.REG_R0, "R0"},
        {1, arm64.REG_R1, "R1"},
@@ -19671,6 +19674,7 @@ var gpRegMaskARM64 = regMask(133955583)
 var fpRegMaskARM64 = regMask(4611686017353646080)
 var specialRegMaskARM64 = regMask(0)
 var framepointerRegARM64 = int8(-1)
+var linkRegARM64 = int8(-1)
 var registersMIPS64 = [...]Register{
        {0, mips.REG_R0, "R0"},
        {1, mips.REG_R1, "R1"},
@@ -19739,6 +19743,7 @@ var gpRegMaskMIPS64 = regMask(33554430)
 var fpRegMaskMIPS64 = regMask(576460752169205760)
 var specialRegMaskMIPS64 = regMask(1729382256910270464)
 var framepointerRegMIPS64 = int8(-1)
+var linkRegMIPS64 = int8(-1)
 var registersPPC64 = [...]Register{
        {0, ppc64.REG_R0, "R0"},
        {1, ppc64.REGSP, "SP"},
@@ -19809,6 +19814,7 @@ var gpRegMaskPPC64 = regMask(1073733624)
 var fpRegMaskPPC64 = regMask(576460743713488896)
 var specialRegMaskPPC64 = regMask(0)
 var framepointerRegPPC64 = int8(1)
+var linkRegPPC64 = int8(-1)
 var registersS390X = [...]Register{
        {0, s390x.REG_R0, "R0"},
        {1, s390x.REG_R1, "R1"},
@@ -19844,7 +19850,8 @@ var registersS390X = [...]Register{
        {31, s390x.REG_F15, "F15"},
        {32, 0, "SB"},
 }
-var gpRegMaskS390X = regMask(5119)
+var gpRegMaskS390X = regMask(21503)
 var fpRegMaskS390X = regMask(4294901760)
 var specialRegMaskS390X = regMask(0)
 var framepointerRegS390X = int8(-1)
+var linkRegS390X = int8(14)

diff --git a/src/cmd/compile/internal/ssa/regalloc.go b/src/cmd/compile/internal/ssa/regalloc.go
index 8309af2997528ffc80b34ff1ddf2e1a81b9e5c19..4180868932654d040fcece26cb20d41e67ac8ff9 100644 (file)
--- a/src/cmd/compile/internal/ssa/regalloc.go
+++ b/src/cmd/compile/internal/ssa/regalloc.go
@@ -460,6 +460,18 @@ func (s *regAllocState) allocValToReg(v *Value, mask regMask, nospill bool, line
        return c
 }
 
+// isLeaf reports whether f performs any calls.
+func isLeaf(f *Func) bool {
+       for _, b := range f.Blocks {
+               for _, v := range b.Values {
+                       if opcodeTable[v.Op].call {
+                               return false
+                       }
+               }
+       }
+       return true
+}
+
 func (s *regAllocState) init(f *Func) {
        s.f = f
        s.registers = f.Config.registers
@@ -510,6 +522,12 @@ func (s *regAllocState) init(f *Func) {
                        s.allocatable &^= 1 << 12 // R12
                }
        }
+       if s.f.Config.LinkReg != -1 {
+               if isLeaf(f) {
+                       // Leaf functions don't save/restore the link register.
+                       s.allocatable &^= 1 << uint(s.f.Config.LinkReg)
+               }
+       }
        if s.f.Config.ctxt.Flag_dynlink {
                switch s.f.Config.arch {
                case "amd64":