cmd/internal/obj/mips: add SEB/SEH instructions

Add support for SEB/SEH instructions, which are introduced in mips32r2.

SEB/SEH can be used to sign-extend byte/halfword in registers directly without passing through memory.

Ref: The MIPS32 Instruction Set, Revision 5.04: https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00086-2B-MIPS32BIS-AFP-05.04.pdf

Updates #60072

Change-Id: I33175ae9d943ead5983ac004bd2a158039046d65
Reviewed-on: https://go-review.googlesource.com/c/go/+/515475
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Run-TryBot: Joel Sing <joel@sing.id.au>

diff --git a/src/cmd/asm/internal/asm/testdata/mips.s b/src/cmd/asm/internal/asm/testdata/mips.s
index 1ded0b072d4c2d61a9a817827b97e88327ea5e8d..f65eba07ba338fdc192bdeb198f7993d1b50d6da 100644 (file)
--- a/src/cmd/asm/internal/asm/testdata/mips.s
+++ b/src/cmd/asm/internal/asm/testdata/mips.s
@@ -428,8 +428,12 @@ label4:
        NEGW    R1, R2 // 00011023
        CLZ     R1, R2 // 70221020
        CLO     R1, R2 // 70221021
+
        WSBH    R1, R2 // 7c0110a0
 
+       SEB     R1, R2 // 7c011420
+       SEH     R1, R2 // 7c011620
+
        // to (Hi, Lo)
        MADD    R2, R1 // 70220000
        MSUB    R2, R1 // 70220004

diff --git a/src/cmd/asm/internal/asm/testdata/mips64.s b/src/cmd/asm/internal/asm/testdata/mips64.s
index 573e3d31a6b3f2f4cdff321b5204e7e0cbcd0fab..ea4bb80aecbce5741372c24f6b92394d57535fa3 100644 (file)
--- a/src/cmd/asm/internal/asm/testdata/mips64.s
+++ b/src/cmd/asm/internal/asm/testdata/mips64.s
@@ -590,10 +590,14 @@ label4:
        // unary operation
        NEGW    R1, R2 // 00011023
        NEGV    R1, R2 // 0001102f
+
        WSBH    R1, R2 // 7c0110a0
        DSBH    R1, R2 // 7c0110a4
        DSHD    R1, R2 // 7c011164
 
+       SEB     R1, R2 // 7c011420
+       SEH     R1, R2 // 7c011620
+
        RET
 
 // MSA VMOVI

diff --git a/src/cmd/internal/obj/mips/a.out.go b/src/cmd/internal/obj/mips/a.out.go
index c7884a3a3ef20ebc5a9f8ebc9749736a986f2371..cd6131332ac834723f40257f36a7c8dbfba2d7c8 100644 (file)
--- a/src/cmd/internal/obj/mips/a.out.go
+++ b/src/cmd/internal/obj/mips/a.out.go
@@ -394,6 +394,8 @@ const (
        AROTRV
        ASC
        ASCV
+       ASEB
+       ASEH
        ASGT
        ASGTU
        ASLL

diff --git a/src/cmd/internal/obj/mips/anames.go b/src/cmd/internal/obj/mips/anames.go
index 90972cff71c61f4d9a6802e640390ae71baeff03..d86e37ff83e1b59ca25967b2374f12b001a8504f 100644 (file)
--- a/src/cmd/internal/obj/mips/anames.go
+++ b/src/cmd/internal/obj/mips/anames.go
@@ -82,6 +82,8 @@ var Anames = []string{
        "ROTRV",
        "SC",
        "SCV",
+       "SEB",
+       "SEH",
        "SGT",
        "SGTU",
        "SLL",

diff --git a/src/cmd/internal/obj/mips/asm0.go b/src/cmd/internal/obj/mips/asm0.go
index 3a4dc5d185e9f541e81c2fb7bd933df598a2aa63..f158b6688dc9c57f22888080b45ea515a8057354 100644 (file)
--- a/src/cmd/internal/obj/mips/asm0.go
+++ b/src/cmd/internal/obj/mips/asm0.go
@@ -1084,7 +1084,6 @@ func buildop(ctxt *obj.Link) {
                        ANEGW,
                        ANEGV,
                        AWORD,
-                       AWSBH,
                        obj.ANOP,
                        obj.ATEXT,
                        obj.AUNDEF,
@@ -1106,6 +1105,10 @@ func buildop(ctxt *obj.Link) {
                case ATEQ:
                        opset(ATNE, r0)
 
+               case AWSBH:
+                       opset(ASEB, r0)
+                       opset(ASEH, r0)
+
                case ADSBH:
                        opset(ADSHD, r0)
                }
@@ -1899,6 +1902,10 @@ func (c *ctxt0) oprrr(a obj.As) uint32 {
                return SP(3, 7) | OP(20, 4)
        case ADSHD:
                return SP(3, 7) | OP(44, 4)
+       case ASEB:
+               return SP(3, 7) | OP(132, 0)
+       case ASEH:
+               return SP(3, 7) | OP(196, 0)
        }
 
        if a < 0 {