cmd/internal/obj/arm64: add SWPALD/SWPALW/SWPALH/SWPALB

Those new instructions have acquire/release semantics, besides
normal atomic SWPD/SWPW/SWPH/SWPB.

Change-Id: I24821a4d21aebc342897ae52903aef612c8d8a4a
Reviewed-on: https://go-review.googlesource.com/128476
Run-TryBot: Ben Shi <powerman1st@163.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>

diff --git a/src/cmd/asm/internal/arch/arm64.go b/src/cmd/asm/internal/arch/arm64.go
index 475d7da5f9363c01c55c6dac8fab8f4e0f4b9d19..7cbc139bced4231434099bf7be816ef8cb63668b 100644 (file)
--- a/src/cmd/asm/internal/arch/arm64.go
+++ b/src/cmd/asm/internal/arch/arm64.go
@@ -74,6 +74,7 @@ func IsARM64STLXR(op obj.As) bool {
                arm64.ASTXRB, arm64.ASTXRH, arm64.ASTXRW, arm64.ASTXR,
                arm64.ASTXP, arm64.ASTXPW, arm64.ASTLXP, arm64.ASTLXPW,
                arm64.ASWPB, arm64.ASWPH, arm64.ASWPW, arm64.ASWPD,
+               arm64.ASWPALB, arm64.ASWPALH, arm64.ASWPALW, arm64.ASWPALD,
                arm64.ALDADDB, arm64.ALDADDH, arm64.ALDADDW, arm64.ALDADDD,
                arm64.ALDANDB, arm64.ALDANDH, arm64.ALDANDW, arm64.ALDANDD,
                arm64.ALDEORB, arm64.ALDEORH, arm64.ALDEORW, arm64.ALDEORD,

diff --git a/src/cmd/asm/internal/asm/testdata/arm64.s b/src/cmd/asm/internal/asm/testdata/arm64.s
index 3a4410f10b4ad421c94335beaea44dc05049f372..3a1b2f79beb81ee08dbd9477e705da859bab9e9e 100644 (file)
--- a/src/cmd/asm/internal/asm/testdata/arm64.s
+++ b/src/cmd/asm/internal/asm/testdata/arm64.s
@@ -572,6 +572,14 @@ again:
        SWPH    R5, (RSP), R7                        // e7832578
        SWPB    R5, (R6), R7                         // c7802538
        SWPB    R5, (RSP), R7                        // e7832538
+       SWPALD  R5, (R6), R7                         // c780e5f8
+       SWPALD  R5, (RSP), R7                        // e783e5f8
+       SWPALW  R5, (R6), R7                         // c780e5b8
+       SWPALW  R5, (RSP), R7                        // e783e5b8
+       SWPALH  R5, (R6), R7                         // c780e578
+       SWPALH  R5, (RSP), R7                        // e783e578
+       SWPALB  R5, (R6), R7                         // c780e538
+       SWPALB  R5, (RSP), R7                        // e783e538
        LDADDD  R5, (R6), R7                         // c70025f8
        LDADDD  R5, (RSP), R7                        // e70325f8
        LDADDW  R5, (R6), R7                         // c70025b8

diff --git a/src/cmd/internal/obj/arm64/a.out.go b/src/cmd/internal/obj/arm64/a.out.go
index 9be0183edf88019b1145f50845379c8002bff53e..2575940f19767a87ea0c8ebcc75d49d548719775 100644 (file)
--- a/src/cmd/internal/obj/arm64/a.out.go
+++ b/src/cmd/internal/obj/arm64/a.out.go
@@ -774,9 +774,13 @@ const (
        AMOVPSW
        AMOVPW
        ASWPD
+       ASWPALD
        ASWPW
+       ASWPALW
        ASWPH
+       ASWPALH
        ASWPB
+       ASWPALB
        ABEQ
        ABNE
        ABCS

diff --git a/src/cmd/internal/obj/arm64/anames.go b/src/cmd/internal/obj/arm64/anames.go
index 84fb40b10260c8c363ff1729670916fd7c5786ca..f4b3c288975cb864da69301b3c10b6697e57af67 100644 (file)
--- a/src/cmd/internal/obj/arm64/anames.go
+++ b/src/cmd/internal/obj/arm64/anames.go
@@ -275,9 +275,13 @@ var Anames = []string{
        "MOVPSW",
        "MOVPW",
        "SWPD",
+       "SWPALD",
        "SWPW",
+       "SWPALW",
        "SWPH",
+       "SWPALH",
        "SWPB",
+       "SWPALB",
        "BEQ",
        "BNE",
        "BCS",

diff --git a/src/cmd/internal/obj/arm64/asm7.go b/src/cmd/internal/obj/arm64/asm7.go
index e3bcce826594c5a8356c508ee0b89c138659b0f5..f7a3babd198d693de545f9cd6c7277408ca23e1e 100644 (file)
--- a/src/cmd/internal/obj/arm64/asm7.go
+++ b/src/cmd/internal/obj/arm64/asm7.go
@@ -2008,9 +2008,13 @@ func buildop(ctxt *obj.Link) {
                        oprangeset(AMOVZW, t)
 
                case ASWPD:
+                       oprangeset(ASWPALD, t)
                        oprangeset(ASWPB, t)
                        oprangeset(ASWPH, t)
                        oprangeset(ASWPW, t)
+                       oprangeset(ASWPALB, t)
+                       oprangeset(ASWPALH, t)
+                       oprangeset(ASWPALW, t)
                        oprangeset(ALDADDALD, t)
                        oprangeset(ALDADDALW, t)
                        oprangeset(ALDADDB, t)
@@ -3383,19 +3387,19 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
                rt := p.RegTo2
                rb := p.To.Reg
                switch p.As {
-               case ASWPD, ALDADDALD, ALDADDD, ALDANDD, ALDEORD, ALDORD: // 64-bit
+               case ASWPD, ASWPALD, ALDADDALD, ALDADDD, ALDANDD, ALDEORD, ALDORD: // 64-bit
                        o1 = 3 << 30
-               case ASWPW, ALDADDALW, ALDADDW, ALDANDW, ALDEORW, ALDORW: // 32-bit
+               case ASWPW, ASWPALW, ALDADDALW, ALDADDW, ALDANDW, ALDEORW, ALDORW: // 32-bit
                        o1 = 2 << 30
-               case ASWPH, ALDADDH, ALDANDH, ALDEORH, ALDORH: // 16-bit
+               case ASWPH, ASWPALH, ALDADDH, ALDANDH, ALDEORH, ALDORH: // 16-bit
                        o1 = 1 << 30
-               case ASWPB, ALDADDB, ALDANDB, ALDEORB, ALDORB: // 8-bit
+               case ASWPB, ASWPALB, ALDADDB, ALDANDB, ALDEORB, ALDORB: // 8-bit
                        o1 = 0 << 30
                default:
                        c.ctxt.Diag("illegal instruction: %v\n", p)
                }
                switch p.As {
-               case ASWPD, ASWPW, ASWPH, ASWPB:
+               case ASWPD, ASWPW, ASWPH, ASWPB, ASWPALD, ASWPALW, ASWPALH, ASWPALB:
                        o1 |= 0x20 << 10
                case ALDADDALD, ALDADDALW, ALDADDD, ALDADDW, ALDADDH, ALDADDB:
                        o1 |= 0x00 << 10
@@ -3407,7 +3411,7 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
                        o1 |= 0x0c << 10
                }
                switch p.As {
-               case ALDADDALD, ALDADDALW:
+               case ALDADDALD, ALDADDALW, ASWPALD, ASWPALW, ASWPALH, ASWPALB:
                        o1 |= 3 << 22
                }
                o1 |= 0x1c1<<21 | uint32(rs&31)<<16 | uint32(rb&31)<<5 | uint32(rt&31)