ssa.OpARMSUBD,
ssa.OpARMMULF,
ssa.OpARMMULD,
+ ssa.OpARMNMULF,
+ ssa.OpARMNMULD,
ssa.OpARMDIVF,
ssa.OpARMDIVD:
r := v.Reg()
(SRAconst [c] (MOVWconst [d])) -> (MOVWconst [int64(int32(d)>>uint64(c))])
(MUL (MOVWconst [c]) (MOVWconst [d])) -> (MOVWconst [int64(int32(c*d))])
(MULA (MOVWconst [c]) (MOVWconst [d]) a) -> (ADDconst [int64(int32(c*d))] a)
+(MULS (MOVWconst [c]) (MOVWconst [d]) a) -> (SUBconst [int64(int32(c*d))] a)
(Select0 (CALLudiv (MOVWconst [c]) (MOVWconst [d]))) -> (MOVWconst [int64(uint32(c)/uint32(d))])
(Select1 (CALLudiv (MOVWconst [c]) (MOVWconst [d]))) -> (MOVWconst [int64(uint32(c)%uint32(d))])
(ANDconst [c] (MOVWconst [d])) -> (MOVWconst [c&d])
(SUB a (MUL x y)) && objabi.GOARM == 7 -> (MULS x y a)
(RSB (MUL x y) a) && objabi.GOARM == 7 -> (MULS x y a)
+(NEGF (MULF x y)) && objabi.GOARM >= 6 -> (NMULF x y)
+(NEGD (MULD x y)) && objabi.GOARM >= 6 -> (NMULD x y)
+(MULF (NEGF x) y) && objabi.GOARM >= 6 -> (NMULF x y)
+(MULD (NEGD x) y) && objabi.GOARM >= 6 -> (NMULD x y)
+(NMULF (NEGF x) y) -> (MULF x y)
+(NMULD (NEGD x) y) -> (MULD x y)
+
(AND x (MVN y)) -> (BIC x y)
// simplification with *shift ops
{name: "MULA", argLength: 3, reg: gp31, asm: "MULA"}, // arg0 * arg1 + arg2
{name: "MULS", argLength: 3, reg: gp31, asm: "MULS"}, // arg2 - arg0 * arg1
- {name: "ADDF", argLength: 2, reg: fp21, asm: "ADDF", commutative: true}, // arg0 + arg1
- {name: "ADDD", argLength: 2, reg: fp21, asm: "ADDD", commutative: true}, // arg0 + arg1
- {name: "SUBF", argLength: 2, reg: fp21, asm: "SUBF"}, // arg0 - arg1
- {name: "SUBD", argLength: 2, reg: fp21, asm: "SUBD"}, // arg0 - arg1
- {name: "MULF", argLength: 2, reg: fp21, asm: "MULF", commutative: true}, // arg0 * arg1
- {name: "MULD", argLength: 2, reg: fp21, asm: "MULD", commutative: true}, // arg0 * arg1
- {name: "DIVF", argLength: 2, reg: fp21, asm: "DIVF"}, // arg0 / arg1
- {name: "DIVD", argLength: 2, reg: fp21, asm: "DIVD"}, // arg0 / arg1
+ {name: "ADDF", argLength: 2, reg: fp21, asm: "ADDF", commutative: true}, // arg0 + arg1
+ {name: "ADDD", argLength: 2, reg: fp21, asm: "ADDD", commutative: true}, // arg0 + arg1
+ {name: "SUBF", argLength: 2, reg: fp21, asm: "SUBF"}, // arg0 - arg1
+ {name: "SUBD", argLength: 2, reg: fp21, asm: "SUBD"}, // arg0 - arg1
+ {name: "MULF", argLength: 2, reg: fp21, asm: "MULF", commutative: true}, // arg0 * arg1
+ {name: "MULD", argLength: 2, reg: fp21, asm: "MULD", commutative: true}, // arg0 * arg1
+ {name: "NMULF", argLength: 2, reg: fp21, asm: "NMULF", commutative: true}, // -(arg0 * arg1)
+ {name: "NMULD", argLength: 2, reg: fp21, asm: "NMULD", commutative: true}, // -(arg0 * arg1)
+ {name: "DIVF", argLength: 2, reg: fp21, asm: "DIVF"}, // arg0 / arg1
+ {name: "DIVD", argLength: 2, reg: fp21, asm: "DIVD"}, // arg0 / arg1
{name: "AND", argLength: 2, reg: gp21, asm: "AND", commutative: true}, // arg0 & arg1
{name: "ANDconst", argLength: 1, reg: gp11, asm: "AND", aux: "Int32"}, // arg0 & auxInt
OpARMSUBD
OpARMMULF
OpARMMULD
+ OpARMNMULF
+ OpARMNMULD
OpARMDIVF
OpARMDIVD
OpARMAND
},
},
},
+ {
+ name: "NMULF",
+ argLen: 2,
+ commutative: true,
+ asm: arm.ANMULF,
+ reg: regInfo{
+ inputs: []inputInfo{
+ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+ {1, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+ },
+ outputs: []outputInfo{
+ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+ },
+ },
+ },
+ {
+ name: "NMULD",
+ argLen: 2,
+ commutative: true,
+ asm: arm.ANMULD,
+ reg: regInfo{
+ inputs: []inputInfo{
+ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+ {1, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+ },
+ outputs: []outputInfo{
+ {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+ },
+ },
+ },
{
name: "DIVF",
argLen: 2,
return rewriteValueARM_OpARMMUL_0(v) || rewriteValueARM_OpARMMUL_10(v) || rewriteValueARM_OpARMMUL_20(v)
case OpARMMULA:
return rewriteValueARM_OpARMMULA_0(v) || rewriteValueARM_OpARMMULA_10(v) || rewriteValueARM_OpARMMULA_20(v)
+ case OpARMMULD:
+ return rewriteValueARM_OpARMMULD_0(v)
+ case OpARMMULF:
+ return rewriteValueARM_OpARMMULF_0(v)
case OpARMMULS:
- return rewriteValueARM_OpARMMULS_0(v) || rewriteValueARM_OpARMMULS_10(v)
+ return rewriteValueARM_OpARMMULS_0(v) || rewriteValueARM_OpARMMULS_10(v) || rewriteValueARM_OpARMMULS_20(v)
case OpARMMVN:
return rewriteValueARM_OpARMMVN_0(v)
case OpARMMVNshiftLL:
return rewriteValueARM_OpARMMVNshiftRL_0(v)
case OpARMMVNshiftRLreg:
return rewriteValueARM_OpARMMVNshiftRLreg_0(v)
+ case OpARMNEGD:
+ return rewriteValueARM_OpARMNEGD_0(v)
+ case OpARMNEGF:
+ return rewriteValueARM_OpARMNEGF_0(v)
+ case OpARMNMULD:
+ return rewriteValueARM_OpARMNMULD_0(v)
+ case OpARMNMULF:
+ return rewriteValueARM_OpARMNMULF_0(v)
case OpARMNotEqual:
return rewriteValueARM_OpARMNotEqual_0(v)
case OpARMOR:
}
return false
}
+func rewriteValueARM_OpARMMULD_0(v *Value) bool {
+ // match: (MULD (NEGD x) y)
+ // cond: objabi.GOARM >= 6
+ // result: (NMULD x y)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARMNEGD {
+ break
+ }
+ x := v_0.Args[0]
+ y := v.Args[1]
+ if !(objabi.GOARM >= 6) {
+ break
+ }
+ v.reset(OpARMNMULD)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ // match: (MULD y (NEGD x))
+ // cond: objabi.GOARM >= 6
+ // result: (NMULD x y)
+ for {
+ _ = v.Args[1]
+ y := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARMNEGD {
+ break
+ }
+ x := v_1.Args[0]
+ if !(objabi.GOARM >= 6) {
+ break
+ }
+ v.reset(OpARMNMULD)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ return false
+}
+func rewriteValueARM_OpARMMULF_0(v *Value) bool {
+ // match: (MULF (NEGF x) y)
+ // cond: objabi.GOARM >= 6
+ // result: (NMULF x y)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARMNEGF {
+ break
+ }
+ x := v_0.Args[0]
+ y := v.Args[1]
+ if !(objabi.GOARM >= 6) {
+ break
+ }
+ v.reset(OpARMNMULF)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ // match: (MULF y (NEGF x))
+ // cond: objabi.GOARM >= 6
+ // result: (NMULF x y)
+ for {
+ _ = v.Args[1]
+ y := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARMNEGF {
+ break
+ }
+ x := v_1.Args[0]
+ if !(objabi.GOARM >= 6) {
+ break
+ }
+ v.reset(OpARMNMULF)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ return false
+}
func rewriteValueARM_OpARMMULS_0(v *Value) bool {
b := v.Block
_ = b
}
return false
}
+func rewriteValueARM_OpARMMULS_20(v *Value) bool {
+ // match: (MULS (MOVWconst [c]) (MOVWconst [d]) a)
+ // cond:
+ // result: (SUBconst [int64(int32(c*d))] a)
+ for {
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARMMOVWconst {
+ break
+ }
+ c := v_0.AuxInt
+ v_1 := v.Args[1]
+ if v_1.Op != OpARMMOVWconst {
+ break
+ }
+ d := v_1.AuxInt
+ a := v.Args[2]
+ v.reset(OpARMSUBconst)
+ v.AuxInt = int64(int32(c * d))
+ v.AddArg(a)
+ return true
+ }
+ return false
+}
func rewriteValueARM_OpARMMVN_0(v *Value) bool {
// match: (MVN (MOVWconst [c]))
// cond:
}
return false
}
+func rewriteValueARM_OpARMNEGD_0(v *Value) bool {
+ // match: (NEGD (MULD x y))
+ // cond: objabi.GOARM >= 6
+ // result: (NMULD x y)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARMMULD {
+ break
+ }
+ _ = v_0.Args[1]
+ x := v_0.Args[0]
+ y := v_0.Args[1]
+ if !(objabi.GOARM >= 6) {
+ break
+ }
+ v.reset(OpARMNMULD)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ return false
+}
+func rewriteValueARM_OpARMNEGF_0(v *Value) bool {
+ // match: (NEGF (MULF x y))
+ // cond: objabi.GOARM >= 6
+ // result: (NMULF x y)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARMMULF {
+ break
+ }
+ _ = v_0.Args[1]
+ x := v_0.Args[0]
+ y := v_0.Args[1]
+ if !(objabi.GOARM >= 6) {
+ break
+ }
+ v.reset(OpARMNMULF)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ return false
+}
+func rewriteValueARM_OpARMNMULD_0(v *Value) bool {
+ // match: (NMULD (NEGD x) y)
+ // cond:
+ // result: (MULD x y)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARMNEGD {
+ break
+ }
+ x := v_0.Args[0]
+ y := v.Args[1]
+ v.reset(OpARMMULD)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ // match: (NMULD y (NEGD x))
+ // cond:
+ // result: (MULD x y)
+ for {
+ _ = v.Args[1]
+ y := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARMNEGD {
+ break
+ }
+ x := v_1.Args[0]
+ v.reset(OpARMMULD)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ return false
+}
+func rewriteValueARM_OpARMNMULF_0(v *Value) bool {
+ // match: (NMULF (NEGF x) y)
+ // cond:
+ // result: (MULF x y)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARMNEGF {
+ break
+ }
+ x := v_0.Args[0]
+ y := v.Args[1]
+ v.reset(OpARMMULF)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ // match: (NMULF y (NEGF x))
+ // cond:
+ // result: (MULF x y)
+ for {
+ _ = v.Args[1]
+ y := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARMNEGF {
+ break
+ }
+ x := v_1.Args[0]
+ v.reset(OpARMMULF)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ return false
+}
func rewriteValueARM_OpARMNotEqual_0(v *Value) bool {
// match: (NotEqual (FlagEQ))
// cond: