}
if cnt <= int64(128*types.PtrSize) {
- p = pp.Append(p, riscv.AADDI, obj.TYPE_CONST, 0, off, obj.TYPE_REG, riscv.REG_A0, 0)
+ p = pp.Append(p, riscv.AADDI, obj.TYPE_CONST, 0, off, obj.TYPE_REG, riscv.REG_X25, 0)
p.Reg = riscv.REG_SP
p = pp.Append(p, obj.ADUFFZERO, obj.TYPE_NONE, 0, 0, obj.TYPE_MEM, 0, 0)
p.To.Name = obj.NAME_EXTERN
{name: "CALLinter", argLength: 2, reg: callInter, aux: "CallOff", call: true}, // call fn by pointer. arg0=codeptr, arg1=mem, auxint=argsize, returns mem
// duffzero
- // arg0 = address of memory to zero (in X10, changed as side effect)
+ // arg0 = address of memory to zero (in X25, changed as side effect)
// arg1 = mem
// auxint = offset into duffzero code to start executing
// X1 (link register) changed because of function call
aux: "Int64",
argLength: 2,
reg: regInfo{
- inputs: []regMask{regNamed["X10"]},
- clobbers: regNamed["X1"] | regNamed["X10"],
+ inputs: []regMask{regNamed["X25"]},
+ clobbers: regNamed["X1"] | regNamed["X25"],
},
typ: "Mem",
faultOnNilArg0: true,
},
// duffcopy
- // arg0 = address of dst memory (in X11, changed as side effect)
- // arg1 = address of src memory (in X10, changed as side effect)
+ // arg0 = address of dst memory (in X25, changed as side effect)
+ // arg1 = address of src memory (in X24, changed as side effect)
// arg2 = mem
// auxint = offset into duffcopy code to start executing
// X1 (link register) changed because of function call
aux: "Int64",
argLength: 3,
reg: regInfo{
- inputs: []regMask{regNamed["X11"], regNamed["X10"]},
- clobbers: regNamed["X1"] | regNamed["X10"] | regNamed["X11"],
+ inputs: []regMask{regNamed["X25"], regNamed["X24"]},
+ clobbers: regNamed["X1"] | regNamed["X24"] | regNamed["X25"],
},
typ: "Mem",
faultOnNilArg0: true,
faultOnNilArg0: true,
reg: regInfo{
inputs: []inputInfo{
- {0, 512}, // X10
+ {0, 16777216}, // X25
},
- clobbers: 512, // X10
+ clobbers: 16777216, // X25
},
},
{
faultOnNilArg1: true,
reg: regInfo{
inputs: []inputInfo{
- {0, 1024}, // X11
- {1, 512}, // X10
+ {0, 16777216}, // X25
+ {1, 8388608}, // X24
},
- clobbers: 1536, // X10 X11
+ clobbers: 25165824, // X24 X25
},
},
{
#include "textflag.h"
TEXT runtime·duffzero(SB), NOSPLIT|NOFRAME, $0-0
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
- MOV ZERO, (X10)
- ADD $8, X10
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
+ MOV ZERO, (X25)
+ ADD $8, X25
RET
TEXT runtime·duffcopy(SB), NOSPLIT|NOFRAME, $0-0
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
-
- MOV (X10), X31
- ADD $8, X10
- MOV X31, (X11)
- ADD $8, X11
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
+
+ MOV (X24), X31
+ ADD $8, X24
+ MOV X31, (X25)
+ ADD $8, X25
RET
func zeroRISCV64(w io.Writer) {
// ZERO: always zero
- // X10: ptr to memory to be zeroed
- // X10 is updated as a side effect.
+ // X25: ptr to memory to be zeroed
+ // X25 is updated as a side effect.
fmt.Fprintln(w, "TEXT runtime·duffzero(SB), NOSPLIT|NOFRAME, $0-0")
for i := 0; i < 128; i++ {
- fmt.Fprintln(w, "\tMOV\tZERO, (X10)")
- fmt.Fprintln(w, "\tADD\t$8, X10")
+ fmt.Fprintln(w, "\tMOV\tZERO, (X25)")
+ fmt.Fprintln(w, "\tADD\t$8, X25")
}
fmt.Fprintln(w, "\tRET")
}
func copyRISCV64(w io.Writer) {
- // X10: ptr to source memory
- // X11: ptr to destination memory
- // X10 and X11 are updated as a side effect
+ // X24: ptr to source memory
+ // X25: ptr to destination memory
+ // X24 and X25 are updated as a side effect
fmt.Fprintln(w, "TEXT runtime·duffcopy(SB), NOSPLIT|NOFRAME, $0-0")
for i := 0; i < 128; i++ {
- fmt.Fprintln(w, "\tMOV\t(X10), X31")
- fmt.Fprintln(w, "\tADD\t$8, X10")
- fmt.Fprintln(w, "\tMOV\tX31, (X11)")
- fmt.Fprintln(w, "\tADD\t$8, X11")
+ fmt.Fprintln(w, "\tMOV\t(X24), X31")
+ fmt.Fprintln(w, "\tADD\t$8, X24")
+ fmt.Fprintln(w, "\tMOV\tX31, (X25)")
+ fmt.Fprintln(w, "\tADD\t$8, X25")
fmt.Fprintln(w)
}
fmt.Fprintln(w, "\tRET")