(Hmul32u x y) -> (SRAconst (UMULL <typ.UInt64> x y) [32])
(Mul64uhilo ...) -> (LoweredMuluhilo ...)
-(Div64 [a] x y) -> (DIV x y)
+(Div64 ...) -> (DIV ...)
(Div64u ...) -> (UDIV ...)
-(Div32 [a] x y) -> (DIVW x y)
+(Div32 ...) -> (DIVW ...)
(Div32u ...) -> (UDIVW ...)
(Div16 x y) -> (DIVW (SignExt16to32 x) (SignExt16to32 y))
(Div16u x y) -> (UDIVW (ZeroExt16to32 x) (ZeroExt16to32 y))
(Div32F ...) -> (FDIVS ...)
(Div64F ...) -> (FDIVD ...)
-(Mod64 [a] x y) -> (MOD x y)
+(Mod64 ...) -> (MOD ...)
(Mod64u ...) -> (UMOD ...)
-(Mod32 [a] x y) -> (MODW x y)
+(Mod32 ...) -> (MODW ...)
(Mod32u ...) -> (UMODW ...)
(Mod16 x y) -> (MODW (SignExt16to32 x) (SignExt16to32 y))
(Mod16u x y) -> (UMODW (ZeroExt16to32 x) (ZeroExt16to32 y))
(Mul(32|16|8) ...) -> (MULLW ...)
(Mul64uhilo ...) -> (LoweredMuluhilo ...)
-(Div64 [a] x y) -> (DIVD x y)
+(Div64 ...) -> (DIVD ...)
(Div64u ...) -> (DIVDU ...)
-(Div32 [a] x y) -> (DIVW x y)
+(Div32 ...) -> (DIVW ...)
(Div32u ...) -> (DIVWU ...)
(Div16 x y) -> (DIVW (SignExt16to32 x) (SignExt16to32 y))
(Div16u x y) -> (DIVWU (ZeroExt16to32 x) (ZeroExt16to32 y))
(Div32F ...) -> (FDIVS ...)
(Div64F ...) -> (FDIVD ...)
-(Div64 [a] x y) -> (DIV x y)
+(Div64 ...) -> (DIV ...)
(Div64u ...) -> (DIVU ...)
-(Div32 [a] x y) -> (DIVW x y)
+(Div32 ...) -> (DIVW ...)
(Div32u ...) -> (DIVUW ...)
(Div16 x y) -> (DIVW (SignExt16to32 x) (SignExt16to32 y))
(Div16u x y) -> (DIVUW (ZeroExt16to32 x) (ZeroExt16to32 y))
// (x + y) / 2 -> (x / 2) + (y / 2) + (x & y & 1)
(Avg64u <t> x y) -> (ADD (ADD <t> (SRLI <t> [1] x) (SRLI <t> [1] y)) (ANDI <t> [1] (AND <t> x y)))
-(Mod64 [a] x y) -> (REM x y)
+(Mod64 ...) -> (REM ...)
(Mod64u ...) -> (REMU ...)
-(Mod32 [a] x y) -> (REMW x y)
+(Mod32 ...) -> (REMW ...)
(Mod32u ...) -> (REMUW ...)
(Mod16 x y) -> (REMW (SignExt16to32 x) (SignExt16to32 y))
(Mod16u x y) -> (REMUW (ZeroExt16to32 x) (ZeroExt16to32 y))
(Div32F ...) -> (FDIVS ...)
(Div64F ...) -> (FDIV ...)
-(Div64 [a] x y) -> (DIVD x y)
+(Div64 ...) -> (DIVD ...)
(Div64u ...) -> (DIVDU ...)
// DIVW/DIVWU has a 64-bit dividend and a 32-bit divisor,
// so a sign/zero extension of the dividend is required.
(Hmul32 x y) -> (SRDconst [32] (MULLD (MOVWreg x) (MOVWreg y)))
(Hmul32u x y) -> (SRDconst [32] (MULLD (MOVWZreg x) (MOVWZreg y)))
-(Mod64 [a] x y) -> (MODD x y)
+(Mod64 ...) -> (MODD ...)
(Mod64u ...) -> (MODDU ...)
// MODW/MODWU has a 64-bit dividend and a 32-bit divisor,
// so a sign/zero extension of the dividend is required.
(Mul(64|32|16|8) ...) -> (I64Mul ...)
(Mul(64|32)F ...) -> (F(64|32)Mul ...)
-(Div64 [a] x y) -> (I64DivS x y)
+(Div64 ...) -> (I64DivS ...)
(Div64u ...) -> (I64DivU ...)
(Div32 x y) -> (I64DivS (SignExt32to64 x) (SignExt32to64 y))
(Div32u x y) -> (I64DivU (ZeroExt32to64 x) (ZeroExt32to64 y))
(Div8u x y) -> (I64DivU (ZeroExt8to64 x) (ZeroExt8to64 y))
(Div(64|32)F ...) -> (F(64|32)Div ...)
-(Mod64 [a] x y) -> (I64RemS x y)
+(Mod64 ...) -> (I64RemS ...)
(Mod64u ...) -> (I64RemU ...)
(Mod32 x y) -> (I64RemS (SignExt32to64 x) (SignExt32to64 y))
(Mod32u x y) -> (I64RemU (ZeroExt32to64 x) (ZeroExt32to64 y))
case OpDiv16, OpDiv32, OpDiv64, OpMod16, OpMod32, OpMod64:
// On amd64 and 386 fix-up code can be avoided if we know
// the divisor is not -1 or the dividend > MinIntNN.
+ // Don't modify AuxInt on other architectures,
+ // as that can interfere with CSE.
+ // TODO: add other architectures?
+ if b.Func.Config.arch != "386" && b.Func.Config.arch != "amd64" {
+ break
+ }
divr := v.Args[1]
divrLim, divrLimok := ft.limits[divr.ID]
divd := v.Args[0]
case OpDiv16u:
return rewriteValueARM64_OpDiv16u(v)
case OpDiv32:
- return rewriteValueARM64_OpDiv32(v)
+ v.Op = OpARM64DIVW
+ return true
case OpDiv32F:
v.Op = OpARM64FDIVS
return true
v.Op = OpARM64UDIVW
return true
case OpDiv64:
- return rewriteValueARM64_OpDiv64(v)
+ v.Op = OpARM64DIV
+ return true
case OpDiv64F:
v.Op = OpARM64FDIVD
return true
case OpMod16u:
return rewriteValueARM64_OpMod16u(v)
case OpMod32:
- return rewriteValueARM64_OpMod32(v)
+ v.Op = OpARM64MODW
+ return true
case OpMod32u:
v.Op = OpARM64UMODW
return true
case OpMod64:
- return rewriteValueARM64_OpMod64(v)
+ v.Op = OpARM64MOD
+ return true
case OpMod64u:
v.Op = OpARM64UMOD
return true
return true
}
}
-func rewriteValueARM64_OpDiv32(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Div32 [a] x y)
- // result: (DIVW x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpARM64DIVW)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
-func rewriteValueARM64_OpDiv64(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Div64 [a] x y)
- // result: (DIV x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpARM64DIV)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
func rewriteValueARM64_OpDiv8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
return true
}
}
-func rewriteValueARM64_OpMod32(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Mod32 [a] x y)
- // result: (MODW x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpARM64MODW)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
-func rewriteValueARM64_OpMod64(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Mod64 [a] x y)
- // result: (MOD x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpARM64MOD)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
func rewriteValueARM64_OpMod8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
case OpDiv16u:
return rewriteValuePPC64_OpDiv16u(v)
case OpDiv32:
- return rewriteValuePPC64_OpDiv32(v)
+ v.Op = OpPPC64DIVW
+ return true
case OpDiv32F:
v.Op = OpPPC64FDIVS
return true
v.Op = OpPPC64DIVWU
return true
case OpDiv64:
- return rewriteValuePPC64_OpDiv64(v)
+ v.Op = OpPPC64DIVD
+ return true
case OpDiv64F:
v.Op = OpPPC64FDIV
return true
return true
}
}
-func rewriteValuePPC64_OpDiv32(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Div32 [a] x y)
- // result: (DIVW x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpPPC64DIVW)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
-func rewriteValuePPC64_OpDiv64(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Div64 [a] x y)
- // result: (DIVD x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpPPC64DIVD)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
func rewriteValuePPC64_OpDiv8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
case OpDiv16u:
return rewriteValueRISCV64_OpDiv16u(v)
case OpDiv32:
- return rewriteValueRISCV64_OpDiv32(v)
+ v.Op = OpRISCV64DIVW
+ return true
case OpDiv32F:
v.Op = OpRISCV64FDIVS
return true
v.Op = OpRISCV64DIVUW
return true
case OpDiv64:
- return rewriteValueRISCV64_OpDiv64(v)
+ v.Op = OpRISCV64DIV
+ return true
case OpDiv64F:
v.Op = OpRISCV64FDIVD
return true
case OpMod16u:
return rewriteValueRISCV64_OpMod16u(v)
case OpMod32:
- return rewriteValueRISCV64_OpMod32(v)
+ v.Op = OpRISCV64REMW
+ return true
case OpMod32u:
v.Op = OpRISCV64REMUW
return true
case OpMod64:
- return rewriteValueRISCV64_OpMod64(v)
+ v.Op = OpRISCV64REM
+ return true
case OpMod64u:
v.Op = OpRISCV64REMU
return true
return true
}
}
-func rewriteValueRISCV64_OpDiv32(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Div32 [a] x y)
- // result: (DIVW x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpRISCV64DIVW)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
-func rewriteValueRISCV64_OpDiv64(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Div64 [a] x y)
- // result: (DIV x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpRISCV64DIV)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
func rewriteValueRISCV64_OpDiv8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
return true
}
}
-func rewriteValueRISCV64_OpMod32(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Mod32 [a] x y)
- // result: (REMW x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpRISCV64REMW)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
-func rewriteValueRISCV64_OpMod64(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Mod64 [a] x y)
- // result: (REM x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpRISCV64REM)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
func rewriteValueRISCV64_OpMod8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
case OpDiv32u:
return rewriteValueS390X_OpDiv32u(v)
case OpDiv64:
- return rewriteValueS390X_OpDiv64(v)
+ v.Op = OpS390XDIVD
+ return true
case OpDiv64F:
v.Op = OpS390XFDIV
return true
case OpMod32u:
return rewriteValueS390X_OpMod32u(v)
case OpMod64:
- return rewriteValueS390X_OpMod64(v)
+ v.Op = OpS390XMODD
+ return true
case OpMod64u:
v.Op = OpS390XMODDU
return true
return true
}
}
-func rewriteValueS390X_OpDiv64(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Div64 [a] x y)
- // result: (DIVD x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpS390XDIVD)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
func rewriteValueS390X_OpDiv8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
return true
}
}
-func rewriteValueS390X_OpMod64(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Mod64 [a] x y)
- // result: (MODD x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpS390XMODD)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
func rewriteValueS390X_OpMod8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
case OpDiv32u:
return rewriteValueWasm_OpDiv32u(v)
case OpDiv64:
- return rewriteValueWasm_OpDiv64(v)
+ v.Op = OpWasmI64DivS
+ return true
case OpDiv64F:
v.Op = OpWasmF64Div
return true
case OpMod32u:
return rewriteValueWasm_OpMod32u(v)
case OpMod64:
- return rewriteValueWasm_OpMod64(v)
+ v.Op = OpWasmI64RemS
+ return true
case OpMod64u:
v.Op = OpWasmI64RemU
return true
return true
}
}
-func rewriteValueWasm_OpDiv64(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Div64 [a] x y)
- // result: (I64DivS x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpWasmI64DivS)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
func rewriteValueWasm_OpDiv8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]
return true
}
}
-func rewriteValueWasm_OpMod64(v *Value) bool {
- v_1 := v.Args[1]
- v_0 := v.Args[0]
- // match: (Mod64 [a] x y)
- // result: (I64RemS x y)
- for {
- x := v_0
- y := v_1
- v.reset(OpWasmI64RemS)
- v.AddArg(x)
- v.AddArg(y)
- return true
- }
-}
func rewriteValueWasm_OpMod8(v *Value) bool {
v_1 := v.Args[1]
v_0 := v.Args[0]