sub := "SUB"
r28 := "R28"
regsize := 4
+ softfloat := "GOMIPS_softfloat"
if _64bit {
mov = "MOVV"
movf = "MOVD"
sub = "SUBV"
r28 = "RSB"
regsize = 8
+ softfloat = "GOMIPS64_softfloat"
}
// Add integer registers R1-R22, R24-R25, R28
mov+" LO, R1\n"+mov+" R1, %d(R29)",
mov+" %d(R29), R1\n"+mov+" R1, LO",
regsize)
+
// Add floating point control/status register FCR31 (FCR0-FCR30 are irrelevant)
- l.addSpecial(
+ var lfp = layout{sp: "R29", stack: l.stack}
+ lfp.addSpecial(
mov+" FCR31, R1\n"+mov+" R1, %d(R29)",
mov+" %d(R29), R1\n"+mov+" R1, FCR31",
regsize)
// Add floating point registers F0-F31.
for i := 0; i <= 31; i++ {
reg := fmt.Sprintf("F%d", i)
- l.add(movf, reg, regsize)
+ lfp.add(movf, reg, regsize)
}
// allocate frame, save PC of interrupted instruction (in LR)
- p(mov+" R31, -%d(R29)", l.stack)
- p(sub+" $%d, R29", l.stack)
+ p(mov+" R31, -%d(R29)", lfp.stack)
+ p(sub+" $%d, R29", lfp.stack)
l.save()
+ p("#ifndef %s", softfloat)
+ lfp.save()
+ p("#endif")
p("CALL ·asyncPreempt2(SB)")
+ p("#ifndef %s", softfloat)
+ lfp.restore()
+ p("#endif")
l.restore()
- p(mov+" %d(R29), R31", l.stack) // sigctxt.pushCall has pushed LR (at interrupt) on stack, restore it
- p(mov + " (R29), R23") // load PC to REGTMP
- p(add+" $%d, R29", l.stack+regsize) // pop frame (including the space pushed by sigctxt.pushCall)
+ p(mov+" %d(R29), R31", lfp.stack) // sigctxt.pushCall has pushed LR (at interrupt) on stack, restore it
+ p(mov + " (R29), R23") // load PC to REGTMP
+ p(add+" $%d, R29", lfp.stack+regsize) // pop frame (including the space pushed by sigctxt.pushCall)
p("JMP (R23)")
}