#define D_HI D_NONE
#define D_LO D_NONE
-#define isregtype(t) ((t)>= D_AX && (t)<=D_R15)
-
#define BLOAD(r) band(bnot(r->refbehind), r->refahead)
#define BSTORE(r) band(bnot(r->calbehind), r->calahead)
#define LOAD(r) (~r->refbehind.b[z] & r->refahead.b[z])
v->node = node;
if(debug['R'])
- print("bit=%2d et=%2d w=%d+%d %#N %D flag=%d\n", i, et, o, w, node, a, v->addr);
+ print("bit=%2d et=%2E w=%d+%d %#N %D flag=%d\n", i, et, o, w, node, a, v->addr);
bit = blsh(i);
if(n == D_EXTERN || n == D_STATIC)
#define D_HI D_NONE
#define D_LO D_NONE
-#define isregtype(t) ((t)>= D_AX && (t)<=D_R15)
-
/*
* bound
*/
#define D_HI D_NONE
#define D_LO D_NONE
-#define isregtype(t) ((t)>= D_AX && (t)<=D_R15)
-
#define BLOAD(r) band(bnot(r->refbehind), r->refahead)
#define BSTORE(r) band(bnot(r->calbehind), r->calahead)
#define LOAD(r) (~r->refbehind.b[z] & r->refahead.b[z])
p1->as = AMOVL;
switch(v->etype) {
default:
- fatal("unknown type\n");
+ fatal("unknown type %E", v->etype);
case TINT8:
case TUINT8:
case TBOOL:
v->node = node;
if(debug['R'])
- print("bit=%2d et=%2d w=%d+%d %#N %D flag=%d\n", i, et, o, w, node, a, v->addr);
+ print("bit=%2d et=%2E w=%d+%d %#N %D flag=%d\n", i, et, o, w, node, a, v->addr);
ostats.nvar++;
v->node = node;
if(debug['R'])
- print("bit=%2d et=%2d w=%d+%d %#N %D flag=%d\n", i, et, o, w, node, a, v->addr);
+ print("bit=%2d et=%2E w=%d+%d %#N %D flag=%d\n", i, et, o, w, node, a, v->addr);
ostats.nvar++;
bit = blsh(i);