return rewriteValueARM64_OpARM64MODW_0(v)
case OpARM64MOVBUload:
return rewriteValueARM64_OpARM64MOVBUload_0(v)
+ case OpARM64MOVBUloadidx:
+ return rewriteValueARM64_OpARM64MOVBUloadidx_0(v)
case OpARM64MOVBUreg:
return rewriteValueARM64_OpARM64MOVBUreg_0(v)
case OpARM64MOVBload:
return rewriteValueARM64_OpARM64MOVBload_0(v)
+ case OpARM64MOVBloadidx:
+ return rewriteValueARM64_OpARM64MOVBloadidx_0(v)
case OpARM64MOVBreg:
return rewriteValueARM64_OpARM64MOVBreg_0(v)
case OpARM64MOVBstore:
- return rewriteValueARM64_OpARM64MOVBstore_0(v) || rewriteValueARM64_OpARM64MOVBstore_10(v) || rewriteValueARM64_OpARM64MOVBstore_20(v)
+ return rewriteValueARM64_OpARM64MOVBstore_0(v) || rewriteValueARM64_OpARM64MOVBstore_10(v) || rewriteValueARM64_OpARM64MOVBstore_20(v) || rewriteValueARM64_OpARM64MOVBstore_30(v) || rewriteValueARM64_OpARM64MOVBstore_40(v)
+ case OpARM64MOVBstoreidx:
+ return rewriteValueARM64_OpARM64MOVBstoreidx_0(v)
case OpARM64MOVBstorezero:
return rewriteValueARM64_OpARM64MOVBstorezero_0(v)
+ case OpARM64MOVBstorezeroidx:
+ return rewriteValueARM64_OpARM64MOVBstorezeroidx_0(v)
case OpARM64MOVDload:
return rewriteValueARM64_OpARM64MOVDload_0(v)
+ case OpARM64MOVDloadidx:
+ return rewriteValueARM64_OpARM64MOVDloadidx_0(v)
case OpARM64MOVDreg:
return rewriteValueARM64_OpARM64MOVDreg_0(v)
case OpARM64MOVDstore:
return rewriteValueARM64_OpARM64MOVDstore_0(v)
+ case OpARM64MOVDstoreidx:
+ return rewriteValueARM64_OpARM64MOVDstoreidx_0(v)
case OpARM64MOVDstorezero:
return rewriteValueARM64_OpARM64MOVDstorezero_0(v)
+ case OpARM64MOVDstorezeroidx:
+ return rewriteValueARM64_OpARM64MOVDstorezeroidx_0(v)
case OpARM64MOVHUload:
return rewriteValueARM64_OpARM64MOVHUload_0(v)
+ case OpARM64MOVHUloadidx:
+ return rewriteValueARM64_OpARM64MOVHUloadidx_0(v)
case OpARM64MOVHUreg:
return rewriteValueARM64_OpARM64MOVHUreg_0(v)
case OpARM64MOVHload:
return rewriteValueARM64_OpARM64MOVHload_0(v)
+ case OpARM64MOVHloadidx:
+ return rewriteValueARM64_OpARM64MOVHloadidx_0(v)
case OpARM64MOVHreg:
- return rewriteValueARM64_OpARM64MOVHreg_0(v)
+ return rewriteValueARM64_OpARM64MOVHreg_0(v) || rewriteValueARM64_OpARM64MOVHreg_10(v)
case OpARM64MOVHstore:
return rewriteValueARM64_OpARM64MOVHstore_0(v) || rewriteValueARM64_OpARM64MOVHstore_10(v)
+ case OpARM64MOVHstoreidx:
+ return rewriteValueARM64_OpARM64MOVHstoreidx_0(v)
case OpARM64MOVHstorezero:
return rewriteValueARM64_OpARM64MOVHstorezero_0(v)
+ case OpARM64MOVHstorezeroidx:
+ return rewriteValueARM64_OpARM64MOVHstorezeroidx_0(v)
case OpARM64MOVQstorezero:
return rewriteValueARM64_OpARM64MOVQstorezero_0(v)
case OpARM64MOVWUload:
return rewriteValueARM64_OpARM64MOVWUload_0(v)
+ case OpARM64MOVWUloadidx:
+ return rewriteValueARM64_OpARM64MOVWUloadidx_0(v)
case OpARM64MOVWUreg:
- return rewriteValueARM64_OpARM64MOVWUreg_0(v)
+ return rewriteValueARM64_OpARM64MOVWUreg_0(v) || rewriteValueARM64_OpARM64MOVWUreg_10(v)
case OpARM64MOVWload:
return rewriteValueARM64_OpARM64MOVWload_0(v)
+ case OpARM64MOVWloadidx:
+ return rewriteValueARM64_OpARM64MOVWloadidx_0(v)
case OpARM64MOVWreg:
return rewriteValueARM64_OpARM64MOVWreg_0(v) || rewriteValueARM64_OpARM64MOVWreg_10(v)
case OpARM64MOVWstore:
return rewriteValueARM64_OpARM64MOVWstore_0(v)
+ case OpARM64MOVWstoreidx:
+ return rewriteValueARM64_OpARM64MOVWstoreidx_0(v)
case OpARM64MOVWstorezero:
return rewriteValueARM64_OpARM64MOVWstorezero_0(v)
+ case OpARM64MOVWstorezeroidx:
+ return rewriteValueARM64_OpARM64MOVWstorezeroidx_0(v)
case OpARM64MUL:
return rewriteValueARM64_OpARM64MUL_0(v) || rewriteValueARM64_OpARM64MUL_10(v) || rewriteValueARM64_OpARM64MUL_20(v)
case OpARM64MULW:
case OpARM64NotEqual:
return rewriteValueARM64_OpARM64NotEqual_0(v)
case OpARM64OR:
- return rewriteValueARM64_OpARM64OR_0(v) || rewriteValueARM64_OpARM64OR_10(v) || rewriteValueARM64_OpARM64OR_20(v)
+ return rewriteValueARM64_OpARM64OR_0(v) || rewriteValueARM64_OpARM64OR_10(v) || rewriteValueARM64_OpARM64OR_20(v) || rewriteValueARM64_OpARM64OR_30(v)
case OpARM64ORN:
return rewriteValueARM64_OpARM64ORN_0(v)
case OpARM64ORNshiftLL:
v.AddArg(mem)
return true
}
+ // match: (MOVBUload [off] {sym} (ADD ptr idx) mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVBUloadidx ptr idx mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ mem := v.Args[1]
+ if !(off == 0 && sym == nil) {
+ break
+ }
+ v.reset(OpARM64MOVBUloadidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
// match: (MOVBUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
// result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
}
return false
}
+func rewriteValueARM64_OpARM64MOVBUloadidx_0(v *Value) bool {
+ // match: (MOVBUloadidx ptr (MOVDconst [c]) mem)
+ // cond:
+ // result: (MOVBUload [c] ptr mem)
+ for {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ mem := v.Args[2]
+ v.reset(OpARM64MOVBUload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBUloadidx (MOVDconst [c]) ptr mem)
+ // cond:
+ // result: (MOVBUload [c] ptr mem)
+ for {
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ ptr := v.Args[1]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVBUload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBUloadidx ptr idx (MOVBstorezeroidx ptr2 idx2 _))
+ // cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
+ // result: (MOVDconst [0])
+ for {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVBstorezeroidx {
+ break
+ }
+ _ = v_2.Args[2]
+ ptr2 := v_2.Args[0]
+ idx2 := v_2.Args[1]
+ if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
+ return true
+ }
+ return false
+}
func rewriteValueARM64_OpARM64MOVBUreg_0(v *Value) bool {
// match: (MOVBUreg x:(MOVBUload _ _))
// cond:
v.AddArg(x)
return true
}
+ // match: (MOVBUreg x:(MOVBUloadidx _ _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBUloadidx {
+ break
+ }
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
// match: (MOVBUreg x:(MOVBUreg _))
// cond:
// result: (MOVDreg x)
v.AddArg(mem)
return true
}
+ // match: (MOVBload [off] {sym} (ADD ptr idx) mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVBloadidx ptr idx mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ mem := v.Args[1]
+ if !(off == 0 && sym == nil) {
+ break
+ }
+ v.reset(OpARM64MOVBloadidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
// match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
}
return false
}
+func rewriteValueARM64_OpARM64MOVBloadidx_0(v *Value) bool {
+ // match: (MOVBloadidx ptr (MOVDconst [c]) mem)
+ // cond:
+ // result: (MOVBload [c] ptr mem)
+ for {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ mem := v.Args[2]
+ v.reset(OpARM64MOVBload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBloadidx (MOVDconst [c]) ptr mem)
+ // cond:
+ // result: (MOVBload [c] ptr mem)
+ for {
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ ptr := v.Args[1]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVBload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBloadidx ptr idx (MOVBstorezeroidx ptr2 idx2 _))
+ // cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
+ // result: (MOVDconst [0])
+ for {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVBstorezeroidx {
+ break
+ }
+ _ = v_2.Args[2]
+ ptr2 := v_2.Args[0]
+ idx2 := v_2.Args[1]
+ if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
+ return true
+ }
+ return false
+}
func rewriteValueARM64_OpARM64MOVBreg_0(v *Value) bool {
// match: (MOVBreg x:(MOVBload _ _))
// cond:
v.AddArg(x)
return true
}
+ // match: (MOVBreg x:(MOVBloadidx _ _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBloadidx {
+ break
+ }
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
// match: (MOVBreg x:(MOVBreg _))
// cond:
// result: (MOVDreg x)
v.AddArg(mem)
return true
}
+ // match: (MOVBstore [off] {sym} (ADD ptr idx) val mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVBstoreidx ptr idx val mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ val := v.Args[1]
+ mem := v.Args[2]
+ if !(off == 0 && sym == nil) {
+ break
+ }
+ v.reset(OpARM64MOVBstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(val)
+ v.AddArg(mem)
+ return true
+ }
// match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
// cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
v.AddArg(mem)
return true
}
+ return false
+}
+func rewriteValueARM64_OpARM64MOVBstore_10(v *Value) bool {
// match: (MOVBstore [i] {s} ptr0 (SRLconst [8] w) x:(MOVBstore [i-1] {s} ptr1 w mem))
// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
// result: (MOVHstore [i-1] {s} ptr0 w mem)
v.AddArg(mem)
return true
}
- return false
-}
-func rewriteValueARM64_OpARM64MOVBstore_10(v *Value) bool {
- b := v.Block
- _ = b
+ // match: (MOVBstore [1] {s} (ADD ptr0 idx0) (SRLconst [8] w) x:(MOVBstoreidx ptr1 idx1 w mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVHstoreidx ptr1 idx1 w mem)
+ for {
+ if v.AuxInt != 1 {
+ break
+ }
+ s := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
+ break
+ }
+ if v_1.AuxInt != 8 {
+ break
+ }
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstoreidx {
+ break
+ }
+ _ = x.Args[3]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ if w != x.Args[2] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(w)
+ v.AddArg(mem)
+ return true
+ }
// match: (MOVBstore [i] {s} ptr0 (UBFX [arm64BFAuxInt(8, 8)] w) x:(MOVBstore [i-1] {s} ptr1 w mem))
// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
// result: (MOVHstore [i-1] {s} ptr0 w mem)
v.AddArg(mem)
return true
}
- // match: (MOVBstore [i] {s} ptr0 (UBFX [arm64BFAuxInt(8, 24)] w) x:(MOVBstore [i-1] {s} ptr1 w mem))
- // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
- // result: (MOVHstore [i-1] {s} ptr0 w mem)
+ // match: (MOVBstore [1] {s} (ADD ptr0 idx0) (UBFX [arm64BFAuxInt(8, 8)] w) x:(MOVBstoreidx ptr1 idx1 w mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVHstoreidx ptr1 idx1 w mem)
for {
- i := v.AuxInt
+ if v.AuxInt != 1 {
+ break
+ }
s := v.Aux
_ = v.Args[2]
- ptr0 := v.Args[0]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
v_1 := v.Args[1]
if v_1.Op != OpARM64UBFX {
break
}
- if v_1.AuxInt != arm64BFAuxInt(8, 24) {
+ if v_1.AuxInt != arm64BFAuxInt(8, 8) {
break
}
w := v_1.Args[0]
x := v.Args[2]
- if x.Op != OpARM64MOVBstore {
- break
- }
- if x.AuxInt != i-1 {
+ if x.Op != OpARM64MOVBstoreidx {
break
}
- if x.Aux != s {
- break
- }
- _ = x.Args[2]
+ _ = x.Args[3]
ptr1 := x.Args[0]
- if w != x.Args[1] {
+ idx1 := x.Args[1]
+ if w != x.Args[2] {
break
}
- mem := x.Args[2]
- if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
- v.reset(OpARM64MOVHstore)
- v.AuxInt = i - 1
- v.Aux = s
- v.AddArg(ptr0)
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
v.AddArg(w)
v.AddArg(mem)
return true
}
- // match: (MOVBstore [i] {s} ptr0 (SRLconst [8] (MOVDreg w)) x:(MOVBstore [i-1] {s} ptr1 w mem))
+ // match: (MOVBstore [i] {s} ptr0 (UBFX [arm64BFAuxInt(8, 24)] w) x:(MOVBstore [i-1] {s} ptr1 w mem))
// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
// result: (MOVHstore [i-1] {s} ptr0 w mem)
for {
_ = v.Args[2]
ptr0 := v.Args[0]
v_1 := v.Args[1]
- if v_1.Op != OpARM64SRLconst {
- break
- }
- if v_1.AuxInt != 8 {
+ if v_1.Op != OpARM64UBFX {
break
}
- v_1_0 := v_1.Args[0]
- if v_1_0.Op != OpARM64MOVDreg {
+ if v_1.AuxInt != arm64BFAuxInt(8, 24) {
break
}
- w := v_1_0.Args[0]
+ w := v_1.Args[0]
x := v.Args[2]
if x.Op != OpARM64MOVBstore {
break
v.AddArg(mem)
return true
}
- // match: (MOVBstore [i] {s} ptr0 (SRLconst [j] w) x:(MOVBstore [i-1] {s} ptr1 w0:(SRLconst [j-8] w) mem))
- // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
- // result: (MOVHstore [i-1] {s} ptr0 w0 mem)
+ // match: (MOVBstore [1] {s} (ADD ptr0 idx0) (UBFX [arm64BFAuxInt(8, 24)] w) x:(MOVBstoreidx ptr1 idx1 w mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVHstoreidx ptr1 idx1 w mem)
for {
- i := v.AuxInt
+ if v.AuxInt != 1 {
+ break
+ }
s := v.Aux
_ = v.Args[2]
- ptr0 := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64SRLconst {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
break
}
- j := v_1.AuxInt
- w := v_1.Args[0]
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64UBFX {
+ break
+ }
+ if v_1.AuxInt != arm64BFAuxInt(8, 24) {
+ break
+ }
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstoreidx {
+ break
+ }
+ _ = x.Args[3]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ if w != x.Args[2] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(w)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBstore [i] {s} ptr0 (SRLconst [8] (MOVDreg w)) x:(MOVBstore [i-1] {s} ptr1 w mem))
+ // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
+ // result: (MOVHstore [i-1] {s} ptr0 w mem)
+ for {
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[2]
+ ptr0 := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
+ break
+ }
+ if v_1.AuxInt != 8 {
+ break
+ }
+ v_1_0 := v_1.Args[0]
+ if v_1_0.Op != OpARM64MOVDreg {
+ break
+ }
+ w := v_1_0.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstore {
+ break
+ }
+ if x.AuxInt != i-1 {
+ break
+ }
+ if x.Aux != s {
+ break
+ }
+ _ = x.Args[2]
+ ptr1 := x.Args[0]
+ if w != x.Args[1] {
+ break
+ }
+ mem := x.Args[2]
+ if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = i - 1
+ v.Aux = s
+ v.AddArg(ptr0)
+ v.AddArg(w)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBstore [1] {s} (ADD ptr0 idx0) (SRLconst [8] (MOVDreg w)) x:(MOVBstoreidx ptr1 idx1 w mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVHstoreidx ptr1 idx1 w mem)
+ for {
+ if v.AuxInt != 1 {
+ break
+ }
+ s := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
+ break
+ }
+ if v_1.AuxInt != 8 {
+ break
+ }
+ v_1_0 := v_1.Args[0]
+ if v_1_0.Op != OpARM64MOVDreg {
+ break
+ }
+ w := v_1_0.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstoreidx {
+ break
+ }
+ _ = x.Args[3]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ if w != x.Args[2] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(w)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBstore [i] {s} ptr0 (SRLconst [j] w) x:(MOVBstore [i-1] {s} ptr1 w0:(SRLconst [j-8] w) mem))
+ // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
+ // result: (MOVHstore [i-1] {s} ptr0 w0 mem)
+ for {
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[2]
+ ptr0 := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
+ break
+ }
+ j := v_1.AuxInt
+ w := v_1.Args[0]
x := v.Args[2]
if x.Op != OpARM64MOVBstore {
break
v.AddArg(mem)
return true
}
+ // match: (MOVBstore [1] {s} (ADD ptr0 idx0) (SRLconst [j] w) x:(MOVBstoreidx ptr1 idx1 w0:(SRLconst [j-8] w) mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVHstoreidx ptr1 idx1 w0 mem)
+ for {
+ if v.AuxInt != 1 {
+ break
+ }
+ s := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
+ break
+ }
+ j := v_1.AuxInt
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstoreidx {
+ break
+ }
+ _ = x.Args[3]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ w0 := x.Args[2]
+ if w0.Op != OpARM64SRLconst {
+ break
+ }
+ if w0.AuxInt != j-8 {
+ break
+ }
+ if w != w0.Args[0] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(w0)
+ v.AddArg(mem)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVBstore_20(v *Value) bool {
+ b := v.Block
+ _ = b
// match: (MOVBstore [i] {s} ptr0 (UBFX [bfc] w) x:(MOVBstore [i-1] {s} ptr1 w0:(UBFX [bfc2] w) mem))
// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && getARM64BFwidth(bfc) == 32 - getARM64BFlsb(bfc) && getARM64BFwidth(bfc2) == 32 - getARM64BFlsb(bfc2) && getARM64BFlsb(bfc2) == getARM64BFlsb(bfc) - 8 && clobber(x)
// result: (MOVHstore [i-1] {s} ptr0 w0 mem)
v.AddArg(mem)
return true
}
+ // match: (MOVBstore [1] {s} (ADD ptr0 idx0) (UBFX [bfc] w) x:(MOVBstoreidx ptr1 idx1 w0:(UBFX [bfc2] w) mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && getARM64BFwidth(bfc) == 32 - getARM64BFlsb(bfc) && getARM64BFwidth(bfc2) == 32 - getARM64BFlsb(bfc2) && getARM64BFlsb(bfc2) == getARM64BFlsb(bfc) - 8 && clobber(x)
+ // result: (MOVHstoreidx ptr1 idx1 w0 mem)
+ for {
+ if v.AuxInt != 1 {
+ break
+ }
+ s := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64UBFX {
+ break
+ }
+ bfc := v_1.AuxInt
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstoreidx {
+ break
+ }
+ _ = x.Args[3]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ w0 := x.Args[2]
+ if w0.Op != OpARM64UBFX {
+ break
+ }
+ bfc2 := w0.AuxInt
+ if w != w0.Args[0] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && getARM64BFwidth(bfc) == 32-getARM64BFlsb(bfc) && getARM64BFwidth(bfc2) == 32-getARM64BFlsb(bfc2) && getARM64BFlsb(bfc2) == getARM64BFlsb(bfc)-8 && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(w0)
+ v.AddArg(mem)
+ return true
+ }
// match: (MOVBstore [i] {s} ptr0 (SRLconst [j] (MOVDreg w)) x:(MOVBstore [i-1] {s} ptr1 w0:(SRLconst [j-8] (MOVDreg w)) mem))
// cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
// result: (MOVHstore [i-1] {s} ptr0 w0 mem)
v.AddArg(mem)
return true
}
+ // match: (MOVBstore [1] {s} (ADD ptr0 idx0) (SRLconst [j] (MOVDreg w)) x:(MOVBstoreidx ptr1 idx1 w0:(SRLconst [j-8] (MOVDreg w)) mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVHstoreidx ptr1 idx1 w0 mem)
+ for {
+ if v.AuxInt != 1 {
+ break
+ }
+ s := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
+ break
+ }
+ j := v_1.AuxInt
+ v_1_0 := v_1.Args[0]
+ if v_1_0.Op != OpARM64MOVDreg {
+ break
+ }
+ w := v_1_0.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstoreidx {
+ break
+ }
+ _ = x.Args[3]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ w0 := x.Args[2]
+ if w0.Op != OpARM64SRLconst {
+ break
+ }
+ if w0.AuxInt != j-8 {
+ break
+ }
+ w0_0 := w0.Args[0]
+ if w0_0.Op != OpARM64MOVDreg {
+ break
+ }
+ if w != w0_0.Args[0] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(w0)
+ v.AddArg(mem)
+ return true
+ }
// match: (MOVBstore [i] {s} ptr w x0:(MOVBstore [i-1] {s} ptr (SRLconst [8] w) x1:(MOVBstore [i-2] {s} ptr (SRLconst [16] w) x2:(MOVBstore [i-3] {s} ptr (SRLconst [24] w) x3:(MOVBstore [i-4] {s} ptr (SRLconst [32] w) x4:(MOVBstore [i-5] {s} ptr (SRLconst [40] w) x5:(MOVBstore [i-6] {s} ptr (SRLconst [48] w) x6:(MOVBstore [i-7] {s} ptr (SRLconst [56] w) mem))))))))
// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)
// result: (MOVDstore [i-7] {s} ptr (REV <w.Type> w) mem)
v.AddArg(mem)
return true
}
- // match: (MOVBstore [i] {s} ptr w x0:(MOVBstore [i-1] {s} ptr (UBFX [arm64BFAuxInt(8, 24)] w) x1:(MOVBstore [i-2] {s} ptr (UBFX [arm64BFAuxInt(16, 16)] w) x2:(MOVBstore [i-3] {s} ptr (UBFX [arm64BFAuxInt(24, 8)] w) mem))))
- // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)
- // result: (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
+ // match: (MOVBstore [7] {s} p w x0:(MOVBstore [6] {s} p (SRLconst [8] w) x1:(MOVBstore [5] {s} p (SRLconst [16] w) x2:(MOVBstore [4] {s} p (SRLconst [24] w) x3:(MOVBstore [3] {s} p (SRLconst [32] w) x4:(MOVBstore [2] {s} p (SRLconst [40] w) x5:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (SRLconst [48] w) x6:(MOVBstoreidx ptr0 idx0 (SRLconst [56] w) mem))))))))
+ // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)
+ // result: (MOVDstoreidx ptr0 idx0 (REV <w.Type> w) mem)
for {
- i := v.AuxInt
+ if v.AuxInt != 7 {
+ break
+ }
s := v.Aux
_ = v.Args[2]
- ptr := v.Args[0]
+ p := v.Args[0]
w := v.Args[1]
x0 := v.Args[2]
if x0.Op != OpARM64MOVBstore {
break
}
- if x0.AuxInt != i-1 {
+ if x0.AuxInt != 6 {
break
}
if x0.Aux != s {
break
}
_ = x0.Args[2]
- if ptr != x0.Args[0] {
+ if p != x0.Args[0] {
break
}
x0_1 := x0.Args[1]
- if x0_1.Op != OpARM64UBFX {
+ if x0_1.Op != OpARM64SRLconst {
break
}
- if x0_1.AuxInt != arm64BFAuxInt(8, 24) {
+ if x0_1.AuxInt != 8 {
break
}
if w != x0_1.Args[0] {
if x1.Op != OpARM64MOVBstore {
break
}
- if x1.AuxInt != i-2 {
+ if x1.AuxInt != 5 {
break
}
if x1.Aux != s {
break
}
_ = x1.Args[2]
- if ptr != x1.Args[0] {
+ if p != x1.Args[0] {
break
}
x1_1 := x1.Args[1]
- if x1_1.Op != OpARM64UBFX {
+ if x1_1.Op != OpARM64SRLconst {
break
}
- if x1_1.AuxInt != arm64BFAuxInt(16, 16) {
+ if x1_1.AuxInt != 16 {
break
}
if w != x1_1.Args[0] {
if x2.Op != OpARM64MOVBstore {
break
}
- if x2.AuxInt != i-3 {
+ if x2.AuxInt != 4 {
break
}
if x2.Aux != s {
break
}
_ = x2.Args[2]
- if ptr != x2.Args[0] {
+ if p != x2.Args[0] {
break
}
x2_1 := x2.Args[1]
- if x2_1.Op != OpARM64UBFX {
+ if x2_1.Op != OpARM64SRLconst {
break
}
- if x2_1.AuxInt != arm64BFAuxInt(24, 8) {
+ if x2_1.AuxInt != 24 {
break
}
if w != x2_1.Args[0] {
break
}
- mem := x2.Args[2]
- if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)) {
+ x3 := x2.Args[2]
+ if x3.Op != OpARM64MOVBstore {
break
}
- v.reset(OpARM64MOVWstore)
- v.AuxInt = i - 3
- v.Aux = s
- v.AddArg(ptr)
- v0 := b.NewValue0(v.Pos, OpARM64REVW, w.Type)
- v0.AddArg(w)
- v.AddArg(v0)
- v.AddArg(mem)
- return true
- }
- // match: (MOVBstore [i] {s} ptr w x0:(MOVBstore [i-1] {s} ptr (SRLconst [8] (MOVDreg w)) x1:(MOVBstore [i-2] {s} ptr (SRLconst [16] (MOVDreg w)) x2:(MOVBstore [i-3] {s} ptr (SRLconst [24] (MOVDreg w)) mem))))
- // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)
- // result: (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
- for {
- i := v.AuxInt
- s := v.Aux
- _ = v.Args[2]
- ptr := v.Args[0]
- w := v.Args[1]
- x0 := v.Args[2]
- if x0.Op != OpARM64MOVBstore {
+ if x3.AuxInt != 3 {
break
}
- if x0.AuxInt != i-1 {
+ if x3.Aux != s {
break
}
- if x0.Aux != s {
+ _ = x3.Args[2]
+ if p != x3.Args[0] {
break
}
- _ = x0.Args[2]
- if ptr != x0.Args[0] {
+ x3_1 := x3.Args[1]
+ if x3_1.Op != OpARM64SRLconst {
break
}
- x0_1 := x0.Args[1]
- if x0_1.Op != OpARM64SRLconst {
+ if x3_1.AuxInt != 32 {
break
}
- if x0_1.AuxInt != 8 {
+ if w != x3_1.Args[0] {
break
}
- x0_1_0 := x0_1.Args[0]
- if x0_1_0.Op != OpARM64MOVDreg {
+ x4 := x3.Args[2]
+ if x4.Op != OpARM64MOVBstore {
break
}
- if w != x0_1_0.Args[0] {
+ if x4.AuxInt != 2 {
break
}
- x1 := x0.Args[2]
- if x1.Op != OpARM64MOVBstore {
+ if x4.Aux != s {
break
}
- if x1.AuxInt != i-2 {
+ _ = x4.Args[2]
+ if p != x4.Args[0] {
break
}
- if x1.Aux != s {
+ x4_1 := x4.Args[1]
+ if x4_1.Op != OpARM64SRLconst {
break
}
- _ = x1.Args[2]
- if ptr != x1.Args[0] {
+ if x4_1.AuxInt != 40 {
break
}
- x1_1 := x1.Args[1]
- if x1_1.Op != OpARM64SRLconst {
+ if w != x4_1.Args[0] {
break
}
- if x1_1.AuxInt != 16 {
+ x5 := x4.Args[2]
+ if x5.Op != OpARM64MOVBstore {
break
}
- x1_1_0 := x1_1.Args[0]
- if x1_1_0.Op != OpARM64MOVDreg {
+ if x5.AuxInt != 1 {
break
}
- if w != x1_1_0.Args[0] {
+ if x5.Aux != s {
break
}
- x2 := x1.Args[2]
- if x2.Op != OpARM64MOVBstore {
+ _ = x5.Args[2]
+ p1 := x5.Args[0]
+ if p1.Op != OpARM64ADD {
break
}
- if x2.AuxInt != i-3 {
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ x5_1 := x5.Args[1]
+ if x5_1.Op != OpARM64SRLconst {
break
}
- if x2.Aux != s {
+ if x5_1.AuxInt != 48 {
break
}
- _ = x2.Args[2]
- if ptr != x2.Args[0] {
+ if w != x5_1.Args[0] {
break
}
- x2_1 := x2.Args[1]
- if x2_1.Op != OpARM64SRLconst {
+ x6 := x5.Args[2]
+ if x6.Op != OpARM64MOVBstoreidx {
break
}
- if x2_1.AuxInt != 24 {
+ _ = x6.Args[3]
+ ptr0 := x6.Args[0]
+ idx0 := x6.Args[1]
+ x6_2 := x6.Args[2]
+ if x6_2.Op != OpARM64SRLconst {
break
}
- x2_1_0 := x2_1.Args[0]
- if x2_1_0.Op != OpARM64MOVDreg {
+ if x6_2.AuxInt != 56 {
break
}
- if w != x2_1_0.Args[0] {
+ if w != x6_2.Args[0] {
break
}
- mem := x2.Args[2]
- if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)) {
+ mem := x6.Args[3]
+ if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6)) {
break
}
- v.reset(OpARM64MOVWstore)
- v.AuxInt = i - 3
- v.Aux = s
- v.AddArg(ptr)
- v0 := b.NewValue0(v.Pos, OpARM64REVW, w.Type)
+ v.reset(OpARM64MOVDstoreidx)
+ v.AddArg(ptr0)
+ v.AddArg(idx0)
+ v0 := b.NewValue0(v.Pos, OpARM64REV, w.Type)
v0.AddArg(w)
v.AddArg(v0)
v.AddArg(mem)
return true
}
- // match: (MOVBstore [i] {s} ptr w x0:(MOVBstore [i-1] {s} ptr (SRLconst [8] w) x1:(MOVBstore [i-2] {s} ptr (SRLconst [16] w) x2:(MOVBstore [i-3] {s} ptr (SRLconst [24] w) mem))))
+ // match: (MOVBstore [i] {s} ptr w x0:(MOVBstore [i-1] {s} ptr (UBFX [arm64BFAuxInt(8, 24)] w) x1:(MOVBstore [i-2] {s} ptr (UBFX [arm64BFAuxInt(16, 16)] w) x2:(MOVBstore [i-3] {s} ptr (UBFX [arm64BFAuxInt(24, 8)] w) mem))))
// cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)
// result: (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
for {
break
}
x0_1 := x0.Args[1]
- if x0_1.Op != OpARM64SRLconst {
+ if x0_1.Op != OpARM64UBFX {
break
}
- if x0_1.AuxInt != 8 {
+ if x0_1.AuxInt != arm64BFAuxInt(8, 24) {
break
}
if w != x0_1.Args[0] {
break
}
x1_1 := x1.Args[1]
- if x1_1.Op != OpARM64SRLconst {
+ if x1_1.Op != OpARM64UBFX {
break
}
- if x1_1.AuxInt != 16 {
+ if x1_1.AuxInt != arm64BFAuxInt(16, 16) {
break
}
if w != x1_1.Args[0] {
break
}
x2_1 := x2.Args[1]
- if x2_1.Op != OpARM64SRLconst {
+ if x2_1.Op != OpARM64UBFX {
break
}
- if x2_1.AuxInt != 24 {
+ if x2_1.AuxInt != arm64BFAuxInt(24, 8) {
break
}
if w != x2_1.Args[0] {
v.AddArg(mem)
return true
}
- return false
-}
-func rewriteValueARM64_OpARM64MOVBstore_20(v *Value) bool {
- b := v.Block
- _ = b
- // match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (SRLconst [8] w) mem))
- // cond: x.Uses == 1 && clobber(x)
- // result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
+ // match: (MOVBstore [3] {s} p w x0:(MOVBstore [2] {s} p (UBFX [arm64BFAuxInt(8, 24)] w) x1:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (UBFX [arm64BFAuxInt(16, 16)] w) x2:(MOVBstoreidx ptr0 idx0 (UBFX [arm64BFAuxInt(24, 8)] w) mem))))
+ // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2)
+ // result: (MOVWstoreidx ptr0 idx0 (REVW <w.Type> w) mem)
for {
- i := v.AuxInt
+ if v.AuxInt != 3 {
+ break
+ }
s := v.Aux
_ = v.Args[2]
- ptr := v.Args[0]
+ p := v.Args[0]
w := v.Args[1]
- x := v.Args[2]
- if x.Op != OpARM64MOVBstore {
+ x0 := v.Args[2]
+ if x0.Op != OpARM64MOVBstore {
break
}
- if x.AuxInt != i-1 {
+ if x0.AuxInt != 2 {
break
}
- if x.Aux != s {
+ if x0.Aux != s {
break
}
- _ = x.Args[2]
- if ptr != x.Args[0] {
+ _ = x0.Args[2]
+ if p != x0.Args[0] {
break
}
- x_1 := x.Args[1]
- if x_1.Op != OpARM64SRLconst {
+ x0_1 := x0.Args[1]
+ if x0_1.Op != OpARM64UBFX {
break
}
- if x_1.AuxInt != 8 {
+ if x0_1.AuxInt != arm64BFAuxInt(8, 24) {
break
}
- if w != x_1.Args[0] {
+ if w != x0_1.Args[0] {
break
}
- mem := x.Args[2]
- if !(x.Uses == 1 && clobber(x)) {
+ x1 := x0.Args[2]
+ if x1.Op != OpARM64MOVBstore {
break
}
- v.reset(OpARM64MOVHstore)
- v.AuxInt = i - 1
- v.Aux = s
- v.AddArg(ptr)
- v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
- v0.AddArg(w)
- v.AddArg(v0)
- v.AddArg(mem)
- return true
- }
- // match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (UBFX [arm64BFAuxInt(8, 8)] w) mem))
- // cond: x.Uses == 1 && clobber(x)
- // result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
- for {
- i := v.AuxInt
- s := v.Aux
- _ = v.Args[2]
- ptr := v.Args[0]
- w := v.Args[1]
- x := v.Args[2]
- if x.Op != OpARM64MOVBstore {
+ if x1.AuxInt != 1 {
break
}
- if x.AuxInt != i-1 {
+ if x1.Aux != s {
break
}
- if x.Aux != s {
+ _ = x1.Args[2]
+ p1 := x1.Args[0]
+ if p1.Op != OpARM64ADD {
break
}
- _ = x.Args[2]
- if ptr != x.Args[0] {
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ x1_1 := x1.Args[1]
+ if x1_1.Op != OpARM64UBFX {
break
}
- x_1 := x.Args[1]
- if x_1.Op != OpARM64UBFX {
+ if x1_1.AuxInt != arm64BFAuxInt(16, 16) {
break
}
- if x_1.AuxInt != arm64BFAuxInt(8, 8) {
+ if w != x1_1.Args[0] {
break
}
- if w != x_1.Args[0] {
+ x2 := x1.Args[2]
+ if x2.Op != OpARM64MOVBstoreidx {
break
}
- mem := x.Args[2]
- if !(x.Uses == 1 && clobber(x)) {
+ _ = x2.Args[3]
+ ptr0 := x2.Args[0]
+ idx0 := x2.Args[1]
+ x2_2 := x2.Args[2]
+ if x2_2.Op != OpARM64UBFX {
break
}
- v.reset(OpARM64MOVHstore)
- v.AuxInt = i - 1
- v.Aux = s
- v.AddArg(ptr)
- v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
+ if x2_2.AuxInt != arm64BFAuxInt(24, 8) {
+ break
+ }
+ if w != x2_2.Args[0] {
+ break
+ }
+ mem := x2.Args[3]
+ if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2)) {
+ break
+ }
+ v.reset(OpARM64MOVWstoreidx)
+ v.AddArg(ptr0)
+ v.AddArg(idx0)
+ v0 := b.NewValue0(v.Pos, OpARM64REVW, w.Type)
v0.AddArg(w)
v.AddArg(v0)
v.AddArg(mem)
return true
}
- // match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (SRLconst [8] (MOVDreg w)) mem))
- // cond: x.Uses == 1 && clobber(x)
- // result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
+ // match: (MOVBstore [i] {s} ptr w x0:(MOVBstore [i-1] {s} ptr (SRLconst [8] (MOVDreg w)) x1:(MOVBstore [i-2] {s} ptr (SRLconst [16] (MOVDreg w)) x2:(MOVBstore [i-3] {s} ptr (SRLconst [24] (MOVDreg w)) mem))))
+ // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)
+ // result: (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
for {
i := v.AuxInt
s := v.Aux
_ = v.Args[2]
ptr := v.Args[0]
w := v.Args[1]
- x := v.Args[2]
- if x.Op != OpARM64MOVBstore {
+ x0 := v.Args[2]
+ if x0.Op != OpARM64MOVBstore {
break
}
- if x.AuxInt != i-1 {
+ if x0.AuxInt != i-1 {
break
}
- if x.Aux != s {
+ if x0.Aux != s {
break
}
- _ = x.Args[2]
- if ptr != x.Args[0] {
+ _ = x0.Args[2]
+ if ptr != x0.Args[0] {
break
}
- x_1 := x.Args[1]
- if x_1.Op != OpARM64SRLconst {
+ x0_1 := x0.Args[1]
+ if x0_1.Op != OpARM64SRLconst {
break
}
- if x_1.AuxInt != 8 {
+ if x0_1.AuxInt != 8 {
break
}
- x_1_0 := x_1.Args[0]
- if x_1_0.Op != OpARM64MOVDreg {
+ x0_1_0 := x0_1.Args[0]
+ if x0_1_0.Op != OpARM64MOVDreg {
break
}
- if w != x_1_0.Args[0] {
+ if w != x0_1_0.Args[0] {
break
}
- mem := x.Args[2]
- if !(x.Uses == 1 && clobber(x)) {
+ x1 := x0.Args[2]
+ if x1.Op != OpARM64MOVBstore {
break
}
- v.reset(OpARM64MOVHstore)
- v.AuxInt = i - 1
- v.Aux = s
- v.AddArg(ptr)
- v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
- v0.AddArg(w)
- v.AddArg(v0)
- v.AddArg(mem)
- return true
- }
- // match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (UBFX [arm64BFAuxInt(8, 24)] w) mem))
- // cond: x.Uses == 1 && clobber(x)
- // result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
- for {
- i := v.AuxInt
- s := v.Aux
- _ = v.Args[2]
- ptr := v.Args[0]
- w := v.Args[1]
- x := v.Args[2]
- if x.Op != OpARM64MOVBstore {
+ if x1.AuxInt != i-2 {
break
}
- if x.AuxInt != i-1 {
+ if x1.Aux != s {
break
}
- if x.Aux != s {
+ _ = x1.Args[2]
+ if ptr != x1.Args[0] {
break
}
- _ = x.Args[2]
- if ptr != x.Args[0] {
+ x1_1 := x1.Args[1]
+ if x1_1.Op != OpARM64SRLconst {
break
}
- x_1 := x.Args[1]
- if x_1.Op != OpARM64UBFX {
+ if x1_1.AuxInt != 16 {
break
}
- if x_1.AuxInt != arm64BFAuxInt(8, 24) {
+ x1_1_0 := x1_1.Args[0]
+ if x1_1_0.Op != OpARM64MOVDreg {
break
}
- if w != x_1.Args[0] {
+ if w != x1_1_0.Args[0] {
break
}
- mem := x.Args[2]
- if !(x.Uses == 1 && clobber(x)) {
+ x2 := x1.Args[2]
+ if x2.Op != OpARM64MOVBstore {
break
}
- v.reset(OpARM64MOVHstore)
- v.AuxInt = i - 1
+ if x2.AuxInt != i-3 {
+ break
+ }
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[2]
+ if ptr != x2.Args[0] {
+ break
+ }
+ x2_1 := x2.Args[1]
+ if x2_1.Op != OpARM64SRLconst {
+ break
+ }
+ if x2_1.AuxInt != 24 {
+ break
+ }
+ x2_1_0 := x2_1.Args[0]
+ if x2_1_0.Op != OpARM64MOVDreg {
+ break
+ }
+ if w != x2_1_0.Args[0] {
+ break
+ }
+ mem := x2.Args[2]
+ if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)) {
+ break
+ }
+ v.reset(OpARM64MOVWstore)
+ v.AuxInt = i - 3
v.Aux = s
v.AddArg(ptr)
- v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
+ v0 := b.NewValue0(v.Pos, OpARM64REVW, w.Type)
v0.AddArg(w)
v.AddArg(v0)
v.AddArg(mem)
return true
}
- // match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (SRLconst [8] (MOVDreg w)) mem))
- // cond: x.Uses == 1 && clobber(x)
- // result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
+ // match: (MOVBstore [3] {s} p w x0:(MOVBstore [2] {s} p (SRLconst [8] (MOVDreg w)) x1:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (SRLconst [16] (MOVDreg w)) x2:(MOVBstoreidx ptr0 idx0 (SRLconst [24] (MOVDreg w)) mem))))
+ // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2)
+ // result: (MOVWstoreidx ptr0 idx0 (REVW <w.Type> w) mem)
for {
- i := v.AuxInt
+ if v.AuxInt != 3 {
+ break
+ }
s := v.Aux
_ = v.Args[2]
- ptr := v.Args[0]
+ p := v.Args[0]
w := v.Args[1]
- x := v.Args[2]
- if x.Op != OpARM64MOVBstore {
+ x0 := v.Args[2]
+ if x0.Op != OpARM64MOVBstore {
break
}
- if x.AuxInt != i-1 {
+ if x0.AuxInt != 2 {
break
}
- if x.Aux != s {
+ if x0.Aux != s {
break
}
- _ = x.Args[2]
- if ptr != x.Args[0] {
+ _ = x0.Args[2]
+ if p != x0.Args[0] {
break
}
- x_1 := x.Args[1]
- if x_1.Op != OpARM64SRLconst {
+ x0_1 := x0.Args[1]
+ if x0_1.Op != OpARM64SRLconst {
break
}
- if x_1.AuxInt != 8 {
+ if x0_1.AuxInt != 8 {
break
}
- x_1_0 := x_1.Args[0]
- if x_1_0.Op != OpARM64MOVDreg {
+ x0_1_0 := x0_1.Args[0]
+ if x0_1_0.Op != OpARM64MOVDreg {
break
}
- if w != x_1_0.Args[0] {
+ if w != x0_1_0.Args[0] {
break
}
- mem := x.Args[2]
- if !(x.Uses == 1 && clobber(x)) {
+ x1 := x0.Args[2]
+ if x1.Op != OpARM64MOVBstore {
break
}
- v.reset(OpARM64MOVHstore)
- v.AuxInt = i - 1
- v.Aux = s
- v.AddArg(ptr)
- v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
- v0.AddArg(w)
- v.AddArg(v0)
- v.AddArg(mem)
- return true
- }
- return false
-}
-func rewriteValueARM64_OpARM64MOVBstorezero_0(v *Value) bool {
- b := v.Block
- _ = b
- config := b.Func.Config
- _ = config
- // match: (MOVBstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
- // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVBstorezero [off1+off2] {sym} ptr mem)
- for {
- off1 := v.AuxInt
- sym := v.Aux
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64ADDconst {
+ if x1.AuxInt != 1 {
break
}
- off2 := v_0.AuxInt
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ if x1.Aux != s {
break
}
- v.reset(OpARM64MOVBstorezero)
- v.AuxInt = off1 + off2
- v.Aux = sym
- v.AddArg(ptr)
- v.AddArg(mem)
- return true
- }
- // match: (MOVBstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
- // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
- for {
- off1 := v.AuxInt
- sym1 := v.Aux
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDaddr {
+ _ = x1.Args[2]
+ p1 := x1.Args[0]
+ if p1.Op != OpARM64ADD {
break
}
- off2 := v_0.AuxInt
- sym2 := v_0.Aux
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ x1_1 := x1.Args[1]
+ if x1_1.Op != OpARM64SRLconst {
break
}
- v.reset(OpARM64MOVBstorezero)
- v.AuxInt = off1 + off2
- v.Aux = mergeSym(sym1, sym2)
- v.AddArg(ptr)
- v.AddArg(mem)
- return true
- }
- // match: (MOVBstorezero [i] {s} ptr0 x:(MOVBstorezero [j] {s} ptr1 mem))
- // cond: x.Uses == 1 && areAdjacentOffsets(i,j,1) && is32Bit(min(i,j)) && isSamePtr(ptr0, ptr1) && clobber(x)
- // result: (MOVHstorezero [min(i,j)] {s} ptr0 mem)
- for {
- i := v.AuxInt
- s := v.Aux
- _ = v.Args[1]
- ptr0 := v.Args[0]
- x := v.Args[1]
- if x.Op != OpARM64MOVBstorezero {
+ if x1_1.AuxInt != 16 {
break
}
- j := x.AuxInt
- if x.Aux != s {
+ x1_1_0 := x1_1.Args[0]
+ if x1_1_0.Op != OpARM64MOVDreg {
break
}
- _ = x.Args[1]
- ptr1 := x.Args[0]
- mem := x.Args[1]
- if !(x.Uses == 1 && areAdjacentOffsets(i, j, 1) && is32Bit(min(i, j)) && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ if w != x1_1_0.Args[0] {
break
}
- v.reset(OpARM64MOVHstorezero)
- v.AuxInt = min(i, j)
- v.Aux = s
+ x2 := x1.Args[2]
+ if x2.Op != OpARM64MOVBstoreidx {
+ break
+ }
+ _ = x2.Args[3]
+ ptr0 := x2.Args[0]
+ idx0 := x2.Args[1]
+ x2_2 := x2.Args[2]
+ if x2_2.Op != OpARM64SRLconst {
+ break
+ }
+ if x2_2.AuxInt != 24 {
+ break
+ }
+ x2_2_0 := x2_2.Args[0]
+ if x2_2_0.Op != OpARM64MOVDreg {
+ break
+ }
+ if w != x2_2_0.Args[0] {
+ break
+ }
+ mem := x2.Args[3]
+ if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2)) {
+ break
+ }
+ v.reset(OpARM64MOVWstoreidx)
v.AddArg(ptr0)
+ v.AddArg(idx0)
+ v0 := b.NewValue0(v.Pos, OpARM64REVW, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
v.AddArg(mem)
return true
}
return false
}
-func rewriteValueARM64_OpARM64MOVDload_0(v *Value) bool {
+func rewriteValueARM64_OpARM64MOVBstore_30(v *Value) bool {
b := v.Block
_ = b
- config := b.Func.Config
- _ = config
- // match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
- // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVDload [off1+off2] {sym} ptr mem)
+ // match: (MOVBstore [i] {s} ptr w x0:(MOVBstore [i-1] {s} ptr (SRLconst [8] w) x1:(MOVBstore [i-2] {s} ptr (SRLconst [16] w) x2:(MOVBstore [i-3] {s} ptr (SRLconst [24] w) mem))))
+ // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)
+ // result: (MOVWstore [i-3] {s} ptr (REVW <w.Type> w) mem)
for {
- off1 := v.AuxInt
- sym := v.Aux
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64ADDconst {
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ w := v.Args[1]
+ x0 := v.Args[2]
+ if x0.Op != OpARM64MOVBstore {
break
}
- off2 := v_0.AuxInt
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ if x0.AuxInt != i-1 {
break
}
- v.reset(OpARM64MOVDload)
- v.AuxInt = off1 + off2
- v.Aux = sym
- v.AddArg(ptr)
- v.AddArg(mem)
- return true
- }
- // match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
- // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
- for {
- off1 := v.AuxInt
- sym1 := v.Aux
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDaddr {
+ if x0.Aux != s {
break
}
- off2 := v_0.AuxInt
- sym2 := v_0.Aux
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ _ = x0.Args[2]
+ if ptr != x0.Args[0] {
break
}
- v.reset(OpARM64MOVDload)
- v.AuxInt = off1 + off2
- v.Aux = mergeSym(sym1, sym2)
- v.AddArg(ptr)
- v.AddArg(mem)
- return true
- }
- // match: (MOVDload [off] {sym} ptr (MOVDstorezero [off2] {sym2} ptr2 _))
- // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
- // result: (MOVDconst [0])
- for {
- off := v.AuxInt
- sym := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDstorezero {
+ x0_1 := x0.Args[1]
+ if x0_1.Op != OpARM64SRLconst {
break
}
- off2 := v_1.AuxInt
- sym2 := v_1.Aux
- _ = v_1.Args[1]
- ptr2 := v_1.Args[0]
- if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
+ if x0_1.AuxInt != 8 {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 0
- return true
- }
- return false
-}
-func rewriteValueARM64_OpARM64MOVDreg_0(v *Value) bool {
- // match: (MOVDreg x)
- // cond: x.Uses == 1
- // result: (MOVDnop x)
- for {
- x := v.Args[0]
- if !(x.Uses == 1) {
+ if w != x0_1.Args[0] {
break
}
- v.reset(OpARM64MOVDnop)
- v.AddArg(x)
- return true
- }
- // match: (MOVDreg (MOVDconst [c]))
- // cond:
- // result: (MOVDconst [c])
- for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ x1 := x0.Args[2]
+ if x1.Op != OpARM64MOVBstore {
break
}
- c := v_0.AuxInt
- v.reset(OpARM64MOVDconst)
- v.AuxInt = c
- return true
- }
- return false
-}
-func rewriteValueARM64_OpARM64MOVDstore_0(v *Value) bool {
- b := v.Block
- _ = b
- config := b.Func.Config
- _ = config
- // match: (MOVDstore ptr (FMOVDfpgp val) mem)
- // cond:
- // result: (FMOVDstore ptr val mem)
- for {
- _ = v.Args[2]
- ptr := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64FMOVDfpgp {
+ if x1.AuxInt != i-2 {
break
}
- val := v_1.Args[0]
- mem := v.Args[2]
- v.reset(OpARM64FMOVDstore)
- v.AddArg(ptr)
- v.AddArg(val)
- v.AddArg(mem)
- return true
- }
- // match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
- // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVDstore [off1+off2] {sym} ptr val mem)
- for {
- off1 := v.AuxInt
- sym := v.Aux
- _ = v.Args[2]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64ADDconst {
+ if x1.Aux != s {
break
}
- off2 := v_0.AuxInt
- ptr := v_0.Args[0]
- val := v.Args[1]
- mem := v.Args[2]
- if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ _ = x1.Args[2]
+ if ptr != x1.Args[0] {
break
}
- v.reset(OpARM64MOVDstore)
- v.AuxInt = off1 + off2
- v.Aux = sym
- v.AddArg(ptr)
- v.AddArg(val)
- v.AddArg(mem)
- return true
- }
- // match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
- // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
- for {
- off1 := v.AuxInt
- sym1 := v.Aux
- _ = v.Args[2]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDaddr {
+ x1_1 := x1.Args[1]
+ if x1_1.Op != OpARM64SRLconst {
break
}
- off2 := v_0.AuxInt
- sym2 := v_0.Aux
- ptr := v_0.Args[0]
- val := v.Args[1]
- mem := v.Args[2]
- if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ if x1_1.AuxInt != 16 {
break
}
- v.reset(OpARM64MOVDstore)
- v.AuxInt = off1 + off2
- v.Aux = mergeSym(sym1, sym2)
- v.AddArg(ptr)
- v.AddArg(val)
- v.AddArg(mem)
- return true
- }
- // match: (MOVDstore [off] {sym} ptr (MOVDconst [0]) mem)
- // cond:
- // result: (MOVDstorezero [off] {sym} ptr mem)
- for {
- off := v.AuxInt
- sym := v.Aux
- _ = v.Args[2]
- ptr := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ if w != x1_1.Args[0] {
break
}
- if v_1.AuxInt != 0 {
+ x2 := x1.Args[2]
+ if x2.Op != OpARM64MOVBstore {
break
}
- mem := v.Args[2]
- v.reset(OpARM64MOVDstorezero)
- v.AuxInt = off
- v.Aux = sym
- v.AddArg(ptr)
- v.AddArg(mem)
- return true
- }
- return false
-}
-func rewriteValueARM64_OpARM64MOVDstorezero_0(v *Value) bool {
- b := v.Block
- _ = b
- config := b.Func.Config
- _ = config
- // match: (MOVDstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
- // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVDstorezero [off1+off2] {sym} ptr mem)
- for {
- off1 := v.AuxInt
- sym := v.Aux
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64ADDconst {
+ if x2.AuxInt != i-3 {
break
}
- off2 := v_0.AuxInt
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ if x2.Aux != s {
break
}
- v.reset(OpARM64MOVDstorezero)
- v.AuxInt = off1 + off2
- v.Aux = sym
- v.AddArg(ptr)
- v.AddArg(mem)
- return true
- }
- // match: (MOVDstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
- // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
- for {
- off1 := v.AuxInt
- sym1 := v.Aux
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDaddr {
+ _ = x2.Args[2]
+ if ptr != x2.Args[0] {
break
}
- off2 := v_0.AuxInt
- sym2 := v_0.Aux
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ x2_1 := x2.Args[1]
+ if x2_1.Op != OpARM64SRLconst {
break
}
- v.reset(OpARM64MOVDstorezero)
- v.AuxInt = off1 + off2
- v.Aux = mergeSym(sym1, sym2)
+ if x2_1.AuxInt != 24 {
+ break
+ }
+ if w != x2_1.Args[0] {
+ break
+ }
+ mem := x2.Args[2]
+ if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && clobber(x0) && clobber(x1) && clobber(x2)) {
+ break
+ }
+ v.reset(OpARM64MOVWstore)
+ v.AuxInt = i - 3
+ v.Aux = s
v.AddArg(ptr)
+ v0 := b.NewValue0(v.Pos, OpARM64REVW, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
v.AddArg(mem)
return true
}
- // match: (MOVDstorezero [i] {s} ptr0 x:(MOVDstorezero [j] {s} ptr1 mem))
- // cond: x.Uses == 1 && areAdjacentOffsets(i,j,8) && is32Bit(min(i,j)) && isSamePtr(ptr0, ptr1) && clobber(x)
- // result: (MOVQstorezero [min(i,j)] {s} ptr0 mem)
+ // match: (MOVBstore [3] {s} p w x0:(MOVBstore [2] {s} p (SRLconst [8] w) x1:(MOVBstore [1] {s} p1:(ADD ptr1 idx1) (SRLconst [16] w) x2:(MOVBstoreidx ptr0 idx0 (SRLconst [24] w) mem))))
+ // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2)
+ // result: (MOVWstoreidx ptr0 idx0 (REVW <w.Type> w) mem)
for {
- i := v.AuxInt
+ if v.AuxInt != 3 {
+ break
+ }
s := v.Aux
- _ = v.Args[1]
- ptr0 := v.Args[0]
- x := v.Args[1]
- if x.Op != OpARM64MOVDstorezero {
+ _ = v.Args[2]
+ p := v.Args[0]
+ w := v.Args[1]
+ x0 := v.Args[2]
+ if x0.Op != OpARM64MOVBstore {
break
}
- j := x.AuxInt
- if x.Aux != s {
+ if x0.AuxInt != 2 {
break
}
- _ = x.Args[1]
- ptr1 := x.Args[0]
- mem := x.Args[1]
- if !(x.Uses == 1 && areAdjacentOffsets(i, j, 8) && is32Bit(min(i, j)) && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ if x0.Aux != s {
break
}
- v.reset(OpARM64MOVQstorezero)
- v.AuxInt = min(i, j)
- v.Aux = s
- v.AddArg(ptr0)
- v.AddArg(mem)
- return true
- }
- return false
-}
-func rewriteValueARM64_OpARM64MOVHUload_0(v *Value) bool {
- b := v.Block
- _ = b
- config := b.Func.Config
- _ = config
- // match: (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem)
- // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVHUload [off1+off2] {sym} ptr mem)
- for {
- off1 := v.AuxInt
- sym := v.Aux
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64ADDconst {
+ _ = x0.Args[2]
+ if p != x0.Args[0] {
break
}
- off2 := v_0.AuxInt
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ x0_1 := x0.Args[1]
+ if x0_1.Op != OpARM64SRLconst {
break
}
- v.reset(OpARM64MOVHUload)
- v.AuxInt = off1 + off2
- v.Aux = sym
- v.AddArg(ptr)
- v.AddArg(mem)
- return true
- }
- // match: (MOVHUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
- // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
- for {
- off1 := v.AuxInt
- sym1 := v.Aux
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDaddr {
+ if x0_1.AuxInt != 8 {
break
}
- off2 := v_0.AuxInt
- sym2 := v_0.Aux
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ if w != x0_1.Args[0] {
break
}
- v.reset(OpARM64MOVHUload)
- v.AuxInt = off1 + off2
- v.Aux = mergeSym(sym1, sym2)
- v.AddArg(ptr)
- v.AddArg(mem)
- return true
- }
- // match: (MOVHUload [off] {sym} ptr (MOVHstorezero [off2] {sym2} ptr2 _))
- // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
- // result: (MOVDconst [0])
- for {
- off := v.AuxInt
- sym := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVHstorezero {
+ x1 := x0.Args[2]
+ if x1.Op != OpARM64MOVBstore {
break
}
- off2 := v_1.AuxInt
- sym2 := v_1.Aux
- _ = v_1.Args[1]
- ptr2 := v_1.Args[0]
- if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
+ if x1.AuxInt != 1 {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 0
- return true
- }
- return false
-}
-func rewriteValueARM64_OpARM64MOVHUreg_0(v *Value) bool {
- // match: (MOVHUreg x:(MOVBUload _ _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVBUload {
+ if x1.Aux != s {
break
}
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVHUreg x:(MOVHUload _ _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVHUload {
+ _ = x1.Args[2]
+ p1 := x1.Args[0]
+ if p1.Op != OpARM64ADD {
break
}
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVHUreg x:(MOVBUreg _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVBUreg {
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ x1_1 := x1.Args[1]
+ if x1_1.Op != OpARM64SRLconst {
break
}
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVHUreg x:(MOVHUreg _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVHUreg {
+ if x1_1.AuxInt != 16 {
break
}
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVHUreg (ANDconst [c] x))
- // cond:
- // result: (ANDconst [c&(1<<16-1)] x)
- for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64ANDconst {
+ if w != x1_1.Args[0] {
break
}
- c := v_0.AuxInt
- x := v_0.Args[0]
- v.reset(OpARM64ANDconst)
- v.AuxInt = c & (1<<16 - 1)
- v.AddArg(x)
- return true
- }
- // match: (MOVHUreg (MOVDconst [c]))
- // cond:
- // result: (MOVDconst [int64(uint16(c))])
- for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ x2 := x1.Args[2]
+ if x2.Op != OpARM64MOVBstoreidx {
break
}
- c := v_0.AuxInt
- v.reset(OpARM64MOVDconst)
- v.AuxInt = int64(uint16(c))
- return true
- }
- // match: (MOVHUreg (SLLconst [sc] x))
- // cond: isARM64BFMask(sc, 1<<16-1, sc)
- // result: (UBFIZ [arm64BFAuxInt(sc, arm64BFWidth(1<<16-1, sc))] x)
- for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64SLLconst {
+ _ = x2.Args[3]
+ ptr0 := x2.Args[0]
+ idx0 := x2.Args[1]
+ x2_2 := x2.Args[2]
+ if x2_2.Op != OpARM64SRLconst {
break
}
- sc := v_0.AuxInt
- x := v_0.Args[0]
- if !(isARM64BFMask(sc, 1<<16-1, sc)) {
+ if x2_2.AuxInt != 24 {
break
}
- v.reset(OpARM64UBFIZ)
- v.AuxInt = arm64BFAuxInt(sc, arm64BFWidth(1<<16-1, sc))
- v.AddArg(x)
- return true
- }
- // match: (MOVHUreg (SRLconst [sc] x))
- // cond: isARM64BFMask(sc, 1<<16-1, 0)
- // result: (UBFX [arm64BFAuxInt(sc, 16)] x)
- for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64SRLconst {
+ if w != x2_2.Args[0] {
break
}
- sc := v_0.AuxInt
- x := v_0.Args[0]
- if !(isARM64BFMask(sc, 1<<16-1, 0)) {
+ mem := x2.Args[3]
+ if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2)) {
break
}
- v.reset(OpARM64UBFX)
- v.AuxInt = arm64BFAuxInt(sc, 16)
- v.AddArg(x)
+ v.reset(OpARM64MOVWstoreidx)
+ v.AddArg(ptr0)
+ v.AddArg(idx0)
+ v0 := b.NewValue0(v.Pos, OpARM64REVW, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
+ v.AddArg(mem)
return true
}
- return false
-}
-func rewriteValueARM64_OpARM64MOVHload_0(v *Value) bool {
- b := v.Block
- _ = b
- config := b.Func.Config
- _ = config
- // match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem)
- // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVHload [off1+off2] {sym} ptr mem)
+ // match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (SRLconst [8] w) mem))
+ // cond: x.Uses == 1 && clobber(x)
+ // result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
for {
- off1 := v.AuxInt
- sym := v.Aux
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64ADDconst {
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ w := v.Args[1]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstore {
break
}
- off2 := v_0.AuxInt
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ if x.AuxInt != i-1 {
break
}
- v.reset(OpARM64MOVHload)
- v.AuxInt = off1 + off2
- v.Aux = sym
- v.AddArg(ptr)
- v.AddArg(mem)
- return true
- }
- // match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
- // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
- for {
- off1 := v.AuxInt
- sym1 := v.Aux
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDaddr {
+ if x.Aux != s {
break
}
- off2 := v_0.AuxInt
- sym2 := v_0.Aux
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ _ = x.Args[2]
+ if ptr != x.Args[0] {
break
}
- v.reset(OpARM64MOVHload)
- v.AuxInt = off1 + off2
- v.Aux = mergeSym(sym1, sym2)
+ x_1 := x.Args[1]
+ if x_1.Op != OpARM64SRLconst {
+ break
+ }
+ if x_1.AuxInt != 8 {
+ break
+ }
+ if w != x_1.Args[0] {
+ break
+ }
+ mem := x.Args[2]
+ if !(x.Uses == 1 && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = i - 1
+ v.Aux = s
v.AddArg(ptr)
+ v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
v.AddArg(mem)
return true
}
- // match: (MOVHload [off] {sym} ptr (MOVHstorezero [off2] {sym2} ptr2 _))
- // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
- // result: (MOVDconst [0])
+ // match: (MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (SRLconst [8] w) mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
for {
- off := v.AuxInt
- sym := v.Aux
- _ = v.Args[1]
- ptr := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVHstorezero {
+ if v.AuxInt != 1 {
break
}
- off2 := v_1.AuxInt
- sym2 := v_1.Aux
- _ = v_1.Args[1]
- ptr2 := v_1.Args[0]
- if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
+ s := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 0
- return true
- }
- return false
-}
-func rewriteValueARM64_OpARM64MOVHreg_0(v *Value) bool {
- // match: (MOVHreg x:(MOVBload _ _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVBload {
+ _ = v_0.Args[1]
+ ptr1 := v_0.Args[0]
+ idx1 := v_0.Args[1]
+ w := v.Args[1]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstoreidx {
break
}
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVHreg x:(MOVBUload _ _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVBUload {
+ _ = x.Args[3]
+ ptr0 := x.Args[0]
+ idx0 := x.Args[1]
+ x_2 := x.Args[2]
+ if x_2.Op != OpARM64SRLconst {
break
}
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVHreg x:(MOVHload _ _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVHload {
+ if x_2.AuxInt != 8 {
break
}
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVHreg x:(MOVBreg _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVBreg {
+ if w != x_2.Args[0] {
break
}
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVHreg x:(MOVBUreg _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVBUreg {
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr0)
+ v.AddArg(idx0)
+ v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
+ v.AddArg(mem)
return true
}
- // match: (MOVHreg x:(MOVHreg _))
- // cond:
- // result: (MOVDreg x)
+ // match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (UBFX [arm64BFAuxInt(8, 8)] w) mem))
+ // cond: x.Uses == 1 && clobber(x)
+ // result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
for {
- x := v.Args[0]
- if x.Op != OpARM64MOVHreg {
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ w := v.Args[1]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstore {
break
}
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVHreg (MOVDconst [c]))
- // cond:
- // result: (MOVDconst [int64(int16(c))])
- for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ if x.AuxInt != i-1 {
break
}
- c := v_0.AuxInt
- v.reset(OpARM64MOVDconst)
- v.AuxInt = int64(int16(c))
- return true
- }
- // match: (MOVHreg (SLLconst [lc] x))
- // cond: lc < 16
- // result: (SBFIZ [arm64BFAuxInt(lc, 16-lc)] x)
- for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64SLLconst {
+ if x.Aux != s {
break
}
- lc := v_0.AuxInt
- x := v_0.Args[0]
- if !(lc < 16) {
+ _ = x.Args[2]
+ if ptr != x.Args[0] {
break
}
- v.reset(OpARM64SBFIZ)
- v.AuxInt = arm64BFAuxInt(lc, 16-lc)
- v.AddArg(x)
- return true
- }
- return false
-}
-func rewriteValueARM64_OpARM64MOVHstore_0(v *Value) bool {
- b := v.Block
- _ = b
- config := b.Func.Config
- _ = config
- // match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem)
- // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVHstore [off1+off2] {sym} ptr val mem)
- for {
- off1 := v.AuxInt
- sym := v.Aux
- _ = v.Args[2]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64ADDconst {
+ x_1 := x.Args[1]
+ if x_1.Op != OpARM64UBFX {
break
}
- off2 := v_0.AuxInt
- ptr := v_0.Args[0]
- val := v.Args[1]
- mem := v.Args[2]
- if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ if x_1.AuxInt != arm64BFAuxInt(8, 8) {
+ break
+ }
+ if w != x_1.Args[0] {
+ break
+ }
+ mem := x.Args[2]
+ if !(x.Uses == 1 && clobber(x)) {
break
}
v.reset(OpARM64MOVHstore)
- v.AuxInt = off1 + off2
- v.Aux = sym
+ v.AuxInt = i - 1
+ v.Aux = s
v.AddArg(ptr)
- v.AddArg(val)
+ v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
v.AddArg(mem)
return true
}
- // match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
- // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
+ // match: (MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (UBFX [arm64BFAuxInt(8, 8)] w) mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
for {
- off1 := v.AuxInt
- sym1 := v.Aux
+ if v.AuxInt != 1 {
+ break
+ }
+ s := v.Aux
_ = v.Args[2]
v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDaddr {
+ if v_0.Op != OpARM64ADD {
break
}
- off2 := v_0.AuxInt
- sym2 := v_0.Aux
- ptr := v_0.Args[0]
- val := v.Args[1]
- mem := v.Args[2]
- if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ _ = v_0.Args[1]
+ ptr1 := v_0.Args[0]
+ idx1 := v_0.Args[1]
+ w := v.Args[1]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstoreidx {
break
}
- v.reset(OpARM64MOVHstore)
- v.AuxInt = off1 + off2
- v.Aux = mergeSym(sym1, sym2)
- v.AddArg(ptr)
- v.AddArg(val)
+ _ = x.Args[3]
+ ptr0 := x.Args[0]
+ idx0 := x.Args[1]
+ x_2 := x.Args[2]
+ if x_2.Op != OpARM64UBFX {
+ break
+ }
+ if x_2.AuxInt != arm64BFAuxInt(8, 8) {
+ break
+ }
+ if w != x_2.Args[0] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr0)
+ v.AddArg(idx0)
+ v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
v.AddArg(mem)
return true
}
- // match: (MOVHstore [off] {sym} ptr (MOVDconst [0]) mem)
- // cond:
- // result: (MOVHstorezero [off] {sym} ptr mem)
+ // match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (SRLconst [8] (MOVDreg w)) mem))
+ // cond: x.Uses == 1 && clobber(x)
+ // result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
for {
- off := v.AuxInt
- sym := v.Aux
+ i := v.AuxInt
+ s := v.Aux
_ = v.Args[2]
ptr := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ w := v.Args[1]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstore {
break
}
- if v_1.AuxInt != 0 {
+ if x.AuxInt != i-1 {
break
}
- mem := v.Args[2]
- v.reset(OpARM64MOVHstorezero)
- v.AuxInt = off
- v.Aux = sym
+ if x.Aux != s {
+ break
+ }
+ _ = x.Args[2]
+ if ptr != x.Args[0] {
+ break
+ }
+ x_1 := x.Args[1]
+ if x_1.Op != OpARM64SRLconst {
+ break
+ }
+ if x_1.AuxInt != 8 {
+ break
+ }
+ x_1_0 := x_1.Args[0]
+ if x_1_0.Op != OpARM64MOVDreg {
+ break
+ }
+ if w != x_1_0.Args[0] {
+ break
+ }
+ mem := x.Args[2]
+ if !(x.Uses == 1 && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = i - 1
+ v.Aux = s
v.AddArg(ptr)
+ v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
v.AddArg(mem)
return true
}
- // match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
- // cond:
- // result: (MOVHstore [off] {sym} ptr x mem)
+ // match: (MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (SRLconst [8] (MOVDreg w)) mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
for {
- off := v.AuxInt
- sym := v.Aux
+ if v.AuxInt != 1 {
+ break
+ }
+ s := v.Aux
_ = v.Args[2]
- ptr := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVHreg {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
break
}
- x := v_1.Args[0]
- mem := v.Args[2]
- v.reset(OpARM64MOVHstore)
- v.AuxInt = off
- v.Aux = sym
- v.AddArg(ptr)
- v.AddArg(x)
- v.AddArg(mem)
- return true
- }
- // match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
- // cond:
- // result: (MOVHstore [off] {sym} ptr x mem)
- for {
- off := v.AuxInt
- sym := v.Aux
- _ = v.Args[2]
- ptr := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVHUreg {
+ _ = v_0.Args[1]
+ ptr1 := v_0.Args[0]
+ idx1 := v_0.Args[1]
+ w := v.Args[1]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstoreidx {
break
}
- x := v_1.Args[0]
- mem := v.Args[2]
- v.reset(OpARM64MOVHstore)
- v.AuxInt = off
- v.Aux = sym
- v.AddArg(ptr)
- v.AddArg(x)
- v.AddArg(mem)
- return true
- }
- // match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
- // cond:
- // result: (MOVHstore [off] {sym} ptr x mem)
- for {
- off := v.AuxInt
- sym := v.Aux
- _ = v.Args[2]
- ptr := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVWreg {
+ _ = x.Args[3]
+ ptr0 := x.Args[0]
+ idx0 := x.Args[1]
+ x_2 := x.Args[2]
+ if x_2.Op != OpARM64SRLconst {
break
}
- x := v_1.Args[0]
- mem := v.Args[2]
- v.reset(OpARM64MOVHstore)
- v.AuxInt = off
- v.Aux = sym
- v.AddArg(ptr)
- v.AddArg(x)
- v.AddArg(mem)
- return true
- }
- // match: (MOVHstore [off] {sym} ptr (MOVWUreg x) mem)
- // cond:
- // result: (MOVHstore [off] {sym} ptr x mem)
- for {
- off := v.AuxInt
- sym := v.Aux
- _ = v.Args[2]
- ptr := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVWUreg {
+ if x_2.AuxInt != 8 {
break
}
- x := v_1.Args[0]
- mem := v.Args[2]
- v.reset(OpARM64MOVHstore)
- v.AuxInt = off
- v.Aux = sym
- v.AddArg(ptr)
- v.AddArg(x)
+ x_2_0 := x_2.Args[0]
+ if x_2_0.Op != OpARM64MOVDreg {
+ break
+ }
+ if w != x_2_0.Args[0] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr0)
+ v.AddArg(idx0)
+ v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
v.AddArg(mem)
return true
}
- // match: (MOVHstore [i] {s} ptr0 (SRLconst [16] w) x:(MOVHstore [i-2] {s} ptr1 w mem))
- // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
- // result: (MOVWstore [i-2] {s} ptr0 w mem)
+ // match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (UBFX [arm64BFAuxInt(8, 24)] w) mem))
+ // cond: x.Uses == 1 && clobber(x)
+ // result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
for {
i := v.AuxInt
s := v.Aux
_ = v.Args[2]
- ptr0 := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64SRLconst {
+ ptr := v.Args[0]
+ w := v.Args[1]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstore {
break
}
- if v_1.AuxInt != 16 {
+ if x.AuxInt != i-1 {
break
}
- w := v_1.Args[0]
- x := v.Args[2]
- if x.Op != OpARM64MOVHstore {
+ if x.Aux != s {
break
}
- if x.AuxInt != i-2 {
+ _ = x.Args[2]
+ if ptr != x.Args[0] {
break
}
- if x.Aux != s {
+ x_1 := x.Args[1]
+ if x_1.Op != OpARM64UBFX {
break
}
- _ = x.Args[2]
- ptr1 := x.Args[0]
- if w != x.Args[1] {
+ if x_1.AuxInt != arm64BFAuxInt(8, 24) {
+ break
+ }
+ if w != x_1.Args[0] {
break
}
mem := x.Args[2]
- if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ if !(x.Uses == 1 && clobber(x)) {
break
}
- v.reset(OpARM64MOVWstore)
- v.AuxInt = i - 2
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = i - 1
v.Aux = s
- v.AddArg(ptr0)
- v.AddArg(w)
+ v.AddArg(ptr)
+ v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
v.AddArg(mem)
return true
}
- // match: (MOVHstore [i] {s} ptr0 (UBFX [arm64BFAuxInt(16, 16)] w) x:(MOVHstore [i-2] {s} ptr1 w mem))
- // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
- // result: (MOVWstore [i-2] {s} ptr0 w mem)
+ // match: (MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (UBFX [arm64BFAuxInt(8, 24)] w) mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
for {
- i := v.AuxInt
- s := v.Aux
- _ = v.Args[2]
- ptr0 := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64UBFX {
+ if v.AuxInt != 1 {
break
}
- if v_1.AuxInt != arm64BFAuxInt(16, 16) {
+ s := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
break
}
- w := v_1.Args[0]
+ _ = v_0.Args[1]
+ ptr1 := v_0.Args[0]
+ idx1 := v_0.Args[1]
+ w := v.Args[1]
x := v.Args[2]
- if x.Op != OpARM64MOVHstore {
+ if x.Op != OpARM64MOVBstoreidx {
break
}
- if x.AuxInt != i-2 {
+ _ = x.Args[3]
+ ptr0 := x.Args[0]
+ idx0 := x.Args[1]
+ x_2 := x.Args[2]
+ if x_2.Op != OpARM64UBFX {
break
}
- if x.Aux != s {
+ if x_2.AuxInt != arm64BFAuxInt(8, 24) {
break
}
- _ = x.Args[2]
- ptr1 := x.Args[0]
- if w != x.Args[1] {
+ if w != x_2.Args[0] {
break
}
- mem := x.Args[2]
- if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
- v.reset(OpARM64MOVWstore)
- v.AuxInt = i - 2
- v.Aux = s
+ v.reset(OpARM64MOVHstoreidx)
v.AddArg(ptr0)
- v.AddArg(w)
+ v.AddArg(idx0)
+ v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
v.AddArg(mem)
return true
}
- // match: (MOVHstore [i] {s} ptr0 (SRLconst [16] (MOVDreg w)) x:(MOVHstore [i-2] {s} ptr1 w mem))
- // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
- // result: (MOVWstore [i-2] {s} ptr0 w mem)
+ return false
+}
+func rewriteValueARM64_OpARM64MOVBstore_40(v *Value) bool {
+ b := v.Block
+ _ = b
+ // match: (MOVBstore [i] {s} ptr w x:(MOVBstore [i-1] {s} ptr (SRLconst [8] (MOVDreg w)) mem))
+ // cond: x.Uses == 1 && clobber(x)
+ // result: (MOVHstore [i-1] {s} ptr (REV16W <w.Type> w) mem)
for {
i := v.AuxInt
s := v.Aux
_ = v.Args[2]
- ptr0 := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64SRLconst {
+ ptr := v.Args[0]
+ w := v.Args[1]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVBstore {
break
}
- if v_1.AuxInt != 16 {
+ if x.AuxInt != i-1 {
break
}
- v_1_0 := v_1.Args[0]
- if v_1_0.Op != OpARM64MOVDreg {
+ if x.Aux != s {
break
}
- w := v_1_0.Args[0]
- x := v.Args[2]
- if x.Op != OpARM64MOVHstore {
+ _ = x.Args[2]
+ if ptr != x.Args[0] {
break
}
- if x.AuxInt != i-2 {
+ x_1 := x.Args[1]
+ if x_1.Op != OpARM64SRLconst {
break
}
- if x.Aux != s {
+ if x_1.AuxInt != 8 {
break
}
- _ = x.Args[2]
- ptr1 := x.Args[0]
- if w != x.Args[1] {
+ x_1_0 := x_1.Args[0]
+ if x_1_0.Op != OpARM64MOVDreg {
+ break
+ }
+ if w != x_1_0.Args[0] {
break
}
mem := x.Args[2]
- if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ if !(x.Uses == 1 && clobber(x)) {
break
}
- v.reset(OpARM64MOVWstore)
- v.AuxInt = i - 2
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = i - 1
v.Aux = s
- v.AddArg(ptr0)
- v.AddArg(w)
+ v.AddArg(ptr)
+ v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
v.AddArg(mem)
return true
}
- return false
-}
-func rewriteValueARM64_OpARM64MOVHstore_10(v *Value) bool {
- // match: (MOVHstore [i] {s} ptr0 (SRLconst [j] w) x:(MOVHstore [i-2] {s} ptr1 w0:(SRLconst [j-16] w) mem))
- // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
- // result: (MOVWstore [i-2] {s} ptr0 w0 mem)
+ // match: (MOVBstore [1] {s} (ADD ptr1 idx1) w x:(MOVBstoreidx ptr0 idx0 (SRLconst [8] (MOVDreg w)) mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVHstoreidx ptr0 idx0 (REV16W <w.Type> w) mem)
for {
- i := v.AuxInt
+ if v.AuxInt != 1 {
+ break
+ }
s := v.Aux
_ = v.Args[2]
- ptr0 := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64SRLconst {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
break
}
- j := v_1.AuxInt
- w := v_1.Args[0]
+ _ = v_0.Args[1]
+ ptr1 := v_0.Args[0]
+ idx1 := v_0.Args[1]
+ w := v.Args[1]
x := v.Args[2]
- if x.Op != OpARM64MOVHstore {
- break
- }
- if x.AuxInt != i-2 {
+ if x.Op != OpARM64MOVBstoreidx {
break
}
- if x.Aux != s {
+ _ = x.Args[3]
+ ptr0 := x.Args[0]
+ idx0 := x.Args[1]
+ x_2 := x.Args[2]
+ if x_2.Op != OpARM64SRLconst {
break
}
- _ = x.Args[2]
- ptr1 := x.Args[0]
- w0 := x.Args[1]
- if w0.Op != OpARM64SRLconst {
+ if x_2.AuxInt != 8 {
break
}
- if w0.AuxInt != j-16 {
+ x_2_0 := x_2.Args[0]
+ if x_2_0.Op != OpARM64MOVDreg {
break
}
- if w != w0.Args[0] {
+ if w != x_2_0.Args[0] {
break
}
- mem := x.Args[2]
- if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
- v.reset(OpARM64MOVWstore)
- v.AuxInt = i - 2
- v.Aux = s
+ v.reset(OpARM64MOVHstoreidx)
v.AddArg(ptr0)
- v.AddArg(w0)
+ v.AddArg(idx0)
+ v0 := b.NewValue0(v.Pos, OpARM64REV16W, w.Type)
+ v0.AddArg(w)
+ v.AddArg(v0)
v.AddArg(mem)
return true
}
return false
}
-func rewriteValueARM64_OpARM64MOVHstorezero_0(v *Value) bool {
- b := v.Block
- _ = b
- config := b.Func.Config
- _ = config
- // match: (MOVHstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
- // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVHstorezero [off1+off2] {sym} ptr mem)
+func rewriteValueARM64_OpARM64MOVBstoreidx_0(v *Value) bool {
+ // match: (MOVBstoreidx ptr (MOVDconst [c]) val mem)
+ // cond:
+ // result: (MOVBstore [c] ptr val mem)
for {
- off1 := v.AuxInt
- sym := v.Aux
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64ADDconst {
- break
- }
- off2 := v_0.AuxInt
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
break
}
- v.reset(OpARM64MOVHstorezero)
- v.AuxInt = off1 + off2
- v.Aux = sym
+ c := v_1.AuxInt
+ val := v.Args[2]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVBstore)
+ v.AuxInt = c
v.AddArg(ptr)
+ v.AddArg(val)
v.AddArg(mem)
return true
}
- // match: (MOVHstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
- // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
+ // match: (MOVBstoreidx (MOVDconst [c]) idx val mem)
+ // cond:
+ // result: (MOVBstore [c] idx val mem)
for {
- off1 := v.AuxInt
- sym1 := v.Aux
- _ = v.Args[1]
+ _ = v.Args[3]
v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDaddr {
+ if v_0.Op != OpARM64MOVDconst {
break
}
- off2 := v_0.AuxInt
- sym2 := v_0.Aux
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ c := v_0.AuxInt
+ idx := v.Args[1]
+ val := v.Args[2]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVBstore)
+ v.AuxInt = c
+ v.AddArg(idx)
+ v.AddArg(val)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBstoreidx ptr idx (MOVDconst [0]) mem)
+ // cond:
+ // result: (MOVBstorezeroidx ptr idx mem)
+ for {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVDconst {
break
}
- v.reset(OpARM64MOVHstorezero)
- v.AuxInt = off1 + off2
- v.Aux = mergeSym(sym1, sym2)
+ if v_2.AuxInt != 0 {
+ break
+ }
+ mem := v.Args[3]
+ v.reset(OpARM64MOVBstorezeroidx)
v.AddArg(ptr)
+ v.AddArg(idx)
v.AddArg(mem)
return true
}
- // match: (MOVHstorezero [i] {s} ptr0 x:(MOVHstorezero [j] {s} ptr1 mem))
- // cond: x.Uses == 1 && areAdjacentOffsets(i,j,2) && is32Bit(min(i,j)) && isSamePtr(ptr0, ptr1) && clobber(x)
- // result: (MOVWstorezero [min(i,j)] {s} ptr0 mem)
+ // match: (MOVBstoreidx ptr idx (MOVBreg x) mem)
+ // cond:
+ // result: (MOVBstoreidx ptr idx x mem)
for {
- i := v.AuxInt
- s := v.Aux
- _ = v.Args[1]
- ptr0 := v.Args[0]
- x := v.Args[1]
- if x.Op != OpARM64MOVHstorezero {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVBreg {
break
}
- j := x.AuxInt
- if x.Aux != s {
+ x := v_2.Args[0]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVBstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(x)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBstoreidx ptr idx (MOVBUreg x) mem)
+ // cond:
+ // result: (MOVBstoreidx ptr idx x mem)
+ for {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVBUreg {
break
}
- _ = x.Args[1]
- ptr1 := x.Args[0]
- mem := x.Args[1]
- if !(x.Uses == 1 && areAdjacentOffsets(i, j, 2) && is32Bit(min(i, j)) && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ x := v_2.Args[0]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVBstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(x)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBstoreidx ptr idx (MOVHreg x) mem)
+ // cond:
+ // result: (MOVBstoreidx ptr idx x mem)
+ for {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVHreg {
break
}
- v.reset(OpARM64MOVWstorezero)
- v.AuxInt = min(i, j)
- v.Aux = s
- v.AddArg(ptr0)
+ x := v_2.Args[0]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVBstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(x)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBstoreidx ptr idx (MOVHUreg x) mem)
+ // cond:
+ // result: (MOVBstoreidx ptr idx x mem)
+ for {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVHUreg {
+ break
+ }
+ x := v_2.Args[0]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVBstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(x)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBstoreidx ptr idx (MOVWreg x) mem)
+ // cond:
+ // result: (MOVBstoreidx ptr idx x mem)
+ for {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVWreg {
+ break
+ }
+ x := v_2.Args[0]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVBstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(x)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVBstoreidx ptr idx (MOVWUreg x) mem)
+ // cond:
+ // result: (MOVBstoreidx ptr idx x mem)
+ for {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVWUreg {
+ break
+ }
+ x := v_2.Args[0]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVBstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(x)
v.AddArg(mem)
return true
}
return false
}
-func rewriteValueARM64_OpARM64MOVQstorezero_0(v *Value) bool {
+func rewriteValueARM64_OpARM64MOVBstorezero_0(v *Value) bool {
b := v.Block
_ = b
config := b.Func.Config
_ = config
- // match: (MOVQstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
+ // match: (MOVBstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
// cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVQstorezero [off1+off2] {sym} ptr mem)
+ // result: (MOVBstorezero [off1+off2] {sym} ptr mem)
for {
off1 := v.AuxInt
sym := v.Aux
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpARM64MOVQstorezero)
+ v.reset(OpARM64MOVBstorezero)
v.AuxInt = off1 + off2
v.Aux = sym
v.AddArg(ptr)
v.AddArg(mem)
return true
}
- // match: (MOVQstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
+ // match: (MOVBstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVQstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
+ // result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for {
off1 := v.AuxInt
sym1 := v.Aux
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpARM64MOVQstorezero)
+ v.reset(OpARM64MOVBstorezero)
v.AuxInt = off1 + off2
v.Aux = mergeSym(sym1, sym2)
v.AddArg(ptr)
v.AddArg(mem)
return true
}
- return false
-}
-func rewriteValueARM64_OpARM64MOVWUload_0(v *Value) bool {
- b := v.Block
- _ = b
- config := b.Func.Config
- _ = config
- // match: (MOVWUload [off1] {sym} (ADDconst [off2] ptr) mem)
- // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVWUload [off1+off2] {sym} ptr mem)
+ // match: (MOVBstorezero [off] {sym} (ADD ptr idx) mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVBstorezeroidx ptr idx mem)
for {
- off1 := v.AuxInt
+ off := v.AuxInt
sym := v.Aux
_ = v.Args[1]
v_0 := v.Args[0]
- if v_0.Op != OpARM64ADDconst {
+ if v_0.Op != OpARM64ADD {
break
}
- off2 := v_0.AuxInt
+ _ = v_0.Args[1]
ptr := v_0.Args[0]
+ idx := v_0.Args[1]
mem := v.Args[1]
- if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ if !(off == 0 && sym == nil) {
break
}
- v.reset(OpARM64MOVWUload)
- v.AuxInt = off1 + off2
- v.Aux = sym
+ v.reset(OpARM64MOVBstorezeroidx)
v.AddArg(ptr)
+ v.AddArg(idx)
v.AddArg(mem)
return true
}
- // match: (MOVWUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
- // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVWUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
+ // match: (MOVBstorezero [i] {s} ptr0 x:(MOVBstorezero [j] {s} ptr1 mem))
+ // cond: x.Uses == 1 && areAdjacentOffsets(i,j,1) && is32Bit(min(i,j)) && isSamePtr(ptr0, ptr1) && clobber(x)
+ // result: (MOVHstorezero [min(i,j)] {s} ptr0 mem)
for {
- off1 := v.AuxInt
- sym1 := v.Aux
+ i := v.AuxInt
+ s := v.Aux
_ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDaddr {
+ ptr0 := v.Args[0]
+ x := v.Args[1]
+ if x.Op != OpARM64MOVBstorezero {
break
}
- off2 := v_0.AuxInt
- sym2 := v_0.Aux
- ptr := v_0.Args[0]
- mem := v.Args[1]
- if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ j := x.AuxInt
+ if x.Aux != s {
break
}
- v.reset(OpARM64MOVWUload)
- v.AuxInt = off1 + off2
- v.Aux = mergeSym(sym1, sym2)
- v.AddArg(ptr)
+ _ = x.Args[1]
+ ptr1 := x.Args[0]
+ mem := x.Args[1]
+ if !(x.Uses == 1 && areAdjacentOffsets(i, j, 1) && is32Bit(min(i, j)) && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstorezero)
+ v.AuxInt = min(i, j)
+ v.Aux = s
+ v.AddArg(ptr0)
v.AddArg(mem)
return true
}
- // match: (MOVWUload [off] {sym} ptr (MOVWstorezero [off2] {sym2} ptr2 _))
- // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
- // result: (MOVDconst [0])
+ // match: (MOVBstorezero [1] {s} (ADD ptr0 idx0) x:(MOVBstorezeroidx ptr1 idx1 mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVHstorezeroidx ptr1 idx1 mem)
for {
- off := v.AuxInt
- sym := v.Aux
+ if v.AuxInt != 1 {
+ break
+ }
+ s := v.Aux
_ = v.Args[1]
- ptr := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVWstorezero {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
break
}
- off2 := v_1.AuxInt
- sym2 := v_1.Aux
- _ = v_1.Args[1]
- ptr2 := v_1.Args[0]
- if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ x := v.Args[1]
+ if x.Op != OpARM64MOVBstorezeroidx {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 0
+ _ = x.Args[2]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ mem := x.Args[2]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVHstorezeroidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(mem)
return true
}
return false
}
-func rewriteValueARM64_OpARM64MOVWUreg_0(v *Value) bool {
- // match: (MOVWUreg x:(MOVBUload _ _))
+func rewriteValueARM64_OpARM64MOVBstorezeroidx_0(v *Value) bool {
+ // match: (MOVBstorezeroidx ptr (MOVDconst [c]) mem)
// cond:
- // result: (MOVDreg x)
+ // result: (MOVBstorezero [c] ptr mem)
for {
- x := v.Args[0]
- if x.Op != OpARM64MOVBUload {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
break
}
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
+ c := v_1.AuxInt
+ mem := v.Args[2]
+ v.reset(OpARM64MOVBstorezero)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
return true
}
- // match: (MOVWUreg x:(MOVHUload _ _))
+ // match: (MOVBstorezeroidx (MOVDconst [c]) idx mem)
// cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVHUload {
- break
- }
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVWUreg x:(MOVWUload _ _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVWUload {
- break
- }
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVWUreg x:(MOVBUreg _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVBUreg {
- break
- }
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVWUreg x:(MOVHUreg _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVHUreg {
- break
- }
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVWUreg x:(MOVWUreg _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVWUreg {
- break
- }
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVWUreg (ANDconst [c] x))
- // cond:
- // result: (ANDconst [c&(1<<32-1)] x)
- for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64ANDconst {
- break
- }
- c := v_0.AuxInt
- x := v_0.Args[0]
- v.reset(OpARM64ANDconst)
- v.AuxInt = c & (1<<32 - 1)
- v.AddArg(x)
- return true
- }
- // match: (MOVWUreg (MOVDconst [c]))
- // cond:
- // result: (MOVDconst [int64(uint32(c))])
+ // result: (MOVBstorezero [c] idx mem)
for {
+ _ = v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- v.reset(OpARM64MOVDconst)
- v.AuxInt = int64(uint32(c))
- return true
- }
- // match: (MOVWUreg (SLLconst [sc] x))
- // cond: isARM64BFMask(sc, 1<<32-1, sc)
- // result: (UBFIZ [arm64BFAuxInt(sc, arm64BFWidth(1<<32-1, sc))] x)
- for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64SLLconst {
- break
- }
- sc := v_0.AuxInt
- x := v_0.Args[0]
- if !(isARM64BFMask(sc, 1<<32-1, sc)) {
- break
- }
- v.reset(OpARM64UBFIZ)
- v.AuxInt = arm64BFAuxInt(sc, arm64BFWidth(1<<32-1, sc))
- v.AddArg(x)
- return true
- }
- // match: (MOVWUreg (SRLconst [sc] x))
- // cond: isARM64BFMask(sc, 1<<32-1, 0)
- // result: (UBFX [arm64BFAuxInt(sc, 32)] x)
- for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64SRLconst {
- break
- }
- sc := v_0.AuxInt
- x := v_0.Args[0]
- if !(isARM64BFMask(sc, 1<<32-1, 0)) {
- break
- }
- v.reset(OpARM64UBFX)
- v.AuxInt = arm64BFAuxInt(sc, 32)
- v.AddArg(x)
+ idx := v.Args[1]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVBstorezero)
+ v.AuxInt = c
+ v.AddArg(idx)
+ v.AddArg(mem)
return true
}
return false
}
-func rewriteValueARM64_OpARM64MOVWload_0(v *Value) bool {
+func rewriteValueARM64_OpARM64MOVDload_0(v *Value) bool {
b := v.Block
_ = b
config := b.Func.Config
_ = config
- // match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem)
+ // match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
// cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVWload [off1+off2] {sym} ptr mem)
+ // result: (MOVDload [off1+off2] {sym} ptr mem)
for {
off1 := v.AuxInt
sym := v.Aux
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpARM64MOVWload)
+ v.reset(OpARM64MOVDload)
v.AuxInt = off1 + off2
v.Aux = sym
v.AddArg(ptr)
v.AddArg(mem)
return true
}
- // match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
+ // match: (MOVDload [off] {sym} (ADD ptr idx) mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVDloadidx ptr idx mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ mem := v.Args[1]
+ if !(off == 0 && sym == nil) {
+ break
+ }
+ v.reset(OpARM64MOVDloadidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
+ // result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for {
off1 := v.AuxInt
sym1 := v.Aux
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpARM64MOVWload)
+ v.reset(OpARM64MOVDload)
v.AuxInt = off1 + off2
v.Aux = mergeSym(sym1, sym2)
v.AddArg(ptr)
v.AddArg(mem)
return true
}
- // match: (MOVWload [off] {sym} ptr (MOVWstorezero [off2] {sym2} ptr2 _))
+ // match: (MOVDload [off] {sym} ptr (MOVDstorezero [off2] {sym2} ptr2 _))
// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
// result: (MOVDconst [0])
for {
_ = v.Args[1]
ptr := v.Args[0]
v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVWstorezero {
+ if v_1.Op != OpARM64MOVDstorezero {
break
}
off2 := v_1.AuxInt
}
return false
}
-func rewriteValueARM64_OpARM64MOVWreg_0(v *Value) bool {
- // match: (MOVWreg x:(MOVBload _ _))
+func rewriteValueARM64_OpARM64MOVDloadidx_0(v *Value) bool {
+ // match: (MOVDloadidx ptr (MOVDconst [c]) mem)
// cond:
- // result: (MOVDreg x)
+ // result: (MOVDload [c] ptr mem)
for {
- x := v.Args[0]
- if x.Op != OpARM64MOVBload {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
break
}
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
+ c := v_1.AuxInt
+ mem := v.Args[2]
+ v.reset(OpARM64MOVDload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
return true
}
- // match: (MOVWreg x:(MOVBUload _ _))
+ // match: (MOVDloadidx (MOVDconst [c]) ptr mem)
// cond:
- // result: (MOVDreg x)
+ // result: (MOVDload [c] ptr mem)
for {
- x := v.Args[0]
- if x.Op != OpARM64MOVBUload {
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
break
}
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
+ c := v_0.AuxInt
+ ptr := v.Args[1]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVDload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
return true
}
- // match: (MOVWreg x:(MOVHload _ _))
- // cond:
- // result: (MOVDreg x)
+ // match: (MOVDloadidx ptr idx (MOVDstorezeroidx ptr2 idx2 _))
+ // cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
+ // result: (MOVDconst [0])
for {
- x := v.Args[0]
- if x.Op != OpARM64MOVHload {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVDstorezeroidx {
break
}
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVWreg x:(MOVHUload _ _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVHUload {
+ _ = v_2.Args[2]
+ ptr2 := v_2.Args[0]
+ idx2 := v_2.Args[1]
+ if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
break
}
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
return true
}
- // match: (MOVWreg x:(MOVWload _ _))
- // cond:
- // result: (MOVDreg x)
+ return false
+}
+func rewriteValueARM64_OpARM64MOVDreg_0(v *Value) bool {
+ // match: (MOVDreg x)
+ // cond: x.Uses == 1
+ // result: (MOVDnop x)
for {
x := v.Args[0]
- if x.Op != OpARM64MOVWload {
+ if !(x.Uses == 1) {
break
}
- _ = x.Args[1]
- v.reset(OpARM64MOVDreg)
+ v.reset(OpARM64MOVDnop)
v.AddArg(x)
return true
}
- // match: (MOVWreg x:(MOVBreg _))
+ // match: (MOVDreg (MOVDconst [c]))
// cond:
- // result: (MOVDreg x)
+ // result: (MOVDconst [c])
for {
- x := v.Args[0]
- if x.Op != OpARM64MOVBreg {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
break
}
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
+ c := v_0.AuxInt
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = c
return true
}
- // match: (MOVWreg x:(MOVBUreg _))
+ return false
+}
+func rewriteValueARM64_OpARM64MOVDstore_0(v *Value) bool {
+ b := v.Block
+ _ = b
+ config := b.Func.Config
+ _ = config
+ // match: (MOVDstore ptr (FMOVDfpgp val) mem)
// cond:
- // result: (MOVDreg x)
+ // result: (FMOVDstore ptr val mem)
for {
- x := v.Args[0]
- if x.Op != OpARM64MOVBUreg {
- break
- }
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVWreg x:(MOVHreg _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVHreg {
- break
- }
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVWreg x:(MOVHreg _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVHreg {
- break
- }
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- // match: (MOVWreg x:(MOVWreg _))
- // cond:
- // result: (MOVDreg x)
- for {
- x := v.Args[0]
- if x.Op != OpARM64MOVWreg {
- break
- }
- v.reset(OpARM64MOVDreg)
- v.AddArg(x)
- return true
- }
- return false
-}
-func rewriteValueARM64_OpARM64MOVWreg_10(v *Value) bool {
- // match: (MOVWreg (MOVDconst [c]))
- // cond:
- // result: (MOVDconst [int64(int32(c))])
- for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64FMOVDfpgp {
break
}
- c := v_0.AuxInt
- v.reset(OpARM64MOVDconst)
- v.AuxInt = int64(int32(c))
+ val := v_1.Args[0]
+ mem := v.Args[2]
+ v.reset(OpARM64FMOVDstore)
+ v.AddArg(ptr)
+ v.AddArg(val)
+ v.AddArg(mem)
return true
}
- // match: (MOVWreg (SLLconst [lc] x))
- // cond: lc < 32
- // result: (SBFIZ [arm64BFAuxInt(lc, 32-lc)] x)
+ // match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
+ // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVDstore [off1+off2] {sym} ptr val mem)
for {
+ off1 := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
v_0 := v.Args[0]
- if v_0.Op != OpARM64SLLconst {
+ if v_0.Op != OpARM64ADDconst {
break
}
- lc := v_0.AuxInt
- x := v_0.Args[0]
- if !(lc < 32) {
+ off2 := v_0.AuxInt
+ ptr := v_0.Args[0]
+ val := v.Args[1]
+ mem := v.Args[2]
+ if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpARM64SBFIZ)
- v.AuxInt = arm64BFAuxInt(lc, 32-lc)
- v.AddArg(x)
+ v.reset(OpARM64MOVDstore)
+ v.AuxInt = off1 + off2
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(val)
+ v.AddArg(mem)
return true
}
- return false
-}
-func rewriteValueARM64_OpARM64MOVWstore_0(v *Value) bool {
- b := v.Block
- _ = b
- config := b.Func.Config
- _ = config
- // match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem)
- // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVWstore [off1+off2] {sym} ptr val mem)
+ // match: (MOVDstore [off] {sym} (ADD ptr idx) val mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVDstoreidx ptr idx val mem)
for {
- off1 := v.AuxInt
+ off := v.AuxInt
sym := v.Aux
_ = v.Args[2]
v_0 := v.Args[0]
- if v_0.Op != OpARM64ADDconst {
+ if v_0.Op != OpARM64ADD {
break
}
- off2 := v_0.AuxInt
+ _ = v_0.Args[1]
ptr := v_0.Args[0]
+ idx := v_0.Args[1]
val := v.Args[1]
mem := v.Args[2]
- if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ if !(off == 0 && sym == nil) {
break
}
- v.reset(OpARM64MOVWstore)
- v.AuxInt = off1 + off2
- v.Aux = sym
+ v.reset(OpARM64MOVDstoreidx)
v.AddArg(ptr)
+ v.AddArg(idx)
v.AddArg(val)
v.AddArg(mem)
return true
}
- // match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
+ // match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
// cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
+ // result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
for {
off1 := v.AuxInt
sym1 := v.Aux
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpARM64MOVWstore)
+ v.reset(OpARM64MOVDstore)
v.AuxInt = off1 + off2
v.Aux = mergeSym(sym1, sym2)
v.AddArg(ptr)
v.AddArg(mem)
return true
}
- // match: (MOVWstore [off] {sym} ptr (MOVDconst [0]) mem)
+ // match: (MOVDstore [off] {sym} ptr (MOVDconst [0]) mem)
// cond:
- // result: (MOVWstorezero [off] {sym} ptr mem)
+ // result: (MOVDstorezero [off] {sym} ptr mem)
for {
off := v.AuxInt
sym := v.Aux
break
}
mem := v.Args[2]
- v.reset(OpARM64MOVWstorezero)
+ v.reset(OpARM64MOVDstorezero)
v.AuxInt = off
v.Aux = sym
v.AddArg(ptr)
v.AddArg(mem)
return true
}
- // match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
+ return false
+}
+func rewriteValueARM64_OpARM64MOVDstoreidx_0(v *Value) bool {
+ // match: (MOVDstoreidx ptr (MOVDconst [c]) val mem)
// cond:
- // result: (MOVWstore [off] {sym} ptr x mem)
+ // result: (MOVDstore [c] ptr val mem)
for {
- off := v.AuxInt
- sym := v.Aux
- _ = v.Args[2]
+ _ = v.Args[3]
ptr := v.Args[0]
v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVWreg {
+ if v_1.Op != OpARM64MOVDconst {
break
}
- x := v_1.Args[0]
- mem := v.Args[2]
- v.reset(OpARM64MOVWstore)
- v.AuxInt = off
- v.Aux = sym
+ c := v_1.AuxInt
+ val := v.Args[2]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVDstore)
+ v.AuxInt = c
v.AddArg(ptr)
- v.AddArg(x)
+ v.AddArg(val)
v.AddArg(mem)
return true
}
- // match: (MOVWstore [off] {sym} ptr (MOVWUreg x) mem)
+ // match: (MOVDstoreidx (MOVDconst [c]) idx val mem)
// cond:
- // result: (MOVWstore [off] {sym} ptr x mem)
+ // result: (MOVDstore [c] idx val mem)
for {
- off := v.AuxInt
- sym := v.Aux
- _ = v.Args[2]
- ptr := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVWUreg {
+ _ = v.Args[3]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
break
}
- x := v_1.Args[0]
- mem := v.Args[2]
- v.reset(OpARM64MOVWstore)
- v.AuxInt = off
- v.Aux = sym
- v.AddArg(ptr)
- v.AddArg(x)
+ c := v_0.AuxInt
+ idx := v.Args[1]
+ val := v.Args[2]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVDstore)
+ v.AuxInt = c
+ v.AddArg(idx)
+ v.AddArg(val)
v.AddArg(mem)
return true
}
- // match: (MOVWstore [i] {s} ptr0 (SRLconst [32] w) x:(MOVWstore [i-4] {s} ptr1 w mem))
- // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
- // result: (MOVDstore [i-4] {s} ptr0 w mem)
+ // match: (MOVDstoreidx ptr idx (MOVDconst [0]) mem)
+ // cond:
+ // result: (MOVDstorezeroidx ptr idx mem)
for {
- i := v.AuxInt
- s := v.Aux
- _ = v.Args[2]
- ptr0 := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64SRLconst {
- break
- }
- if v_1.AuxInt != 32 {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVDconst {
break
}
- w := v_1.Args[0]
- x := v.Args[2]
- if x.Op != OpARM64MOVWstore {
+ if v_2.AuxInt != 0 {
break
}
- if x.AuxInt != i-4 {
+ mem := v.Args[3]
+ v.reset(OpARM64MOVDstorezeroidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVDstorezero_0(v *Value) bool {
+ b := v.Block
+ _ = b
+ config := b.Func.Config
+ _ = config
+ // match: (MOVDstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
+ // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVDstorezero [off1+off2] {sym} ptr mem)
+ for {
+ off1 := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADDconst {
break
}
- if x.Aux != s {
+ off2 := v_0.AuxInt
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- _ = x.Args[2]
- ptr1 := x.Args[0]
- if w != x.Args[1] {
+ v.reset(OpARM64MOVDstorezero)
+ v.AuxInt = off1 + off2
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVDstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
+ // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVDstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
+ for {
+ off1 := v.AuxInt
+ sym1 := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDaddr {
break
}
- mem := x.Args[2]
- if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ off2 := v_0.AuxInt
+ sym2 := v_0.Aux
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpARM64MOVDstore)
- v.AuxInt = i - 4
- v.Aux = s
- v.AddArg(ptr0)
- v.AddArg(w)
+ v.reset(OpARM64MOVDstorezero)
+ v.AuxInt = off1 + off2
+ v.Aux = mergeSym(sym1, sym2)
+ v.AddArg(ptr)
v.AddArg(mem)
return true
}
- // match: (MOVWstore [i] {s} ptr0 (SRLconst [j] w) x:(MOVWstore [i-4] {s} ptr1 w0:(SRLconst [j-32] w) mem))
- // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
- // result: (MOVDstore [i-4] {s} ptr0 w0 mem)
+ // match: (MOVDstorezero [off] {sym} (ADD ptr idx) mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVDstorezeroidx ptr idx mem)
for {
- i := v.AuxInt
- s := v.Aux
- _ = v.Args[2]
- ptr0 := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64SRLconst {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
break
}
- j := v_1.AuxInt
- w := v_1.Args[0]
- x := v.Args[2]
- if x.Op != OpARM64MOVWstore {
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ mem := v.Args[1]
+ if !(off == 0 && sym == nil) {
break
}
- if x.AuxInt != i-4 {
+ v.reset(OpARM64MOVDstorezeroidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVDstorezero [i] {s} ptr0 x:(MOVDstorezero [j] {s} ptr1 mem))
+ // cond: x.Uses == 1 && areAdjacentOffsets(i,j,8) && is32Bit(min(i,j)) && isSamePtr(ptr0, ptr1) && clobber(x)
+ // result: (MOVQstorezero [min(i,j)] {s} ptr0 mem)
+ for {
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[1]
+ ptr0 := v.Args[0]
+ x := v.Args[1]
+ if x.Op != OpARM64MOVDstorezero {
break
}
+ j := x.AuxInt
if x.Aux != s {
break
}
- _ = x.Args[2]
+ _ = x.Args[1]
ptr1 := x.Args[0]
- w0 := x.Args[1]
- if w0.Op != OpARM64SRLconst {
+ mem := x.Args[1]
+ if !(x.Uses == 1 && areAdjacentOffsets(i, j, 8) && is32Bit(min(i, j)) && isSamePtr(ptr0, ptr1) && clobber(x)) {
break
}
- if w0.AuxInt != j-32 {
+ v.reset(OpARM64MOVQstorezero)
+ v.AuxInt = min(i, j)
+ v.Aux = s
+ v.AddArg(ptr0)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVDstorezero [8] {s} p0:(ADD ptr0 idx0) x:(MOVDstorezeroidx ptr1 idx1 mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVQstorezero [0] {s} p0 mem)
+ for {
+ if v.AuxInt != 8 {
break
}
- if w != w0.Args[0] {
+ s := v.Aux
+ _ = v.Args[1]
+ p0 := v.Args[0]
+ if p0.Op != OpARM64ADD {
+ break
+ }
+ _ = p0.Args[1]
+ ptr0 := p0.Args[0]
+ idx0 := p0.Args[1]
+ x := v.Args[1]
+ if x.Op != OpARM64MOVDstorezeroidx {
break
}
+ _ = x.Args[2]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
mem := x.Args[2]
- if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
break
}
- v.reset(OpARM64MOVDstore)
- v.AuxInt = i - 4
+ v.reset(OpARM64MOVQstorezero)
+ v.AuxInt = 0
v.Aux = s
- v.AddArg(ptr0)
- v.AddArg(w0)
+ v.AddArg(p0)
v.AddArg(mem)
return true
}
return false
}
-func rewriteValueARM64_OpARM64MOVWstorezero_0(v *Value) bool {
+func rewriteValueARM64_OpARM64MOVDstorezeroidx_0(v *Value) bool {
+ // match: (MOVDstorezeroidx ptr (MOVDconst [c]) mem)
+ // cond:
+ // result: (MOVDstorezero [c] ptr mem)
+ for {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ mem := v.Args[2]
+ v.reset(OpARM64MOVDstorezero)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVDstorezeroidx (MOVDconst [c]) idx mem)
+ // cond:
+ // result: (MOVDstorezero [c] idx mem)
+ for {
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ idx := v.Args[1]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVDstorezero)
+ v.AuxInt = c
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVHUload_0(v *Value) bool {
b := v.Block
_ = b
config := b.Func.Config
_ = config
- // match: (MOVWstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
+ // match: (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem)
// cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVWstorezero [off1+off2] {sym} ptr mem)
+ // result: (MOVHUload [off1+off2] {sym} ptr mem)
for {
off1 := v.AuxInt
sym := v.Aux
if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpARM64MOVWstorezero)
+ v.reset(OpARM64MOVHUload)
v.AuxInt = off1 + off2
v.Aux = sym
v.AddArg(ptr)
v.AddArg(mem)
return true
}
- // match: (MOVWstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
+ // match: (MOVHUload [off] {sym} (ADD ptr idx) mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVHUloadidx ptr idx mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ mem := v.Args[1]
+ if !(off == 0 && sym == nil) {
+ break
+ }
+ v.reset(OpARM64MOVHUloadidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVHUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
// cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
- // result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
+ // result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for {
off1 := v.AuxInt
sym1 := v.Aux
if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpARM64MOVWstorezero)
+ v.reset(OpARM64MOVHUload)
v.AuxInt = off1 + off2
v.Aux = mergeSym(sym1, sym2)
v.AddArg(ptr)
v.AddArg(mem)
return true
}
- // match: (MOVWstorezero [i] {s} ptr0 x:(MOVWstorezero [j] {s} ptr1 mem))
- // cond: x.Uses == 1 && areAdjacentOffsets(i,j,4) && is32Bit(min(i,j)) && isSamePtr(ptr0, ptr1) && clobber(x)
- // result: (MOVDstorezero [min(i,j)] {s} ptr0 mem)
+ // match: (MOVHUload [off] {sym} ptr (MOVHstorezero [off2] {sym2} ptr2 _))
+ // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
+ // result: (MOVDconst [0])
for {
- i := v.AuxInt
- s := v.Aux
+ off := v.AuxInt
+ sym := v.Aux
_ = v.Args[1]
- ptr0 := v.Args[0]
- x := v.Args[1]
- if x.Op != OpARM64MOVWstorezero {
- break
- }
- j := x.AuxInt
- if x.Aux != s {
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVHstorezero {
break
}
- _ = x.Args[1]
- ptr1 := x.Args[0]
- mem := x.Args[1]
- if !(x.Uses == 1 && areAdjacentOffsets(i, j, 4) && is32Bit(min(i, j)) && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ off2 := v_1.AuxInt
+ sym2 := v_1.Aux
+ _ = v_1.Args[1]
+ ptr2 := v_1.Args[0]
+ if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
break
}
- v.reset(OpARM64MOVDstorezero)
- v.AuxInt = min(i, j)
- v.Aux = s
- v.AddArg(ptr0)
- v.AddArg(mem)
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
return true
}
return false
}
-func rewriteValueARM64_OpARM64MUL_0(v *Value) bool {
- // match: (MUL (NEG x) y)
+func rewriteValueARM64_OpARM64MOVHUloadidx_0(v *Value) bool {
+ // match: (MOVHUloadidx ptr (MOVDconst [c]) mem)
// cond:
- // result: (MNEG x y)
+ // result: (MOVHUload [c] ptr mem)
for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64NEG {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
break
}
- x := v_0.Args[0]
- y := v.Args[1]
- v.reset(OpARM64MNEG)
- v.AddArg(x)
- v.AddArg(y)
+ c := v_1.AuxInt
+ mem := v.Args[2]
+ v.reset(OpARM64MOVHUload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
return true
}
- // match: (MUL y (NEG x))
+ // match: (MOVHUloadidx (MOVDconst [c]) ptr mem)
// cond:
- // result: (MNEG x y)
+ // result: (MOVHUload [c] ptr mem)
for {
- _ = v.Args[1]
- y := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64NEG {
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
break
}
- x := v_1.Args[0]
- v.reset(OpARM64MNEG)
- v.AddArg(x)
- v.AddArg(y)
+ c := v_0.AuxInt
+ ptr := v.Args[1]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVHUload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
return true
}
- // match: (MUL x (MOVDconst [-1]))
- // cond:
- // result: (NEG x)
+ // match: (MOVHUloadidx ptr idx (MOVHstorezeroidx ptr2 idx2 _))
+ // cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
+ // result: (MOVDconst [0])
for {
- _ = v.Args[1]
- x := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVHstorezeroidx {
break
}
- if v_1.AuxInt != -1 {
+ _ = v_2.Args[2]
+ ptr2 := v_2.Args[0]
+ idx2 := v_2.Args[1]
+ if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
break
}
- v.reset(OpARM64NEG)
- v.AddArg(x)
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
return true
}
- // match: (MUL (MOVDconst [-1]) x)
+ return false
+}
+func rewriteValueARM64_OpARM64MOVHUreg_0(v *Value) bool {
+ // match: (MOVHUreg x:(MOVBUload _ _))
// cond:
- // result: (NEG x)
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
- break
- }
- if v_0.AuxInt != -1 {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBUload {
break
}
- x := v.Args[1]
- v.reset(OpARM64NEG)
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
v.AddArg(x)
return true
}
- // match: (MUL _ (MOVDconst [0]))
+ // match: (MOVHUreg x:(MOVHUload _ _))
// cond:
- // result: (MOVDconst [0])
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
- break
- }
- if v_1.AuxInt != 0 {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHUload {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 0
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
return true
}
- // match: (MUL (MOVDconst [0]) _)
+ // match: (MOVHUreg x:(MOVBUloadidx _ _ _))
// cond:
- // result: (MOVDconst [0])
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBUloadidx {
break
}
- if v_0.AuxInt != 0 {
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVHUreg x:(MOVHUloadidx _ _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHUloadidx {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 0
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
return true
}
- // match: (MUL x (MOVDconst [1]))
+ // match: (MOVHUreg x:(MOVBUreg _))
// cond:
- // result: x
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
x := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ if x.Op != OpARM64MOVBUreg {
break
}
- if v_1.AuxInt != 1 {
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVHUreg x:(MOVHUreg _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHUreg {
break
}
- v.reset(OpCopy)
- v.Type = x.Type
+ v.reset(OpARM64MOVDreg)
v.AddArg(x)
return true
}
- // match: (MUL (MOVDconst [1]) x)
+ // match: (MOVHUreg (ANDconst [c] x))
// cond:
- // result: x
+ // result: (ANDconst [c&(1<<16-1)] x)
for {
- _ = v.Args[1]
v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ if v_0.Op != OpARM64ANDconst {
break
}
- if v_0.AuxInt != 1 {
+ c := v_0.AuxInt
+ x := v_0.Args[0]
+ v.reset(OpARM64ANDconst)
+ v.AuxInt = c & (1<<16 - 1)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVHUreg (MOVDconst [c]))
+ // cond:
+ // result: (MOVDconst [int64(uint16(c))])
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
break
}
- x := v.Args[1]
- v.reset(OpCopy)
- v.Type = x.Type
- v.AddArg(x)
+ c := v_0.AuxInt
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = int64(uint16(c))
return true
}
- // match: (MUL x (MOVDconst [c]))
- // cond: isPowerOfTwo(c)
- // result: (SLLconst [log2(c)] x)
+ // match: (MOVHUreg (SLLconst [sc] x))
+ // cond: isARM64BFMask(sc, 1<<16-1, sc)
+ // result: (UBFIZ [arm64BFAuxInt(sc, arm64BFWidth(1<<16-1, sc))] x)
for {
- _ = v.Args[1]
- x := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64SLLconst {
break
}
- c := v_1.AuxInt
- if !(isPowerOfTwo(c)) {
+ sc := v_0.AuxInt
+ x := v_0.Args[0]
+ if !(isARM64BFMask(sc, 1<<16-1, sc)) {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c)
+ v.reset(OpARM64UBFIZ)
+ v.AuxInt = arm64BFAuxInt(sc, arm64BFWidth(1<<16-1, sc))
v.AddArg(x)
return true
}
- // match: (MUL (MOVDconst [c]) x)
- // cond: isPowerOfTwo(c)
- // result: (SLLconst [log2(c)] x)
+ // match: (MOVHUreg (SRLconst [sc] x))
+ // cond: isARM64BFMask(sc, 1<<16-1, 0)
+ // result: (UBFX [arm64BFAuxInt(sc, 16)] x)
for {
- _ = v.Args[1]
v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ if v_0.Op != OpARM64SRLconst {
break
}
- c := v_0.AuxInt
- x := v.Args[1]
- if !(isPowerOfTwo(c)) {
+ sc := v_0.AuxInt
+ x := v_0.Args[0]
+ if !(isARM64BFMask(sc, 1<<16-1, 0)) {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c)
+ v.reset(OpARM64UBFX)
+ v.AuxInt = arm64BFAuxInt(sc, 16)
v.AddArg(x)
return true
}
return false
}
-func rewriteValueARM64_OpARM64MUL_10(v *Value) bool {
+func rewriteValueARM64_OpARM64MOVHload_0(v *Value) bool {
b := v.Block
_ = b
- // match: (MUL x (MOVDconst [c]))
- // cond: isPowerOfTwo(c-1) && c >= 3
- // result: (ADDshiftLL x x [log2(c-1)])
+ config := b.Func.Config
+ _ = config
+ // match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem)
+ // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVHload [off1+off2] {sym} ptr mem)
for {
+ off1 := v.AuxInt
+ sym := v.Aux
_ = v.Args[1]
- x := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADDconst {
break
}
- c := v_1.AuxInt
- if !(isPowerOfTwo(c-1) && c >= 3) {
+ off2 := v_0.AuxInt
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpARM64ADDshiftLL)
- v.AuxInt = log2(c - 1)
- v.AddArg(x)
- v.AddArg(x)
+ v.reset(OpARM64MOVHload)
+ v.AuxInt = off1 + off2
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(mem)
return true
}
- // match: (MUL (MOVDconst [c]) x)
- // cond: isPowerOfTwo(c-1) && c >= 3
- // result: (ADDshiftLL x x [log2(c-1)])
+ // match: (MOVHload [off] {sym} (ADD ptr idx) mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVHloadidx ptr idx mem)
for {
+ off := v.AuxInt
+ sym := v.Aux
_ = v.Args[1]
v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ if v_0.Op != OpARM64ADD {
break
}
- c := v_0.AuxInt
- x := v.Args[1]
- if !(isPowerOfTwo(c-1) && c >= 3) {
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ mem := v.Args[1]
+ if !(off == 0 && sym == nil) {
break
}
- v.reset(OpARM64ADDshiftLL)
- v.AuxInt = log2(c - 1)
- v.AddArg(x)
- v.AddArg(x)
+ v.reset(OpARM64MOVHloadidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
return true
}
- // match: (MUL x (MOVDconst [c]))
- // cond: isPowerOfTwo(c+1) && c >= 7
- // result: (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
+ // match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
+ // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for {
+ off1 := v.AuxInt
+ sym1 := v.Aux
_ = v.Args[1]
- x := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDaddr {
break
}
- c := v_1.AuxInt
- if !(isPowerOfTwo(c+1) && c >= 7) {
+ off2 := v_0.AuxInt
+ sym2 := v_0.Aux
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpARM64ADDshiftLL)
- v.AuxInt = log2(c + 1)
- v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
- v0.AddArg(x)
- v.AddArg(v0)
- v.AddArg(x)
+ v.reset(OpARM64MOVHload)
+ v.AuxInt = off1 + off2
+ v.Aux = mergeSym(sym1, sym2)
+ v.AddArg(ptr)
+ v.AddArg(mem)
return true
}
- // match: (MUL (MOVDconst [c]) x)
- // cond: isPowerOfTwo(c+1) && c >= 7
- // result: (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
+ // match: (MOVHload [off] {sym} ptr (MOVHstorezero [off2] {sym2} ptr2 _))
+ // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
+ // result: (MOVDconst [0])
for {
+ off := v.AuxInt
+ sym := v.Aux
_ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVHstorezero {
break
}
- c := v_0.AuxInt
- x := v.Args[1]
- if !(isPowerOfTwo(c+1) && c >= 7) {
+ off2 := v_1.AuxInt
+ sym2 := v_1.Aux
+ _ = v_1.Args[1]
+ ptr2 := v_1.Args[0]
+ if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
break
}
- v.reset(OpARM64ADDshiftLL)
- v.AuxInt = log2(c + 1)
- v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
- v0.AddArg(x)
- v.AddArg(v0)
- v.AddArg(x)
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
return true
}
- // match: (MUL x (MOVDconst [c]))
- // cond: c%3 == 0 && isPowerOfTwo(c/3)
- // result: (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
+ return false
+}
+func rewriteValueARM64_OpARM64MOVHloadidx_0(v *Value) bool {
+ // match: (MOVHloadidx ptr (MOVDconst [c]) mem)
+ // cond:
+ // result: (MOVHload [c] ptr mem)
for {
- _ = v.Args[1]
- x := v.Args[0]
+ _ = v.Args[2]
+ ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
c := v_1.AuxInt
- if !(c%3 == 0 && isPowerOfTwo(c/3)) {
- break
- }
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 3)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 1
- v0.AddArg(x)
- v0.AddArg(x)
- v.AddArg(v0)
+ mem := v.Args[2]
+ v.reset(OpARM64MOVHload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
return true
}
- // match: (MUL (MOVDconst [c]) x)
- // cond: c%3 == 0 && isPowerOfTwo(c/3)
- // result: (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
+ // match: (MOVHloadidx (MOVDconst [c]) ptr mem)
+ // cond:
+ // result: (MOVHload [c] ptr mem)
for {
- _ = v.Args[1]
+ _ = v.Args[2]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
- if !(c%3 == 0 && isPowerOfTwo(c/3)) {
- break
- }
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 3)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 1
- v0.AddArg(x)
- v0.AddArg(x)
- v.AddArg(v0)
- return true
- }
- // match: (MUL x (MOVDconst [c]))
- // cond: c%5 == 0 && isPowerOfTwo(c/5)
- // result: (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
- for {
- _ = v.Args[1]
- x := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
- break
- }
- c := v_1.AuxInt
- if !(c%5 == 0 && isPowerOfTwo(c/5)) {
- break
- }
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 5)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 2
- v0.AddArg(x)
- v0.AddArg(x)
- v.AddArg(v0)
+ ptr := v.Args[1]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVHload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
return true
}
- // match: (MUL (MOVDconst [c]) x)
- // cond: c%5 == 0 && isPowerOfTwo(c/5)
- // result: (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
+ // match: (MOVHloadidx ptr idx (MOVHstorezeroidx ptr2 idx2 _))
+ // cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
+ // result: (MOVDconst [0])
for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVHstorezeroidx {
break
}
- c := v_0.AuxInt
- x := v.Args[1]
- if !(c%5 == 0 && isPowerOfTwo(c/5)) {
+ _ = v_2.Args[2]
+ ptr2 := v_2.Args[0]
+ idx2 := v_2.Args[1]
+ if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 5)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 2
- v0.AddArg(x)
- v0.AddArg(x)
- v.AddArg(v0)
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
return true
}
- // match: (MUL x (MOVDconst [c]))
- // cond: c%7 == 0 && isPowerOfTwo(c/7)
- // result: (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
+ return false
+}
+func rewriteValueARM64_OpARM64MOVHreg_0(v *Value) bool {
+ // match: (MOVHreg x:(MOVBload _ _))
+ // cond:
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
x := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
- break
- }
- c := v_1.AuxInt
- if !(c%7 == 0 && isPowerOfTwo(c/7)) {
+ if x.Op != OpARM64MOVBload {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 7)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 3
- v1 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
- v1.AddArg(x)
- v0.AddArg(v1)
- v0.AddArg(x)
- v.AddArg(v0)
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
return true
}
- // match: (MUL (MOVDconst [c]) x)
- // cond: c%7 == 0 && isPowerOfTwo(c/7)
- // result: (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
+ // match: (MOVHreg x:(MOVBUload _ _))
+ // cond:
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
- break
- }
- c := v_0.AuxInt
- x := v.Args[1]
- if !(c%7 == 0 && isPowerOfTwo(c/7)) {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBUload {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 7)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 3
- v1 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
- v1.AddArg(x)
- v0.AddArg(v1)
- v0.AddArg(x)
- v.AddArg(v0)
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
return true
}
- return false
-}
-func rewriteValueARM64_OpARM64MUL_20(v *Value) bool {
- b := v.Block
- _ = b
- // match: (MUL x (MOVDconst [c]))
- // cond: c%9 == 0 && isPowerOfTwo(c/9)
- // result: (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
+ // match: (MOVHreg x:(MOVHload _ _))
+ // cond:
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
x := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
- break
- }
- c := v_1.AuxInt
- if !(c%9 == 0 && isPowerOfTwo(c/9)) {
+ if x.Op != OpARM64MOVHload {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 9)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 3
- v0.AddArg(x)
- v0.AddArg(x)
- v.AddArg(v0)
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
return true
}
- // match: (MUL (MOVDconst [c]) x)
- // cond: c%9 == 0 && isPowerOfTwo(c/9)
- // result: (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
+ // match: (MOVHreg x:(MOVBloadidx _ _ _))
+ // cond:
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
- break
- }
- c := v_0.AuxInt
- x := v.Args[1]
- if !(c%9 == 0 && isPowerOfTwo(c/9)) {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBloadidx {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 9)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 3
- v0.AddArg(x)
- v0.AddArg(x)
- v.AddArg(v0)
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
return true
}
- // match: (MUL (MOVDconst [c]) (MOVDconst [d]))
+ // match: (MOVHreg x:(MOVBUloadidx _ _ _))
// cond:
- // result: (MOVDconst [c*d])
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
- break
- }
- c := v_0.AuxInt
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBUloadidx {
break
}
- d := v_1.AuxInt
- v.reset(OpARM64MOVDconst)
- v.AuxInt = c * d
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
return true
}
- // match: (MUL (MOVDconst [d]) (MOVDconst [c]))
+ // match: (MOVHreg x:(MOVHloadidx _ _ _))
// cond:
- // result: (MOVDconst [c*d])
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
- break
- }
- d := v_0.AuxInt
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHloadidx {
break
}
- c := v_1.AuxInt
- v.reset(OpARM64MOVDconst)
- v.AuxInt = c * d
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
return true
}
- return false
-}
-func rewriteValueARM64_OpARM64MULW_0(v *Value) bool {
- // match: (MULW (NEG x) y)
+ // match: (MOVHreg x:(MOVBreg _))
// cond:
- // result: (MNEGW x y)
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64NEG {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBreg {
break
}
- x := v_0.Args[0]
- y := v.Args[1]
- v.reset(OpARM64MNEGW)
+ v.reset(OpARM64MOVDreg)
v.AddArg(x)
- v.AddArg(y)
return true
}
- // match: (MULW y (NEG x))
+ // match: (MOVHreg x:(MOVBUreg _))
// cond:
- // result: (MNEGW x y)
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
- y := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64NEG {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBUreg {
break
}
- x := v_1.Args[0]
- v.reset(OpARM64MNEGW)
+ v.reset(OpARM64MOVDreg)
v.AddArg(x)
- v.AddArg(y)
return true
}
- // match: (MULW x (MOVDconst [c]))
- // cond: int32(c)==-1
- // result: (NEG x)
+ // match: (MOVHreg x:(MOVHreg _))
+ // cond:
+ // result: (MOVDreg x)
for {
- _ = v.Args[1]
x := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
- break
- }
- c := v_1.AuxInt
- if !(int32(c) == -1) {
+ if x.Op != OpARM64MOVHreg {
break
}
- v.reset(OpARM64NEG)
+ v.reset(OpARM64MOVDreg)
v.AddArg(x)
return true
}
- // match: (MULW (MOVDconst [c]) x)
- // cond: int32(c)==-1
- // result: (NEG x)
+ // match: (MOVHreg (MOVDconst [c]))
+ // cond:
+ // result: (MOVDconst [int64(int16(c))])
for {
- _ = v.Args[1]
v_0 := v.Args[0]
if v_0.Op != OpARM64MOVDconst {
break
}
c := v_0.AuxInt
- x := v.Args[1]
- if !(int32(c) == -1) {
- break
- }
- v.reset(OpARM64NEG)
- v.AddArg(x)
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = int64(int16(c))
return true
}
- // match: (MULW _ (MOVDconst [c]))
- // cond: int32(c)==0
- // result: (MOVDconst [0])
+ return false
+}
+func rewriteValueARM64_OpARM64MOVHreg_10(v *Value) bool {
+ // match: (MOVHreg (SLLconst [lc] x))
+ // cond: lc < 16
+ // result: (SBFIZ [arm64BFAuxInt(lc, 16-lc)] x)
for {
- _ = v.Args[1]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64SLLconst {
break
}
- c := v_1.AuxInt
- if !(int32(c) == 0) {
+ lc := v_0.AuxInt
+ x := v_0.Args[0]
+ if !(lc < 16) {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 0
+ v.reset(OpARM64SBFIZ)
+ v.AuxInt = arm64BFAuxInt(lc, 16-lc)
+ v.AddArg(x)
return true
}
- // match: (MULW (MOVDconst [c]) _)
- // cond: int32(c)==0
- // result: (MOVDconst [0])
+ return false
+}
+func rewriteValueARM64_OpARM64MOVHstore_0(v *Value) bool {
+ b := v.Block
+ _ = b
+ config := b.Func.Config
+ _ = config
+ // match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem)
+ // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVHstore [off1+off2] {sym} ptr val mem)
for {
- _ = v.Args[1]
+ off1 := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ if v_0.Op != OpARM64ADDconst {
break
}
- c := v_0.AuxInt
- if !(int32(c) == 0) {
+ off2 := v_0.AuxInt
+ ptr := v_0.Args[0]
+ val := v.Args[1]
+ mem := v.Args[2]
+ if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 0
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = off1 + off2
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(val)
+ v.AddArg(mem)
return true
}
- // match: (MULW x (MOVDconst [c]))
- // cond: int32(c)==1
- // result: x
+ // match: (MOVHstore [off] {sym} (ADD ptr idx) val mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVHstoreidx ptr idx val mem)
for {
- _ = v.Args[1]
- x := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
break
}
- c := v_1.AuxInt
- if !(int32(c) == 1) {
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ val := v.Args[1]
+ mem := v.Args[2]
+ if !(off == 0 && sym == nil) {
break
}
- v.reset(OpCopy)
- v.Type = x.Type
- v.AddArg(x)
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(val)
+ v.AddArg(mem)
return true
}
- // match: (MULW (MOVDconst [c]) x)
- // cond: int32(c)==1
- // result: x
+ // match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
+ // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
for {
- _ = v.Args[1]
+ off1 := v.AuxInt
+ sym1 := v.Aux
+ _ = v.Args[2]
v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ if v_0.Op != OpARM64MOVDaddr {
break
}
- c := v_0.AuxInt
- x := v.Args[1]
- if !(int32(c) == 1) {
+ off2 := v_0.AuxInt
+ sym2 := v_0.Aux
+ ptr := v_0.Args[0]
+ val := v.Args[1]
+ mem := v.Args[2]
+ if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
break
}
- v.reset(OpCopy)
- v.Type = x.Type
- v.AddArg(x)
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = off1 + off2
+ v.Aux = mergeSym(sym1, sym2)
+ v.AddArg(ptr)
+ v.AddArg(val)
+ v.AddArg(mem)
return true
}
- // match: (MULW x (MOVDconst [c]))
- // cond: isPowerOfTwo(c)
- // result: (SLLconst [log2(c)] x)
+ // match: (MOVHstore [off] {sym} ptr (MOVDconst [0]) mem)
+ // cond:
+ // result: (MOVHstorezero [off] {sym} ptr mem)
for {
- _ = v.Args[1]
- x := v.Args[0]
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
+ ptr := v.Args[0]
v_1 := v.Args[1]
if v_1.Op != OpARM64MOVDconst {
break
}
- c := v_1.AuxInt
- if !(isPowerOfTwo(c)) {
+ if v_1.AuxInt != 0 {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c)
- v.AddArg(x)
+ mem := v.Args[2]
+ v.reset(OpARM64MOVHstorezero)
+ v.AuxInt = off
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(mem)
return true
}
- // match: (MULW (MOVDconst [c]) x)
- // cond: isPowerOfTwo(c)
- // result: (SLLconst [log2(c)] x)
+ // match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
+ // cond:
+ // result: (MOVHstore [off] {sym} ptr x mem)
for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
- break
- }
- c := v_0.AuxInt
- x := v.Args[1]
- if !(isPowerOfTwo(c)) {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVHreg {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c)
+ x := v_1.Args[0]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = off
+ v.Aux = sym
+ v.AddArg(ptr)
v.AddArg(x)
+ v.AddArg(mem)
return true
}
- return false
-}
-func rewriteValueARM64_OpARM64MULW_10(v *Value) bool {
- b := v.Block
- _ = b
- // match: (MULW x (MOVDconst [c]))
- // cond: isPowerOfTwo(c-1) && int32(c) >= 3
- // result: (ADDshiftLL x x [log2(c-1)])
+ // match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
+ // cond:
+ // result: (MOVHstore [off] {sym} ptr x mem)
for {
- _ = v.Args[1]
- x := v.Args[0]
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
+ ptr := v.Args[0]
v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
- break
- }
- c := v_1.AuxInt
- if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
+ if v_1.Op != OpARM64MOVHUreg {
break
}
- v.reset(OpARM64ADDshiftLL)
- v.AuxInt = log2(c - 1)
- v.AddArg(x)
+ x := v_1.Args[0]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = off
+ v.Aux = sym
+ v.AddArg(ptr)
v.AddArg(x)
+ v.AddArg(mem)
return true
}
- // match: (MULW (MOVDconst [c]) x)
- // cond: isPowerOfTwo(c-1) && int32(c) >= 3
- // result: (ADDshiftLL x x [log2(c-1)])
+ // match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
+ // cond:
+ // result: (MOVHstore [off] {sym} ptr x mem)
for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
- break
- }
- c := v_0.AuxInt
- x := v.Args[1]
- if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVWreg {
break
}
- v.reset(OpARM64ADDshiftLL)
- v.AuxInt = log2(c - 1)
- v.AddArg(x)
+ x := v_1.Args[0]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = off
+ v.Aux = sym
+ v.AddArg(ptr)
v.AddArg(x)
+ v.AddArg(mem)
return true
}
- // match: (MULW x (MOVDconst [c]))
- // cond: isPowerOfTwo(c+1) && int32(c) >= 7
- // result: (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
+ // match: (MOVHstore [off] {sym} ptr (MOVWUreg x) mem)
+ // cond:
+ // result: (MOVHstore [off] {sym} ptr x mem)
for {
- _ = v.Args[1]
- x := v.Args[0]
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
+ ptr := v.Args[0]
v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
- break
- }
- c := v_1.AuxInt
- if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
+ if v_1.Op != OpARM64MOVWUreg {
break
}
- v.reset(OpARM64ADDshiftLL)
- v.AuxInt = log2(c + 1)
- v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
- v0.AddArg(x)
- v.AddArg(v0)
- v.AddArg(x)
- return true
- }
- // match: (MULW (MOVDconst [c]) x)
- // cond: isPowerOfTwo(c+1) && int32(c) >= 7
- // result: (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
- for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
- break
- }
- c := v_0.AuxInt
- x := v.Args[1]
- if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
- break
- }
- v.reset(OpARM64ADDshiftLL)
- v.AuxInt = log2(c + 1)
- v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
- v0.AddArg(x)
- v.AddArg(v0)
+ x := v_1.Args[0]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = off
+ v.Aux = sym
+ v.AddArg(ptr)
v.AddArg(x)
+ v.AddArg(mem)
return true
}
- // match: (MULW x (MOVDconst [c]))
- // cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
- // result: (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
+ // match: (MOVHstore [i] {s} ptr0 (SRLconst [16] w) x:(MOVHstore [i-2] {s} ptr1 w mem))
+ // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
+ // result: (MOVWstore [i-2] {s} ptr0 w mem)
for {
- _ = v.Args[1]
- x := v.Args[0]
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[2]
+ ptr0 := v.Args[0]
v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ if v_1.Op != OpARM64SRLconst {
break
}
- c := v_1.AuxInt
- if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
+ if v_1.AuxInt != 16 {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 3)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 1
- v0.AddArg(x)
- v0.AddArg(x)
- v.AddArg(v0)
- return true
- }
- // match: (MULW (MOVDconst [c]) x)
- // cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
- // result: (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
- for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVHstore {
break
}
- c := v_0.AuxInt
- x := v.Args[1]
- if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
+ if x.AuxInt != i-2 {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 3)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 1
- v0.AddArg(x)
- v0.AddArg(x)
- v.AddArg(v0)
- return true
- }
- // match: (MULW x (MOVDconst [c]))
- // cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
- // result: (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
- for {
- _ = v.Args[1]
- x := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ if x.Aux != s {
break
}
- c := v_1.AuxInt
- if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
+ _ = x.Args[2]
+ ptr1 := x.Args[0]
+ if w != x.Args[1] {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 5)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 2
- v0.AddArg(x)
- v0.AddArg(x)
- v.AddArg(v0)
+ mem := x.Args[2]
+ if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVWstore)
+ v.AuxInt = i - 2
+ v.Aux = s
+ v.AddArg(ptr0)
+ v.AddArg(w)
+ v.AddArg(mem)
return true
}
- // match: (MULW (MOVDconst [c]) x)
- // cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
- // result: (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
+ // match: (MOVHstore [2] {s} (ADD ptr0 idx0) (SRLconst [16] w) x:(MOVHstoreidx ptr1 idx1 w mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVWstoreidx ptr1 idx1 w mem)
for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ if v.AuxInt != 2 {
break
}
- c := v_0.AuxInt
- x := v.Args[1]
- if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
+ s := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 5)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 2
- v0.AddArg(x)
- v0.AddArg(x)
- v.AddArg(v0)
- return true
- }
- // match: (MULW x (MOVDconst [c]))
- // cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
- // result: (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
- for {
- _ = v.Args[1]
- x := v.Args[0]
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ if v_1.Op != OpARM64SRLconst {
break
}
- c := v_1.AuxInt
- if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
+ if v_1.AuxInt != 16 {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 7)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 3
- v1 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
- v1.AddArg(x)
- v0.AddArg(v1)
- v0.AddArg(x)
- v.AddArg(v0)
- return true
- }
- // match: (MULW (MOVDconst [c]) x)
- // cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
- // result: (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
- for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVHstoreidx {
break
}
- c := v_0.AuxInt
- x := v.Args[1]
- if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
+ _ = x.Args[3]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ if w != x.Args[2] {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 7)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 3
- v1 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
- v1.AddArg(x)
- v0.AddArg(v1)
- v0.AddArg(x)
- v.AddArg(v0)
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVWstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(w)
+ v.AddArg(mem)
return true
}
return false
}
-func rewriteValueARM64_OpARM64MULW_20(v *Value) bool {
- b := v.Block
- _ = b
- // match: (MULW x (MOVDconst [c]))
- // cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
- // result: (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
+func rewriteValueARM64_OpARM64MOVHstore_10(v *Value) bool {
+ // match: (MOVHstore [i] {s} ptr0 (UBFX [arm64BFAuxInt(16, 16)] w) x:(MOVHstore [i-2] {s} ptr1 w mem))
+ // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
+ // result: (MOVWstore [i-2] {s} ptr0 w mem)
for {
- _ = v.Args[1]
- x := v.Args[0]
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[2]
+ ptr0 := v.Args[0]
v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ if v_1.Op != OpARM64UBFX {
break
}
- c := v_1.AuxInt
- if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
+ if v_1.AuxInt != arm64BFAuxInt(16, 16) {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 9)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 3
- v0.AddArg(x)
- v0.AddArg(x)
- v.AddArg(v0)
- return true
- }
- // match: (MULW (MOVDconst [c]) x)
- // cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
- // result: (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
- for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVHstore {
break
}
- c := v_0.AuxInt
- x := v.Args[1]
- if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
+ if x.AuxInt != i-2 {
break
}
- v.reset(OpARM64SLLconst)
- v.AuxInt = log2(c / 9)
- v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
- v0.AuxInt = 3
- v0.AddArg(x)
- v0.AddArg(x)
- v.AddArg(v0)
- return true
- }
- // match: (MULW (MOVDconst [c]) (MOVDconst [d]))
- // cond:
- // result: (MOVDconst [int64(int32(c)*int32(d))])
- for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ if x.Aux != s {
break
}
- c := v_0.AuxInt
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ _ = x.Args[2]
+ ptr1 := x.Args[0]
+ if w != x.Args[1] {
break
}
- d := v_1.AuxInt
- v.reset(OpARM64MOVDconst)
- v.AuxInt = int64(int32(c) * int32(d))
+ mem := x.Args[2]
+ if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVWstore)
+ v.AuxInt = i - 2
+ v.Aux = s
+ v.AddArg(ptr0)
+ v.AddArg(w)
+ v.AddArg(mem)
return true
}
- // match: (MULW (MOVDconst [d]) (MOVDconst [c]))
- // cond:
- // result: (MOVDconst [int64(int32(c)*int32(d))])
+ // match: (MOVHstore [2] {s} (ADD ptr0 idx0) (UBFX [arm64BFAuxInt(16, 16)] w) x:(MOVHstoreidx ptr1 idx1 w mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVWstoreidx ptr1 idx1 w mem)
for {
- _ = v.Args[1]
+ if v.AuxInt != 2 {
+ break
+ }
+ s := v.Aux
+ _ = v.Args[2]
v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ if v_0.Op != OpARM64ADD {
break
}
- d := v_0.AuxInt
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ if v_1.Op != OpARM64UBFX {
break
}
- c := v_1.AuxInt
- v.reset(OpARM64MOVDconst)
- v.AuxInt = int64(int32(c) * int32(d))
+ if v_1.AuxInt != arm64BFAuxInt(16, 16) {
+ break
+ }
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVHstoreidx {
+ break
+ }
+ _ = x.Args[3]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ if w != x.Args[2] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVWstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(w)
+ v.AddArg(mem)
return true
}
- return false
-}
-func rewriteValueARM64_OpARM64MVN_0(v *Value) bool {
- // match: (MVN (MOVDconst [c]))
- // cond:
- // result: (MOVDconst [^c])
+ // match: (MOVHstore [i] {s} ptr0 (SRLconst [16] (MOVDreg w)) x:(MOVHstore [i-2] {s} ptr1 w mem))
+ // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
+ // result: (MOVWstore [i-2] {s} ptr0 w mem)
for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[2]
+ ptr0 := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
break
}
- c := v_0.AuxInt
- v.reset(OpARM64MOVDconst)
- v.AuxInt = ^c
+ if v_1.AuxInt != 16 {
+ break
+ }
+ v_1_0 := v_1.Args[0]
+ if v_1_0.Op != OpARM64MOVDreg {
+ break
+ }
+ w := v_1_0.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVHstore {
+ break
+ }
+ if x.AuxInt != i-2 {
+ break
+ }
+ if x.Aux != s {
+ break
+ }
+ _ = x.Args[2]
+ ptr1 := x.Args[0]
+ if w != x.Args[1] {
+ break
+ }
+ mem := x.Args[2]
+ if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVWstore)
+ v.AuxInt = i - 2
+ v.Aux = s
+ v.AddArg(ptr0)
+ v.AddArg(w)
+ v.AddArg(mem)
return true
}
- return false
-}
-func rewriteValueARM64_OpARM64NEG_0(v *Value) bool {
- // match: (NEG (MUL x y))
- // cond:
- // result: (MNEG x y)
+ // match: (MOVHstore [2] {s} (ADD ptr0 idx0) (SRLconst [16] (MOVDreg w)) x:(MOVHstoreidx ptr1 idx1 w mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVWstoreidx ptr1 idx1 w mem)
for {
+ if v.AuxInt != 2 {
+ break
+ }
+ s := v.Aux
+ _ = v.Args[2]
v_0 := v.Args[0]
- if v_0.Op != OpARM64MUL {
+ if v_0.Op != OpARM64ADD {
break
}
_ = v_0.Args[1]
- x := v_0.Args[0]
- y := v_0.Args[1]
- v.reset(OpARM64MNEG)
- v.AddArg(x)
- v.AddArg(y)
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
+ break
+ }
+ if v_1.AuxInt != 16 {
+ break
+ }
+ v_1_0 := v_1.Args[0]
+ if v_1_0.Op != OpARM64MOVDreg {
+ break
+ }
+ w := v_1_0.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVHstoreidx {
+ break
+ }
+ _ = x.Args[3]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ if w != x.Args[2] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVWstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(w)
+ v.AddArg(mem)
return true
}
- // match: (NEG (MULW x y))
- // cond:
- // result: (MNEGW x y)
+ // match: (MOVHstore [i] {s} ptr0 (SRLconst [j] w) x:(MOVHstore [i-2] {s} ptr1 w0:(SRLconst [j-16] w) mem))
+ // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
+ // result: (MOVWstore [i-2] {s} ptr0 w0 mem)
for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64MULW {
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[2]
+ ptr0 := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
break
}
- _ = v_0.Args[1]
- x := v_0.Args[0]
- y := v_0.Args[1]
- v.reset(OpARM64MNEGW)
- v.AddArg(x)
- v.AddArg(y)
+ j := v_1.AuxInt
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVHstore {
+ break
+ }
+ if x.AuxInt != i-2 {
+ break
+ }
+ if x.Aux != s {
+ break
+ }
+ _ = x.Args[2]
+ ptr1 := x.Args[0]
+ w0 := x.Args[1]
+ if w0.Op != OpARM64SRLconst {
+ break
+ }
+ if w0.AuxInt != j-16 {
+ break
+ }
+ if w != w0.Args[0] {
+ break
+ }
+ mem := x.Args[2]
+ if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVWstore)
+ v.AuxInt = i - 2
+ v.Aux = s
+ v.AddArg(ptr0)
+ v.AddArg(w0)
+ v.AddArg(mem)
return true
}
- // match: (NEG (MOVDconst [c]))
- // cond:
- // result: (MOVDconst [-c])
+ // match: (MOVHstore [2] {s} (ADD ptr0 idx0) (SRLconst [j] w) x:(MOVHstoreidx ptr1 idx1 w0:(SRLconst [j-16] w) mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVWstoreidx ptr1 idx1 w0 mem)
for {
+ if v.AuxInt != 2 {
+ break
+ }
+ s := v.Aux
+ _ = v.Args[2]
v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ if v_0.Op != OpARM64ADD {
break
}
- c := v_0.AuxInt
- v.reset(OpARM64MOVDconst)
- v.AuxInt = -c
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
+ break
+ }
+ j := v_1.AuxInt
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVHstoreidx {
+ break
+ }
+ _ = x.Args[3]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ w0 := x.Args[2]
+ if w0.Op != OpARM64SRLconst {
+ break
+ }
+ if w0.AuxInt != j-16 {
+ break
+ }
+ if w != w0.Args[0] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVWstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(w0)
+ v.AddArg(mem)
return true
}
return false
}
-func rewriteValueARM64_OpARM64NotEqual_0(v *Value) bool {
- // match: (NotEqual (FlagEQ))
+func rewriteValueARM64_OpARM64MOVHstoreidx_0(v *Value) bool {
+ // match: (MOVHstoreidx ptr (MOVDconst [c]) val mem)
// cond:
- // result: (MOVDconst [0])
+ // result: (MOVHstore [c] ptr val mem)
for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64FlagEQ {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 0
+ c := v_1.AuxInt
+ val := v.Args[2]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(val)
+ v.AddArg(mem)
return true
}
- // match: (NotEqual (FlagLT_ULT))
+ // match: (MOVHstoreidx (MOVDconst [c]) idx val mem)
// cond:
- // result: (MOVDconst [1])
+ // result: (MOVHstore [c] idx val mem)
for {
+ _ = v.Args[3]
v_0 := v.Args[0]
- if v_0.Op != OpARM64FlagLT_ULT {
+ if v_0.Op != OpARM64MOVDconst {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 1
+ c := v_0.AuxInt
+ idx := v.Args[1]
+ val := v.Args[2]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVHstore)
+ v.AuxInt = c
+ v.AddArg(idx)
+ v.AddArg(val)
+ v.AddArg(mem)
return true
}
- // match: (NotEqual (FlagLT_UGT))
+ // match: (MOVHstoreidx ptr idx (MOVDconst [0]) mem)
// cond:
- // result: (MOVDconst [1])
+ // result: (MOVHstorezeroidx ptr idx mem)
for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64FlagLT_UGT {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVDconst {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 1
- return true
- }
- // match: (NotEqual (FlagGT_ULT))
+ if v_2.AuxInt != 0 {
+ break
+ }
+ mem := v.Args[3]
+ v.reset(OpARM64MOVHstorezeroidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVHstoreidx ptr idx (MOVHreg x) mem)
// cond:
- // result: (MOVDconst [1])
+ // result: (MOVHstoreidx ptr idx x mem)
for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64FlagGT_ULT {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVHreg {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 1
+ x := v_2.Args[0]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(x)
+ v.AddArg(mem)
return true
}
- // match: (NotEqual (FlagGT_UGT))
+ // match: (MOVHstoreidx ptr idx (MOVHUreg x) mem)
// cond:
- // result: (MOVDconst [1])
+ // result: (MOVHstoreidx ptr idx x mem)
for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64FlagGT_UGT {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVHUreg {
break
}
- v.reset(OpARM64MOVDconst)
- v.AuxInt = 1
+ x := v_2.Args[0]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(x)
+ v.AddArg(mem)
return true
}
- // match: (NotEqual (InvertFlags x))
+ // match: (MOVHstoreidx ptr idx (MOVWreg x) mem)
// cond:
- // result: (NotEqual x)
+ // result: (MOVHstoreidx ptr idx x mem)
for {
- v_0 := v.Args[0]
- if v_0.Op != OpARM64InvertFlags {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVWreg {
break
}
- x := v_0.Args[0]
- v.reset(OpARM64NotEqual)
+ x := v_2.Args[0]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(x)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVHstoreidx ptr idx (MOVWUreg x) mem)
+ // cond:
+ // result: (MOVHstoreidx ptr idx x mem)
+ for {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVWUreg {
+ break
+ }
+ x := v_2.Args[0]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVHstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
v.AddArg(x)
+ v.AddArg(mem)
return true
}
return false
}
-func rewriteValueARM64_OpARM64OR_0(v *Value) bool {
- // match: (OR x (MOVDconst [c]))
- // cond:
- // result: (ORconst [c] x)
+func rewriteValueARM64_OpARM64MOVHstorezero_0(v *Value) bool {
+ b := v.Block
+ _ = b
+ config := b.Func.Config
+ _ = config
+ // match: (MOVHstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
+ // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVHstorezero [off1+off2] {sym} ptr mem)
for {
+ off1 := v.AuxInt
+ sym := v.Aux
_ = v.Args[1]
- x := v.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64MOVDconst {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADDconst {
break
}
- c := v_1.AuxInt
- v.reset(OpARM64ORconst)
- v.AuxInt = c
- v.AddArg(x)
+ off2 := v_0.AuxInt
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ break
+ }
+ v.reset(OpARM64MOVHstorezero)
+ v.AuxInt = off1 + off2
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(mem)
return true
}
- // match: (OR (MOVDconst [c]) x)
- // cond:
- // result: (ORconst [c] x)
+ // match: (MOVHstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
+ // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
for {
+ off1 := v.AuxInt
+ sym1 := v.Aux
_ = v.Args[1]
v_0 := v.Args[0]
- if v_0.Op != OpARM64MOVDconst {
+ if v_0.Op != OpARM64MOVDaddr {
break
}
- c := v_0.AuxInt
+ off2 := v_0.AuxInt
+ sym2 := v_0.Aux
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ break
+ }
+ v.reset(OpARM64MOVHstorezero)
+ v.AuxInt = off1 + off2
+ v.Aux = mergeSym(sym1, sym2)
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVHstorezero [off] {sym} (ADD ptr idx) mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVHstorezeroidx ptr idx mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ mem := v.Args[1]
+ if !(off == 0 && sym == nil) {
+ break
+ }
+ v.reset(OpARM64MOVHstorezeroidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVHstorezero [i] {s} ptr0 x:(MOVHstorezero [j] {s} ptr1 mem))
+ // cond: x.Uses == 1 && areAdjacentOffsets(i,j,2) && is32Bit(min(i,j)) && isSamePtr(ptr0, ptr1) && clobber(x)
+ // result: (MOVWstorezero [min(i,j)] {s} ptr0 mem)
+ for {
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[1]
+ ptr0 := v.Args[0]
x := v.Args[1]
- v.reset(OpARM64ORconst)
- v.AuxInt = c
- v.AddArg(x)
+ if x.Op != OpARM64MOVHstorezero {
+ break
+ }
+ j := x.AuxInt
+ if x.Aux != s {
+ break
+ }
+ _ = x.Args[1]
+ ptr1 := x.Args[0]
+ mem := x.Args[1]
+ if !(x.Uses == 1 && areAdjacentOffsets(i, j, 2) && is32Bit(min(i, j)) && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVWstorezero)
+ v.AuxInt = min(i, j)
+ v.Aux = s
+ v.AddArg(ptr0)
+ v.AddArg(mem)
return true
}
- // match: (OR x x)
- // cond:
- // result: x
+ // match: (MOVHstorezero [2] {s} (ADD ptr0 idx0) x:(MOVHstorezeroidx ptr1 idx1 mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVWstorezeroidx ptr1 idx1 mem)
for {
+ if v.AuxInt != 2 {
+ break
+ }
+ s := v.Aux
_ = v.Args[1]
- x := v.Args[0]
- if x != v.Args[1] {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
break
}
- v.reset(OpCopy)
- v.Type = x.Type
- v.AddArg(x)
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ x := v.Args[1]
+ if x.Op != OpARM64MOVHstorezeroidx {
+ break
+ }
+ _ = x.Args[2]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ mem := x.Args[2]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVWstorezeroidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(mem)
return true
}
- // match: (OR x (MVN y))
+ return false
+}
+func rewriteValueARM64_OpARM64MOVHstorezeroidx_0(v *Value) bool {
+ // match: (MOVHstorezeroidx ptr (MOVDconst [c]) mem)
// cond:
- // result: (ORN x y)
+ // result: (MOVHstorezero [c] ptr mem)
for {
- _ = v.Args[1]
- x := v.Args[0]
+ _ = v.Args[2]
+ ptr := v.Args[0]
v_1 := v.Args[1]
- if v_1.Op != OpARM64MVN {
+ if v_1.Op != OpARM64MOVDconst {
break
}
- y := v_1.Args[0]
- v.reset(OpARM64ORN)
- v.AddArg(x)
- v.AddArg(y)
+ c := v_1.AuxInt
+ mem := v.Args[2]
+ v.reset(OpARM64MOVHstorezero)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
return true
}
- // match: (OR (MVN y) x)
+ // match: (MOVHstorezeroidx (MOVDconst [c]) idx mem)
// cond:
- // result: (ORN x y)
+ // result: (MOVHstorezero [c] idx mem)
for {
- _ = v.Args[1]
+ _ = v.Args[2]
v_0 := v.Args[0]
- if v_0.Op != OpARM64MVN {
+ if v_0.Op != OpARM64MOVDconst {
break
}
- y := v_0.Args[0]
- x := v.Args[1]
- v.reset(OpARM64ORN)
- v.AddArg(x)
- v.AddArg(y)
+ c := v_0.AuxInt
+ idx := v.Args[1]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVHstorezero)
+ v.AuxInt = c
+ v.AddArg(idx)
+ v.AddArg(mem)
return true
}
- // match: (OR x0 x1:(SLLconst [c] y))
- // cond: clobberIfDead(x1)
- // result: (ORshiftLL x0 y [c])
+ return false
+}
+func rewriteValueARM64_OpARM64MOVQstorezero_0(v *Value) bool {
+ b := v.Block
+ _ = b
+ config := b.Func.Config
+ _ = config
+ // match: (MOVQstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
+ // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVQstorezero [off1+off2] {sym} ptr mem)
for {
+ off1 := v.AuxInt
+ sym := v.Aux
_ = v.Args[1]
- x0 := v.Args[0]
- x1 := v.Args[1]
- if x1.Op != OpARM64SLLconst {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADDconst {
+ break
+ }
+ off2 := v_0.AuxInt
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ break
+ }
+ v.reset(OpARM64MOVQstorezero)
+ v.AuxInt = off1 + off2
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVQstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
+ // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVQstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
+ for {
+ off1 := v.AuxInt
+ sym1 := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDaddr {
+ break
+ }
+ off2 := v_0.AuxInt
+ sym2 := v_0.Aux
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ break
+ }
+ v.reset(OpARM64MOVQstorezero)
+ v.AuxInt = off1 + off2
+ v.Aux = mergeSym(sym1, sym2)
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVWUload_0(v *Value) bool {
+ b := v.Block
+ _ = b
+ config := b.Func.Config
+ _ = config
+ // match: (MOVWUload [off1] {sym} (ADDconst [off2] ptr) mem)
+ // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVWUload [off1+off2] {sym} ptr mem)
+ for {
+ off1 := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADDconst {
+ break
+ }
+ off2 := v_0.AuxInt
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ break
+ }
+ v.reset(OpARM64MOVWUload)
+ v.AuxInt = off1 + off2
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWUload [off] {sym} (ADD ptr idx) mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVWUloadidx ptr idx mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ mem := v.Args[1]
+ if !(off == 0 && sym == nil) {
+ break
+ }
+ v.reset(OpARM64MOVWUloadidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
+ // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVWUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
+ for {
+ off1 := v.AuxInt
+ sym1 := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDaddr {
+ break
+ }
+ off2 := v_0.AuxInt
+ sym2 := v_0.Aux
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ break
+ }
+ v.reset(OpARM64MOVWUload)
+ v.AuxInt = off1 + off2
+ v.Aux = mergeSym(sym1, sym2)
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWUload [off] {sym} ptr (MOVWstorezero [off2] {sym2} ptr2 _))
+ // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
+ // result: (MOVDconst [0])
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVWstorezero {
+ break
+ }
+ off2 := v_1.AuxInt
+ sym2 := v_1.Aux
+ _ = v_1.Args[1]
+ ptr2 := v_1.Args[0]
+ if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVWUloadidx_0(v *Value) bool {
+ // match: (MOVWUloadidx ptr (MOVDconst [c]) mem)
+ // cond:
+ // result: (MOVWUload [c] ptr mem)
+ for {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ mem := v.Args[2]
+ v.reset(OpARM64MOVWUload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWUloadidx (MOVDconst [c]) ptr mem)
+ // cond:
+ // result: (MOVWUload [c] ptr mem)
+ for {
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ ptr := v.Args[1]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVWUload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWUloadidx ptr idx (MOVWstorezeroidx ptr2 idx2 _))
+ // cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
+ // result: (MOVDconst [0])
+ for {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVWstorezeroidx {
+ break
+ }
+ _ = v_2.Args[2]
+ ptr2 := v_2.Args[0]
+ idx2 := v_2.Args[1]
+ if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVWUreg_0(v *Value) bool {
+ // match: (MOVWUreg x:(MOVBUload _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBUload {
+ break
+ }
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWUreg x:(MOVHUload _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHUload {
+ break
+ }
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWUreg x:(MOVWUload _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVWUload {
+ break
+ }
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWUreg x:(MOVBUloadidx _ _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBUloadidx {
+ break
+ }
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWUreg x:(MOVHUloadidx _ _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHUloadidx {
+ break
+ }
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWUreg x:(MOVWUloadidx _ _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVWUloadidx {
+ break
+ }
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWUreg x:(MOVBUreg _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBUreg {
+ break
+ }
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWUreg x:(MOVHUreg _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHUreg {
+ break
+ }
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWUreg x:(MOVWUreg _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVWUreg {
+ break
+ }
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWUreg (ANDconst [c] x))
+ // cond:
+ // result: (ANDconst [c&(1<<32-1)] x)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ANDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v_0.Args[0]
+ v.reset(OpARM64ANDconst)
+ v.AuxInt = c & (1<<32 - 1)
+ v.AddArg(x)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVWUreg_10(v *Value) bool {
+ // match: (MOVWUreg (MOVDconst [c]))
+ // cond:
+ // result: (MOVDconst [int64(uint32(c))])
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = int64(uint32(c))
+ return true
+ }
+ // match: (MOVWUreg (SLLconst [sc] x))
+ // cond: isARM64BFMask(sc, 1<<32-1, sc)
+ // result: (UBFIZ [arm64BFAuxInt(sc, arm64BFWidth(1<<32-1, sc))] x)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64SLLconst {
+ break
+ }
+ sc := v_0.AuxInt
+ x := v_0.Args[0]
+ if !(isARM64BFMask(sc, 1<<32-1, sc)) {
+ break
+ }
+ v.reset(OpARM64UBFIZ)
+ v.AuxInt = arm64BFAuxInt(sc, arm64BFWidth(1<<32-1, sc))
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWUreg (SRLconst [sc] x))
+ // cond: isARM64BFMask(sc, 1<<32-1, 0)
+ // result: (UBFX [arm64BFAuxInt(sc, 32)] x)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64SRLconst {
+ break
+ }
+ sc := v_0.AuxInt
+ x := v_0.Args[0]
+ if !(isARM64BFMask(sc, 1<<32-1, 0)) {
+ break
+ }
+ v.reset(OpARM64UBFX)
+ v.AuxInt = arm64BFAuxInt(sc, 32)
+ v.AddArg(x)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVWload_0(v *Value) bool {
+ b := v.Block
+ _ = b
+ config := b.Func.Config
+ _ = config
+ // match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem)
+ // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVWload [off1+off2] {sym} ptr mem)
+ for {
+ off1 := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADDconst {
+ break
+ }
+ off2 := v_0.AuxInt
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ break
+ }
+ v.reset(OpARM64MOVWload)
+ v.AuxInt = off1 + off2
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWload [off] {sym} (ADD ptr idx) mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVWloadidx ptr idx mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ mem := v.Args[1]
+ if !(off == 0 && sym == nil) {
+ break
+ }
+ v.reset(OpARM64MOVWloadidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
+ // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
+ for {
+ off1 := v.AuxInt
+ sym1 := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDaddr {
+ break
+ }
+ off2 := v_0.AuxInt
+ sym2 := v_0.Aux
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ break
+ }
+ v.reset(OpARM64MOVWload)
+ v.AuxInt = off1 + off2
+ v.Aux = mergeSym(sym1, sym2)
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWload [off] {sym} ptr (MOVWstorezero [off2] {sym2} ptr2 _))
+ // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
+ // result: (MOVDconst [0])
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVWstorezero {
+ break
+ }
+ off2 := v_1.AuxInt
+ sym2 := v_1.Aux
+ _ = v_1.Args[1]
+ ptr2 := v_1.Args[0]
+ if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVWloadidx_0(v *Value) bool {
+ // match: (MOVWloadidx ptr (MOVDconst [c]) mem)
+ // cond:
+ // result: (MOVWload [c] ptr mem)
+ for {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ mem := v.Args[2]
+ v.reset(OpARM64MOVWload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWloadidx (MOVDconst [c]) ptr mem)
+ // cond:
+ // result: (MOVWload [c] ptr mem)
+ for {
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ ptr := v.Args[1]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVWload)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWloadidx ptr idx (MOVWstorezeroidx ptr2 idx2 _))
+ // cond: (isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2))
+ // result: (MOVDconst [0])
+ for {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVWstorezeroidx {
+ break
+ }
+ _ = v_2.Args[2]
+ ptr2 := v_2.Args[0]
+ idx2 := v_2.Args[1]
+ if !(isSamePtr(ptr, ptr2) && isSamePtr(idx, idx2) || isSamePtr(ptr, idx2) && isSamePtr(idx, ptr2)) {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVWreg_0(v *Value) bool {
+ // match: (MOVWreg x:(MOVBload _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBload {
+ break
+ }
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVBUload _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBUload {
+ break
+ }
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVHload _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHload {
+ break
+ }
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVHUload _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHUload {
+ break
+ }
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVWload _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVWload {
+ break
+ }
+ _ = x.Args[1]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVBloadidx _ _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBloadidx {
+ break
+ }
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVBUloadidx _ _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBUloadidx {
+ break
+ }
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVHloadidx _ _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHloadidx {
+ break
+ }
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVHUloadidx _ _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHUloadidx {
+ break
+ }
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVWloadidx _ _ _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVWloadidx {
+ break
+ }
+ _ = x.Args[2]
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVWreg_10(v *Value) bool {
+ // match: (MOVWreg x:(MOVBreg _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBreg {
+ break
+ }
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVBUreg _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVBUreg {
+ break
+ }
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVHreg _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHreg {
+ break
+ }
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVHreg _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVHreg {
+ break
+ }
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg x:(MOVWreg _))
+ // cond:
+ // result: (MOVDreg x)
+ for {
+ x := v.Args[0]
+ if x.Op != OpARM64MOVWreg {
+ break
+ }
+ v.reset(OpARM64MOVDreg)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MOVWreg (MOVDconst [c]))
+ // cond:
+ // result: (MOVDconst [int64(int32(c))])
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = int64(int32(c))
+ return true
+ }
+ // match: (MOVWreg (SLLconst [lc] x))
+ // cond: lc < 32
+ // result: (SBFIZ [arm64BFAuxInt(lc, 32-lc)] x)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64SLLconst {
+ break
+ }
+ lc := v_0.AuxInt
+ x := v_0.Args[0]
+ if !(lc < 32) {
+ break
+ }
+ v.reset(OpARM64SBFIZ)
+ v.AuxInt = arm64BFAuxInt(lc, 32-lc)
+ v.AddArg(x)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVWstore_0(v *Value) bool {
+ b := v.Block
+ _ = b
+ config := b.Func.Config
+ _ = config
+ // match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem)
+ // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVWstore [off1+off2] {sym} ptr val mem)
+ for {
+ off1 := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADDconst {
+ break
+ }
+ off2 := v_0.AuxInt
+ ptr := v_0.Args[0]
+ val := v.Args[1]
+ mem := v.Args[2]
+ if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ break
+ }
+ v.reset(OpARM64MOVWstore)
+ v.AuxInt = off1 + off2
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(val)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstore [off] {sym} (ADD ptr idx) val mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVWstoreidx ptr idx val mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ val := v.Args[1]
+ mem := v.Args[2]
+ if !(off == 0 && sym == nil) {
+ break
+ }
+ v.reset(OpARM64MOVWstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(val)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
+ // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
+ for {
+ off1 := v.AuxInt
+ sym1 := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDaddr {
+ break
+ }
+ off2 := v_0.AuxInt
+ sym2 := v_0.Aux
+ ptr := v_0.Args[0]
+ val := v.Args[1]
+ mem := v.Args[2]
+ if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ break
+ }
+ v.reset(OpARM64MOVWstore)
+ v.AuxInt = off1 + off2
+ v.Aux = mergeSym(sym1, sym2)
+ v.AddArg(ptr)
+ v.AddArg(val)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstore [off] {sym} ptr (MOVDconst [0]) mem)
+ // cond:
+ // result: (MOVWstorezero [off] {sym} ptr mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ if v_1.AuxInt != 0 {
+ break
+ }
+ mem := v.Args[2]
+ v.reset(OpARM64MOVWstorezero)
+ v.AuxInt = off
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
+ // cond:
+ // result: (MOVWstore [off] {sym} ptr x mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVWreg {
+ break
+ }
+ x := v_1.Args[0]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVWstore)
+ v.AuxInt = off
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(x)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstore [off] {sym} ptr (MOVWUreg x) mem)
+ // cond:
+ // result: (MOVWstore [off] {sym} ptr x mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVWUreg {
+ break
+ }
+ x := v_1.Args[0]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVWstore)
+ v.AuxInt = off
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(x)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstore [i] {s} ptr0 (SRLconst [32] w) x:(MOVWstore [i-4] {s} ptr1 w mem))
+ // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
+ // result: (MOVDstore [i-4] {s} ptr0 w mem)
+ for {
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[2]
+ ptr0 := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
+ break
+ }
+ if v_1.AuxInt != 32 {
+ break
+ }
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVWstore {
+ break
+ }
+ if x.AuxInt != i-4 {
+ break
+ }
+ if x.Aux != s {
+ break
+ }
+ _ = x.Args[2]
+ ptr1 := x.Args[0]
+ if w != x.Args[1] {
+ break
+ }
+ mem := x.Args[2]
+ if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVDstore)
+ v.AuxInt = i - 4
+ v.Aux = s
+ v.AddArg(ptr0)
+ v.AddArg(w)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstore [4] {s} (ADD ptr0 idx0) (SRLconst [32] w) x:(MOVWstoreidx ptr1 idx1 w mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVDstoreidx ptr1 idx1 w mem)
+ for {
+ if v.AuxInt != 4 {
+ break
+ }
+ s := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
+ break
+ }
+ if v_1.AuxInt != 32 {
+ break
+ }
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVWstoreidx {
+ break
+ }
+ _ = x.Args[3]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ if w != x.Args[2] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVDstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(w)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstore [i] {s} ptr0 (SRLconst [j] w) x:(MOVWstore [i-4] {s} ptr1 w0:(SRLconst [j-32] w) mem))
+ // cond: x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)
+ // result: (MOVDstore [i-4] {s} ptr0 w0 mem)
+ for {
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[2]
+ ptr0 := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
+ break
+ }
+ j := v_1.AuxInt
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVWstore {
+ break
+ }
+ if x.AuxInt != i-4 {
+ break
+ }
+ if x.Aux != s {
+ break
+ }
+ _ = x.Args[2]
+ ptr1 := x.Args[0]
+ w0 := x.Args[1]
+ if w0.Op != OpARM64SRLconst {
+ break
+ }
+ if w0.AuxInt != j-32 {
+ break
+ }
+ if w != w0.Args[0] {
+ break
+ }
+ mem := x.Args[2]
+ if !(x.Uses == 1 && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVDstore)
+ v.AuxInt = i - 4
+ v.Aux = s
+ v.AddArg(ptr0)
+ v.AddArg(w0)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstore [4] {s} (ADD ptr0 idx0) (SRLconst [j] w) x:(MOVWstoreidx ptr1 idx1 w0:(SRLconst [j-32] w) mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVDstoreidx ptr1 idx1 w0 mem)
+ for {
+ if v.AuxInt != 4 {
+ break
+ }
+ s := v.Aux
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64SRLconst {
+ break
+ }
+ j := v_1.AuxInt
+ w := v_1.Args[0]
+ x := v.Args[2]
+ if x.Op != OpARM64MOVWstoreidx {
+ break
+ }
+ _ = x.Args[3]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ w0 := x.Args[2]
+ if w0.Op != OpARM64SRLconst {
+ break
+ }
+ if w0.AuxInt != j-32 {
+ break
+ }
+ if w != w0.Args[0] {
+ break
+ }
+ mem := x.Args[3]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVDstoreidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(w0)
+ v.AddArg(mem)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVWstoreidx_0(v *Value) bool {
+ // match: (MOVWstoreidx ptr (MOVDconst [c]) val mem)
+ // cond:
+ // result: (MOVWstore [c] ptr val mem)
+ for {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ val := v.Args[2]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVWstore)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(val)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstoreidx (MOVDconst [c]) idx val mem)
+ // cond:
+ // result: (MOVWstore [c] idx val mem)
+ for {
+ _ = v.Args[3]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ idx := v.Args[1]
+ val := v.Args[2]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVWstore)
+ v.AuxInt = c
+ v.AddArg(idx)
+ v.AddArg(val)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstoreidx ptr idx (MOVDconst [0]) mem)
+ // cond:
+ // result: (MOVWstorezeroidx ptr idx mem)
+ for {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVDconst {
+ break
+ }
+ if v_2.AuxInt != 0 {
+ break
+ }
+ mem := v.Args[3]
+ v.reset(OpARM64MOVWstorezeroidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstoreidx ptr idx (MOVWreg x) mem)
+ // cond:
+ // result: (MOVWstoreidx ptr idx x mem)
+ for {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVWreg {
+ break
+ }
+ x := v_2.Args[0]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVWstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(x)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstoreidx ptr idx (MOVWUreg x) mem)
+ // cond:
+ // result: (MOVWstoreidx ptr idx x mem)
+ for {
+ _ = v.Args[3]
+ ptr := v.Args[0]
+ idx := v.Args[1]
+ v_2 := v.Args[2]
+ if v_2.Op != OpARM64MOVWUreg {
+ break
+ }
+ x := v_2.Args[0]
+ mem := v.Args[3]
+ v.reset(OpARM64MOVWstoreidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(x)
+ v.AddArg(mem)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVWstorezero_0(v *Value) bool {
+ b := v.Block
+ _ = b
+ config := b.Func.Config
+ _ = config
+ // match: (MOVWstorezero [off1] {sym} (ADDconst [off2] ptr) mem)
+ // cond: is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVWstorezero [off1+off2] {sym} ptr mem)
+ for {
+ off1 := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADDconst {
+ break
+ }
+ off2 := v_0.AuxInt
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ break
+ }
+ v.reset(OpARM64MOVWstorezero)
+ v.AuxInt = off1 + off2
+ v.Aux = sym
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstorezero [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
+ // cond: canMergeSym(sym1,sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)
+ // result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
+ for {
+ off1 := v.AuxInt
+ sym1 := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDaddr {
+ break
+ }
+ off2 := v_0.AuxInt
+ sym2 := v_0.Aux
+ ptr := v_0.Args[0]
+ mem := v.Args[1]
+ if !(canMergeSym(sym1, sym2) && is32Bit(off1+off2) && (ptr.Op != OpSB || !config.ctxt.Flag_shared)) {
+ break
+ }
+ v.reset(OpARM64MOVWstorezero)
+ v.AuxInt = off1 + off2
+ v.Aux = mergeSym(sym1, sym2)
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstorezero [off] {sym} (ADD ptr idx) mem)
+ // cond: off == 0 && sym == nil
+ // result: (MOVWstorezeroidx ptr idx mem)
+ for {
+ off := v.AuxInt
+ sym := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr := v_0.Args[0]
+ idx := v_0.Args[1]
+ mem := v.Args[1]
+ if !(off == 0 && sym == nil) {
+ break
+ }
+ v.reset(OpARM64MOVWstorezeroidx)
+ v.AddArg(ptr)
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstorezero [i] {s} ptr0 x:(MOVWstorezero [j] {s} ptr1 mem))
+ // cond: x.Uses == 1 && areAdjacentOffsets(i,j,4) && is32Bit(min(i,j)) && isSamePtr(ptr0, ptr1) && clobber(x)
+ // result: (MOVDstorezero [min(i,j)] {s} ptr0 mem)
+ for {
+ i := v.AuxInt
+ s := v.Aux
+ _ = v.Args[1]
+ ptr0 := v.Args[0]
+ x := v.Args[1]
+ if x.Op != OpARM64MOVWstorezero {
+ break
+ }
+ j := x.AuxInt
+ if x.Aux != s {
+ break
+ }
+ _ = x.Args[1]
+ ptr1 := x.Args[0]
+ mem := x.Args[1]
+ if !(x.Uses == 1 && areAdjacentOffsets(i, j, 4) && is32Bit(min(i, j)) && isSamePtr(ptr0, ptr1) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVDstorezero)
+ v.AuxInt = min(i, j)
+ v.Aux = s
+ v.AddArg(ptr0)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstorezero [4] {s} (ADD ptr0 idx0) x:(MOVWstorezeroidx ptr1 idx1 mem))
+ // cond: x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)
+ // result: (MOVDstorezeroidx ptr1 idx1 mem)
+ for {
+ if v.AuxInt != 4 {
+ break
+ }
+ s := v.Aux
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ADD {
+ break
+ }
+ _ = v_0.Args[1]
+ ptr0 := v_0.Args[0]
+ idx0 := v_0.Args[1]
+ x := v.Args[1]
+ if x.Op != OpARM64MOVWstorezeroidx {
+ break
+ }
+ _ = x.Args[2]
+ ptr1 := x.Args[0]
+ idx1 := x.Args[1]
+ mem := x.Args[2]
+ if !(x.Uses == 1 && s == nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x)) {
+ break
+ }
+ v.reset(OpARM64MOVDstorezeroidx)
+ v.AddArg(ptr1)
+ v.AddArg(idx1)
+ v.AddArg(mem)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MOVWstorezeroidx_0(v *Value) bool {
+ // match: (MOVWstorezeroidx ptr (MOVDconst [c]) mem)
+ // cond:
+ // result: (MOVWstorezero [c] ptr mem)
+ for {
+ _ = v.Args[2]
+ ptr := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ mem := v.Args[2]
+ v.reset(OpARM64MOVWstorezero)
+ v.AuxInt = c
+ v.AddArg(ptr)
+ v.AddArg(mem)
+ return true
+ }
+ // match: (MOVWstorezeroidx (MOVDconst [c]) idx mem)
+ // cond:
+ // result: (MOVWstorezero [c] idx mem)
+ for {
+ _ = v.Args[2]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ idx := v.Args[1]
+ mem := v.Args[2]
+ v.reset(OpARM64MOVWstorezero)
+ v.AuxInt = c
+ v.AddArg(idx)
+ v.AddArg(mem)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MUL_0(v *Value) bool {
+ // match: (MUL (NEG x) y)
+ // cond:
+ // result: (MNEG x y)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64NEG {
+ break
+ }
+ x := v_0.Args[0]
+ y := v.Args[1]
+ v.reset(OpARM64MNEG)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ // match: (MUL y (NEG x))
+ // cond:
+ // result: (MNEG x y)
+ for {
+ _ = v.Args[1]
+ y := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64NEG {
+ break
+ }
+ x := v_1.Args[0]
+ v.reset(OpARM64MNEG)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ // match: (MUL x (MOVDconst [-1]))
+ // cond:
+ // result: (NEG x)
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ if v_1.AuxInt != -1 {
+ break
+ }
+ v.reset(OpARM64NEG)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MUL (MOVDconst [-1]) x)
+ // cond:
+ // result: (NEG x)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ if v_0.AuxInt != -1 {
+ break
+ }
+ x := v.Args[1]
+ v.reset(OpARM64NEG)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MUL _ (MOVDconst [0]))
+ // cond:
+ // result: (MOVDconst [0])
+ for {
+ _ = v.Args[1]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ if v_1.AuxInt != 0 {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
+ return true
+ }
+ // match: (MUL (MOVDconst [0]) _)
+ // cond:
+ // result: (MOVDconst [0])
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ if v_0.AuxInt != 0 {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
+ return true
+ }
+ // match: (MUL x (MOVDconst [1]))
+ // cond:
+ // result: x
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ if v_1.AuxInt != 1 {
+ break
+ }
+ v.reset(OpCopy)
+ v.Type = x.Type
+ v.AddArg(x)
+ return true
+ }
+ // match: (MUL (MOVDconst [1]) x)
+ // cond:
+ // result: x
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ if v_0.AuxInt != 1 {
+ break
+ }
+ x := v.Args[1]
+ v.reset(OpCopy)
+ v.Type = x.Type
+ v.AddArg(x)
+ return true
+ }
+ // match: (MUL x (MOVDconst [c]))
+ // cond: isPowerOfTwo(c)
+ // result: (SLLconst [log2(c)] x)
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(isPowerOfTwo(c)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MUL (MOVDconst [c]) x)
+ // cond: isPowerOfTwo(c)
+ // result: (SLLconst [log2(c)] x)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(isPowerOfTwo(c)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c)
+ v.AddArg(x)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MUL_10(v *Value) bool {
+ b := v.Block
+ _ = b
+ // match: (MUL x (MOVDconst [c]))
+ // cond: isPowerOfTwo(c-1) && c >= 3
+ // result: (ADDshiftLL x x [log2(c-1)])
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(isPowerOfTwo(c-1) && c >= 3) {
+ break
+ }
+ v.reset(OpARM64ADDshiftLL)
+ v.AuxInt = log2(c - 1)
+ v.AddArg(x)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MUL (MOVDconst [c]) x)
+ // cond: isPowerOfTwo(c-1) && c >= 3
+ // result: (ADDshiftLL x x [log2(c-1)])
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(isPowerOfTwo(c-1) && c >= 3) {
+ break
+ }
+ v.reset(OpARM64ADDshiftLL)
+ v.AuxInt = log2(c - 1)
+ v.AddArg(x)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MUL x (MOVDconst [c]))
+ // cond: isPowerOfTwo(c+1) && c >= 7
+ // result: (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(isPowerOfTwo(c+1) && c >= 7) {
+ break
+ }
+ v.reset(OpARM64ADDshiftLL)
+ v.AuxInt = log2(c + 1)
+ v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MUL (MOVDconst [c]) x)
+ // cond: isPowerOfTwo(c+1) && c >= 7
+ // result: (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(isPowerOfTwo(c+1) && c >= 7) {
+ break
+ }
+ v.reset(OpARM64ADDshiftLL)
+ v.AuxInt = log2(c + 1)
+ v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MUL x (MOVDconst [c]))
+ // cond: c%3 == 0 && isPowerOfTwo(c/3)
+ // result: (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(c%3 == 0 && isPowerOfTwo(c/3)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 3)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 1
+ v0.AddArg(x)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MUL (MOVDconst [c]) x)
+ // cond: c%3 == 0 && isPowerOfTwo(c/3)
+ // result: (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(c%3 == 0 && isPowerOfTwo(c/3)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 3)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 1
+ v0.AddArg(x)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MUL x (MOVDconst [c]))
+ // cond: c%5 == 0 && isPowerOfTwo(c/5)
+ // result: (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(c%5 == 0 && isPowerOfTwo(c/5)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 5)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 2
+ v0.AddArg(x)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MUL (MOVDconst [c]) x)
+ // cond: c%5 == 0 && isPowerOfTwo(c/5)
+ // result: (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(c%5 == 0 && isPowerOfTwo(c/5)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 5)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 2
+ v0.AddArg(x)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MUL x (MOVDconst [c]))
+ // cond: c%7 == 0 && isPowerOfTwo(c/7)
+ // result: (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(c%7 == 0 && isPowerOfTwo(c/7)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 7)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 3
+ v1 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
+ v1.AddArg(x)
+ v0.AddArg(v1)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MUL (MOVDconst [c]) x)
+ // cond: c%7 == 0 && isPowerOfTwo(c/7)
+ // result: (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(c%7 == 0 && isPowerOfTwo(c/7)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 7)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 3
+ v1 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
+ v1.AddArg(x)
+ v0.AddArg(v1)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MUL_20(v *Value) bool {
+ b := v.Block
+ _ = b
+ // match: (MUL x (MOVDconst [c]))
+ // cond: c%9 == 0 && isPowerOfTwo(c/9)
+ // result: (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(c%9 == 0 && isPowerOfTwo(c/9)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 9)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 3
+ v0.AddArg(x)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MUL (MOVDconst [c]) x)
+ // cond: c%9 == 0 && isPowerOfTwo(c/9)
+ // result: (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(c%9 == 0 && isPowerOfTwo(c/9)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 9)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 3
+ v0.AddArg(x)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MUL (MOVDconst [c]) (MOVDconst [d]))
+ // cond:
+ // result: (MOVDconst [c*d])
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ d := v_1.AuxInt
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = c * d
+ return true
+ }
+ // match: (MUL (MOVDconst [d]) (MOVDconst [c]))
+ // cond:
+ // result: (MOVDconst [c*d])
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ d := v_0.AuxInt
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = c * d
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MULW_0(v *Value) bool {
+ // match: (MULW (NEG x) y)
+ // cond:
+ // result: (MNEGW x y)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64NEG {
+ break
+ }
+ x := v_0.Args[0]
+ y := v.Args[1]
+ v.reset(OpARM64MNEGW)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ // match: (MULW y (NEG x))
+ // cond:
+ // result: (MNEGW x y)
+ for {
+ _ = v.Args[1]
+ y := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64NEG {
+ break
+ }
+ x := v_1.Args[0]
+ v.reset(OpARM64MNEGW)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ // match: (MULW x (MOVDconst [c]))
+ // cond: int32(c)==-1
+ // result: (NEG x)
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(int32(c) == -1) {
+ break
+ }
+ v.reset(OpARM64NEG)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MULW (MOVDconst [c]) x)
+ // cond: int32(c)==-1
+ // result: (NEG x)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(int32(c) == -1) {
+ break
+ }
+ v.reset(OpARM64NEG)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MULW _ (MOVDconst [c]))
+ // cond: int32(c)==0
+ // result: (MOVDconst [0])
+ for {
+ _ = v.Args[1]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(int32(c) == 0) {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
+ return true
+ }
+ // match: (MULW (MOVDconst [c]) _)
+ // cond: int32(c)==0
+ // result: (MOVDconst [0])
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ if !(int32(c) == 0) {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
+ return true
+ }
+ // match: (MULW x (MOVDconst [c]))
+ // cond: int32(c)==1
+ // result: x
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(int32(c) == 1) {
+ break
+ }
+ v.reset(OpCopy)
+ v.Type = x.Type
+ v.AddArg(x)
+ return true
+ }
+ // match: (MULW (MOVDconst [c]) x)
+ // cond: int32(c)==1
+ // result: x
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(int32(c) == 1) {
+ break
+ }
+ v.reset(OpCopy)
+ v.Type = x.Type
+ v.AddArg(x)
+ return true
+ }
+ // match: (MULW x (MOVDconst [c]))
+ // cond: isPowerOfTwo(c)
+ // result: (SLLconst [log2(c)] x)
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(isPowerOfTwo(c)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MULW (MOVDconst [c]) x)
+ // cond: isPowerOfTwo(c)
+ // result: (SLLconst [log2(c)] x)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(isPowerOfTwo(c)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c)
+ v.AddArg(x)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MULW_10(v *Value) bool {
+ b := v.Block
+ _ = b
+ // match: (MULW x (MOVDconst [c]))
+ // cond: isPowerOfTwo(c-1) && int32(c) >= 3
+ // result: (ADDshiftLL x x [log2(c-1)])
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
+ break
+ }
+ v.reset(OpARM64ADDshiftLL)
+ v.AuxInt = log2(c - 1)
+ v.AddArg(x)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MULW (MOVDconst [c]) x)
+ // cond: isPowerOfTwo(c-1) && int32(c) >= 3
+ // result: (ADDshiftLL x x [log2(c-1)])
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(isPowerOfTwo(c-1) && int32(c) >= 3) {
+ break
+ }
+ v.reset(OpARM64ADDshiftLL)
+ v.AuxInt = log2(c - 1)
+ v.AddArg(x)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MULW x (MOVDconst [c]))
+ // cond: isPowerOfTwo(c+1) && int32(c) >= 7
+ // result: (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
+ break
+ }
+ v.reset(OpARM64ADDshiftLL)
+ v.AuxInt = log2(c + 1)
+ v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MULW (MOVDconst [c]) x)
+ // cond: isPowerOfTwo(c+1) && int32(c) >= 7
+ // result: (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(isPowerOfTwo(c+1) && int32(c) >= 7) {
+ break
+ }
+ v.reset(OpARM64ADDshiftLL)
+ v.AuxInt = log2(c + 1)
+ v0 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ v.AddArg(x)
+ return true
+ }
+ // match: (MULW x (MOVDconst [c]))
+ // cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
+ // result: (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 3)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 1
+ v0.AddArg(x)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MULW (MOVDconst [c]) x)
+ // cond: c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)
+ // result: (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 3)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 1
+ v0.AddArg(x)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MULW x (MOVDconst [c]))
+ // cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
+ // result: (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 5)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 2
+ v0.AddArg(x)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MULW (MOVDconst [c]) x)
+ // cond: c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)
+ // result: (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 5)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 2
+ v0.AddArg(x)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MULW x (MOVDconst [c]))
+ // cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
+ // result: (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 7)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 3
+ v1 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
+ v1.AddArg(x)
+ v0.AddArg(v1)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MULW (MOVDconst [c]) x)
+ // cond: c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)
+ // result: (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 7)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 3
+ v1 := b.NewValue0(v.Pos, OpARM64NEG, x.Type)
+ v1.AddArg(x)
+ v0.AddArg(v1)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MULW_20(v *Value) bool {
+ b := v.Block
+ _ = b
+ // match: (MULW x (MOVDconst [c]))
+ // cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
+ // result: (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 9)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 3
+ v0.AddArg(x)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MULW (MOVDconst [c]) x)
+ // cond: c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)
+ // result: (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ if !(c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c)) {
+ break
+ }
+ v.reset(OpARM64SLLconst)
+ v.AuxInt = log2(c / 9)
+ v0 := b.NewValue0(v.Pos, OpARM64ADDshiftLL, x.Type)
+ v0.AuxInt = 3
+ v0.AddArg(x)
+ v0.AddArg(x)
+ v.AddArg(v0)
+ return true
+ }
+ // match: (MULW (MOVDconst [c]) (MOVDconst [d]))
+ // cond:
+ // result: (MOVDconst [int64(int32(c)*int32(d))])
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ d := v_1.AuxInt
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = int64(int32(c) * int32(d))
+ return true
+ }
+ // match: (MULW (MOVDconst [d]) (MOVDconst [c]))
+ // cond:
+ // result: (MOVDconst [int64(int32(c)*int32(d))])
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ d := v_0.AuxInt
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = int64(int32(c) * int32(d))
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64MVN_0(v *Value) bool {
+ // match: (MVN (MOVDconst [c]))
+ // cond:
+ // result: (MOVDconst [^c])
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = ^c
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64NEG_0(v *Value) bool {
+ // match: (NEG (MUL x y))
+ // cond:
+ // result: (MNEG x y)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MUL {
+ break
+ }
+ _ = v_0.Args[1]
+ x := v_0.Args[0]
+ y := v_0.Args[1]
+ v.reset(OpARM64MNEG)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ // match: (NEG (MULW x y))
+ // cond:
+ // result: (MNEGW x y)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MULW {
+ break
+ }
+ _ = v_0.Args[1]
+ x := v_0.Args[0]
+ y := v_0.Args[1]
+ v.reset(OpARM64MNEGW)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ // match: (NEG (MOVDconst [c]))
+ // cond:
+ // result: (MOVDconst [-c])
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = -c
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64NotEqual_0(v *Value) bool {
+ // match: (NotEqual (FlagEQ))
+ // cond:
+ // result: (MOVDconst [0])
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64FlagEQ {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 0
+ return true
+ }
+ // match: (NotEqual (FlagLT_ULT))
+ // cond:
+ // result: (MOVDconst [1])
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64FlagLT_ULT {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 1
+ return true
+ }
+ // match: (NotEqual (FlagLT_UGT))
+ // cond:
+ // result: (MOVDconst [1])
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64FlagLT_UGT {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 1
+ return true
+ }
+ // match: (NotEqual (FlagGT_ULT))
+ // cond:
+ // result: (MOVDconst [1])
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64FlagGT_ULT {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 1
+ return true
+ }
+ // match: (NotEqual (FlagGT_UGT))
+ // cond:
+ // result: (MOVDconst [1])
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64FlagGT_UGT {
+ break
+ }
+ v.reset(OpARM64MOVDconst)
+ v.AuxInt = 1
+ return true
+ }
+ // match: (NotEqual (InvertFlags x))
+ // cond:
+ // result: (NotEqual x)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64InvertFlags {
+ break
+ }
+ x := v_0.Args[0]
+ v.reset(OpARM64NotEqual)
+ v.AddArg(x)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64OR_0(v *Value) bool {
+ // match: (OR x (MOVDconst [c]))
+ // cond:
+ // result: (ORconst [c] x)
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_1.AuxInt
+ v.reset(OpARM64ORconst)
+ v.AuxInt = c
+ v.AddArg(x)
+ return true
+ }
+ // match: (OR (MOVDconst [c]) x)
+ // cond:
+ // result: (ORconst [c] x)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MOVDconst {
+ break
+ }
+ c := v_0.AuxInt
+ x := v.Args[1]
+ v.reset(OpARM64ORconst)
+ v.AuxInt = c
+ v.AddArg(x)
+ return true
+ }
+ // match: (OR x x)
+ // cond:
+ // result: x
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ if x != v.Args[1] {
+ break
+ }
+ v.reset(OpCopy)
+ v.Type = x.Type
+ v.AddArg(x)
+ return true
+ }
+ // match: (OR x (MVN y))
+ // cond:
+ // result: (ORN x y)
+ for {
+ _ = v.Args[1]
+ x := v.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64MVN {
+ break
+ }
+ y := v_1.Args[0]
+ v.reset(OpARM64ORN)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ // match: (OR (MVN y) x)
+ // cond:
+ // result: (ORN x y)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64MVN {
+ break
+ }
+ y := v_0.Args[0]
+ x := v.Args[1]
+ v.reset(OpARM64ORN)
+ v.AddArg(x)
+ v.AddArg(y)
+ return true
+ }
+ // match: (OR x0 x1:(SLLconst [c] y))
+ // cond: clobberIfDead(x1)
+ // result: (ORshiftLL x0 y [c])
+ for {
+ _ = v.Args[1]
+ x0 := v.Args[0]
+ x1 := v.Args[1]
+ if x1.Op != OpARM64SLLconst {
+ break
+ }
+ c := x1.AuxInt
+ y := x1.Args[0]
+ if !(clobberIfDead(x1)) {
+ break
+ }
+ v.reset(OpARM64ORshiftLL)
+ v.AuxInt = c
+ v.AddArg(x0)
+ v.AddArg(y)
+ return true
+ }
+ // match: (OR x1:(SLLconst [c] y) x0)
+ // cond: clobberIfDead(x1)
+ // result: (ORshiftLL x0 y [c])
+ for {
+ _ = v.Args[1]
+ x1 := v.Args[0]
+ if x1.Op != OpARM64SLLconst {
+ break
+ }
+ c := x1.AuxInt
+ y := x1.Args[0]
+ x0 := v.Args[1]
+ if !(clobberIfDead(x1)) {
+ break
+ }
+ v.reset(OpARM64ORshiftLL)
+ v.AuxInt = c
+ v.AddArg(x0)
+ v.AddArg(y)
+ return true
+ }
+ // match: (OR x0 x1:(SRLconst [c] y))
+ // cond: clobberIfDead(x1)
+ // result: (ORshiftRL x0 y [c])
+ for {
+ _ = v.Args[1]
+ x0 := v.Args[0]
+ x1 := v.Args[1]
+ if x1.Op != OpARM64SRLconst {
+ break
+ }
+ c := x1.AuxInt
+ y := x1.Args[0]
+ if !(clobberIfDead(x1)) {
+ break
+ }
+ v.reset(OpARM64ORshiftRL)
+ v.AuxInt = c
+ v.AddArg(x0)
+ v.AddArg(y)
+ return true
+ }
+ // match: (OR x1:(SRLconst [c] y) x0)
+ // cond: clobberIfDead(x1)
+ // result: (ORshiftRL x0 y [c])
+ for {
+ _ = v.Args[1]
+ x1 := v.Args[0]
+ if x1.Op != OpARM64SRLconst {
+ break
+ }
+ c := x1.AuxInt
+ y := x1.Args[0]
+ x0 := v.Args[1]
+ if !(clobberIfDead(x1)) {
+ break
+ }
+ v.reset(OpARM64ORshiftRL)
+ v.AuxInt = c
+ v.AddArg(x0)
+ v.AddArg(y)
+ return true
+ }
+ // match: (OR x0 x1:(SRAconst [c] y))
+ // cond: clobberIfDead(x1)
+ // result: (ORshiftRA x0 y [c])
+ for {
+ _ = v.Args[1]
+ x0 := v.Args[0]
+ x1 := v.Args[1]
+ if x1.Op != OpARM64SRAconst {
+ break
+ }
+ c := x1.AuxInt
+ y := x1.Args[0]
+ if !(clobberIfDead(x1)) {
+ break
+ }
+ v.reset(OpARM64ORshiftRA)
+ v.AuxInt = c
+ v.AddArg(x0)
+ v.AddArg(y)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64OR_10(v *Value) bool {
+ b := v.Block
+ _ = b
+ // match: (OR x1:(SRAconst [c] y) x0)
+ // cond: clobberIfDead(x1)
+ // result: (ORshiftRA x0 y [c])
+ for {
+ _ = v.Args[1]
+ x1 := v.Args[0]
+ if x1.Op != OpARM64SRAconst {
+ break
+ }
+ c := x1.AuxInt
+ y := x1.Args[0]
+ x0 := v.Args[1]
+ if !(clobberIfDead(x1)) {
+ break
+ }
+ v.reset(OpARM64ORshiftRA)
+ v.AuxInt = c
+ v.AddArg(x0)
+ v.AddArg(y)
+ return true
+ }
+ // match: (OR (UBFIZ [bfc] x) (ANDconst [ac] y))
+ // cond: ac == ^((1<<uint(getARM64BFwidth(bfc))-1) << uint(getARM64BFlsb(bfc)))
+ // result: (BFI [bfc] y x)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64UBFIZ {
+ break
+ }
+ bfc := v_0.AuxInt
+ x := v_0.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64ANDconst {
+ break
+ }
+ ac := v_1.AuxInt
+ y := v_1.Args[0]
+ if !(ac == ^((1<<uint(getARM64BFwidth(bfc)) - 1) << uint(getARM64BFlsb(bfc)))) {
+ break
+ }
+ v.reset(OpARM64BFI)
+ v.AuxInt = bfc
+ v.AddArg(y)
+ v.AddArg(x)
+ return true
+ }
+ // match: (OR (ANDconst [ac] y) (UBFIZ [bfc] x))
+ // cond: ac == ^((1<<uint(getARM64BFwidth(bfc))-1) << uint(getARM64BFlsb(bfc)))
+ // result: (BFI [bfc] y x)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ANDconst {
+ break
+ }
+ ac := v_0.AuxInt
+ y := v_0.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64UBFIZ {
+ break
+ }
+ bfc := v_1.AuxInt
+ x := v_1.Args[0]
+ if !(ac == ^((1<<uint(getARM64BFwidth(bfc)) - 1) << uint(getARM64BFlsb(bfc)))) {
+ break
+ }
+ v.reset(OpARM64BFI)
+ v.AuxInt = bfc
+ v.AddArg(y)
+ v.AddArg(x)
+ return true
+ }
+ // match: (OR (UBFX [bfc] x) (ANDconst [ac] y))
+ // cond: ac == ^(1<<uint(getARM64BFwidth(bfc))-1)
+ // result: (BFXIL [bfc] y x)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64UBFX {
+ break
+ }
+ bfc := v_0.AuxInt
+ x := v_0.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64ANDconst {
+ break
+ }
+ ac := v_1.AuxInt
+ y := v_1.Args[0]
+ if !(ac == ^(1<<uint(getARM64BFwidth(bfc)) - 1)) {
+ break
+ }
+ v.reset(OpARM64BFXIL)
+ v.AuxInt = bfc
+ v.AddArg(y)
+ v.AddArg(x)
+ return true
+ }
+ // match: (OR (ANDconst [ac] y) (UBFX [bfc] x))
+ // cond: ac == ^(1<<uint(getARM64BFwidth(bfc))-1)
+ // result: (BFXIL [bfc] y x)
+ for {
+ _ = v.Args[1]
+ v_0 := v.Args[0]
+ if v_0.Op != OpARM64ANDconst {
+ break
+ }
+ ac := v_0.AuxInt
+ y := v_0.Args[0]
+ v_1 := v.Args[1]
+ if v_1.Op != OpARM64UBFX {
+ break
+ }
+ bfc := v_1.AuxInt
+ x := v_1.Args[0]
+ if !(ac == ^(1<<uint(getARM64BFwidth(bfc)) - 1)) {
+ break
+ }
+ v.reset(OpARM64BFXIL)
+ v.AuxInt = bfc
+ v.AddArg(y)
+ v.AddArg(x)
+ return true
+ }
+ // match: (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] y0:(MOVDnop x0:(MOVBUload [i3] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i2] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i1] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i0] {s} p mem)))
+ // cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3) (MOVWUload <t> {s} (OffPtr <p.Type> [i0] p) mem)
+ for {
+ t := v.Type
+ _ = v.Args[1]
+ o0 := v.Args[0]
+ if o0.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o0.AuxInt != 8 {
+ break
+ }
+ _ = o0.Args[1]
+ o1 := o0.Args[0]
+ if o1.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o1.AuxInt != 16 {
+ break
+ }
+ _ = o1.Args[1]
+ s0 := o1.Args[0]
+ if s0.Op != OpARM64SLLconst {
+ break
+ }
+ if s0.AuxInt != 24 {
+ break
+ }
+ y0 := s0.Args[0]
+ if y0.Op != OpARM64MOVDnop {
+ break
+ }
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVBUload {
+ break
+ }
+ i3 := x0.AuxInt
+ s := x0.Aux
+ _ = x0.Args[1]
+ p := x0.Args[0]
+ mem := x0.Args[1]
+ y1 := o1.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ i2 := x1.AuxInt
+ if x1.Aux != s {
+ break
+ }
+ _ = x1.Args[1]
+ if p != x1.Args[0] {
+ break
+ }
+ if mem != x1.Args[1] {
+ break
+ }
+ y2 := o0.Args[1]
+ if y2.Op != OpARM64MOVDnop {
+ break
+ }
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUload {
+ break
+ }
+ i1 := x2.AuxInt
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[1]
+ if p != x2.Args[0] {
+ break
+ }
+ if mem != x2.Args[1] {
+ break
+ }
+ y3 := v.Args[1]
+ if y3.Op != OpARM64MOVDnop {
+ break
+ }
+ x3 := y3.Args[0]
+ if x3.Op != OpARM64MOVBUload {
+ break
+ }
+ i0 := x3.AuxInt
+ if x3.Aux != s {
+ break
+ }
+ _ = x3.Args[1]
+ if p != x3.Args[0] {
+ break
+ }
+ if mem != x3.Args[1] {
+ break
+ }
+ if !(i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2, x3)
+ v0 := b.NewValue0(v.Pos, OpARM64MOVWUload, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v0.Aux = s
+ v1 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
+ v1.AuxInt = i0
+ v1.AddArg(p)
+ v0.AddArg(v1)
+ v0.AddArg(mem)
+ return true
+ }
+ // match: (OR <t> y3:(MOVDnop x3:(MOVBUload [i0] {s} p mem)) o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] y0:(MOVDnop x0:(MOVBUload [i3] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i2] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i1] {s} p mem))))
+ // cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3) (MOVWUload <t> {s} (OffPtr <p.Type> [i0] p) mem)
+ for {
+ t := v.Type
+ _ = v.Args[1]
+ y3 := v.Args[0]
+ if y3.Op != OpARM64MOVDnop {
+ break
+ }
+ x3 := y3.Args[0]
+ if x3.Op != OpARM64MOVBUload {
+ break
+ }
+ i0 := x3.AuxInt
+ s := x3.Aux
+ _ = x3.Args[1]
+ p := x3.Args[0]
+ mem := x3.Args[1]
+ o0 := v.Args[1]
+ if o0.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o0.AuxInt != 8 {
+ break
+ }
+ _ = o0.Args[1]
+ o1 := o0.Args[0]
+ if o1.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o1.AuxInt != 16 {
+ break
+ }
+ _ = o1.Args[1]
+ s0 := o1.Args[0]
+ if s0.Op != OpARM64SLLconst {
+ break
+ }
+ if s0.AuxInt != 24 {
+ break
+ }
+ y0 := s0.Args[0]
+ if y0.Op != OpARM64MOVDnop {
+ break
+ }
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVBUload {
+ break
+ }
+ i3 := x0.AuxInt
+ if x0.Aux != s {
+ break
+ }
+ _ = x0.Args[1]
+ if p != x0.Args[0] {
+ break
+ }
+ if mem != x0.Args[1] {
+ break
+ }
+ y1 := o1.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ i2 := x1.AuxInt
+ if x1.Aux != s {
+ break
+ }
+ _ = x1.Args[1]
+ if p != x1.Args[0] {
+ break
+ }
+ if mem != x1.Args[1] {
+ break
+ }
+ y2 := o0.Args[1]
+ if y2.Op != OpARM64MOVDnop {
+ break
+ }
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUload {
+ break
+ }
+ i1 := x2.AuxInt
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[1]
+ if p != x2.Args[0] {
+ break
+ }
+ if mem != x2.Args[1] {
+ break
+ }
+ if !(i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2, x3)
+ v0 := b.NewValue0(v.Pos, OpARM64MOVWUload, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v0.Aux = s
+ v1 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
+ v1.AuxInt = i0
+ v1.AddArg(p)
+ v0.AddArg(v1)
+ v0.AddArg(mem)
+ return true
+ }
+ // match: (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] y0:(MOVDnop x0:(MOVBUload [3] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [2] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [1] {s} p1:(ADD ptr1 idx1) mem))) y3:(MOVDnop x3:(MOVBUloadidx ptr0 idx0 mem)))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3) (MOVWUloadidx <t> ptr0 idx0 mem)
+ for {
+ t := v.Type
+ _ = v.Args[1]
+ o0 := v.Args[0]
+ if o0.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o0.AuxInt != 8 {
+ break
+ }
+ _ = o0.Args[1]
+ o1 := o0.Args[0]
+ if o1.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o1.AuxInt != 16 {
+ break
+ }
+ _ = o1.Args[1]
+ s0 := o1.Args[0]
+ if s0.Op != OpARM64SLLconst {
+ break
+ }
+ if s0.AuxInt != 24 {
+ break
+ }
+ y0 := s0.Args[0]
+ if y0.Op != OpARM64MOVDnop {
+ break
+ }
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVBUload {
+ break
+ }
+ if x0.AuxInt != 3 {
+ break
+ }
+ s := x0.Aux
+ _ = x0.Args[1]
+ p := x0.Args[0]
+ mem := x0.Args[1]
+ y1 := o1.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ if x1.AuxInt != 2 {
+ break
+ }
+ if x1.Aux != s {
+ break
+ }
+ _ = x1.Args[1]
+ if p != x1.Args[0] {
+ break
+ }
+ if mem != x1.Args[1] {
+ break
+ }
+ y2 := o0.Args[1]
+ if y2.Op != OpARM64MOVDnop {
+ break
+ }
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUload {
+ break
+ }
+ if x2.AuxInt != 1 {
+ break
+ }
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[1]
+ p1 := x2.Args[0]
+ if p1.Op != OpARM64ADD {
+ break
+ }
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ if mem != x2.Args[1] {
+ break
+ }
+ y3 := v.Args[1]
+ if y3.Op != OpARM64MOVDnop {
+ break
+ }
+ x3 := y3.Args[0]
+ if x3.Op != OpARM64MOVBUloadidx {
+ break
+ }
+ _ = x3.Args[2]
+ ptr0 := x3.Args[0]
+ idx0 := x3.Args[1]
+ if mem != x3.Args[2] {
+ break
+ }
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2, x3)
+ v0 := b.NewValue0(v.Pos, OpARM64MOVWUloadidx, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v0.AddArg(ptr0)
+ v0.AddArg(idx0)
+ v0.AddArg(mem)
+ return true
+ }
+ // match: (OR <t> y3:(MOVDnop x3:(MOVBUloadidx ptr0 idx0 mem)) o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] y0:(MOVDnop x0:(MOVBUload [3] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [2] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [1] {s} p1:(ADD ptr1 idx1) mem))))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3) (MOVWUloadidx <t> ptr0 idx0 mem)
+ for {
+ t := v.Type
+ _ = v.Args[1]
+ y3 := v.Args[0]
+ if y3.Op != OpARM64MOVDnop {
+ break
+ }
+ x3 := y3.Args[0]
+ if x3.Op != OpARM64MOVBUloadidx {
+ break
+ }
+ _ = x3.Args[2]
+ ptr0 := x3.Args[0]
+ idx0 := x3.Args[1]
+ mem := x3.Args[2]
+ o0 := v.Args[1]
+ if o0.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o0.AuxInt != 8 {
+ break
+ }
+ _ = o0.Args[1]
+ o1 := o0.Args[0]
+ if o1.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o1.AuxInt != 16 {
+ break
+ }
+ _ = o1.Args[1]
+ s0 := o1.Args[0]
+ if s0.Op != OpARM64SLLconst {
+ break
+ }
+ if s0.AuxInt != 24 {
+ break
+ }
+ y0 := s0.Args[0]
+ if y0.Op != OpARM64MOVDnop {
+ break
+ }
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVBUload {
+ break
+ }
+ if x0.AuxInt != 3 {
+ break
+ }
+ s := x0.Aux
+ _ = x0.Args[1]
+ p := x0.Args[0]
+ if mem != x0.Args[1] {
+ break
+ }
+ y1 := o1.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ if x1.AuxInt != 2 {
+ break
+ }
+ if x1.Aux != s {
+ break
+ }
+ _ = x1.Args[1]
+ if p != x1.Args[0] {
+ break
+ }
+ if mem != x1.Args[1] {
+ break
+ }
+ y2 := o0.Args[1]
+ if y2.Op != OpARM64MOVDnop {
+ break
+ }
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUload {
+ break
+ }
+ if x2.AuxInt != 1 {
+ break
+ }
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[1]
+ p1 := x2.Args[0]
+ if p1.Op != OpARM64ADD {
+ break
+ }
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ if mem != x2.Args[1] {
+ break
+ }
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2, x3)
+ v0 := b.NewValue0(v.Pos, OpARM64MOVWUloadidx, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v0.AddArg(ptr0)
+ v0.AddArg(idx0)
+ v0.AddArg(mem)
+ return true
+ }
+ // match: (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] y0:(MOVDnop x0:(MOVBUload [i7] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i6] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i5] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i4] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [i3] {s} p mem))) y5:(MOVDnop x5:(MOVBUload [i2] {s} p mem))) y6:(MOVDnop x6:(MOVBUload [i1] {s} p mem))) y7:(MOVDnop x7:(MOVBUload [i0] {s} p mem)))
+ // cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} (OffPtr <p.Type> [i0] p) mem)
+ for {
+ t := v.Type
+ _ = v.Args[1]
+ o0 := v.Args[0]
+ if o0.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o0.AuxInt != 8 {
+ break
+ }
+ _ = o0.Args[1]
+ o1 := o0.Args[0]
+ if o1.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o1.AuxInt != 16 {
+ break
+ }
+ _ = o1.Args[1]
+ o2 := o1.Args[0]
+ if o2.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o2.AuxInt != 24 {
+ break
+ }
+ _ = o2.Args[1]
+ o3 := o2.Args[0]
+ if o3.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o3.AuxInt != 32 {
+ break
+ }
+ _ = o3.Args[1]
+ o4 := o3.Args[0]
+ if o4.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o4.AuxInt != 40 {
+ break
+ }
+ _ = o4.Args[1]
+ o5 := o4.Args[0]
+ if o5.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o5.AuxInt != 48 {
+ break
+ }
+ _ = o5.Args[1]
+ s0 := o5.Args[0]
+ if s0.Op != OpARM64SLLconst {
+ break
+ }
+ if s0.AuxInt != 56 {
+ break
+ }
+ y0 := s0.Args[0]
+ if y0.Op != OpARM64MOVDnop {
+ break
+ }
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVBUload {
+ break
+ }
+ i7 := x0.AuxInt
+ s := x0.Aux
+ _ = x0.Args[1]
+ p := x0.Args[0]
+ mem := x0.Args[1]
+ y1 := o5.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ i6 := x1.AuxInt
+ if x1.Aux != s {
+ break
+ }
+ _ = x1.Args[1]
+ if p != x1.Args[0] {
+ break
+ }
+ if mem != x1.Args[1] {
+ break
+ }
+ y2 := o4.Args[1]
+ if y2.Op != OpARM64MOVDnop {
+ break
+ }
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUload {
+ break
+ }
+ i5 := x2.AuxInt
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[1]
+ if p != x2.Args[0] {
+ break
+ }
+ if mem != x2.Args[1] {
+ break
+ }
+ y3 := o3.Args[1]
+ if y3.Op != OpARM64MOVDnop {
+ break
+ }
+ x3 := y3.Args[0]
+ if x3.Op != OpARM64MOVBUload {
+ break
+ }
+ i4 := x3.AuxInt
+ if x3.Aux != s {
+ break
+ }
+ _ = x3.Args[1]
+ if p != x3.Args[0] {
+ break
+ }
+ if mem != x3.Args[1] {
+ break
+ }
+ y4 := o2.Args[1]
+ if y4.Op != OpARM64MOVDnop {
+ break
+ }
+ x4 := y4.Args[0]
+ if x4.Op != OpARM64MOVBUload {
+ break
+ }
+ i3 := x4.AuxInt
+ if x4.Aux != s {
+ break
+ }
+ _ = x4.Args[1]
+ if p != x4.Args[0] {
+ break
+ }
+ if mem != x4.Args[1] {
+ break
+ }
+ y5 := o1.Args[1]
+ if y5.Op != OpARM64MOVDnop {
+ break
+ }
+ x5 := y5.Args[0]
+ if x5.Op != OpARM64MOVBUload {
+ break
+ }
+ i2 := x5.AuxInt
+ if x5.Aux != s {
+ break
+ }
+ _ = x5.Args[1]
+ if p != x5.Args[0] {
+ break
+ }
+ if mem != x5.Args[1] {
+ break
+ }
+ y6 := o0.Args[1]
+ if y6.Op != OpARM64MOVDnop {
+ break
+ }
+ x6 := y6.Args[0]
+ if x6.Op != OpARM64MOVBUload {
+ break
+ }
+ i1 := x6.AuxInt
+ if x6.Aux != s {
+ break
+ }
+ _ = x6.Args[1]
+ if p != x6.Args[0] {
+ break
+ }
+ if mem != x6.Args[1] {
+ break
+ }
+ y7 := v.Args[1]
+ if y7.Op != OpARM64MOVDnop {
+ break
+ }
+ x7 := y7.Args[0]
+ if x7.Op != OpARM64MOVBUload {
+ break
+ }
+ i0 := x7.AuxInt
+ if x7.Aux != s {
+ break
+ }
+ _ = x7.Args[1]
+ if p != x7.Args[0] {
+ break
+ }
+ if mem != x7.Args[1] {
+ break
+ }
+ if !(i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
+ v0 := b.NewValue0(v.Pos, OpARM64MOVDload, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v0.Aux = s
+ v1 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
+ v1.AuxInt = i0
+ v1.AddArg(p)
+ v0.AddArg(v1)
+ v0.AddArg(mem)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64OR_20(v *Value) bool {
+ b := v.Block
+ _ = b
+ // match: (OR <t> y7:(MOVDnop x7:(MOVBUload [i0] {s} p mem)) o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] y0:(MOVDnop x0:(MOVBUload [i7] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i6] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i5] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i4] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [i3] {s} p mem))) y5:(MOVDnop x5:(MOVBUload [i2] {s} p mem))) y6:(MOVDnop x6:(MOVBUload [i1] {s} p mem))))
+ // cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload <t> {s} (OffPtr <p.Type> [i0] p) mem)
+ for {
+ t := v.Type
+ _ = v.Args[1]
+ y7 := v.Args[0]
+ if y7.Op != OpARM64MOVDnop {
+ break
+ }
+ x7 := y7.Args[0]
+ if x7.Op != OpARM64MOVBUload {
+ break
+ }
+ i0 := x7.AuxInt
+ s := x7.Aux
+ _ = x7.Args[1]
+ p := x7.Args[0]
+ mem := x7.Args[1]
+ o0 := v.Args[1]
+ if o0.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o0.AuxInt != 8 {
+ break
+ }
+ _ = o0.Args[1]
+ o1 := o0.Args[0]
+ if o1.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o1.AuxInt != 16 {
+ break
+ }
+ _ = o1.Args[1]
+ o2 := o1.Args[0]
+ if o2.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o2.AuxInt != 24 {
+ break
+ }
+ _ = o2.Args[1]
+ o3 := o2.Args[0]
+ if o3.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o3.AuxInt != 32 {
+ break
+ }
+ _ = o3.Args[1]
+ o4 := o3.Args[0]
+ if o4.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o4.AuxInt != 40 {
+ break
+ }
+ _ = o4.Args[1]
+ o5 := o4.Args[0]
+ if o5.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o5.AuxInt != 48 {
+ break
+ }
+ _ = o5.Args[1]
+ s0 := o5.Args[0]
+ if s0.Op != OpARM64SLLconst {
+ break
+ }
+ if s0.AuxInt != 56 {
+ break
+ }
+ y0 := s0.Args[0]
+ if y0.Op != OpARM64MOVDnop {
+ break
+ }
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVBUload {
+ break
+ }
+ i7 := x0.AuxInt
+ if x0.Aux != s {
+ break
+ }
+ _ = x0.Args[1]
+ if p != x0.Args[0] {
+ break
+ }
+ if mem != x0.Args[1] {
+ break
+ }
+ y1 := o5.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ i6 := x1.AuxInt
+ if x1.Aux != s {
+ break
+ }
+ _ = x1.Args[1]
+ if p != x1.Args[0] {
+ break
+ }
+ if mem != x1.Args[1] {
+ break
+ }
+ y2 := o4.Args[1]
+ if y2.Op != OpARM64MOVDnop {
+ break
+ }
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUload {
+ break
+ }
+ i5 := x2.AuxInt
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[1]
+ if p != x2.Args[0] {
+ break
+ }
+ if mem != x2.Args[1] {
+ break
+ }
+ y3 := o3.Args[1]
+ if y3.Op != OpARM64MOVDnop {
+ break
+ }
+ x3 := y3.Args[0]
+ if x3.Op != OpARM64MOVBUload {
+ break
+ }
+ i4 := x3.AuxInt
+ if x3.Aux != s {
+ break
+ }
+ _ = x3.Args[1]
+ if p != x3.Args[0] {
+ break
+ }
+ if mem != x3.Args[1] {
+ break
+ }
+ y4 := o2.Args[1]
+ if y4.Op != OpARM64MOVDnop {
+ break
+ }
+ x4 := y4.Args[0]
+ if x4.Op != OpARM64MOVBUload {
+ break
+ }
+ i3 := x4.AuxInt
+ if x4.Aux != s {
+ break
+ }
+ _ = x4.Args[1]
+ if p != x4.Args[0] {
+ break
+ }
+ if mem != x4.Args[1] {
+ break
+ }
+ y5 := o1.Args[1]
+ if y5.Op != OpARM64MOVDnop {
+ break
+ }
+ x5 := y5.Args[0]
+ if x5.Op != OpARM64MOVBUload {
+ break
+ }
+ i2 := x5.AuxInt
+ if x5.Aux != s {
+ break
+ }
+ _ = x5.Args[1]
+ if p != x5.Args[0] {
+ break
+ }
+ if mem != x5.Args[1] {
+ break
+ }
+ y6 := o0.Args[1]
+ if y6.Op != OpARM64MOVDnop {
+ break
+ }
+ x6 := y6.Args[0]
+ if x6.Op != OpARM64MOVBUload {
+ break
+ }
+ i1 := x6.AuxInt
+ if x6.Aux != s {
+ break
+ }
+ _ = x6.Args[1]
+ if p != x6.Args[0] {
+ break
+ }
+ if mem != x6.Args[1] {
+ break
+ }
+ if !(i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
+ v0 := b.NewValue0(v.Pos, OpARM64MOVDload, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v0.Aux = s
+ v1 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
+ v1.AuxInt = i0
+ v1.AddArg(p)
+ v0.AddArg(v1)
+ v0.AddArg(mem)
+ return true
+ }
+ // match: (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] y0:(MOVDnop x0:(MOVBUload [7] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [6] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [5] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [4] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [3] {s} p mem))) y5:(MOVDnop x5:(MOVBUload [2] {s} p mem))) y6:(MOVDnop x6:(MOVBUload [1] {s} p1:(ADD ptr1 idx1) mem))) y7:(MOVDnop x7:(MOVBUloadidx ptr0 idx0 mem)))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDloadidx <t> ptr0 idx0 mem)
+ for {
+ t := v.Type
+ _ = v.Args[1]
+ o0 := v.Args[0]
+ if o0.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o0.AuxInt != 8 {
+ break
+ }
+ _ = o0.Args[1]
+ o1 := o0.Args[0]
+ if o1.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o1.AuxInt != 16 {
+ break
+ }
+ _ = o1.Args[1]
+ o2 := o1.Args[0]
+ if o2.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o2.AuxInt != 24 {
+ break
+ }
+ _ = o2.Args[1]
+ o3 := o2.Args[0]
+ if o3.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o3.AuxInt != 32 {
+ break
+ }
+ _ = o3.Args[1]
+ o4 := o3.Args[0]
+ if o4.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o4.AuxInt != 40 {
+ break
+ }
+ _ = o4.Args[1]
+ o5 := o4.Args[0]
+ if o5.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o5.AuxInt != 48 {
+ break
+ }
+ _ = o5.Args[1]
+ s0 := o5.Args[0]
+ if s0.Op != OpARM64SLLconst {
+ break
+ }
+ if s0.AuxInt != 56 {
+ break
+ }
+ y0 := s0.Args[0]
+ if y0.Op != OpARM64MOVDnop {
+ break
+ }
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVBUload {
+ break
+ }
+ if x0.AuxInt != 7 {
+ break
+ }
+ s := x0.Aux
+ _ = x0.Args[1]
+ p := x0.Args[0]
+ mem := x0.Args[1]
+ y1 := o5.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ if x1.AuxInt != 6 {
+ break
+ }
+ if x1.Aux != s {
+ break
+ }
+ _ = x1.Args[1]
+ if p != x1.Args[0] {
+ break
+ }
+ if mem != x1.Args[1] {
+ break
+ }
+ y2 := o4.Args[1]
+ if y2.Op != OpARM64MOVDnop {
+ break
+ }
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUload {
+ break
+ }
+ if x2.AuxInt != 5 {
+ break
+ }
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[1]
+ if p != x2.Args[0] {
+ break
+ }
+ if mem != x2.Args[1] {
+ break
+ }
+ y3 := o3.Args[1]
+ if y3.Op != OpARM64MOVDnop {
+ break
+ }
+ x3 := y3.Args[0]
+ if x3.Op != OpARM64MOVBUload {
+ break
+ }
+ if x3.AuxInt != 4 {
+ break
+ }
+ if x3.Aux != s {
+ break
+ }
+ _ = x3.Args[1]
+ if p != x3.Args[0] {
+ break
+ }
+ if mem != x3.Args[1] {
+ break
+ }
+ y4 := o2.Args[1]
+ if y4.Op != OpARM64MOVDnop {
+ break
+ }
+ x4 := y4.Args[0]
+ if x4.Op != OpARM64MOVBUload {
+ break
+ }
+ if x4.AuxInt != 3 {
+ break
+ }
+ if x4.Aux != s {
+ break
+ }
+ _ = x4.Args[1]
+ if p != x4.Args[0] {
+ break
+ }
+ if mem != x4.Args[1] {
+ break
+ }
+ y5 := o1.Args[1]
+ if y5.Op != OpARM64MOVDnop {
+ break
+ }
+ x5 := y5.Args[0]
+ if x5.Op != OpARM64MOVBUload {
+ break
+ }
+ if x5.AuxInt != 2 {
+ break
+ }
+ if x5.Aux != s {
+ break
+ }
+ _ = x5.Args[1]
+ if p != x5.Args[0] {
+ break
+ }
+ if mem != x5.Args[1] {
+ break
+ }
+ y6 := o0.Args[1]
+ if y6.Op != OpARM64MOVDnop {
+ break
+ }
+ x6 := y6.Args[0]
+ if x6.Op != OpARM64MOVBUload {
+ break
+ }
+ if x6.AuxInt != 1 {
+ break
+ }
+ if x6.Aux != s {
+ break
+ }
+ _ = x6.Args[1]
+ p1 := x6.Args[0]
+ if p1.Op != OpARM64ADD {
+ break
+ }
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ if mem != x6.Args[1] {
+ break
+ }
+ y7 := v.Args[1]
+ if y7.Op != OpARM64MOVDnop {
+ break
+ }
+ x7 := y7.Args[0]
+ if x7.Op != OpARM64MOVBUloadidx {
+ break
+ }
+ _ = x7.Args[2]
+ ptr0 := x7.Args[0]
+ idx0 := x7.Args[1]
+ if mem != x7.Args[2] {
+ break
+ }
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
+ v0 := b.NewValue0(v.Pos, OpARM64MOVDloadidx, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v0.AddArg(ptr0)
+ v0.AddArg(idx0)
+ v0.AddArg(mem)
+ return true
+ }
+ // match: (OR <t> y7:(MOVDnop x7:(MOVBUloadidx ptr0 idx0 mem)) o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] y0:(MOVDnop x0:(MOVBUload [7] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [6] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [5] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [4] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [3] {s} p mem))) y5:(MOVDnop x5:(MOVBUload [2] {s} p mem))) y6:(MOVDnop x6:(MOVBUload [1] {s} p1:(ADD ptr1 idx1) mem))))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDloadidx <t> ptr0 idx0 mem)
+ for {
+ t := v.Type
+ _ = v.Args[1]
+ y7 := v.Args[0]
+ if y7.Op != OpARM64MOVDnop {
+ break
+ }
+ x7 := y7.Args[0]
+ if x7.Op != OpARM64MOVBUloadidx {
+ break
+ }
+ _ = x7.Args[2]
+ ptr0 := x7.Args[0]
+ idx0 := x7.Args[1]
+ mem := x7.Args[2]
+ o0 := v.Args[1]
+ if o0.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o0.AuxInt != 8 {
+ break
+ }
+ _ = o0.Args[1]
+ o1 := o0.Args[0]
+ if o1.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o1.AuxInt != 16 {
+ break
+ }
+ _ = o1.Args[1]
+ o2 := o1.Args[0]
+ if o2.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o2.AuxInt != 24 {
+ break
+ }
+ _ = o2.Args[1]
+ o3 := o2.Args[0]
+ if o3.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o3.AuxInt != 32 {
+ break
+ }
+ _ = o3.Args[1]
+ o4 := o3.Args[0]
+ if o4.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o4.AuxInt != 40 {
+ break
+ }
+ _ = o4.Args[1]
+ o5 := o4.Args[0]
+ if o5.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o5.AuxInt != 48 {
+ break
+ }
+ _ = o5.Args[1]
+ s0 := o5.Args[0]
+ if s0.Op != OpARM64SLLconst {
+ break
+ }
+ if s0.AuxInt != 56 {
+ break
+ }
+ y0 := s0.Args[0]
+ if y0.Op != OpARM64MOVDnop {
+ break
+ }
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVBUload {
+ break
+ }
+ if x0.AuxInt != 7 {
+ break
+ }
+ s := x0.Aux
+ _ = x0.Args[1]
+ p := x0.Args[0]
+ if mem != x0.Args[1] {
+ break
+ }
+ y1 := o5.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ if x1.AuxInt != 6 {
+ break
+ }
+ if x1.Aux != s {
+ break
+ }
+ _ = x1.Args[1]
+ if p != x1.Args[0] {
+ break
+ }
+ if mem != x1.Args[1] {
+ break
+ }
+ y2 := o4.Args[1]
+ if y2.Op != OpARM64MOVDnop {
+ break
+ }
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUload {
+ break
+ }
+ if x2.AuxInt != 5 {
+ break
+ }
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[1]
+ if p != x2.Args[0] {
break
}
- c := x1.AuxInt
- y := x1.Args[0]
- if !(clobberIfDead(x1)) {
+ if mem != x2.Args[1] {
break
}
- v.reset(OpARM64ORshiftLL)
- v.AuxInt = c
- v.AddArg(x0)
- v.AddArg(y)
- return true
- }
- // match: (OR x1:(SLLconst [c] y) x0)
- // cond: clobberIfDead(x1)
- // result: (ORshiftLL x0 y [c])
- for {
- _ = v.Args[1]
- x1 := v.Args[0]
- if x1.Op != OpARM64SLLconst {
+ y3 := o3.Args[1]
+ if y3.Op != OpARM64MOVDnop {
break
}
- c := x1.AuxInt
- y := x1.Args[0]
- x0 := v.Args[1]
- if !(clobberIfDead(x1)) {
+ x3 := y3.Args[0]
+ if x3.Op != OpARM64MOVBUload {
break
}
- v.reset(OpARM64ORshiftLL)
- v.AuxInt = c
- v.AddArg(x0)
- v.AddArg(y)
- return true
- }
- // match: (OR x0 x1:(SRLconst [c] y))
- // cond: clobberIfDead(x1)
- // result: (ORshiftRL x0 y [c])
- for {
- _ = v.Args[1]
- x0 := v.Args[0]
- x1 := v.Args[1]
- if x1.Op != OpARM64SRLconst {
+ if x3.AuxInt != 4 {
break
}
- c := x1.AuxInt
- y := x1.Args[0]
- if !(clobberIfDead(x1)) {
+ if x3.Aux != s {
break
}
- v.reset(OpARM64ORshiftRL)
- v.AuxInt = c
- v.AddArg(x0)
- v.AddArg(y)
- return true
- }
- // match: (OR x1:(SRLconst [c] y) x0)
- // cond: clobberIfDead(x1)
- // result: (ORshiftRL x0 y [c])
- for {
- _ = v.Args[1]
- x1 := v.Args[0]
- if x1.Op != OpARM64SRLconst {
+ _ = x3.Args[1]
+ if p != x3.Args[0] {
break
}
- c := x1.AuxInt
- y := x1.Args[0]
- x0 := v.Args[1]
- if !(clobberIfDead(x1)) {
+ if mem != x3.Args[1] {
break
}
- v.reset(OpARM64ORshiftRL)
- v.AuxInt = c
- v.AddArg(x0)
- v.AddArg(y)
- return true
- }
- // match: (OR x0 x1:(SRAconst [c] y))
- // cond: clobberIfDead(x1)
- // result: (ORshiftRA x0 y [c])
- for {
- _ = v.Args[1]
- x0 := v.Args[0]
- x1 := v.Args[1]
- if x1.Op != OpARM64SRAconst {
+ y4 := o2.Args[1]
+ if y4.Op != OpARM64MOVDnop {
break
}
- c := x1.AuxInt
- y := x1.Args[0]
- if !(clobberIfDead(x1)) {
+ x4 := y4.Args[0]
+ if x4.Op != OpARM64MOVBUload {
break
}
- v.reset(OpARM64ORshiftRA)
- v.AuxInt = c
- v.AddArg(x0)
- v.AddArg(y)
- return true
- }
- return false
-}
-func rewriteValueARM64_OpARM64OR_10(v *Value) bool {
- b := v.Block
- _ = b
- // match: (OR x1:(SRAconst [c] y) x0)
- // cond: clobberIfDead(x1)
- // result: (ORshiftRA x0 y [c])
- for {
- _ = v.Args[1]
- x1 := v.Args[0]
- if x1.Op != OpARM64SRAconst {
+ if x4.AuxInt != 3 {
break
}
- c := x1.AuxInt
- y := x1.Args[0]
- x0 := v.Args[1]
- if !(clobberIfDead(x1)) {
+ if x4.Aux != s {
break
}
- v.reset(OpARM64ORshiftRA)
- v.AuxInt = c
- v.AddArg(x0)
- v.AddArg(y)
- return true
- }
- // match: (OR (UBFIZ [bfc] x) (ANDconst [ac] y))
- // cond: ac == ^((1<<uint(getARM64BFwidth(bfc))-1) << uint(getARM64BFlsb(bfc)))
- // result: (BFI [bfc] y x)
- for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64UBFIZ {
+ _ = x4.Args[1]
+ if p != x4.Args[0] {
break
}
- bfc := v_0.AuxInt
- x := v_0.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64ANDconst {
+ if mem != x4.Args[1] {
break
}
- ac := v_1.AuxInt
- y := v_1.Args[0]
- if !(ac == ^((1<<uint(getARM64BFwidth(bfc)) - 1) << uint(getARM64BFlsb(bfc)))) {
+ y5 := o1.Args[1]
+ if y5.Op != OpARM64MOVDnop {
break
}
- v.reset(OpARM64BFI)
- v.AuxInt = bfc
- v.AddArg(y)
- v.AddArg(x)
- return true
- }
- // match: (OR (ANDconst [ac] y) (UBFIZ [bfc] x))
- // cond: ac == ^((1<<uint(getARM64BFwidth(bfc))-1) << uint(getARM64BFlsb(bfc)))
- // result: (BFI [bfc] y x)
- for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64ANDconst {
+ x5 := y5.Args[0]
+ if x5.Op != OpARM64MOVBUload {
break
}
- ac := v_0.AuxInt
- y := v_0.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64UBFIZ {
+ if x5.AuxInt != 2 {
break
}
- bfc := v_1.AuxInt
- x := v_1.Args[0]
- if !(ac == ^((1<<uint(getARM64BFwidth(bfc)) - 1) << uint(getARM64BFlsb(bfc)))) {
+ if x5.Aux != s {
break
}
- v.reset(OpARM64BFI)
- v.AuxInt = bfc
- v.AddArg(y)
- v.AddArg(x)
- return true
- }
- // match: (OR (UBFX [bfc] x) (ANDconst [ac] y))
- // cond: ac == ^(1<<uint(getARM64BFwidth(bfc))-1)
- // result: (BFXIL [bfc] y x)
- for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64UBFX {
+ _ = x5.Args[1]
+ if p != x5.Args[0] {
break
}
- bfc := v_0.AuxInt
- x := v_0.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64ANDconst {
+ if mem != x5.Args[1] {
break
}
- ac := v_1.AuxInt
- y := v_1.Args[0]
- if !(ac == ^(1<<uint(getARM64BFwidth(bfc)) - 1)) {
+ y6 := o0.Args[1]
+ if y6.Op != OpARM64MOVDnop {
break
}
- v.reset(OpARM64BFXIL)
- v.AuxInt = bfc
- v.AddArg(y)
- v.AddArg(x)
- return true
- }
- // match: (OR (ANDconst [ac] y) (UBFX [bfc] x))
- // cond: ac == ^(1<<uint(getARM64BFwidth(bfc))-1)
- // result: (BFXIL [bfc] y x)
- for {
- _ = v.Args[1]
- v_0 := v.Args[0]
- if v_0.Op != OpARM64ANDconst {
+ x6 := y6.Args[0]
+ if x6.Op != OpARM64MOVBUload {
break
}
- ac := v_0.AuxInt
- y := v_0.Args[0]
- v_1 := v.Args[1]
- if v_1.Op != OpARM64UBFX {
+ if x6.AuxInt != 1 {
break
}
- bfc := v_1.AuxInt
- x := v_1.Args[0]
- if !(ac == ^(1<<uint(getARM64BFwidth(bfc)) - 1)) {
+ if x6.Aux != s {
break
}
- v.reset(OpARM64BFXIL)
- v.AuxInt = bfc
- v.AddArg(y)
- v.AddArg(x)
+ _ = x6.Args[1]
+ p1 := x6.Args[0]
+ if p1.Op != OpARM64ADD {
+ break
+ }
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ if mem != x6.Args[1] {
+ break
+ }
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
+ v0 := b.NewValue0(v.Pos, OpARM64MOVDloadidx, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v0.AddArg(ptr0)
+ v0.AddArg(idx0)
+ v0.AddArg(mem)
return true
}
- // match: (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] y0:(MOVDnop x0:(MOVBUload [i3] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i2] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i1] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i0] {s} p mem)))
+ // match: (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] y0:(MOVDnop x0:(MOVBUload [i0] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i1] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i2] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i3] {s} p mem)))
// cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)
- // result: @mergePoint(b,x0,x1,x2,x3) (MOVWUload <t> {s} (OffPtr <p.Type> [i0] p) mem)
+ // result: @mergePoint(b,x0,x1,x2,x3) (REVW <t> (MOVWUload <t> {s} (OffPtr <p.Type> [i0] p) mem))
for {
t := v.Type
_ = v.Args[1]
if x0.Op != OpARM64MOVBUload {
break
}
- i3 := x0.AuxInt
+ i0 := x0.AuxInt
s := x0.Aux
_ = x0.Args[1]
p := x0.Args[0]
if x1.Op != OpARM64MOVBUload {
break
}
- i2 := x1.AuxInt
+ i1 := x1.AuxInt
if x1.Aux != s {
break
}
if x2.Op != OpARM64MOVBUload {
break
}
- i1 := x2.AuxInt
+ i2 := x2.AuxInt
if x2.Aux != s {
break
}
if x3.Op != OpARM64MOVBUload {
break
}
- i0 := x3.AuxInt
+ i3 := x3.AuxInt
if x3.Aux != s {
break
}
break
}
b = mergePoint(b, x0, x1, x2, x3)
- v0 := b.NewValue0(v.Pos, OpARM64MOVWUload, t)
+ v0 := b.NewValue0(v.Pos, OpARM64REVW, t)
v.reset(OpCopy)
v.AddArg(v0)
- v0.Aux = s
- v1 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
- v1.AuxInt = i0
- v1.AddArg(p)
+ v1 := b.NewValue0(v.Pos, OpARM64MOVWUload, t)
+ v1.Aux = s
+ v2 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
+ v2.AuxInt = i0
+ v2.AddArg(p)
+ v1.AddArg(v2)
+ v1.AddArg(mem)
v0.AddArg(v1)
- v0.AddArg(mem)
return true
}
- // match: (OR <t> y3:(MOVDnop x3:(MOVBUload [i0] {s} p mem)) o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] y0:(MOVDnop x0:(MOVBUload [i3] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i2] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i1] {s} p mem))))
+ // match: (OR <t> y3:(MOVDnop x3:(MOVBUload [i3] {s} p mem)) o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] y0:(MOVDnop x0:(MOVBUload [i0] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i1] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i2] {s} p mem))))
// cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)
- // result: @mergePoint(b,x0,x1,x2,x3) (MOVWUload <t> {s} (OffPtr <p.Type> [i0] p) mem)
+ // result: @mergePoint(b,x0,x1,x2,x3) (REVW <t> (MOVWUload <t> {s} (OffPtr <p.Type> [i0] p) mem))
for {
t := v.Type
_ = v.Args[1]
if x3.Op != OpARM64MOVBUload {
break
}
- i0 := x3.AuxInt
+ i3 := x3.AuxInt
s := x3.Aux
_ = x3.Args[1]
p := x3.Args[0]
if x0.Op != OpARM64MOVBUload {
break
}
- i3 := x0.AuxInt
+ i0 := x0.AuxInt
if x0.Aux != s {
break
}
if x1.Op != OpARM64MOVBUload {
break
}
- i2 := x1.AuxInt
+ i1 := x1.AuxInt
if x1.Aux != s {
break
}
if x2.Op != OpARM64MOVBUload {
break
}
- i1 := x2.AuxInt
+ i2 := x2.AuxInt
if x2.Aux != s {
break
}
break
}
b = mergePoint(b, x0, x1, x2, x3)
- v0 := b.NewValue0(v.Pos, OpARM64MOVWUload, t)
+ v0 := b.NewValue0(v.Pos, OpARM64REVW, t)
v.reset(OpCopy)
v.AddArg(v0)
- v0.Aux = s
- v1 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
- v1.AuxInt = i0
- v1.AddArg(p)
+ v1 := b.NewValue0(v.Pos, OpARM64MOVWUload, t)
+ v1.Aux = s
+ v2 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
+ v2.AuxInt = i0
+ v2.AddArg(p)
+ v1.AddArg(v2)
+ v1.AddArg(mem)
v0.AddArg(v1)
- v0.AddArg(mem)
return true
}
- // match: (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] y0:(MOVDnop x0:(MOVBUload [i7] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i6] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i5] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i4] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [i3] {s} p mem))) y5:(MOVDnop x5:(MOVBUload [i2] {s} p mem))) y6:(MOVDnop x6:(MOVBUload [i1] {s} p mem))) y7:(MOVDnop x7:(MOVBUload [i0] {s} p mem)))
- // cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)
- // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (REV <t> (MOVDload <t> {s} (OffPtr <p.Type> [i0] p) mem))
+ // match: (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] y0:(MOVDnop x0:(MOVBUloadidx ptr0 idx0 mem))) y1:(MOVDnop x1:(MOVBUload [1] {s} p1:(ADD ptr1 idx1) mem))) y2:(MOVDnop x2:(MOVBUload [2] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [3] {s} p mem)))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3) (REVW <t> (MOVWUloadidx <t> ptr0 idx0 mem))
for {
t := v.Type
_ = v.Args[1]
break
}
_ = o1.Args[1]
- o2 := o1.Args[0]
- if o2.Op != OpARM64ORshiftLL {
- break
- }
- if o2.AuxInt != 24 {
- break
- }
- _ = o2.Args[1]
- o3 := o2.Args[0]
- if o3.Op != OpARM64ORshiftLL {
- break
- }
- if o3.AuxInt != 32 {
- break
- }
- _ = o3.Args[1]
- o4 := o3.Args[0]
- if o4.Op != OpARM64ORshiftLL {
- break
- }
- if o4.AuxInt != 40 {
- break
- }
- _ = o4.Args[1]
- o5 := o4.Args[0]
- if o5.Op != OpARM64ORshiftLL {
- break
- }
- if o5.AuxInt != 48 {
- break
- }
- _ = o5.Args[1]
- s0 := o5.Args[0]
+ s0 := o1.Args[0]
if s0.Op != OpARM64SLLconst {
break
}
- if s0.AuxInt != 56 {
+ if s0.AuxInt != 24 {
break
}
y0 := s0.Args[0]
break
}
x0 := y0.Args[0]
- if x0.Op != OpARM64MOVBUload {
+ if x0.Op != OpARM64MOVBUloadidx {
break
}
- i7 := x0.AuxInt
- s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
- mem := x0.Args[1]
- y1 := o5.Args[1]
+ _ = x0.Args[2]
+ ptr0 := x0.Args[0]
+ idx0 := x0.Args[1]
+ mem := x0.Args[2]
+ y1 := o1.Args[1]
if y1.Op != OpARM64MOVDnop {
break
}
if x1.Op != OpARM64MOVBUload {
break
}
- i6 := x1.AuxInt
- if x1.Aux != s {
+ if x1.AuxInt != 1 {
break
}
+ s := x1.Aux
_ = x1.Args[1]
- if p != x1.Args[0] {
+ p1 := x1.Args[0]
+ if p1.Op != OpARM64ADD {
break
}
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
if mem != x1.Args[1] {
break
}
- y2 := o4.Args[1]
+ y2 := o0.Args[1]
if y2.Op != OpARM64MOVDnop {
break
}
if x2.Op != OpARM64MOVBUload {
break
}
- i5 := x2.AuxInt
- if x2.Aux != s {
+ if x2.AuxInt != 2 {
break
}
- _ = x2.Args[1]
- if p != x2.Args[0] {
+ if x2.Aux != s {
break
}
+ _ = x2.Args[1]
+ p := x2.Args[0]
if mem != x2.Args[1] {
break
}
- y3 := o3.Args[1]
+ y3 := v.Args[1]
if y3.Op != OpARM64MOVDnop {
break
}
if x3.Op != OpARM64MOVBUload {
break
}
- i4 := x3.AuxInt
+ if x3.AuxInt != 3 {
+ break
+ }
if x3.Aux != s {
break
}
if mem != x3.Args[1] {
break
}
- y4 := o2.Args[1]
- if y4.Op != OpARM64MOVDnop {
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)) {
break
}
- x4 := y4.Args[0]
- if x4.Op != OpARM64MOVBUload {
+ b = mergePoint(b, x0, x1, x2, x3)
+ v0 := b.NewValue0(v.Pos, OpARM64REVW, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v1 := b.NewValue0(v.Pos, OpARM64MOVWUloadidx, t)
+ v1.AddArg(ptr0)
+ v1.AddArg(idx0)
+ v1.AddArg(mem)
+ v0.AddArg(v1)
+ return true
+ }
+ // match: (OR <t> y3:(MOVDnop x3:(MOVBUload [3] {s} p mem)) o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] y0:(MOVDnop x0:(MOVBUloadidx ptr0 idx0 mem))) y1:(MOVDnop x1:(MOVBUload [1] {s} p1:(ADD ptr1 idx1) mem))) y2:(MOVDnop x2:(MOVBUload [2] {s} p mem))))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3) (REVW <t> (MOVWUloadidx <t> ptr0 idx0 mem))
+ for {
+ t := v.Type
+ _ = v.Args[1]
+ y3 := v.Args[0]
+ if y3.Op != OpARM64MOVDnop {
break
}
- i3 := x4.AuxInt
- if x4.Aux != s {
+ x3 := y3.Args[0]
+ if x3.Op != OpARM64MOVBUload {
break
}
- _ = x4.Args[1]
- if p != x4.Args[0] {
+ if x3.AuxInt != 3 {
break
}
- if mem != x4.Args[1] {
+ s := x3.Aux
+ _ = x3.Args[1]
+ p := x3.Args[0]
+ mem := x3.Args[1]
+ o0 := v.Args[1]
+ if o0.Op != OpARM64ORshiftLL {
break
}
- y5 := o1.Args[1]
- if y5.Op != OpARM64MOVDnop {
+ if o0.AuxInt != 8 {
break
}
- x5 := y5.Args[0]
- if x5.Op != OpARM64MOVBUload {
+ _ = o0.Args[1]
+ o1 := o0.Args[0]
+ if o1.Op != OpARM64ORshiftLL {
break
}
- i2 := x5.AuxInt
- if x5.Aux != s {
+ if o1.AuxInt != 16 {
break
}
- _ = x5.Args[1]
- if p != x5.Args[0] {
+ _ = o1.Args[1]
+ s0 := o1.Args[0]
+ if s0.Op != OpARM64SLLconst {
break
}
- if mem != x5.Args[1] {
+ if s0.AuxInt != 24 {
break
}
- y6 := o0.Args[1]
- if y6.Op != OpARM64MOVDnop {
+ y0 := s0.Args[0]
+ if y0.Op != OpARM64MOVDnop {
break
}
- x6 := y6.Args[0]
- if x6.Op != OpARM64MOVBUload {
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVBUloadidx {
break
}
- i1 := x6.AuxInt
- if x6.Aux != s {
+ _ = x0.Args[2]
+ ptr0 := x0.Args[0]
+ idx0 := x0.Args[1]
+ if mem != x0.Args[2] {
break
}
- _ = x6.Args[1]
- if p != x6.Args[0] {
+ y1 := o1.Args[1]
+ if y1.Op != OpARM64MOVDnop {
break
}
- if mem != x6.Args[1] {
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
break
}
- y7 := v.Args[1]
- if y7.Op != OpARM64MOVDnop {
+ if x1.AuxInt != 1 {
break
}
- x7 := y7.Args[0]
- if x7.Op != OpARM64MOVBUload {
+ if x1.Aux != s {
break
}
- i0 := x7.AuxInt
- if x7.Aux != s {
+ _ = x1.Args[1]
+ p1 := x1.Args[0]
+ if p1.Op != OpARM64ADD {
break
}
- _ = x7.Args[1]
- if p != x7.Args[0] {
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ if mem != x1.Args[1] {
break
}
- if mem != x7.Args[1] {
+ y2 := o0.Args[1]
+ if y2.Op != OpARM64MOVDnop {
break
}
- if !(i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)) {
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUload {
break
}
- b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
- v0 := b.NewValue0(v.Pos, OpARM64REV, t)
+ if x2.AuxInt != 2 {
+ break
+ }
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[1]
+ if p != x2.Args[0] {
+ break
+ }
+ if mem != x2.Args[1] {
+ break
+ }
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2, x3)
+ v0 := b.NewValue0(v.Pos, OpARM64REVW, t)
v.reset(OpCopy)
v.AddArg(v0)
- v1 := b.NewValue0(v.Pos, OpARM64MOVDload, t)
- v1.Aux = s
- v2 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
- v2.AuxInt = i0
- v2.AddArg(p)
- v1.AddArg(v2)
+ v1 := b.NewValue0(v.Pos, OpARM64MOVWUloadidx, t)
+ v1.AddArg(ptr0)
+ v1.AddArg(idx0)
v1.AddArg(mem)
v0.AddArg(v1)
return true
}
- // match: (OR <t> y7:(MOVDnop x7:(MOVBUload [i0] {s} p mem)) o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] y0:(MOVDnop x0:(MOVBUload [i7] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i6] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i5] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i4] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [i3] {s} p mem))) y5:(MOVDnop x5:(MOVBUload [i2] {s} p mem))) y6:(MOVDnop x6:(MOVBUload [i1] {s} p mem))))
+ // match: (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] y0:(MOVDnop x0:(MOVBUload [i0] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i1] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i2] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i3] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [i4] {s} p mem))) y5:(MOVDnop x5:(MOVBUload [i5] {s} p mem))) y6:(MOVDnop x6:(MOVBUload [i6] {s} p mem))) y7:(MOVDnop x7:(MOVBUload [i7] {s} p mem)))
// cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)
// result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (REV <t> (MOVDload <t> {s} (OffPtr <p.Type> [i0] p) mem))
for {
t := v.Type
_ = v.Args[1]
- y7 := v.Args[0]
- if y7.Op != OpARM64MOVDnop {
- break
- }
- x7 := y7.Args[0]
- if x7.Op != OpARM64MOVBUload {
- break
- }
- i0 := x7.AuxInt
- s := x7.Aux
- _ = x7.Args[1]
- p := x7.Args[0]
- mem := x7.Args[1]
- o0 := v.Args[1]
+ o0 := v.Args[0]
if o0.Op != OpARM64ORshiftLL {
break
}
if x0.Op != OpARM64MOVBUload {
break
}
- i7 := x0.AuxInt
- if x0.Aux != s {
- break
- }
+ i0 := x0.AuxInt
+ s := x0.Aux
_ = x0.Args[1]
- if p != x0.Args[0] {
- break
- }
- if mem != x0.Args[1] {
- break
- }
+ p := x0.Args[0]
+ mem := x0.Args[1]
y1 := o5.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if x1.Op != OpARM64MOVBUload {
break
}
- i6 := x1.AuxInt
+ i1 := x1.AuxInt
if x1.Aux != s {
break
}
if x2.Op != OpARM64MOVBUload {
break
}
- i5 := x2.AuxInt
+ i2 := x2.AuxInt
if x2.Aux != s {
break
}
if x3.Op != OpARM64MOVBUload {
break
}
- i4 := x3.AuxInt
+ i3 := x3.AuxInt
if x3.Aux != s {
break
}
if x4.Op != OpARM64MOVBUload {
break
}
- i3 := x4.AuxInt
+ i4 := x4.AuxInt
if x4.Aux != s {
break
}
if x5.Op != OpARM64MOVBUload {
break
}
- i2 := x5.AuxInt
+ i5 := x5.AuxInt
if x5.Aux != s {
break
}
if x6.Op != OpARM64MOVBUload {
break
}
- i1 := x6.AuxInt
+ i6 := x6.AuxInt
if x6.Aux != s {
break
}
if mem != x6.Args[1] {
break
}
+ y7 := v.Args[1]
+ if y7.Op != OpARM64MOVDnop {
+ break
+ }
+ x7 := y7.Args[0]
+ if x7.Op != OpARM64MOVBUload {
+ break
+ }
+ i7 := x7.AuxInt
+ if x7.Aux != s {
+ break
+ }
+ _ = x7.Args[1]
+ if p != x7.Args[0] {
+ break
+ }
+ if mem != x7.Args[1] {
+ break
+ }
if !(i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)) {
break
}
v0.AddArg(v1)
return true
}
- // match: (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] y0:(MOVDnop x0:(MOVBUload [i0] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i1] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i2] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i3] {s} p mem)))
- // cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)
- // result: @mergePoint(b,x0,x1,x2,x3
) (REVW <t> (MOVWUload <t> {s} (OffPtr <p.Type> [i0] p) mem))
+ // match: (OR <t> y7:(MOVDnop x7:(MOVBUload [i7] {s} p mem)) o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] y0:(MOVDnop x0:(MOVBUload [i0] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i1] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i2] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i3] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [i4] {s} p mem))) y5:(MOVDnop x5:(MOVBUload [i5] {s} p mem))) y6:(MOVDnop x6:(MOVBUload [i6] {s} p mem))))
+ // cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3
,x4,x5,x6,x7) (REV <t> (MOVDload <t> {s} (OffPtr <p.Type> [i0] p) mem))
for {
t := v.Type
_ = v.Args[1]
- o0 := v.Args[0]
+ y7 := v.Args[0]
+ if y7.Op != OpARM64MOVDnop {
+ break
+ }
+ x7 := y7.Args[0]
+ if x7.Op != OpARM64MOVBUload {
+ break
+ }
+ i7 := x7.AuxInt
+ s := x7.Aux
+ _ = x7.Args[1]
+ p := x7.Args[0]
+ mem := x7.Args[1]
+ o0 := v.Args[1]
if o0.Op != OpARM64ORshiftLL {
break
}
break
}
_ = o1.Args[1]
- s0 := o1.Args[0]
+ o2 := o1.Args[0]
+ if o2.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o2.AuxInt != 24 {
+ break
+ }
+ _ = o2.Args[1]
+ o3 := o2.Args[0]
+ if o3.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o3.AuxInt != 32 {
+ break
+ }
+ _ = o3.Args[1]
+ o4 := o3.Args[0]
+ if o4.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o4.AuxInt != 40 {
+ break
+ }
+ _ = o4.Args[1]
+ o5 := o4.Args[0]
+ if o5.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o5.AuxInt != 48 {
+ break
+ }
+ _ = o5.Args[1]
+ s0 := o5.Args[0]
if s0.Op != OpARM64SLLconst {
break
}
- if s0.AuxInt != 24 {
+ if s0.AuxInt != 56 {
break
}
y0 := s0.Args[0]
break
}
i0 := x0.AuxInt
- s := x0.Aux
+ if x0.Aux != s {
+ break
+ }
_ = x0.Args[1]
- p := x0.Args[0]
- mem := x0.Args[1]
- y1 := o1.Args[1]
+ if p != x0.Args[0] {
+ break
+ }
+ if mem != x0.Args[1] {
+ break
+ }
+ y1 := o5.Args[1]
if y1.Op != OpARM64MOVDnop {
break
}
if mem != x1.Args[1] {
break
}
- y2 := o0.Args[1]
+ y2 := o4.Args[1]
if y2.Op != OpARM64MOVDnop {
break
}
if mem != x2.Args[1] {
break
}
- y3 := v.Args[1]
+ y3 := o3.Args[1]
if y3.Op != OpARM64MOVDnop {
break
}
if mem != x3.Args[1] {
break
}
- if !(i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)) {
- break
- }
- b = mergePoint(b, x0, x1, x2, x3)
- v0 := b.NewValue0(v.Pos, OpARM64REVW, t)
- v.reset(OpCopy)
- v.AddArg(v0)
- v1 := b.NewValue0(v.Pos, OpARM64MOVWUload, t)
- v1.Aux = s
- v2 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
- v2.AuxInt = i0
- v2.AddArg(p)
- v1.AddArg(v2)
- v1.AddArg(mem)
- v0.AddArg(v1)
- return true
- }
- return false
-}
-func rewriteValueARM64_OpARM64OR_20(v *Value) bool {
- b := v.Block
- _ = b
- // match: (OR <t> y3:(MOVDnop x3:(MOVBUload [i3] {s} p mem)) o0:(ORshiftLL [8] o1:(ORshiftLL [16] s0:(SLLconst [24] y0:(MOVDnop x0:(MOVBUload [i0] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i1] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i2] {s} p mem))))
- // cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)
- // result: @mergePoint(b,x0,x1,x2,x3) (REVW <t> (MOVWUload <t> {s} (OffPtr <p.Type> [i0] p) mem))
- for {
- t := v.Type
- _ = v.Args[1]
- y3 := v.Args[0]
- if y3.Op != OpARM64MOVDnop {
- break
- }
- x3 := y3.Args[0]
- if x3.Op != OpARM64MOVBUload {
- break
- }
- i3 := x3.AuxInt
- s := x3.Aux
- _ = x3.Args[1]
- p := x3.Args[0]
- mem := x3.Args[1]
- o0 := v.Args[1]
- if o0.Op != OpARM64ORshiftLL {
- break
- }
- if o0.AuxInt != 8 {
- break
- }
- _ = o0.Args[1]
- o1 := o0.Args[0]
- if o1.Op != OpARM64ORshiftLL {
- break
- }
- if o1.AuxInt != 16 {
- break
- }
- _ = o1.Args[1]
- s0 := o1.Args[0]
- if s0.Op != OpARM64SLLconst {
- break
- }
- if s0.AuxInt != 24 {
- break
- }
- y0 := s0.Args[0]
- if y0.Op != OpARM64MOVDnop {
+ y4 := o2.Args[1]
+ if y4.Op != OpARM64MOVDnop {
break
}
- x0 := y0.Args[0]
- if x0.Op != OpARM64MOVBUload {
+ x4 := y4.Args[0]
+ if x4.Op != OpARM64MOVBUload {
break
}
- i0 := x0.AuxInt
- if x0.Aux != s {
+ i4 := x4.AuxInt
+ if x4.Aux != s {
break
}
- _ = x0.Args[1]
- if p != x0.Args[0] {
+ _ = x4.Args[1]
+ if p != x4.Args[0] {
break
}
- if mem != x0.Args[1] {
+ if mem != x4.Args[1] {
break
}
- y1 := o1.Args[1]
- if y1.Op != OpARM64MOVDnop {
+ y5 := o1.Args[1]
+ if y5.Op != OpARM64MOVDnop {
break
}
- x1 := y1.Args[0]
- if x1.Op != OpARM64MOVBUload {
+ x5 := y5.Args[0]
+ if x5.Op != OpARM64MOVBUload {
break
}
- i1 := x1.AuxInt
- if x1.Aux != s {
+ i5 := x5.AuxInt
+ if x5.Aux != s {
break
}
- _ = x1.Args[1]
- if p != x1.Args[0] {
+ _ = x5.Args[1]
+ if p != x5.Args[0] {
break
}
- if mem != x1.Args[1] {
+ if mem != x5.Args[1] {
break
}
- y2 := o0.Args[1]
- if y2.Op != OpARM64MOVDnop {
+ y6 := o0.Args[1]
+ if y6.Op != OpARM64MOVDnop {
break
}
- x2 := y2.Args[0]
- if x2.Op != OpARM64MOVBUload {
+ x6 := y6.Args[0]
+ if x6.Op != OpARM64MOVBUload {
break
}
- i2 := x2.AuxInt
- if x2.Aux != s {
+ i6 := x6.AuxInt
+ if x6.Aux != s {
break
}
- _ = x2.Args[1]
- if p != x2.Args[0] {
+ _ = x6.Args[1]
+ if p != x6.Args[0] {
break
}
- if mem != x2.Args[1] {
+ if mem != x6.Args[1] {
break
}
- if !(i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(o0) && clobber(o1) && clobber(s0)) {
+ if !(i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)) {
break
}
- b = mergePoint(b, x0, x1, x2, x3)
- v0 := b.NewValue0(v.Pos, OpARM64REVW, t)
+ b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
+ v0 := b.NewValue0(v.Pos, OpARM64REV, t)
v.reset(OpCopy)
v.AddArg(v0)
- v1 := b.NewValue0(v.Pos, OpARM64MOVWUload, t)
+ v1 := b.NewValue0(v.Pos, OpARM64MOVDload, t)
v1.Aux = s
v2 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
v2.AuxInt = i0
v0.AddArg(v1)
return true
}
- // match: (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] y0:(MOVDnop x0:(MOVBUload [i0] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i1] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i2] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i3] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [i4] {s} p mem))) y5:(MOVDnop x5:(MOVBUload [i5] {s} p mem))) y6:(MOVDnop x6:(MOVBUload [i6] {s} p mem))) y7:(MOVDnop x7:(MOVBUload [i7] {s} p mem)))
- // cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)
- // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (REV <t> (MOVDload <t> {s} (OffPtr <p.Type> [i0] p) mem))
+ // match: (OR <t> o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] y0:(MOVDnop x0:(MOVBUloadidx ptr0 idx0 mem))) y1:(MOVDnop x1:(MOVBUload [1] {s} p1:(ADD ptr1 idx1) mem))) y2:(MOVDnop x2:(MOVBUload [2] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [3] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [4] {s} p mem))) y5:(MOVDnop x5:(MOVBUload [5] {s} p mem))) y6:(MOVDnop x6:(MOVBUload [6] {s} p mem))) y7:(MOVDnop x7:(MOVBUload [7] {s} p mem)))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (REV <t> (MOVDloadidx <t> ptr0 idx0 mem))
for {
t := v.Type
_ = v.Args[1]
break
}
x0 := y0.Args[0]
- if x0.Op != OpARM64MOVBUload {
+ if x0.Op != OpARM64MOVBUloadidx {
break
}
- i0 := x0.AuxInt
- s := x0.Aux
- _ = x0.Args[1]
- p := x0.Args[0]
- mem := x0.Args[1]
+ _ = x0.Args[2]
+ ptr0 := x0.Args[0]
+ idx0 := x0.Args[1]
+ mem := x0.Args[2]
y1 := o5.Args[1]
if y1.Op != OpARM64MOVDnop {
break
if x1.Op != OpARM64MOVBUload {
break
}
- i1 := x1.AuxInt
- if x1.Aux != s {
+ if x1.AuxInt != 1 {
break
}
+ s := x1.Aux
_ = x1.Args[1]
- if p != x1.Args[0] {
+ p1 := x1.Args[0]
+ if p1.Op != OpARM64ADD {
break
}
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
if mem != x1.Args[1] {
break
}
if x2.Op != OpARM64MOVBUload {
break
}
- i2 := x2.AuxInt
- if x2.Aux != s {
+ if x2.AuxInt != 2 {
break
}
- _ = x2.Args[1]
- if p != x2.Args[0] {
+ if x2.Aux != s {
break
}
+ _ = x2.Args[1]
+ p := x2.Args[0]
if mem != x2.Args[1] {
break
}
if x3.Op != OpARM64MOVBUload {
break
}
- i3 := x3.AuxInt
+ if x3.AuxInt != 3 {
+ break
+ }
if x3.Aux != s {
break
}
if x4.Op != OpARM64MOVBUload {
break
}
- i4 := x4.AuxInt
+ if x4.AuxInt != 4 {
+ break
+ }
if x4.Aux != s {
break
}
if x5.Op != OpARM64MOVBUload {
break
}
- i5 := x5.AuxInt
+ if x5.AuxInt != 5 {
+ break
+ }
if x5.Aux != s {
break
}
if x6.Op != OpARM64MOVBUload {
break
}
- i6 := x6.AuxInt
+ if x6.AuxInt != 6 {
+ break
+ }
if x6.Aux != s {
break
}
if x7.Op != OpARM64MOVBUload {
break
}
- i7 := x7.AuxInt
+ if x7.AuxInt != 7 {
+ break
+ }
if x7.Aux != s {
break
}
if mem != x7.Args[1] {
break
}
- if !(i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)) {
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)) {
break
}
b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
v0 := b.NewValue0(v.Pos, OpARM64REV, t)
v.reset(OpCopy)
v.AddArg(v0)
- v1 := b.NewValue0(v.Pos, OpARM64MOVDload, t)
- v1.Aux = s
- v2 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
- v2.AuxInt = i0
- v2.AddArg(p)
- v1.AddArg(v2)
+ v1 := b.NewValue0(v.Pos, OpARM64MOVDloadidx, t)
+ v1.AddArg(ptr0)
+ v1.AddArg(idx0)
v1.AddArg(mem)
v0.AddArg(v1)
return true
}
- // match: (OR <t> y7:(MOVDnop x7:(MOVBUload [i7] {s} p mem)) o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] y0:(MOVDnop x0:(MOVBUload [i0] {s} p mem))) y1:(MOVDnop x1:(MOVBUload [i1] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i2] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i3] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [i4] {s} p mem))) y5:(MOVDnop x5:(MOVBUload [i5] {s} p mem))) y6:(MOVDnop x6:(MOVBUload [i6] {s} p mem))))
- // cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)
- // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (REV <t> (MOVDload <t> {s} (OffPtr <p.Type> [i0] p) mem))
+ return false
+}
+func rewriteValueARM64_OpARM64OR_30(v *Value) bool {
+ b := v.Block
+ _ = b
+ // match: (OR <t> y7:(MOVDnop x7:(MOVBUload [7] {s} p mem)) o0:(ORshiftLL [8] o1:(ORshiftLL [16] o2:(ORshiftLL [24] o3:(ORshiftLL [32] o4:(ORshiftLL [40] o5:(ORshiftLL [48] s0:(SLLconst [56] y0:(MOVDnop x0:(MOVBUloadidx ptr0 idx0 mem))) y1:(MOVDnop x1:(MOVBUload [1] {s} p1:(ADD ptr1 idx1) mem))) y2:(MOVDnop x2:(MOVBUload [2] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [3] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [4] {s} p mem))) y5:(MOVDnop x5:(MOVBUload [5] {s} p mem))) y6:(MOVDnop x6:(MOVBUload [6] {s} p mem))))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)
+ // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (REV <t> (MOVDloadidx <t> ptr0 idx0 mem))
for {
t := v.Type
_ = v.Args[1]
if x7.Op != OpARM64MOVBUload {
break
}
- i7 := x7.AuxInt
+ if x7.AuxInt != 7 {
+ break
+ }
s := x7.Aux
_ = x7.Args[1]
p := x7.Args[0]
break
}
x0 := y0.Args[0]
- if x0.Op != OpARM64MOVBUload {
- break
- }
- i0 := x0.AuxInt
- if x0.Aux != s {
- break
- }
- _ = x0.Args[1]
- if p != x0.Args[0] {
+ if x0.Op != OpARM64MOVBUloadidx {
break
}
- if mem != x0.Args[1] {
+ _ = x0.Args[2]
+ ptr0 := x0.Args[0]
+ idx0 := x0.Args[1]
+ if mem != x0.Args[2] {
break
}
y1 := o5.Args[1]
if x1.Op != OpARM64MOVBUload {
break
}
- i1 := x1.AuxInt
+ if x1.AuxInt != 1 {
+ break
+ }
if x1.Aux != s {
break
}
_ = x1.Args[1]
- if p != x1.Args[0] {
+ p1 := x1.Args[0]
+ if p1.Op != OpARM64ADD {
break
}
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
if mem != x1.Args[1] {
break
}
if x2.Op != OpARM64MOVBUload {
break
}
- i2 := x2.AuxInt
+ if x2.AuxInt != 2 {
+ break
+ }
if x2.Aux != s {
break
}
if x3.Op != OpARM64MOVBUload {
break
}
- i3 := x3.AuxInt
+ if x3.AuxInt != 3 {
+ break
+ }
if x3.Aux != s {
break
}
if x4.Op != OpARM64MOVBUload {
break
}
- i4 := x4.AuxInt
+ if x4.AuxInt != 4 {
+ break
+ }
if x4.Aux != s {
break
}
if x5.Op != OpARM64MOVBUload {
break
}
- i5 := x5.AuxInt
+ if x5.AuxInt != 5 {
+ break
+ }
if x5.Aux != s {
break
}
if x6.Op != OpARM64MOVBUload {
break
}
- i6 := x6.AuxInt
+ if x6.AuxInt != 6 {
+ break
+ }
if x6.Aux != s {
break
}
if mem != x6.Args[1] {
break
}
- if !(i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)) {
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && y5.Uses == 1 && y6.Uses == 1 && y7.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(y5) && clobber(y6) && clobber(y7) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) && clobber(s0)) {
break
}
b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7)
v0 := b.NewValue0(v.Pos, OpARM64REV, t)
v.reset(OpCopy)
v.AddArg(v0)
- v1 := b.NewValue0(v.Pos, OpARM64MOVDload, t)
- v1.Aux = s
- v2 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
- v2.AuxInt = i0
- v2.AddArg(p)
- v1.AddArg(v2)
+ v1 := b.NewValue0(v.Pos, OpARM64MOVDloadidx, t)
+ v1.AddArg(ptr0)
+ v1.AddArg(idx0)
v1.AddArg(mem)
v0.AddArg(v1)
return true
v0.AddArg(mem)
return true
}
+ // match: (ORshiftLL <t> [8] y0:(MOVDnop x0:(MOVBUloadidx ptr0 idx0 mem)) y1:(MOVDnop x1:(MOVBUload [1] {s} p1:(ADD ptr1 idx1) mem)))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && mergePoint(b,x0,x1) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x0) && clobber(x1) && clobber(y0) && clobber(y1)
+ // result: @mergePoint(b,x0,x1) (MOVHUloadidx <t> ptr0 idx0 mem)
+ for {
+ t := v.Type
+ if v.AuxInt != 8 {
+ break
+ }
+ _ = v.Args[1]
+ y0 := v.Args[0]
+ if y0.Op != OpARM64MOVDnop {
+ break
+ }
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVBUloadidx {
+ break
+ }
+ _ = x0.Args[2]
+ ptr0 := x0.Args[0]
+ idx0 := x0.Args[1]
+ mem := x0.Args[2]
+ y1 := v.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ if x1.AuxInt != 1 {
+ break
+ }
+ s := x1.Aux
+ _ = x1.Args[1]
+ p1 := x1.Args[0]
+ if p1.Op != OpARM64ADD {
+ break
+ }
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ if mem != x1.Args[1] {
+ break
+ }
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && mergePoint(b, x0, x1) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x0) && clobber(x1) && clobber(y0) && clobber(y1)) {
+ break
+ }
+ b = mergePoint(b, x0, x1)
+ v0 := b.NewValue0(v.Pos, OpARM64MOVHUloadidx, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v0.AddArg(ptr0)
+ v0.AddArg(idx0)
+ v0.AddArg(mem)
+ return true
+ }
+ return false
+}
+func rewriteValueARM64_OpARM64ORshiftLL_10(v *Value) bool {
+ b := v.Block
+ _ = b
// match: (ORshiftLL <t> [24] o0:(ORshiftLL [16] x0:(MOVHUload [i0] {s} p mem) y1:(MOVDnop x1:(MOVBUload [i2] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i3] {s} p mem)))
// cond: i2 == i0+2 && i3 == i0+3 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(y1) && clobber(y2) && clobber(o0)
// result: @mergePoint(b,x0,x1,x2) (MOVWUload <t> {s} (OffPtr <p.Type> [i0] p) mem)
v0.AddArg(mem)
return true
}
- return false
-}
-func rewriteValueARM64_OpARM64ORshiftLL_10(v *Value) bool {
- b := v.Block
- _ = b
+ // match: (ORshiftLL <t> [24] o0:(ORshiftLL [16] x0:(MOVHUloadidx ptr0 idx0 mem) y1:(MOVDnop x1:(MOVBUload [2] {s} p1:(ADD ptr1 idx1) mem))) y2:(MOVDnop x2:(MOVBUload [3] {s} p mem)))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(y1) && clobber(y2) && clobber(o0)
+ // result: @mergePoint(b,x0,x1,x2) (MOVWUloadidx <t> ptr0 idx0 mem)
+ for {
+ t := v.Type
+ if v.AuxInt != 24 {
+ break
+ }
+ _ = v.Args[1]
+ o0 := v.Args[0]
+ if o0.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o0.AuxInt != 16 {
+ break
+ }
+ _ = o0.Args[1]
+ x0 := o0.Args[0]
+ if x0.Op != OpARM64MOVHUloadidx {
+ break
+ }
+ _ = x0.Args[2]
+ ptr0 := x0.Args[0]
+ idx0 := x0.Args[1]
+ mem := x0.Args[2]
+ y1 := o0.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ if x1.AuxInt != 2 {
+ break
+ }
+ s := x1.Aux
+ _ = x1.Args[1]
+ p1 := x1.Args[0]
+ if p1.Op != OpARM64ADD {
+ break
+ }
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ if mem != x1.Args[1] {
+ break
+ }
+ y2 := v.Args[1]
+ if y2.Op != OpARM64MOVDnop {
+ break
+ }
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUload {
+ break
+ }
+ if x2.AuxInt != 3 {
+ break
+ }
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[1]
+ p := x2.Args[0]
+ if mem != x2.Args[1] {
+ break
+ }
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(y1) && clobber(y2) && clobber(o0)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2)
+ v0 := b.NewValue0(v.Pos, OpARM64MOVWUloadidx, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v0.AddArg(ptr0)
+ v0.AddArg(idx0)
+ v0.AddArg(mem)
+ return true
+ }
// match: (ORshiftLL <t> [56] o0:(ORshiftLL [48] o1:(ORshiftLL [40] o2:(ORshiftLL [32] x0:(MOVWUload [i0] {s} p mem) y1:(MOVDnop x1:(MOVBUload [i4] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i5] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i6] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [i7] {s} p mem)))
// cond: i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(o0) && clobber(o1) && clobber(o2)
// result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDload <t> {s} (OffPtr <p.Type> [i0] p) mem)
if x1.Op != OpARM64MOVBUload {
break
}
- i4 := x1.AuxInt
- if x1.Aux != s {
+ i4 := x1.AuxInt
+ if x1.Aux != s {
+ break
+ }
+ _ = x1.Args[1]
+ if p != x1.Args[0] {
+ break
+ }
+ if mem != x1.Args[1] {
+ break
+ }
+ y2 := o1.Args[1]
+ if y2.Op != OpARM64MOVDnop {
+ break
+ }
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUload {
+ break
+ }
+ i5 := x2.AuxInt
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[1]
+ if p != x2.Args[0] {
+ break
+ }
+ if mem != x2.Args[1] {
+ break
+ }
+ y3 := o0.Args[1]
+ if y3.Op != OpARM64MOVDnop {
+ break
+ }
+ x3 := y3.Args[0]
+ if x3.Op != OpARM64MOVBUload {
+ break
+ }
+ i6 := x3.AuxInt
+ if x3.Aux != s {
+ break
+ }
+ _ = x3.Args[1]
+ if p != x3.Args[0] {
+ break
+ }
+ if mem != x3.Args[1] {
+ break
+ }
+ y4 := v.Args[1]
+ if y4.Op != OpARM64MOVDnop {
+ break
+ }
+ x4 := y4.Args[0]
+ if x4.Op != OpARM64MOVBUload {
+ break
+ }
+ i7 := x4.AuxInt
+ if x4.Aux != s {
+ break
+ }
+ _ = x4.Args[1]
+ if p != x4.Args[0] {
+ break
+ }
+ if mem != x4.Args[1] {
+ break
+ }
+ if !(i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(o0) && clobber(o1) && clobber(o2)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2, x3, x4)
+ v0 := b.NewValue0(v.Pos, OpARM64MOVDload, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v0.Aux = s
+ v1 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
+ v1.AuxInt = i0
+ v1.AddArg(p)
+ v0.AddArg(v1)
+ v0.AddArg(mem)
+ return true
+ }
+ // match: (ORshiftLL <t> [56] o0:(ORshiftLL [48] o1:(ORshiftLL [40] o2:(ORshiftLL [32] x0:(MOVWUloadidx ptr0 idx0 mem) y1:(MOVDnop x1:(MOVBUload [4] {s} p1:(ADD ptr1 idx1) mem))) y2:(MOVDnop x2:(MOVBUload [5] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [6] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [7] {s} p mem)))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(o0) && clobber(o1) && clobber(o2)
+ // result: @mergePoint(b,x0,x1,x2,x3,x4) (MOVDloadidx <t> ptr0 idx0 mem)
+ for {
+ t := v.Type
+ if v.AuxInt != 56 {
+ break
+ }
+ _ = v.Args[1]
+ o0 := v.Args[0]
+ if o0.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o0.AuxInt != 48 {
+ break
+ }
+ _ = o0.Args[1]
+ o1 := o0.Args[0]
+ if o1.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o1.AuxInt != 40 {
+ break
+ }
+ _ = o1.Args[1]
+ o2 := o1.Args[0]
+ if o2.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o2.AuxInt != 32 {
+ break
+ }
+ _ = o2.Args[1]
+ x0 := o2.Args[0]
+ if x0.Op != OpARM64MOVWUloadidx {
+ break
+ }
+ _ = x0.Args[2]
+ ptr0 := x0.Args[0]
+ idx0 := x0.Args[1]
+ mem := x0.Args[2]
+ y1 := o2.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ if x1.AuxInt != 4 {
break
}
+ s := x1.Aux
_ = x1.Args[1]
- if p != x1.Args[0] {
+ p1 := x1.Args[0]
+ if p1.Op != OpARM64ADD {
break
}
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
if mem != x1.Args[1] {
break
}
if x2.Op != OpARM64MOVBUload {
break
}
- i5 := x2.AuxInt
- if x2.Aux != s {
+ if x2.AuxInt != 5 {
break
}
- _ = x2.Args[1]
- if p != x2.Args[0] {
+ if x2.Aux != s {
break
}
+ _ = x2.Args[1]
+ p := x2.Args[0]
if mem != x2.Args[1] {
break
}
if x3.Op != OpARM64MOVBUload {
break
}
- i6 := x3.AuxInt
+ if x3.AuxInt != 6 {
+ break
+ }
if x3.Aux != s {
break
}
if x4.Op != OpARM64MOVBUload {
break
}
- i7 := x4.AuxInt
+ if x4.AuxInt != 7 {
+ break
+ }
if x4.Aux != s {
break
}
if mem != x4.Args[1] {
break
}
- if !(i4 == i0+4 && i5 == i0+5 && i6 == i0+6 && i7 == i0+7 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(o0) && clobber(o1) && clobber(o2)) {
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(o0) && clobber(o1) && clobber(o2)) {
break
}
b = mergePoint(b, x0, x1, x2, x3, x4)
- v0 := b.NewValue0(v.Pos, OpARM64MOVDload, t)
+ v0 := b.NewValue0(v.Pos, OpARM64MOVDloadidx, t)
v.reset(OpCopy)
v.AddArg(v0)
- v0.Aux = s
- v1 := b.NewValue0(v.Pos, OpOffPtr, p.Type)
- v1.AuxInt = i0
- v1.AddArg(p)
- v0.AddArg(v1)
+ v0.AddArg(ptr0)
+ v0.AddArg(idx0)
v0.AddArg(mem)
return true
}
v0.AddArg(v1)
return true
}
+ // match: (ORshiftLL <t> [8] y0:(MOVDnop x0:(MOVBUload [1] {s} p1:(ADD ptr1 idx1) mem)) y1:(MOVDnop x1:(MOVBUloadidx ptr0 idx0 mem)))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && mergePoint(b,x0,x1) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x0) && clobber(x1) && clobber(y0) && clobber(y1)
+ // result: @mergePoint(b,x0,x1) (REV16W <t> (MOVHUloadidx <t> ptr0 idx0 mem))
+ for {
+ t := v.Type
+ if v.AuxInt != 8 {
+ break
+ }
+ _ = v.Args[1]
+ y0 := v.Args[0]
+ if y0.Op != OpARM64MOVDnop {
+ break
+ }
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVBUload {
+ break
+ }
+ if x0.AuxInt != 1 {
+ break
+ }
+ s := x0.Aux
+ _ = x0.Args[1]
+ p1 := x0.Args[0]
+ if p1.Op != OpARM64ADD {
+ break
+ }
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ mem := x0.Args[1]
+ y1 := v.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUloadidx {
+ break
+ }
+ _ = x1.Args[2]
+ ptr0 := x1.Args[0]
+ idx0 := x1.Args[1]
+ if mem != x1.Args[2] {
+ break
+ }
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && mergePoint(b, x0, x1) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && clobber(x0) && clobber(x1) && clobber(y0) && clobber(y1)) {
+ break
+ }
+ b = mergePoint(b, x0, x1)
+ v0 := b.NewValue0(v.Pos, OpARM64REV16W, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v1 := b.NewValue0(v.Pos, OpARM64MOVHUloadidx, t)
+ v1.AddArg(ptr0)
+ v1.AddArg(idx0)
+ v1.AddArg(mem)
+ v0.AddArg(v1)
+ return true
+ }
// match: (ORshiftLL <t> [24] o0:(ORshiftLL [16] y0:(REV16W x0:(MOVHUload [i2] {s} p mem)) y1:(MOVDnop x1:(MOVBUload [i1] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i0] {s} p mem)))
// cond: i1 == i0+1 && i2 == i0+2 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(o0)
// result: @mergePoint(b,x0,x1,x2) (REVW <t> (MOVWUload <t> {s} (OffPtr <p.Type> [i0] p) mem))
v0.AddArg(v1)
return true
}
+ // match: (ORshiftLL <t> [24] o0:(ORshiftLL [16] y0:(REV16W x0:(MOVHUload [2] {s} p mem)) y1:(MOVDnop x1:(MOVBUload [1] {s} p1:(ADD ptr1 idx1) mem))) y2:(MOVDnop x2:(MOVBUloadidx ptr0 idx0 mem)))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(o0)
+ // result: @mergePoint(b,x0,x1,x2) (REVW <t> (MOVWUloadidx <t> ptr0 idx0 mem))
+ for {
+ t := v.Type
+ if v.AuxInt != 24 {
+ break
+ }
+ _ = v.Args[1]
+ o0 := v.Args[0]
+ if o0.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o0.AuxInt != 16 {
+ break
+ }
+ _ = o0.Args[1]
+ y0 := o0.Args[0]
+ if y0.Op != OpARM64REV16W {
+ break
+ }
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVHUload {
+ break
+ }
+ if x0.AuxInt != 2 {
+ break
+ }
+ s := x0.Aux
+ _ = x0.Args[1]
+ p := x0.Args[0]
+ mem := x0.Args[1]
+ y1 := o0.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ if x1.AuxInt != 1 {
+ break
+ }
+ if x1.Aux != s {
+ break
+ }
+ _ = x1.Args[1]
+ p1 := x1.Args[0]
+ if p1.Op != OpARM64ADD {
+ break
+ }
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ if mem != x1.Args[1] {
+ break
+ }
+ y2 := v.Args[1]
+ if y2.Op != OpARM64MOVDnop {
+ break
+ }
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUloadidx {
+ break
+ }
+ _ = x2.Args[2]
+ ptr0 := x2.Args[0]
+ idx0 := x2.Args[1]
+ if mem != x2.Args[2] {
+ break
+ }
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(o0)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2)
+ v0 := b.NewValue0(v.Pos, OpARM64REVW, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v1 := b.NewValue0(v.Pos, OpARM64MOVWUloadidx, t)
+ v1.AddArg(ptr0)
+ v1.AddArg(idx0)
+ v1.AddArg(mem)
+ v0.AddArg(v1)
+ return true
+ }
// match: (ORshiftLL <t> [56] o0:(ORshiftLL [48] o1:(ORshiftLL [40] o2:(ORshiftLL [32] y0:(REVW x0:(MOVWUload [i4] {s} p mem)) y1:(MOVDnop x1:(MOVBUload [i3] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [i2] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [i1] {s} p mem))) y4:(MOVDnop x4:(MOVBUload [i0] {s} p mem)))
// cond: i1 == i0+1 && i2 == i0+2 && i3 == i0+3 && i4 == i0+4 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(o0) && clobber(o1) && clobber(o2)
// result: @mergePoint(b,x0,x1,x2,x3,x4) (REV <t> (MOVDload <t> {s} (OffPtr <p.Type> [i0] p) mem))
v0.AddArg(v1)
return true
}
+ // match: (ORshiftLL <t> [56] o0:(ORshiftLL [48] o1:(ORshiftLL [40] o2:(ORshiftLL [32] y0:(REVW x0:(MOVWUload [4] {s} p mem)) y1:(MOVDnop x1:(MOVBUload [3] {s} p mem))) y2:(MOVDnop x2:(MOVBUload [2] {s} p mem))) y3:(MOVDnop x3:(MOVBUload [1] {s} p1:(ADD ptr1 idx1) mem))) y4:(MOVDnop x4:(MOVBUloadidx ptr0 idx0 mem)))
+ // cond: s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(o0) && clobber(o1) && clobber(o2)
+ // result: @mergePoint(b,x0,x1,x2,x3,x4) (REV <t> (MOVDloadidx <t> ptr0 idx0 mem))
+ for {
+ t := v.Type
+ if v.AuxInt != 56 {
+ break
+ }
+ _ = v.Args[1]
+ o0 := v.Args[0]
+ if o0.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o0.AuxInt != 48 {
+ break
+ }
+ _ = o0.Args[1]
+ o1 := o0.Args[0]
+ if o1.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o1.AuxInt != 40 {
+ break
+ }
+ _ = o1.Args[1]
+ o2 := o1.Args[0]
+ if o2.Op != OpARM64ORshiftLL {
+ break
+ }
+ if o2.AuxInt != 32 {
+ break
+ }
+ _ = o2.Args[1]
+ y0 := o2.Args[0]
+ if y0.Op != OpARM64REVW {
+ break
+ }
+ x0 := y0.Args[0]
+ if x0.Op != OpARM64MOVWUload {
+ break
+ }
+ if x0.AuxInt != 4 {
+ break
+ }
+ s := x0.Aux
+ _ = x0.Args[1]
+ p := x0.Args[0]
+ mem := x0.Args[1]
+ y1 := o2.Args[1]
+ if y1.Op != OpARM64MOVDnop {
+ break
+ }
+ x1 := y1.Args[0]
+ if x1.Op != OpARM64MOVBUload {
+ break
+ }
+ if x1.AuxInt != 3 {
+ break
+ }
+ if x1.Aux != s {
+ break
+ }
+ _ = x1.Args[1]
+ if p != x1.Args[0] {
+ break
+ }
+ if mem != x1.Args[1] {
+ break
+ }
+ y2 := o1.Args[1]
+ if y2.Op != OpARM64MOVDnop {
+ break
+ }
+ x2 := y2.Args[0]
+ if x2.Op != OpARM64MOVBUload {
+ break
+ }
+ if x2.AuxInt != 2 {
+ break
+ }
+ if x2.Aux != s {
+ break
+ }
+ _ = x2.Args[1]
+ if p != x2.Args[0] {
+ break
+ }
+ if mem != x2.Args[1] {
+ break
+ }
+ y3 := o0.Args[1]
+ if y3.Op != OpARM64MOVDnop {
+ break
+ }
+ x3 := y3.Args[0]
+ if x3.Op != OpARM64MOVBUload {
+ break
+ }
+ if x3.AuxInt != 1 {
+ break
+ }
+ if x3.Aux != s {
+ break
+ }
+ _ = x3.Args[1]
+ p1 := x3.Args[0]
+ if p1.Op != OpARM64ADD {
+ break
+ }
+ _ = p1.Args[1]
+ ptr1 := p1.Args[0]
+ idx1 := p1.Args[1]
+ if mem != x3.Args[1] {
+ break
+ }
+ y4 := v.Args[1]
+ if y4.Op != OpARM64MOVDnop {
+ break
+ }
+ x4 := y4.Args[0]
+ if x4.Op != OpARM64MOVBUloadidx {
+ break
+ }
+ _ = x4.Args[2]
+ ptr0 := x4.Args[0]
+ idx0 := x4.Args[1]
+ if mem != x4.Args[2] {
+ break
+ }
+ if !(s == nil && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && y0.Uses == 1 && y1.Uses == 1 && y2.Uses == 1 && y3.Uses == 1 && y4.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4) != nil && (isSamePtr(ptr0, ptr1) && isSamePtr(idx0, idx1) || isSamePtr(ptr0, idx1) && isSamePtr(idx0, ptr1)) && isSamePtr(p1, p) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(y0) && clobber(y1) && clobber(y2) && clobber(y3) && clobber(y4) && clobber(o0) && clobber(o1) && clobber(o2)) {
+ break
+ }
+ b = mergePoint(b, x0, x1, x2, x3, x4)
+ v0 := b.NewValue0(v.Pos, OpARM64REV, t)
+ v.reset(OpCopy)
+ v.AddArg(v0)
+ v1 := b.NewValue0(v.Pos, OpARM64MOVDloadidx, t)
+ v1.AddArg(ptr0)
+ v1.AddArg(idx0)
+ v1.AddArg(mem)
+ v0.AddArg(v1)
+ return true
+ }
return false
}
func rewriteValueARM64_OpARM64ORshiftRA_0(v *Value) bool {