]> Cypherpunks repositories - gostls13.git/commitdiff
[dev.regabi] cmd/asm: define g register on AMD64
authorCherry Zhang <cherryyz@google.com>
Wed, 3 Feb 2021 17:09:53 +0000 (12:09 -0500)
committerCherry Zhang <cherryyz@google.com>
Fri, 5 Feb 2021 17:34:26 +0000 (17:34 +0000)
Define g register as R14 on AMD64. It is not used now, but will
be in later CLs.

The name "R14" is still recognized.

Change-Id: I9a066b15bf1051113db8c6640605e350cea397b9
Reviewed-on: https://go-review.googlesource.com/c/go/+/289195
Trust: Cherry Zhang <cherryyz@google.com>
Reviewed-by: Than McIntosh <thanm@google.com>
src/cmd/asm/internal/arch/arch.go
src/cmd/asm/internal/asm/operand_test.go
src/cmd/internal/obj/x86/a.out.go

index a62e55191e6898d43efc4aef5030bf9df5aea1ac..026d8abf81305f51d953b500c35d3bd2d7c7a087 100644 (file)
@@ -109,6 +109,10 @@ func archX86(linkArch *obj.LinkArch) *Arch {
        register["SB"] = RSB
        register["FP"] = RFP
        register["PC"] = RPC
+       if linkArch == &x86.Linkamd64 {
+               // Alias g to R14
+               register["g"] = x86.REGG
+       }
        // Register prefix not used on this architecture.
 
        instructions := make(map[string]obj.As)
index 2e83e176b297cb5840944f7c3a6787370644ac97..c6def15e20eac16b07239ecca149ac03a66e0929 100644 (file)
@@ -259,6 +259,7 @@ var amd64OperandTests = []operandTest{
        {"R15", "R15"},
        {"R8", "R8"},
        {"R9", "R9"},
+       {"g", "R14"},
        {"SI", "SI"},
        {"SP", "SP"},
        {"X0", "X0"},
index 30c1a6a44547d8f84590ab78d53f77bc99ae2d91..3be4b59da461f52dea5358173053c820b6c3c2c5 100644 (file)
@@ -263,6 +263,7 @@ const (
        FREGRET  = REG_X0
        REGSP    = REG_SP
        REGCTXT  = REG_DX
+       REGG     = REG_R14     // g register in ABIInternal
        REGEXT   = REG_R15     // compiler allocates external registers R15 down
        FREGMIN  = REG_X0 + 5  // first register variable
        FREGEXT  = REG_X0 + 15 // first external register