cmd/compile,runtime/internal/atomic: add Load8

Change-Id: Id52a5730cf9207ee7ccebac4ef12791dc5720e7c
Reviewed-on: https://go-review.googlesource.com/c/go/+/172283
Run-TryBot: Austin Clements <austin@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>

diff --git a/src/cmd/compile/internal/amd64/ssa.go b/src/cmd/compile/internal/amd64/ssa.go
index 693316bdc7f497c9e5d59d8b216235701433e459..9c91e0566131727560ce22545bb23a461d2c3faa 100644 (file)
--- a/src/cmd/compile/internal/amd64/ssa.go
+++ b/src/cmd/compile/internal/amd64/ssa.go
@@ -1083,7 +1083,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
                if gc.Debug_checknil != 0 && v.Pos.Line() > 1 { // v.Pos.Line()==1 in generated wrappers
                        gc.Warnl(v.Pos, "generated nil check")
                }
-       case ssa.OpAMD64MOVLatomicload, ssa.OpAMD64MOVQatomicload:
+       case ssa.OpAMD64MOVBatomicload, ssa.OpAMD64MOVLatomicload, ssa.OpAMD64MOVQatomicload:
                p := s.Prog(v.Op.Asm())
                p.From.Type = obj.TYPE_MEM
                p.From.Reg = v.Args[0].Reg()

diff --git a/src/cmd/compile/internal/arm64/ssa.go b/src/cmd/compile/internal/arm64/ssa.go
index d3fc89d400e4f8c7f9bc86a7d22e061c73fd7751..fc7a60e63eef2225af74e973e4594816403620d9 100644 (file)
--- a/src/cmd/compile/internal/arm64/ssa.go
+++ b/src/cmd/compile/internal/arm64/ssa.go
@@ -438,6 +438,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
                p.To.Type = obj.TYPE_REG
                p.To.Reg = v.Reg()
        case ssa.OpARM64LDAR,
+               ssa.OpARM64LDARB,
                ssa.OpARM64LDARW:
                p := s.Prog(v.Op.Asm())
                p.From.Type = obj.TYPE_MEM

diff --git a/src/cmd/compile/internal/gc/ssa.go b/src/cmd/compile/internal/gc/ssa.go
index 7ffa5ab8824e3f13c39ba19646f5bfa744257ac5..cafff01ddcc7b353e3d1262f8d96b1d3410bf5d4 100644 (file)
--- a/src/cmd/compile/internal/gc/ssa.go
+++ b/src/cmd/compile/internal/gc/ssa.go
@@ -3073,6 +3073,13 @@ func init() {
                        return s.newValue1(ssa.OpSelect0, types.Types[TUINT32], v)
                },
                sys.AMD64, sys.ARM64, sys.S390X, sys.MIPS, sys.MIPS64, sys.PPC64)
+       addF("runtime/internal/atomic", "Load8",
+               func(s *state, n *Node, args []*ssa.Value) *ssa.Value {
+                       v := s.newValue2(ssa.OpAtomicLoad8, types.NewTuple(types.Types[TUINT8], types.TypeMem), args[0], s.mem())
+                       s.vars[&memVar] = s.newValue1(ssa.OpSelect1, types.TypeMem, v)
+                       return s.newValue1(ssa.OpSelect0, types.Types[TUINT8], v)
+               },
+               sys.AMD64, sys.ARM64, sys.S390X, sys.MIPS64, sys.PPC64)
        addF("runtime/internal/atomic", "Load64",
                func(s *state, n *Node, args []*ssa.Value) *ssa.Value {
                        v := s.newValue2(ssa.OpAtomicLoad64, types.NewTuple(types.Types[TUINT64], types.TypeMem), args[0], s.mem())

diff --git a/src/cmd/compile/internal/mips64/ssa.go b/src/cmd/compile/internal/mips64/ssa.go
index 01b8ed05644751dd67883921725457998e0765dc..68eff97dfae30c6a93f5a583d496062981df40f6 100644 (file)
--- a/src/cmd/compile/internal/mips64/ssa.go
+++ b/src/cmd/compile/internal/mips64/ssa.go
@@ -495,9 +495,12 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
                p.To.Name = obj.NAME_EXTERN
                p.To.Sym = gc.BoundsCheckFunc[v.AuxInt]
                s.UseArgs(16) // space used in callee args area by assembly stubs
-       case ssa.OpMIPS64LoweredAtomicLoad32, ssa.OpMIPS64LoweredAtomicLoad64:
+       case ssa.OpMIPS64LoweredAtomicLoad8, ssa.OpMIPS64LoweredAtomicLoad32, ssa.OpMIPS64LoweredAtomicLoad64:
                as := mips.AMOVV
-               if v.Op == ssa.OpMIPS64LoweredAtomicLoad32 {
+               switch v.Op {
+               case ssa.OpMIPS64LoweredAtomicLoad8:
+                       as = mips.AMOVB
+               case ssa.OpMIPS64LoweredAtomicLoad32:
                        as = mips.AMOVW
                }
                s.Prog(mips.ASYNC)

diff --git a/src/cmd/compile/internal/ppc64/ssa.go b/src/cmd/compile/internal/ppc64/ssa.go
index 4159b2fe7cff3f5166b6181f2ac05fca137d3af7..f3a49643f17ccb18bb128ce3e7ffa8e069ebfe5f 100644 (file)
--- a/src/cmd/compile/internal/ppc64/ssa.go
+++ b/src/cmd/compile/internal/ppc64/ssa.go
@@ -323,18 +323,22 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
                pisync := s.Prog(ppc64.AISYNC)
                pisync.To.Type = obj.TYPE_NONE
 
-       case ssa.OpPPC64LoweredAtomicLoad32,
+       case ssa.OpPPC64LoweredAtomicLoad8,
+               ssa.OpPPC64LoweredAtomicLoad32,
                ssa.OpPPC64LoweredAtomicLoad64,
                ssa.OpPPC64LoweredAtomicLoadPtr:
                // SYNC
-               // MOVD/MOVW (Rarg0), Rout
+               // MOVB/MOVD/MOVW (Rarg0), Rout
                // CMP Rout,Rout
                // BNE 1(PC)
                // ISYNC
                ld := ppc64.AMOVD
                cmp := ppc64.ACMP
-               if v.Op == ssa.OpPPC64LoweredAtomicLoad32 {
-                       ld = ppc64.AMOVW
+               switch v.Op {
+               case ssa.OpPPC64LoweredAtomicLoad8:
+                       ld = ppc64.AMOVBZ
+               case ssa.OpPPC64LoweredAtomicLoad32:
+                       ld = ppc64.AMOVWZ
                        cmp = ppc64.ACMPW
                }
                arg0 := v.Args[0].Reg()

diff --git a/src/cmd/compile/internal/s390x/ssa.go b/src/cmd/compile/internal/s390x/ssa.go
index 47abdfa4b4b12b8525299020a9c3fb4952ec525e..7a897ae754edbc45af7d8628fd8c939e83aab1c1 100644 (file)
--- a/src/cmd/compile/internal/s390x/ssa.go
+++ b/src/cmd/compile/internal/s390x/ssa.go
@@ -713,7 +713,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
                        clear.To.Type = obj.TYPE_MEM
                        clear.To.Reg = v.Args[0].Reg()
                }
-       case ssa.OpS390XMOVWZatomicload, ssa.OpS390XMOVDatomicload:
+       case ssa.OpS390XMOVBZatomicload, ssa.OpS390XMOVWZatomicload, ssa.OpS390XMOVDatomicload:
                p := s.Prog(v.Op.Asm())
                p.From.Type = obj.TYPE_MEM
                p.From.Reg = v.Args[0].Reg()

diff --git a/src/cmd/compile/internal/ssa/branchelim.go b/src/cmd/compile/internal/ssa/branchelim.go
index 55430e8afc5631782940e69cba9bc4a73e2ce126..c543686b3d3a2ba5192bffd6359ed06194ec1df0 100644 (file)
--- a/src/cmd/compile/internal/ssa/branchelim.go
+++ b/src/cmd/compile/internal/ssa/branchelim.go
@@ -33,7 +33,7 @@ func branchelim(f *Func) {
        for _, b := range f.Blocks {
                for _, v := range b.Values {
                        switch v.Op {
-                       case OpLoad, OpAtomicLoad32, OpAtomicLoad64, OpAtomicLoadPtr, OpAtomicLoadAcq32:
+                       case OpLoad, OpAtomicLoad8, OpAtomicLoad32, OpAtomicLoad64, OpAtomicLoadPtr, OpAtomicLoadAcq32:
                                loadAddr.add(v.Args[0].ID)
                        case OpMove:
                                loadAddr.add(v.Args[1].ID)

diff --git a/src/cmd/compile/internal/ssa/gen/AMD64.rules b/src/cmd/compile/internal/ssa/gen/AMD64.rules
index 91bb22f3fe0313d8b8c5ce862b59cd732746ce45..cdb0e671f7bad0b5d526202d56a50d8a96c3b0a6 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/AMD64.rules
+++ b/src/cmd/compile/internal/ssa/gen/AMD64.rules
@@ -527,6 +527,7 @@
 (If cond yes no) -> (NE (TESTB cond cond) yes no)
 
 // Atomic loads.  Other than preserving their ordering with respect to other loads, nothing special here.
+(AtomicLoad8 ptr mem) -> (MOVBatomicload ptr mem)
 (AtomicLoad32 ptr mem) -> (MOVLatomicload ptr mem)
 (AtomicLoad64 ptr mem) -> (MOVQatomicload ptr mem)
 (AtomicLoadPtr ptr mem) && config.PtrSize == 8 -> (MOVQatomicload ptr mem)
@@ -2393,14 +2394,10 @@
        ((ADD|SUB|AND|OR|XOR|BTC|BTR|BTS)Qmodify [off] {sym} ptr x mem)
 
 // Merge ADDQconst and LEAQ into atomic loads.
-(MOVQatomicload [off1] {sym} (ADDQconst [off2] ptr) mem) && is32Bit(off1+off2) ->
-       (MOVQatomicload [off1+off2] {sym} ptr mem)
-(MOVLatomicload [off1] {sym} (ADDQconst [off2] ptr) mem) && is32Bit(off1+off2) ->
-       (MOVLatomicload [off1+off2] {sym} ptr mem)
-(MOVQatomicload [off1] {sym1} (LEAQ [off2] {sym2} ptr) mem) && is32Bit(off1+off2) && canMergeSym(sym1, sym2) ->
-       (MOVQatomicload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
-(MOVLatomicload [off1] {sym1} (LEAQ [off2] {sym2} ptr) mem) && is32Bit(off1+off2) && canMergeSym(sym1, sym2) ->
-       (MOVLatomicload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
+(MOV(Q|L|B)atomicload [off1] {sym} (ADDQconst [off2] ptr) mem) && is32Bit(off1+off2) ->
+       (MOV(Q|L|B)atomicload [off1+off2] {sym} ptr mem)
+(MOV(Q|L|B)atomicload [off1] {sym1} (LEAQ [off2] {sym2} ptr) mem) && is32Bit(off1+off2) && canMergeSym(sym1, sym2) ->
+       (MOV(Q|L|B)atomicload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
 
 // Merge ADDQconst and LEAQ into atomic stores.
 (XCHGQ [off1] {sym} val (ADDQconst [off2] ptr) mem) && is32Bit(off1+off2) ->

diff --git a/src/cmd/compile/internal/ssa/gen/AMD64Ops.go b/src/cmd/compile/internal/ssa/gen/AMD64Ops.go
index 3ce302f5148a282d138f13cfea777bf7158cc982..739733cf16f30957f5bafd0f09af6510f40ba17f 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/AMD64Ops.go
+++ b/src/cmd/compile/internal/ssa/gen/AMD64Ops.go
@@ -740,6 +740,7 @@ func init() {
                // Atomic loads.  These are just normal loads but return <value,memory> tuples
                // so they can be properly ordered with other loads.
                // load from arg0+auxint+aux.  arg1=mem.
+               {name: "MOVBatomicload", argLength: 2, reg: gpload, asm: "MOVB", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},
                {name: "MOVLatomicload", argLength: 2, reg: gpload, asm: "MOVL", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},
                {name: "MOVQatomicload", argLength: 2, reg: gpload, asm: "MOVQ", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},
 

diff --git a/src/cmd/compile/internal/ssa/gen/ARM64.rules b/src/cmd/compile/internal/ssa/gen/ARM64.rules
index 6a30193c78e4b9e43b6f6e892c757fe8fb1e6b51..f3f006905c707d43b608bc286324ffd8d0a66e6c 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/ARM64.rules
+++ b/src/cmd/compile/internal/ssa/gen/ARM64.rules
@@ -583,6 +583,7 @@
 
 // atomic intrinsics
 // Note: these ops do not accept offset.
+(AtomicLoad8   ptr mem) -> (LDARB ptr mem)
 (AtomicLoad32  ptr mem) -> (LDARW ptr mem)
 (AtomicLoad64  ptr mem) -> (LDAR  ptr mem)
 (AtomicLoadPtr ptr mem) -> (LDAR  ptr mem)

diff --git a/src/cmd/compile/internal/ssa/gen/ARM64Ops.go b/src/cmd/compile/internal/ssa/gen/ARM64Ops.go
index ece53eb750ed9707e024a45616d2243a60a1071f..a0c8b060c759315de4ef2cfe65e8dff7972685ca 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/ARM64Ops.go
+++ b/src/cmd/compile/internal/ssa/gen/ARM64Ops.go
@@ -606,6 +606,7 @@ func init() {
                // load from arg0. arg1=mem. auxint must be zero.
                // returns <value,memory> so they can be properly ordered with other loads.
                {name: "LDAR", argLength: 2, reg: gpload, asm: "LDAR", faultOnNilArg0: true},
+               {name: "LDARB", argLength: 2, reg: gpload, asm: "LDARB", faultOnNilArg0: true},
                {name: "LDARW", argLength: 2, reg: gpload, asm: "LDARW", faultOnNilArg0: true},
 
                // atomic stores.

diff --git a/src/cmd/compile/internal/ssa/gen/MIPS64.rules b/src/cmd/compile/internal/ssa/gen/MIPS64.rules
index 97ca051d64da6ed2e1b391f77f98f75c7c96269e..a3df00aa33c826e2260aea412da2a994cdf55278 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/MIPS64.rules
+++ b/src/cmd/compile/internal/ssa/gen/MIPS64.rules
@@ -385,6 +385,7 @@
 (InterCall [argwid] entry mem) -> (CALLinter [argwid] entry mem)
 
 // atomic intrinsics
+(AtomicLoad8   ptr mem) -> (LoweredAtomicLoad8  ptr mem)
 (AtomicLoad32  ptr mem) -> (LoweredAtomicLoad32 ptr mem)
 (AtomicLoad64  ptr mem) -> (LoweredAtomicLoad64 ptr mem)
 (AtomicLoadPtr ptr mem) -> (LoweredAtomicLoad64 ptr mem)

diff --git a/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go b/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go
index f476c9b6fe9491e54b279cfe419ce131cfa091e6..ba02e0fcb5d599083027273cb80a3bf5b1114b16 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go
+++ b/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go
@@ -343,6 +343,7 @@ func init() {
                // atomic loads.
                // load from arg0. arg1=mem.
                // returns <value,memory> so they can be properly ordered with other loads.
+               {name: "LoweredAtomicLoad8", argLength: 2, reg: gpload, faultOnNilArg0: true},
                {name: "LoweredAtomicLoad32", argLength: 2, reg: gpload, faultOnNilArg0: true},
                {name: "LoweredAtomicLoad64", argLength: 2, reg: gpload, faultOnNilArg0: true},
 

diff --git a/src/cmd/compile/internal/ssa/gen/PPC64.rules b/src/cmd/compile/internal/ssa/gen/PPC64.rules
index c82b884a5f3276bce4fb9a42b0a8237304eb8195..01656df6105dc287c6bff9492ed5e69cfe6a4eed 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/PPC64.rules
+++ b/src/cmd/compile/internal/ssa/gen/PPC64.rules
@@ -924,7 +924,7 @@
     (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} x mem)
 
 // atomic intrinsics
-(AtomicLoad(32|64|Ptr)  ptr mem) -> (LoweredAtomicLoad(32|64|Ptr) [1] ptr mem)
+(AtomicLoad(8|32|64|Ptr)  ptr mem) -> (LoweredAtomicLoad(8|32|64|Ptr) [1] ptr mem)
 (AtomicLoadAcq32        ptr mem) -> (LoweredAtomicLoad32 [0] ptr mem)
 
 (AtomicStore(32|64)      ptr val mem) -> (LoweredAtomicStore(32|64) [1] ptr val mem)

diff --git a/src/cmd/compile/internal/ssa/gen/PPC64Ops.go b/src/cmd/compile/internal/ssa/gen/PPC64Ops.go
index 67dd3c665018a3b9c27e7ba12ca78d97665d96b1..65a183dba6dd102062cb07538f638a4b20c7598c 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/PPC64Ops.go
+++ b/src/cmd/compile/internal/ssa/gen/PPC64Ops.go
@@ -485,6 +485,7 @@ func init() {
                {name: "LoweredAtomicStore32", argLength: 3, reg: gpstore, typ: "Mem", aux: "Int64", faultOnNilArg0: true, hasSideEffects: true},
                {name: "LoweredAtomicStore64", argLength: 3, reg: gpstore, typ: "Mem", aux: "Int64", faultOnNilArg0: true, hasSideEffects: true},
 
+               {name: "LoweredAtomicLoad8", argLength: 2, reg: gpload, typ: "UInt8", aux: "Int64", clobberFlags: true, faultOnNilArg0: true},
                {name: "LoweredAtomicLoad32", argLength: 2, reg: gpload, typ: "UInt32", aux: "Int64", clobberFlags: true, faultOnNilArg0: true},
                {name: "LoweredAtomicLoad64", argLength: 2, reg: gpload, typ: "Int64", aux: "Int64", clobberFlags: true, faultOnNilArg0: true},
                {name: "LoweredAtomicLoadPtr", argLength: 2, reg: gpload, typ: "Int64", aux: "Int64", clobberFlags: true, faultOnNilArg0: true},

diff --git a/src/cmd/compile/internal/ssa/gen/S390X.rules b/src/cmd/compile/internal/ssa/gen/S390X.rules
index 03a5accba2246977e2a0884fa43c4dfa64269054..f3cfee7e97757fefd4dd18788bd782ddc8bf7564 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/S390X.rules
+++ b/src/cmd/compile/internal/ssa/gen/S390X.rules
@@ -140,6 +140,7 @@
 (Round       x) -> (FIDBR [1] x)
 
 // Atomic loads.
+(AtomicLoad8  ptr mem) -> (MOVBZatomicload ptr mem)
 (AtomicLoad32 ptr mem) -> (MOVWZatomicload ptr mem)
 (AtomicLoad64 ptr mem) -> (MOVDatomicload ptr mem)
 (AtomicLoadPtr ptr mem) -> (MOVDatomicload ptr mem)

diff --git a/src/cmd/compile/internal/ssa/gen/S390XOps.go b/src/cmd/compile/internal/ssa/gen/S390XOps.go
index b56971a78d60fdac8d74a3af32f5f10882243bf7..fcc2c732fce002174be759044dce1c5403ed7366 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/S390XOps.go
+++ b/src/cmd/compile/internal/ssa/gen/S390XOps.go
@@ -496,6 +496,7 @@ func init() {
                // Atomic loads. These are just normal loads but return <value,memory> tuples
                // so they can be properly ordered with other loads.
                // load from arg0+auxint+aux.  arg1=mem.
+               {name: "MOVBZatomicload", argLength: 2, reg: gpload, asm: "MOVBZ", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},
                {name: "MOVWZatomicload", argLength: 2, reg: gpload, asm: "MOVWZ", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},
                {name: "MOVDatomicload", argLength: 2, reg: gpload, asm: "MOVD", aux: "SymOff", faultOnNilArg0: true, symEffect: "Read"},
 

diff --git a/src/cmd/compile/internal/ssa/gen/genericOps.go b/src/cmd/compile/internal/ssa/gen/genericOps.go
index 79169c34a1d42455266dec6c570382db2b12b664..8933aa51eff26290875611696395778d21889805 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/genericOps.go
+++ b/src/cmd/compile/internal/ssa/gen/genericOps.go
@@ -527,6 +527,7 @@ var genericOps = []opData{
        // Atomic loads return a new memory so that the loads are properly ordered
        // with respect to other loads and stores.
        // TODO: use for sync/atomic at some point.
+       {name: "AtomicLoad8", argLength: 2, typ: "(UInt8,Mem)"},                                    // Load from arg0.  arg1=memory.  Returns loaded value and new memory.
        {name: "AtomicLoad32", argLength: 2, typ: "(UInt32,Mem)"},                                  // Load from arg0.  arg1=memory.  Returns loaded value and new memory.
        {name: "AtomicLoad64", argLength: 2, typ: "(UInt64,Mem)"},                                  // Load from arg0.  arg1=memory.  Returns loaded value and new memory.
        {name: "AtomicLoadPtr", argLength: 2, typ: "(BytePtr,Mem)"},                                // Load from arg0.  arg1=memory.  Returns loaded value and new memory.

diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go
index 3c843a3f32ed4786a4cb15b77ed8f050ae6b561b..1026ab79951c526b9200f213af4b96212ff2652c 100644 (file)
--- a/src/cmd/compile/internal/ssa/opGen.go
+++ b/src/cmd/compile/internal/ssa/opGen.go
@@ -861,6 +861,7 @@ const (
        OpAMD64FlagLT_UGT
        OpAMD64FlagGT_UGT
        OpAMD64FlagGT_ULT
+       OpAMD64MOVBatomicload
        OpAMD64MOVLatomicload
        OpAMD64MOVQatomicload
        OpAMD64XCHGL
@@ -1415,6 +1416,7 @@ const (
        OpARM64FlagGT_ULT
        OpARM64InvertFlags
        OpARM64LDAR
+       OpARM64LDARB
        OpARM64LDARW
        OpARM64STLR
        OpARM64STLRW
@@ -1633,6 +1635,7 @@ const (
        OpMIPS64DUFFZERO
        OpMIPS64LoweredZero
        OpMIPS64LoweredMove
+       OpMIPS64LoweredAtomicLoad8
        OpMIPS64LoweredAtomicLoad32
        OpMIPS64LoweredAtomicLoad64
        OpMIPS64LoweredAtomicStore32
@@ -1828,6 +1831,7 @@ const (
        OpPPC64LoweredMove
        OpPPC64LoweredAtomicStore32
        OpPPC64LoweredAtomicStore64
+       OpPPC64LoweredAtomicLoad8
        OpPPC64LoweredAtomicLoad32
        OpPPC64LoweredAtomicLoad64
        OpPPC64LoweredAtomicLoadPtr
@@ -2050,6 +2054,7 @@ const (
        OpS390XFlagLT
        OpS390XFlagGT
        OpS390XFlagOV
+       OpS390XMOVBZatomicload
        OpS390XMOVWZatomicload
        OpS390XMOVDatomicload
        OpS390XMOVWatomicstore
@@ -2505,6 +2510,7 @@ const (
        OpCvt64Fto64U
        OpSelect0
        OpSelect1
+       OpAtomicLoad8
        OpAtomicLoad32
        OpAtomicLoad64
        OpAtomicLoadPtr
@@ -11334,6 +11340,22 @@ var opcodeTable = [...]opInfo{
                argLen: 0,
                reg:    regInfo{},
        },
+       {
+               name:           "MOVBatomicload",
+               auxType:        auxSymOff,
+               argLen:         2,
+               faultOnNilArg0: true,
+               symEffect:      SymRead,
+               asm:            x86.AMOVB,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 4295032831}, // AX CX DX BX SP BP SI DI R8 R9 R10 R11 R12 R13 R14 R15 SB
+                       },
+                       outputs: []outputInfo{
+                               {0, 65519}, // AX CX DX BX BP SI DI R8 R9 R10 R11 R12 R13 R14 R15
+                       },
+               },
+       },
        {
                name:           "MOVLatomicload",
                auxType:        auxSymOff,
@@ -18766,6 +18788,20 @@ var opcodeTable = [...]opInfo{
                        },
                },
        },
+       {
+               name:           "LDARB",
+               argLen:         2,
+               faultOnNilArg0: true,
+               asm:            arm64.ALDARB,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 9223372038733561855}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 g R30 SP SB
+                       },
+                       outputs: []outputInfo{
+                               {0, 670826495}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R19 R20 R21 R22 R23 R24 R25 R26 R30
+                       },
+               },
+       },
        {
                name:           "LDARW",
                argLen:         2,
@@ -21733,6 +21769,19 @@ var opcodeTable = [...]opInfo{
                        clobbers: 6, // R1 R2
                },
        },
+       {
+               name:           "LoweredAtomicLoad8",
+               argLen:         2,
+               faultOnNilArg0: true,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 4611686018695823358}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 SP g R31 SB
+                       },
+                       outputs: []outputInfo{
+                               {0, 167772158}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R31
+                       },
+               },
+       },
        {
                name:           "LoweredAtomicLoad32",
                argLen:         2,
@@ -24372,6 +24421,21 @@ var opcodeTable = [...]opInfo{
                        },
                },
        },
+       {
+               name:           "LoweredAtomicLoad8",
+               auxType:        auxInt64,
+               argLen:         2,
+               clobberFlags:   true,
+               faultOnNilArg0: true,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1073733630}, // SP SB R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29
+                       },
+                       outputs: []outputInfo{
+                               {0, 1073733624}, // R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29
+                       },
+               },
+       },
        {
                name:           "LoweredAtomicLoad32",
                auxType:        auxInt64,
@@ -27550,6 +27614,22 @@ var opcodeTable = [...]opInfo{
                argLen: 0,
                reg:    regInfo{},
        },
+       {
+               name:           "MOVBZatomicload",
+               auxType:        auxSymOff,
+               argLen:         2,
+               faultOnNilArg0: true,
+               symEffect:      SymRead,
+               asm:            s390x.AMOVBZ,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
+                       },
+                       outputs: []outputInfo{
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                       },
+               },
+       },
        {
                name:           "MOVWZatomicload",
                auxType:        auxSymOff,
@@ -30916,6 +30996,11 @@ var opcodeTable = [...]opInfo{
                zeroWidth: true,
                generic:   true,
        },
+       {
+               name:    "AtomicLoad8",
+               argLen:  2,
+               generic: true,
+       },
        {
                name:    "AtomicLoad32",
                argLen:  2,

diff --git a/src/cmd/compile/internal/ssa/rewriteAMD64.go b/src/cmd/compile/internal/ssa/rewriteAMD64.go
index b17c0a68c1d9a4af6f8e3b72a38ffd00df7cbe5f..d45d23087dab23c1e753119f6091b956c235ec5f 100644 (file)
--- a/src/cmd/compile/internal/ssa/rewriteAMD64.go
+++ b/src/cmd/compile/internal/ssa/rewriteAMD64.go
@@ -251,6 +251,8 @@ func rewriteValueAMD64(v *Value) bool {
                return rewriteValueAMD64_OpAMD64MOVBQSXload_0(v)
        case OpAMD64MOVBQZX:
                return rewriteValueAMD64_OpAMD64MOVBQZX_0(v)
+       case OpAMD64MOVBatomicload:
+               return rewriteValueAMD64_OpAMD64MOVBatomicload_0(v)
        case OpAMD64MOVBload:
                return rewriteValueAMD64_OpAMD64MOVBload_0(v)
        case OpAMD64MOVBloadidx1:
@@ -643,6 +645,8 @@ func rewriteValueAMD64(v *Value) bool {
                return rewriteValueAMD64_OpAtomicLoad32_0(v)
        case OpAtomicLoad64:
                return rewriteValueAMD64_OpAtomicLoad64_0(v)
+       case OpAtomicLoad8:
+               return rewriteValueAMD64_OpAtomicLoad8_0(v)
        case OpAtomicLoadPtr:
                return rewriteValueAMD64_OpAtomicLoadPtr_0(v)
        case OpAtomicOr8:
@@ -12163,6 +12167,56 @@ func rewriteValueAMD64_OpAMD64MOVBQZX_0(v *Value) bool {
        }
        return false
 }
+func rewriteValueAMD64_OpAMD64MOVBatomicload_0(v *Value) bool {
+       // match: (MOVBatomicload [off1] {sym} (ADDQconst [off2] ptr) mem)
+       // cond: is32Bit(off1+off2)
+       // result: (MOVBatomicload [off1+off2] {sym} ptr mem)
+       for {
+               off1 := v.AuxInt
+               sym := v.Aux
+               mem := v.Args[1]
+               v_0 := v.Args[0]
+               if v_0.Op != OpAMD64ADDQconst {
+                       break
+               }
+               off2 := v_0.AuxInt
+               ptr := v_0.Args[0]
+               if !(is32Bit(off1 + off2)) {
+                       break
+               }
+               v.reset(OpAMD64MOVBatomicload)
+               v.AuxInt = off1 + off2
+               v.Aux = sym
+               v.AddArg(ptr)
+               v.AddArg(mem)
+               return true
+       }
+       // match: (MOVBatomicload [off1] {sym1} (LEAQ [off2] {sym2} ptr) mem)
+       // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2)
+       // result: (MOVBatomicload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
+       for {
+               off1 := v.AuxInt
+               sym1 := v.Aux
+               mem := v.Args[1]
+               v_0 := v.Args[0]
+               if v_0.Op != OpAMD64LEAQ {
+                       break
+               }
+               off2 := v_0.AuxInt
+               sym2 := v_0.Aux
+               ptr := v_0.Args[0]
+               if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) {
+                       break
+               }
+               v.reset(OpAMD64MOVBatomicload)
+               v.AuxInt = off1 + off2
+               v.Aux = mergeSym(sym1, sym2)
+               v.AddArg(ptr)
+               v.AddArg(mem)
+               return true
+       }
+       return false
+}
 func rewriteValueAMD64_OpAMD64MOVBload_0(v *Value) bool {
        // match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
        // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
@@ -56747,6 +56801,19 @@ func rewriteValueAMD64_OpAtomicLoad64_0(v *Value) bool {
                return true
        }
 }
+func rewriteValueAMD64_OpAtomicLoad8_0(v *Value) bool {
+       // match: (AtomicLoad8 ptr mem)
+       // cond:
+       // result: (MOVBatomicload ptr mem)
+       for {
+               mem := v.Args[1]
+               ptr := v.Args[0]
+               v.reset(OpAMD64MOVBatomicload)
+               v.AddArg(ptr)
+               v.AddArg(mem)
+               return true
+       }
+}
 func rewriteValueAMD64_OpAtomicLoadPtr_0(v *Value) bool {
        b := v.Block
        config := b.Func.Config

diff --git a/src/cmd/compile/internal/ssa/rewriteARM64.go b/src/cmd/compile/internal/ssa/rewriteARM64.go
index a739fe93fd5d5e96479715eb5934a611dc46b34b..7c3f3b9e0cad41074c37e637b532ee7a5cc32cfe 100644 (file)
--- a/src/cmd/compile/internal/ssa/rewriteARM64.go
+++ b/src/cmd/compile/internal/ssa/rewriteARM64.go
@@ -431,6 +431,8 @@ func rewriteValueARM64(v *Value) bool {
                return rewriteValueARM64_OpAtomicLoad32_0(v)
        case OpAtomicLoad64:
                return rewriteValueARM64_OpAtomicLoad64_0(v)
+       case OpAtomicLoad8:
+               return rewriteValueARM64_OpAtomicLoad8_0(v)
        case OpAtomicLoadPtr:
                return rewriteValueARM64_OpAtomicLoadPtr_0(v)
        case OpAtomicOr8:
@@ -32315,6 +32317,19 @@ func rewriteValueARM64_OpAtomicLoad64_0(v *Value) bool {
                return true
        }
 }
+func rewriteValueARM64_OpAtomicLoad8_0(v *Value) bool {
+       // match: (AtomicLoad8 ptr mem)
+       // cond:
+       // result: (LDARB ptr mem)
+       for {
+               mem := v.Args[1]
+               ptr := v.Args[0]
+               v.reset(OpARM64LDARB)
+               v.AddArg(ptr)
+               v.AddArg(mem)
+               return true
+       }
+}
 func rewriteValueARM64_OpAtomicLoadPtr_0(v *Value) bool {
        // match: (AtomicLoadPtr ptr mem)
        // cond:

diff --git a/src/cmd/compile/internal/ssa/rewriteMIPS64.go b/src/cmd/compile/internal/ssa/rewriteMIPS64.go
index 93087fb759cec591b5870794d1792d742e1ff792..db104504e911f16378b898bb8831416f8aac902a 100644 (file)
--- a/src/cmd/compile/internal/ssa/rewriteMIPS64.go
+++ b/src/cmd/compile/internal/ssa/rewriteMIPS64.go
@@ -59,6 +59,8 @@ func rewriteValueMIPS64(v *Value) bool {
                return rewriteValueMIPS64_OpAtomicLoad32_0(v)
        case OpAtomicLoad64:
                return rewriteValueMIPS64_OpAtomicLoad64_0(v)
+       case OpAtomicLoad8:
+               return rewriteValueMIPS64_OpAtomicLoad8_0(v)
        case OpAtomicLoadPtr:
                return rewriteValueMIPS64_OpAtomicLoadPtr_0(v)
        case OpAtomicStore32:
@@ -913,6 +915,19 @@ func rewriteValueMIPS64_OpAtomicLoad64_0(v *Value) bool {
                return true
        }
 }
+func rewriteValueMIPS64_OpAtomicLoad8_0(v *Value) bool {
+       // match: (AtomicLoad8 ptr mem)
+       // cond:
+       // result: (LoweredAtomicLoad8 ptr mem)
+       for {
+               mem := v.Args[1]
+               ptr := v.Args[0]
+               v.reset(OpMIPS64LoweredAtomicLoad8)
+               v.AddArg(ptr)
+               v.AddArg(mem)
+               return true
+       }
+}
 func rewriteValueMIPS64_OpAtomicLoadPtr_0(v *Value) bool {
        // match: (AtomicLoadPtr ptr mem)
        // cond:

diff --git a/src/cmd/compile/internal/ssa/rewritePPC64.go b/src/cmd/compile/internal/ssa/rewritePPC64.go
index 33e0825489d5b3d3c82ad4196e8811a34e594a73..d35cf6eeac73ad40cfd8ab9c2d8ec8f104263456 100644 (file)
--- a/src/cmd/compile/internal/ssa/rewritePPC64.go
+++ b/src/cmd/compile/internal/ssa/rewritePPC64.go
@@ -67,6 +67,8 @@ func rewriteValuePPC64(v *Value) bool {
                return rewriteValuePPC64_OpAtomicLoad32_0(v)
        case OpAtomicLoad64:
                return rewriteValuePPC64_OpAtomicLoad64_0(v)
+       case OpAtomicLoad8:
+               return rewriteValuePPC64_OpAtomicLoad8_0(v)
        case OpAtomicLoadAcq32:
                return rewriteValuePPC64_OpAtomicLoadAcq32_0(v)
        case OpAtomicLoadPtr:
@@ -1064,6 +1066,20 @@ func rewriteValuePPC64_OpAtomicLoad64_0(v *Value) bool {
                return true
        }
 }
+func rewriteValuePPC64_OpAtomicLoad8_0(v *Value) bool {
+       // match: (AtomicLoad8 ptr mem)
+       // cond:
+       // result: (LoweredAtomicLoad8 [1] ptr mem)
+       for {
+               mem := v.Args[1]
+               ptr := v.Args[0]
+               v.reset(OpPPC64LoweredAtomicLoad8)
+               v.AuxInt = 1
+               v.AddArg(ptr)
+               v.AddArg(mem)
+               return true
+       }
+}
 func rewriteValuePPC64_OpAtomicLoadAcq32_0(v *Value) bool {
        // match: (AtomicLoadAcq32 ptr mem)
        // cond:

diff --git a/src/cmd/compile/internal/ssa/rewriteS390X.go b/src/cmd/compile/internal/ssa/rewriteS390X.go
index 98655644272cdbee9d129f28640b2a3339c69508..c5b7e564bb60975dd0e4dd16baa1b27353a7df23 100644 (file)
--- a/src/cmd/compile/internal/ssa/rewriteS390X.go
+++ b/src/cmd/compile/internal/ssa/rewriteS390X.go
@@ -59,6 +59,8 @@ func rewriteValueS390X(v *Value) bool {
                return rewriteValueS390X_OpAtomicLoad32_0(v)
        case OpAtomicLoad64:
                return rewriteValueS390X_OpAtomicLoad64_0(v)
+       case OpAtomicLoad8:
+               return rewriteValueS390X_OpAtomicLoad8_0(v)
        case OpAtomicLoadPtr:
                return rewriteValueS390X_OpAtomicLoadPtr_0(v)
        case OpAtomicStore32:
@@ -1117,6 +1119,19 @@ func rewriteValueS390X_OpAtomicLoad64_0(v *Value) bool {
                return true
        }
 }
+func rewriteValueS390X_OpAtomicLoad8_0(v *Value) bool {
+       // match: (AtomicLoad8 ptr mem)
+       // cond:
+       // result: (MOVBZatomicload ptr mem)
+       for {
+               mem := v.Args[1]
+               ptr := v.Args[0]
+               v.reset(OpS390XMOVBZatomicload)
+               v.AddArg(ptr)
+               v.AddArg(mem)
+               return true
+       }
+}
 func rewriteValueS390X_OpAtomicLoadPtr_0(v *Value) bool {
        // match: (AtomicLoadPtr ptr mem)
        // cond:

diff --git a/src/runtime/internal/atomic/asm_mipsx.s b/src/runtime/internal/atomic/asm_mipsx.s
index 73d7ea3ad4d6f40ea433c9ce71fe8995e0d78cc4..af6bce57d601e4ae99250f2e4793b6b345a7d418 100644 (file)
--- a/src/runtime/internal/atomic/asm_mipsx.s
+++ b/src/runtime/internal/atomic/asm_mipsx.s
@@ -40,6 +40,14 @@ TEXT ·Load(SB),NOSPLIT,$0-8
        MOVW    R1, ret+4(FP)
        RET
 
+TEXT ·Load8(SB),NOSPLIT,$0-5
+       MOVW    ptr+0(FP), R1
+       SYNC
+       MOVB    0(R1), R1
+       SYNC
+       MOVB    R1, ret+4(FP)
+       RET
+
 TEXT ·Xadd(SB),NOSPLIT,$0-12
        MOVW    ptr+0(FP), R2
        MOVW    delta+4(FP), R3

diff --git a/src/runtime/internal/atomic/atomic_386.go b/src/runtime/internal/atomic/atomic_386.go
index ad71ebd971a7b70385045809226a9f186ebd856e..143cd45e6125e628c414252e730f40bc6e3a0aea 100644 (file)
--- a/src/runtime/internal/atomic/atomic_386.go
+++ b/src/runtime/internal/atomic/atomic_386.go
@@ -47,6 +47,12 @@ func Xchguintptr(ptr *uintptr, new uintptr) uintptr
 //go:noescape
 func Load64(ptr *uint64) uint64
 
+//go:nosplit
+//go:noinline
+func Load8(ptr *uint8) uint8 {
+       return *ptr
+}
+
 //go:noescape
 func And8(ptr *uint8, val uint8)
 

diff --git a/src/runtime/internal/atomic/atomic_amd64x.go b/src/runtime/internal/atomic/atomic_amd64x.go
index d4fe4616099888ce63fbe45fdafd70e279d520de..b7e01a3ad5dbac878a236a59790503f853167cca 100644 (file)
--- a/src/runtime/internal/atomic/atomic_amd64x.go
+++ b/src/runtime/internal/atomic/atomic_amd64x.go
@@ -50,6 +50,12 @@ func Xchg64(ptr *uint64, new uint64) uint64
 //go:noescape
 func Xchguintptr(ptr *uintptr, new uintptr) uintptr
 
+//go:nosplit
+//go:noinline
+func Load8(ptr *uint8) uint8 {
+       return *ptr
+}
+
 //go:noescape
 func And8(ptr *uint8, val uint8)
 

diff --git a/src/runtime/internal/atomic/atomic_arm.go b/src/runtime/internal/atomic/atomic_arm.go
index abedee0e351be59f14fc634055baa95b58960227..3834ce5b9169d9b72388809ecda00f0775068b55 100644 (file)
--- a/src/runtime/internal/atomic/atomic_arm.go
+++ b/src/runtime/internal/atomic/atomic_arm.go
@@ -184,6 +184,9 @@ func Load(addr *uint32) uint32
 // NO go:noescape annotation; *addr escapes if result escapes (#31525)
 func Loadp(addr unsafe.Pointer) unsafe.Pointer
 
+//go:noescape
+func Load8(addr *uint8) uint8
+
 //go:noescape
 func LoadAcq(addr *uint32) uint32
 

diff --git a/src/runtime/internal/atomic/atomic_arm64.go b/src/runtime/internal/atomic/atomic_arm64.go
index 8e83cc6f53df4c5bbbbf587a6a5663067baa8008..0182f309cc8fb56c980777ec37fbc66c02efafe9 100644 (file)
--- a/src/runtime/internal/atomic/atomic_arm64.go
+++ b/src/runtime/internal/atomic/atomic_arm64.go
@@ -29,6 +29,9 @@ func Xchguintptr(ptr *uintptr, new uintptr) uintptr
 //go:noescape
 func Load(ptr *uint32) uint32
 
+//go:noescape
+func Load8(ptr *uint8) uint8
+
 //go:noescape
 func Load64(ptr *uint64) uint64
 

diff --git a/src/runtime/internal/atomic/atomic_arm64.s b/src/runtime/internal/atomic/atomic_arm64.s
index c979f2246f516ddd211a71d0d274b77cc45f7c51..a7e8c354492d480bc90ce0e08633d4f9ec3e1a08 100644 (file)
--- a/src/runtime/internal/atomic/atomic_arm64.s
+++ b/src/runtime/internal/atomic/atomic_arm64.s
@@ -11,6 +11,13 @@ TEXT ·Load(SB),NOSPLIT,$0-12
        MOVW    R0, ret+8(FP)
        RET
 
+// uint8 runtime∕internal∕atomic·Load8(uint8 volatile* addr)
+TEXT ·Load8(SB),NOSPLIT,$0-9
+       MOVD    ptr+0(FP), R0
+       LDARB   (R0), R0
+       MOVB    R0, ret+8(FP)
+       RET
+
 // uint64 runtime∕internal∕atomic·Load64(uint64 volatile* addr)
 TEXT ·Load64(SB),NOSPLIT,$0-16
        MOVD    ptr+0(FP), R0

diff --git a/src/runtime/internal/atomic/atomic_mips64x.go b/src/runtime/internal/atomic/atomic_mips64x.go
index ca2e509266dc5d9107ab40ec0e4b25fd965baf56..ce11e38a9682dab3b309f1140df9be4d5ed1996c 100644 (file)
--- a/src/runtime/internal/atomic/atomic_mips64x.go
+++ b/src/runtime/internal/atomic/atomic_mips64x.go
@@ -29,6 +29,9 @@ func Xchguintptr(ptr *uintptr, new uintptr) uintptr
 //go:noescape
 func Load(ptr *uint32) uint32
 
+//go:noescape
+func Load8(ptr *uint8) uint8
+
 //go:noescape
 func Load64(ptr *uint64) uint64
 

diff --git a/src/runtime/internal/atomic/atomic_mips64x.s b/src/runtime/internal/atomic/atomic_mips64x.s
index 5214afe2d6753d291e47d9bdb070af63197ab1fc..1ed90937c96589edd05f4e14e625f1ad1f585819 100644 (file)
--- a/src/runtime/internal/atomic/atomic_mips64x.s
+++ b/src/runtime/internal/atomic/atomic_mips64x.s
@@ -17,6 +17,15 @@ TEXT ·Load(SB),NOSPLIT|NOFRAME,$0-12
        MOVW    R1, ret+8(FP)
        RET
 
+// uint8 runtime∕internal∕atomic·Load8(uint8 volatile* ptr)
+TEXT ·Load8(SB),NOSPLIT|NOFRAME,$0-9
+       MOVV    ptr+0(FP), R1
+       SYNC
+       MOVBU   0(R1), R1
+       SYNC
+       MOVB    R1, ret+8(FP)
+       RET
+
 // uint64 runtime∕internal∕atomic·Load64(uint64 volatile* ptr)
 TEXT ·Load64(SB),NOSPLIT|NOFRAME,$0-16
        MOVV    ptr+0(FP), R1

diff --git a/src/runtime/internal/atomic/atomic_mipsx.go b/src/runtime/internal/atomic/atomic_mipsx.go
index 79eb5822320aab317d8324ae34e898a94dc25e6e..210fc27d9b74005bacbf5990593229c2aba2689c 100644 (file)
--- a/src/runtime/internal/atomic/atomic_mipsx.go
+++ b/src/runtime/internal/atomic/atomic_mipsx.go
@@ -116,6 +116,9 @@ func Xchguintptr(ptr *uintptr, new uintptr) uintptr
 //go:noescape
 func Load(ptr *uint32) uint32
 
+//go:noescape
+func Load8(ptr *uint8) uint8
+
 // NO go:noescape annotation; *ptr escapes if result escapes (#31525)
 func Loadp(ptr unsafe.Pointer) unsafe.Pointer
 

diff --git a/src/runtime/internal/atomic/atomic_ppc64x.go b/src/runtime/internal/atomic/atomic_ppc64x.go
index 0e9a51f6a1a9a1ffd32b7c37e495bda4b32d8493..13805a527531aa40d0d37377e12217784b9ebf59 100644 (file)
--- a/src/runtime/internal/atomic/atomic_ppc64x.go
+++ b/src/runtime/internal/atomic/atomic_ppc64x.go
@@ -29,6 +29,9 @@ func Xchguintptr(ptr *uintptr, new uintptr) uintptr
 //go:noescape
 func Load(ptr *uint32) uint32
 
+//go:noescape
+func Load8(ptr *uint8) uint8
+
 //go:noescape
 func Load64(ptr *uint64) uint64
 

diff --git a/src/runtime/internal/atomic/atomic_ppc64x.s b/src/runtime/internal/atomic/atomic_ppc64x.s
index c079ea494f95607672fef0a9e0325507cd56cec8..c2f696fb347b642086bcc26e9879587030d83bc1 100644 (file)
--- a/src/runtime/internal/atomic/atomic_ppc64x.s
+++ b/src/runtime/internal/atomic/atomic_ppc64x.s
@@ -17,6 +17,17 @@ TEXT ·Load(SB),NOSPLIT|NOFRAME,$-8-12
        MOVW    R3, ret+8(FP)
        RET
 
+// uint8 runtime∕internal∕atomic·Load8(uint8 volatile* ptr)
+TEXT ·Load8(SB),NOSPLIT|NOFRAME,$-8-9
+       MOVD    ptr+0(FP), R3
+       SYNC
+       MOVBZ   0(R3), R3
+       CMP     R3, R3, CR7
+       BC      4, 30, 1(PC) // bne- cr7,0x4
+       ISYNC
+       MOVB    R3, ret+8(FP)
+       RET
+
 // uint64 runtime∕internal∕atomic·Load64(uint64 volatile* ptr)
 TEXT ·Load64(SB),NOSPLIT|NOFRAME,$-8-16
        MOVD    ptr+0(FP), R3

diff --git a/src/runtime/internal/atomic/atomic_s390x.go b/src/runtime/internal/atomic/atomic_s390x.go
index 2ffbec0b3fddd633f72f7a20c6aacb686b4ccc52..0ad96d3502261afb207cfd30af821cb05f36f23c 100644 (file)
--- a/src/runtime/internal/atomic/atomic_s390x.go
+++ b/src/runtime/internal/atomic/atomic_s390x.go
@@ -18,6 +18,12 @@ func Loadp(ptr unsafe.Pointer) unsafe.Pointer {
        return *(*unsafe.Pointer)(ptr)
 }
 
+//go:nosplit
+//go:noinline
+func Load8(ptr *uint8) uint8 {
+       return *ptr
+}
+
 //go:nosplit
 //go:noinline
 func Load64(ptr *uint64) uint64 {

diff --git a/src/runtime/internal/atomic/atomic_wasm.go b/src/runtime/internal/atomic/atomic_wasm.go
index 9c2193fa1b76a6953d7ec41f59b38134c3b9ad4f..9ce4892cb6e47c5df511f59545dd8899e16cea46 100644 (file)
--- a/src/runtime/internal/atomic/atomic_wasm.go
+++ b/src/runtime/internal/atomic/atomic_wasm.go
@@ -27,6 +27,12 @@ func LoadAcq(ptr *uint32) uint32 {
        return *ptr
 }
 
+//go:nosplit
+//go:noinline
+func Load8(ptr *uint8) uint8 {
+       return *ptr
+}
+
 //go:nosplit
 //go:noinline
 func Load64(ptr *uint64) uint64 {

diff --git a/src/runtime/internal/atomic/sys_linux_arm.s b/src/runtime/internal/atomic/sys_linux_arm.s
index 0fd39d4ee8795b651ef8a14e62007d84d3c2128a..df62f6c8ad9aaa1df6571e4ef61591fc39f7254e 100644 (file)
--- a/src/runtime/internal/atomic/sys_linux_arm.s
+++ b/src/runtime/internal/atomic/sys_linux_arm.s
@@ -104,3 +104,19 @@ store:
 native_barrier2:
        DMB     MB_ISH
        RET
+
+TEXT   ·Load8(SB),NOSPLIT,$0-5
+       MOVW    addr+0(FP), R0
+       MOVB    (R0), R1
+
+       MOVB    runtime·goarm(SB), R11
+       CMP     $7, R11
+       BGE     native_barrier
+       BL      memory_barrier<>(SB)
+       B       end
+native_barrier:
+       DMB     MB_ISH
+end:
+       MOVB    R1, ret+4(FP)
+       RET
+

diff --git a/src/runtime/internal/atomic/sys_nonlinux_arm.s b/src/runtime/internal/atomic/sys_nonlinux_arm.s
index e593b3c92b2239a653941459d69c0c9d220a55e0..9d8133479162823f74c4e1224be7d13e6182f5a9 100644 (file)
--- a/src/runtime/internal/atomic/sys_nonlinux_arm.s
+++ b/src/runtime/internal/atomic/sys_nonlinux_arm.s
@@ -48,3 +48,15 @@ TEXT ·Store(SB),NOSPLIT,$0-8
        BLT     2(PC)
        DMB     MB_ISH
        RET
+
+TEXT   ·Load8(SB),NOSPLIT|NOFRAME,$0-5
+       MOVW    addr+0(FP), R0
+       MOVB    (R0), R1
+
+       MOVB    runtime·goarm(SB), R11
+       CMP     $7, R11
+       BLT     2(PC)
+       DMB     MB_ISH
+
+       MOVB    R1, ret+4(FP)
+       RET