]> Cypherpunks repositories - gostls13.git/commitdiff
cmd/compile: ensure InitMem comes after Args
authorKeith Randall <khr@golang.org>
Thu, 16 Feb 2023 00:11:37 +0000 (16:11 -0800)
committerKeith Randall <khr@google.com>
Thu, 16 Feb 2023 02:02:00 +0000 (02:02 +0000)
The debug info generation currently depends on this invariant.

A small update to CL 468455.

Update #58482

Change-Id: Ica305d360d9af04036c604b6a65b683f7cb6e212
Reviewed-on: https://go-review.googlesource.com/c/go/+/468695
Run-TryBot: Keith Randall <khr@golang.org>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: Keith Randall <khr@google.com>
Reviewed-by: David Chase <drchase@google.com>
src/cmd/compile/internal/ssa/schedule.go

index 679d1487d01cac5e85ee26db8ef0995b9d3fe38c..49bad25765a61a1d87c3e3742c12f2e962e9ff52 100644 (file)
@@ -15,6 +15,7 @@ import (
 const (
        ScorePhi       = iota // towards top of block
        ScoreArg              // must occur at the top of the entry block
+       ScoreInitMem          // after the args - used as mark by debug info generation
        ScoreReadTuple        // must occur immediately after tuple-generating insn (or call)
        ScoreNilCheck
        ScoreMemory
@@ -162,9 +163,12 @@ func schedule(f *Func) {
                                        f.Fatalf("%s appeared outside of entry block, b=%s", v.Op, b.String())
                                }
                                score[v.ID] = ScorePhi
-                       case v.Op == OpArg || v.Op == OpSP || v.Op == OpSB || v.Op == OpInitMem:
+                       case v.Op == OpArg || v.Op == OpSP || v.Op == OpSB:
                                // We want all the args as early as possible, for better debugging.
                                score[v.ID] = ScoreArg
+                       case v.Op == OpInitMem:
+                               // Early, but after args. See debug.go:buildLocationLists
+                               score[v.ID] = ScoreInitMem
                        case v.Type.IsMemory():
                                // Schedule stores as early as possible. This tends to
                                // reduce register pressure.