cmd/compile: avoid sign extension after word arithmetic on riscv64

These instructions already do sign extension on output, so we can get rid of it.

Note: (MOVWreg (MULW x y)) may araise from divisions by constant,
generic rules replace them with multiply and may produce (Rsh32x64 (Mul32 _ _) _).

Change-Id: I41bc9b519e38bc6027311de604dadb962cd0bbf4
Reviewed-on: https://go-review.googlesource.com/c/go/+/429757
Run-TryBot: Wayne Zuo <wdvxdr@golangcn.org>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: Joel Sing <joel@sing.id.au>
Reviewed-by: Meng Zhuo <mzh@golangcn.org>
Auto-Submit: Jenny Rakoczy <jenny@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Jenny Rakoczy <jenny@golang.org>

diff --git a/src/cmd/compile/internal/ssa/gen/RISCV64.rules b/src/cmd/compile/internal/ssa/gen/RISCV64.rules
index fd5bfd36c6d8bb3a85a156f3c5f627795f505580..e37c7b7899313f7aa81fbdb1e3716de01b75afec 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/RISCV64.rules
+++ b/src/cmd/compile/internal/ssa/gen/RISCV64.rules
@@ -697,6 +697,16 @@
 (MOVBUreg x:(Select0 (LoweredAtomicCas32 _ _ _ _))) => (MOVDreg x)
 (MOVBUreg x:(Select0 (LoweredAtomicCas64 _ _ _ _))) => (MOVDreg x)
 
+// Avoid sign extension after word arithmetic.
+(MOVWreg x:(ADDIW   _)) => (MOVDreg x)
+(MOVWreg x:(SUBW  _ _)) => (MOVDreg x)
+(MOVWreg x:(NEGW    _)) => (MOVDreg x)
+(MOVWreg x:(MULW  _ _)) => (MOVDreg x)
+(MOVWreg x:(DIVW  _ _)) => (MOVDreg x)
+(MOVWreg x:(DIVUW _ _)) => (MOVDreg x)
+(MOVWreg x:(REMW  _ _)) => (MOVDreg x)
+(MOVWreg x:(REMUW _ _)) => (MOVDreg x)
+
 // Fold double extensions.
 (MOVBreg  x:(MOVBreg  _)) => (MOVDreg x)
 (MOVHreg  x:(MOVBreg  _)) => (MOVDreg x)

diff --git a/src/cmd/compile/internal/ssa/rewriteRISCV64.go b/src/cmd/compile/internal/ssa/rewriteRISCV64.go
index 66b729f046591c629653c79c1163ee46db10880b..6f949707a1deef99bd99a245935f2eddadb24d20 100644 (file)
--- a/src/cmd/compile/internal/ssa/rewriteRISCV64.go
+++ b/src/cmd/compile/internal/ssa/rewriteRISCV64.go
@@ -5027,6 +5027,94 @@ func rewriteValueRISCV64_OpRISCV64MOVWreg(v *Value) bool {
                v.AddArg(x)
                return true
        }
+       // match: (MOVWreg x:(ADDIW _))
+       // result: (MOVDreg x)
+       for {
+               x := v_0
+               if x.Op != OpRISCV64ADDIW {
+                       break
+               }
+               v.reset(OpRISCV64MOVDreg)
+               v.AddArg(x)
+               return true
+       }
+       // match: (MOVWreg x:(SUBW _ _))
+       // result: (MOVDreg x)
+       for {
+               x := v_0
+               if x.Op != OpRISCV64SUBW {
+                       break
+               }
+               v.reset(OpRISCV64MOVDreg)
+               v.AddArg(x)
+               return true
+       }
+       // match: (MOVWreg x:(NEGW _))
+       // result: (MOVDreg x)
+       for {
+               x := v_0
+               if x.Op != OpRISCV64NEGW {
+                       break
+               }
+               v.reset(OpRISCV64MOVDreg)
+               v.AddArg(x)
+               return true
+       }
+       // match: (MOVWreg x:(MULW _ _))
+       // result: (MOVDreg x)
+       for {
+               x := v_0
+               if x.Op != OpRISCV64MULW {
+                       break
+               }
+               v.reset(OpRISCV64MOVDreg)
+               v.AddArg(x)
+               return true
+       }
+       // match: (MOVWreg x:(DIVW _ _))
+       // result: (MOVDreg x)
+       for {
+               x := v_0
+               if x.Op != OpRISCV64DIVW {
+                       break
+               }
+               v.reset(OpRISCV64MOVDreg)
+               v.AddArg(x)
+               return true
+       }
+       // match: (MOVWreg x:(DIVUW _ _))
+       // result: (MOVDreg x)
+       for {
+               x := v_0
+               if x.Op != OpRISCV64DIVUW {
+                       break
+               }
+               v.reset(OpRISCV64MOVDreg)
+               v.AddArg(x)
+               return true
+       }
+       // match: (MOVWreg x:(REMW _ _))
+       // result: (MOVDreg x)
+       for {
+               x := v_0
+               if x.Op != OpRISCV64REMW {
+                       break
+               }
+               v.reset(OpRISCV64MOVDreg)
+               v.AddArg(x)
+               return true
+       }
+       // match: (MOVWreg x:(REMUW _ _))
+       // result: (MOVDreg x)
+       for {
+               x := v_0
+               if x.Op != OpRISCV64REMUW {
+                       break
+               }
+               v.reset(OpRISCV64MOVDreg)
+               v.AddArg(x)
+               return true
+       }
        // match: (MOVWreg x:(MOVBreg _))
        // result: (MOVDreg x)
        for {