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cmd/compile: allow R11 to be allocated on s390x
authorMichael Munday <mike.munday@ibm.com>
Mon, 30 Apr 2018 15:55:13 +0000 (16:55 +0100)
committerMichael Munday <mike.munday@ibm.com>
Tue, 1 May 2018 15:48:17 +0000 (15:48 +0000)
R11 is only used as a temporary by a very small set of instructions
(DIV, MOD, MULH and extended MVC/XC instructions). By marking these
instructions as clobbering R11 we can allocate R11 in the general
case.

Change-Id: I0d4ffe80e57c164d42a5ea5ef6308756a5b0f742
Reviewed-on: https://go-review.googlesource.com/110255
Run-TryBot: Michael Munday <mike.munday@ibm.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
src/cmd/compile/internal/ssa/gen/S390XOps.go patch | blob | history
src/cmd/compile/internal/ssa/opGen.go patch | blob | history
src/cmd/compile/internal/ssa/regalloc.go patch | blob | history
src/runtime/asm_s390x.s patch | blob | history

diff --git a/src/cmd/compile/internal/ssa/gen/S390XOps.go b/src/cmd/compile/internal/ssa/gen/S390XOps.go
index 49904023e571ebdc53ec63112b7a52de2dba3e66..459148fc2aa43b283adbfeba26d882880b1a8b42 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/S390XOps.go
+++ b/src/cmd/compile/internal/ssa/gen/S390XOps.go
@@ -110,12 +110,13 @@ func init() {
 
        // Common individual register masks
        var (
-               sp = buildReg("SP")
-               sb = buildReg("SB")
-               r0 = buildReg("R0")
+               sp  = buildReg("SP")
+               sb  = buildReg("SB")
+               r0  = buildReg("R0")
+               tmp = buildReg("R11") // R11 is used as a temporary in a small number of instructions.
 
-               // R10 and R11 are reserved by the assembler.
-               gp   = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14")
+               // R10 is reserved by the assembler.
+               gp   = buildReg("R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14")
                gpg  = gp | buildReg("g")
                gpsp = gp | sp
 
@@ -135,11 +136,12 @@ func init() {
 
        // Common regInfo
        var (
-               gp01   = regInfo{inputs: []regMask{}, outputs: gponly}
-               gp11   = regInfo{inputs: []regMask{gp}, outputs: gponly}
-               gp11sp = regInfo{inputs: []regMask{gpsp}, outputs: gponly}
-               gp21   = regInfo{inputs: []regMask{gp, gp}, outputs: gponly}
-               gp21sp = regInfo{inputs: []regMask{gpsp, gp}, outputs: gponly}
+               gp01    = regInfo{inputs: []regMask{}, outputs: gponly}
+               gp11    = regInfo{inputs: []regMask{gp}, outputs: gponly}
+               gp11sp  = regInfo{inputs: []regMask{gpsp}, outputs: gponly}
+               gp21    = regInfo{inputs: []regMask{gp, gp}, outputs: gponly}
+               gp21sp  = regInfo{inputs: []regMask{gpsp, gp}, outputs: gponly}
+               gp21tmp = regInfo{inputs: []regMask{gp &^ tmp, gp &^ tmp}, outputs: []regMask{gp &^ tmp}, clobbers: tmp}
 
                // R0 evaluates to 0 when used as the number of bits to shift
                // so we need to exclude it from that operand.
@@ -255,19 +257,19 @@ func init() {
                {name: "MULLDload", argLength: 3, reg: gpopload, asm: "MULLD", aux: "SymOff", resultInArg0: true, clobberFlags: true, faultOnNilArg1: true, symEffect: "Read"}, // arg0 * *arg1. arg2=mem
                {name: "MULLWload", argLength: 3, reg: gpopload, asm: "MULLW", aux: "SymOff", resultInArg0: true, clobberFlags: true, faultOnNilArg1: true, symEffect: "Read"}, // arg0 * *arg1. arg2=mem
 
-               {name: "MULHD", argLength: 2, reg: gp21, asm: "MULHD", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true},   // (arg0 * arg1) >> width
-               {name: "MULHDU", argLength: 2, reg: gp21, asm: "MULHDU", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true}, // (arg0 * arg1) >> width
+               {name: "MULHD", argLength: 2, reg: gp21tmp, asm: "MULHD", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true},   // (arg0 * arg1) >> width
+               {name: "MULHDU", argLength: 2, reg: gp21tmp, asm: "MULHDU", typ: "Int64", commutative: true, resultInArg0: true, clobberFlags: true}, // (arg0 * arg1) >> width
 
-               {name: "DIVD", argLength: 2, reg: gp21, asm: "DIVD", resultInArg0: true, clobberFlags: true},   // arg0 / arg1
-               {name: "DIVW", argLength: 2, reg: gp21, asm: "DIVW", resultInArg0: true, clobberFlags: true},   // arg0 / arg1
-               {name: "DIVDU", argLength: 2, reg: gp21, asm: "DIVDU", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
-               {name: "DIVWU", argLength: 2, reg: gp21, asm: "DIVWU", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
+               {name: "DIVD", argLength: 2, reg: gp21tmp, asm: "DIVD", resultInArg0: true, clobberFlags: true},   // arg0 / arg1
+               {name: "DIVW", argLength: 2, reg: gp21tmp, asm: "DIVW", resultInArg0: true, clobberFlags: true},   // arg0 / arg1
+               {name: "DIVDU", argLength: 2, reg: gp21tmp, asm: "DIVDU", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
+               {name: "DIVWU", argLength: 2, reg: gp21tmp, asm: "DIVWU", resultInArg0: true, clobberFlags: true}, // arg0 / arg1
 
-               {name: "MODD", argLength: 2, reg: gp21, asm: "MODD", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
-               {name: "MODW", argLength: 2, reg: gp21, asm: "MODW", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
+               {name: "MODD", argLength: 2, reg: gp21tmp, asm: "MODD", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
+               {name: "MODW", argLength: 2, reg: gp21tmp, asm: "MODW", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
 
-               {name: "MODDU", argLength: 2, reg: gp21, asm: "MODDU", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
-               {name: "MODWU", argLength: 2, reg: gp21, asm: "MODWU", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
+               {name: "MODDU", argLength: 2, reg: gp21tmp, asm: "MODDU", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
+               {name: "MODWU", argLength: 2, reg: gp21tmp, asm: "MODWU", resultInArg0: true, clobberFlags: true}, // arg0 % arg1
 
                {name: "AND", argLength: 2, reg: gp21, asm: "AND", commutative: true, clobberFlags: true},                                                                    // arg0 & arg1
                {name: "ANDW", argLength: 2, reg: gp21, asm: "ANDW", commutative: true, clobberFlags: true},                                                                  // arg0 & arg1
diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go
index 669d3f57683400e122dc5b46e197b05d52eefb2e..0bac31266a12d3c465901d9859ea5175fc559fb4 100644 (file)
--- a/src/cmd/compile/internal/ssa/opGen.go
+++ b/src/cmd/compile/internal/ssa/opGen.go
@@ -21824,7 +21824,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AFMOVS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -21840,7 +21840,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AFMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -21879,8 +21879,8 @@ var opcodeTable = [...]opInfo{
                asm:       s390x.AFMOVS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -21895,8 +21895,8 @@ var opcodeTable = [...]opInfo{
                asm:       s390x.AFMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -21912,7 +21912,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AFMOVS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                                {1, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                },
@@ -21926,7 +21926,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AFMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                                {1, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                },
@@ -21939,8 +21939,8 @@ var opcodeTable = [...]opInfo{
                asm:       s390x.AFMOVS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                                {2, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                },
@@ -21953,8 +21953,8 @@ var opcodeTable = [...]opInfo{
                asm:       s390x.AFMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                                {2, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                },
@@ -21967,11 +21967,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AADD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -21983,11 +21983,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AADDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -21999,10 +21999,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AADD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22014,10 +22014,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AADDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22032,11 +22032,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AADD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22051,11 +22051,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AADDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22066,11 +22066,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASUB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22081,11 +22081,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASUBW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22098,10 +22098,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASUB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22114,10 +22114,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASUBW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22132,11 +22132,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.ASUB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22151,11 +22151,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.ASUBW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22168,11 +22168,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMULLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22185,11 +22185,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMULLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22202,10 +22202,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMULLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22218,10 +22218,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMULLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22236,11 +22236,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMULLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22255,11 +22255,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMULLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22275,6 +22275,7 @@ var opcodeTable = [...]opInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                                {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
+                       clobbers: 2048, // R11
                        outputs: []outputInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
@@ -22292,6 +22293,7 @@ var opcodeTable = [...]opInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                                {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
+                       clobbers: 2048, // R11
                        outputs: []outputInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
@@ -22308,6 +22310,7 @@ var opcodeTable = [...]opInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                                {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
+                       clobbers: 2048, // R11
                        outputs: []outputInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
@@ -22324,6 +22327,7 @@ var opcodeTable = [...]opInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                                {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
+                       clobbers: 2048, // R11
                        outputs: []outputInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
@@ -22340,6 +22344,7 @@ var opcodeTable = [...]opInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                                {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
+                       clobbers: 2048, // R11
                        outputs: []outputInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
@@ -22356,6 +22361,7 @@ var opcodeTable = [...]opInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                                {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
+                       clobbers: 2048, // R11
                        outputs: []outputInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
@@ -22372,6 +22378,7 @@ var opcodeTable = [...]opInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                                {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
+                       clobbers: 2048, // R11
                        outputs: []outputInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
@@ -22388,6 +22395,7 @@ var opcodeTable = [...]opInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                                {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
+                       clobbers: 2048, // R11
                        outputs: []outputInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
@@ -22404,6 +22412,7 @@ var opcodeTable = [...]opInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                                {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
+                       clobbers: 2048, // R11
                        outputs: []outputInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
@@ -22420,6 +22429,7 @@ var opcodeTable = [...]opInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                                {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
+                       clobbers: 2048, // R11
                        outputs: []outputInfo{
                                {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
                        },
@@ -22433,11 +22443,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AAND,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22449,11 +22459,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AANDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22466,10 +22476,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AAND,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22482,10 +22492,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AANDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22500,11 +22510,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AAND,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22519,11 +22529,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AANDW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22535,11 +22545,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AOR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22551,11 +22561,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AORW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22568,10 +22578,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AOR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22584,10 +22594,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AORW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22602,11 +22612,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AOR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22621,11 +22631,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AORW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22637,11 +22647,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AXOR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22653,11 +22663,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AXORW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22670,10 +22680,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AXOR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22686,10 +22696,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AXORW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22704,11 +22714,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AXOR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22723,11 +22733,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AXORW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22737,8 +22747,8 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACMP,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -22748,8 +22758,8 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -22759,8 +22769,8 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACMPU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -22770,8 +22780,8 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACMPWU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -22782,7 +22792,7 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ACMP,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -22793,7 +22803,7 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ACMPW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -22804,7 +22814,7 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ACMPU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -22815,7 +22825,7 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ACMPWU,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -22847,11 +22857,11 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ASLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 23550}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22861,11 +22871,11 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ASLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 23550}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22876,10 +22886,10 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ASLD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22890,10 +22900,10 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ASLW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22903,11 +22913,11 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ASRD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 23550}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22917,11 +22927,11 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ASRW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 23550}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22932,10 +22942,10 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ASRD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22946,10 +22956,10 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ASRW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22960,11 +22970,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASRAD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 23550}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22975,11 +22985,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASRAW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {1, 23550}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -22991,10 +23001,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASRAD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23006,10 +23016,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ASRAW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23020,10 +23030,10 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ARLLG,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23034,10 +23044,10 @@ var opcodeTable = [...]opInfo{
                asm:     s390x.ARLL,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23048,10 +23058,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ANEG,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23062,10 +23072,10 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.ANEGW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23076,10 +23086,10 @@ var opcodeTable = [...]opInfo{
                clobberFlags: true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23090,10 +23100,10 @@ var opcodeTable = [...]opInfo{
                clobberFlags: true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23116,7 +23126,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ASUBE,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23126,7 +23136,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ASUBE,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23137,11 +23147,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDEQ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23152,11 +23162,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDNE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23167,11 +23177,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDLT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23182,11 +23192,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDLE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23197,11 +23207,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDGT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23212,11 +23222,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDGE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23227,11 +23237,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDGT,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23242,11 +23252,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDGE,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
-                               {1, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
+                               {1, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23256,10 +23266,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23269,10 +23279,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVBZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23282,10 +23292,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVH,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23295,10 +23305,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVHZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23308,10 +23318,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23321,10 +23331,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVWZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23334,10 +23344,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23347,10 +23357,10 @@ var opcodeTable = [...]opInfo{
                resultInArg0: true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23362,7 +23372,7 @@ var opcodeTable = [...]opInfo{
                asm:               s390x.AMOVD,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23372,7 +23382,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ALDGR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -23388,7 +23398,7 @@ var opcodeTable = [...]opInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23401,7 +23411,7 @@ var opcodeTable = [...]opInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23414,7 +23424,7 @@ var opcodeTable = [...]opInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23427,7 +23437,7 @@ var opcodeTable = [...]opInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23440,7 +23450,7 @@ var opcodeTable = [...]opInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23450,7 +23460,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACEFBRA,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -23463,7 +23473,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACDFBRA,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -23476,7 +23486,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACEGBRA,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -23489,7 +23499,7 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.ACDGBRA,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
                                {0, 4294901760}, // F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
@@ -23533,7 +23543,7 @@ var opcodeTable = [...]opInfo{
                                {0, 4295000064}, // SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23545,10 +23555,10 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 4295000064}, // SP SB
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23562,10 +23572,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVBZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23579,10 +23589,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23596,10 +23606,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVHZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23613,10 +23623,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVH,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23630,10 +23640,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVWZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23647,10 +23657,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23664,10 +23674,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23677,10 +23687,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVWBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23690,10 +23700,10 @@ var opcodeTable = [...]opInfo{
                asm:    s390x.AMOVDBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23707,10 +23717,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVHBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23724,10 +23734,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVWBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23741,10 +23751,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVDBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23758,8 +23768,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
-                               {1, 54271},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
+                               {1, 56319},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -23773,8 +23783,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVH,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
-                               {1, 54271},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
+                               {1, 56319},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -23788,8 +23798,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
-                               {1, 54271},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
+                               {1, 56319},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -23803,8 +23813,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
-                               {1, 54271},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
+                               {1, 56319},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -23818,8 +23828,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVHBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -23833,8 +23843,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVWBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -23848,8 +23858,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVDBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -23864,8 +23874,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMVC,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -23879,11 +23889,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVBZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23897,11 +23907,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23915,11 +23925,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVHZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23933,11 +23943,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVH,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23951,11 +23961,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVWZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23969,11 +23979,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -23987,11 +23997,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24005,11 +24015,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVHBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24023,11 +24033,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVWBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24041,11 +24051,11 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {1, 54270},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {1, 56318},      // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24059,9 +24069,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {2, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24075,9 +24085,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVH,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {2, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24091,9 +24101,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {2, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24107,9 +24117,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {2, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24123,9 +24133,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVHBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {2, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24139,9 +24149,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVWBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {2, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24155,9 +24165,9 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AMOVDBR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {2, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24170,7 +24180,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVB,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                },
        },
@@ -24183,7 +24193,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVH,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                },
        },
@@ -24196,7 +24206,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                },
        },
@@ -24209,7 +24219,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                },
        },
@@ -24223,7 +24233,7 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.ACLEAR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23550}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24235,7 +24245,7 @@ var opcodeTable = [...]opInfo{
                call:         true,
                symEffect:    SymNone,
                reg: regInfo{
-                       clobbers: 4294931455, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 g R14 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+                       clobbers: 4294933503, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 g R14 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                },
        },
        {
@@ -24247,9 +24257,9 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 4096},  // R12
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
-                       clobbers: 4294931455, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 g R14 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+                       clobbers: 4294933503, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 g R14 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                },
        },
        {
@@ -24260,9 +24270,9 @@ var opcodeTable = [...]opInfo{
                call:         true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21502}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23550}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
-                       clobbers: 4294931455, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 g R14 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
+                       clobbers: 4294933503, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 g R14 F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15
                },
        },
        {
@@ -24275,7 +24285,7 @@ var opcodeTable = [...]opInfo{
                argLen: 1,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24295,7 +24305,7 @@ var opcodeTable = [...]opInfo{
                rematerializeable: true,
                reg: regInfo{
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24307,7 +24317,7 @@ var opcodeTable = [...]opInfo{
                faultOnNilArg0: true,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24377,10 +24387,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVWZ,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24393,10 +24403,10 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24411,8 +24421,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVW,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
-                               {1, 54271},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
+                               {1, 56319},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24427,8 +24437,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.AMOVD,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
-                               {1, 54271},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
+                               {1, 56319},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24443,11 +24453,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.ALAA,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
-                               {1, 54271},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
+                               {1, 56319},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24462,11 +24472,11 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.ALAAG,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 4295021566}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP SB
-                               {1, 54271},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 4295023614}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP SB
+                               {1, 56319},      // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24492,13 +24502,13 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 1},     // R0
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {2, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        clobbers: 1, // R0
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24514,13 +24524,13 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 1},     // R0
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {2, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        clobbers: 1, // R0
                        outputs: []outputInfo{
                                {1, 0},
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                },
        },
@@ -24535,8 +24545,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.ACS,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
                                {1, 0},
@@ -24555,8 +24565,8 @@ var opcodeTable = [...]opInfo{
                asm:            s390x.ACSG,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
-                               {1, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
+                               {1, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        outputs: []outputInfo{
                                {1, 0},
@@ -24571,7 +24581,7 @@ var opcodeTable = [...]opInfo{
                asm:          s390x.AFLOGR,
                reg: regInfo{
                        inputs: []inputInfo{
-                               {0, 21503}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14
+                               {0, 23551}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14
                        },
                        clobbers: 2, // R1
                        outputs: []outputInfo{
@@ -24590,7 +24600,7 @@ var opcodeTable = [...]opInfo{
                        inputs: []inputInfo{
                                {1, 2},     // R1
                                {2, 4},     // R2
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24606,7 +24616,7 @@ var opcodeTable = [...]opInfo{
                                {1, 2},     // R1
                                {2, 4},     // R2
                                {3, 8},     // R3
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24623,7 +24633,7 @@ var opcodeTable = [...]opInfo{
                                {2, 4},     // R2
                                {3, 8},     // R3
                                {4, 16},    // R4
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24638,7 +24648,7 @@ var opcodeTable = [...]opInfo{
                        inputs: []inputInfo{
                                {1, 2},     // R1
                                {2, 4},     // R2
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24654,7 +24664,7 @@ var opcodeTable = [...]opInfo{
                                {1, 2},     // R1
                                {2, 4},     // R2
                                {3, 8},     // R3
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24671,7 +24681,7 @@ var opcodeTable = [...]opInfo{
                                {2, 4},     // R2
                                {3, 8},     // R3
                                {4, 16},    // R4
-                               {0, 54270}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {0, 56318}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                },
        },
@@ -24686,7 +24696,7 @@ var opcodeTable = [...]opInfo{
                        inputs: []inputInfo{
                                {0, 2},     // R1
                                {1, 4},     // R2
-                               {2, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {2, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        clobbers: 6, // R1 R2
                },
@@ -24700,7 +24710,7 @@ var opcodeTable = [...]opInfo{
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 2},     // R1
-                               {1, 54271}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R12 R14 SP
+                               {1, 56319}, // R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 R11 R12 R14 SP
                        },
                        clobbers: 2, // R1
                },
@@ -27012,7 +27022,7 @@ var registersS390X = [...]Register{
        {31, s390x.REG_F15, "F15"},
        {32, 0, "SB"},
 }
-var gpRegMaskS390X = regMask(21503)
+var gpRegMaskS390X = regMask(23551)
 var fpRegMaskS390X = regMask(4294901760)
 var specialRegMaskS390X = regMask(0)
 var framepointerRegS390X = int8(-1)
diff --git a/src/cmd/compile/internal/ssa/regalloc.go b/src/cmd/compile/internal/ssa/regalloc.go
index 28cc752b66ff023fd2e4d8109c549e20753c1548..f8a0e940b35d29f345780e8c6b7fe9246dfd123c 100644 (file)
--- a/src/cmd/compile/internal/ssa/regalloc.go
+++ b/src/cmd/compile/internal/ssa/regalloc.go
@@ -589,7 +589,7 @@ func (s *regAllocState) init(f *Func) {
                        // in the rewrite rules so we always have a free register
                        // available for global load/stores. See gen/386.rules (search for Flag_shared).
                case "s390x":
-                       // nothing to do, R10 & R11 already reserved
+                       s.allocatable &^= 1 << 11 // R11
                default:
                        s.f.fe.Fatalf(src.NoXPos, "arch %s not implemented", s.f.Config.arch)
                }
diff --git a/src/runtime/asm_s390x.s b/src/runtime/asm_s390x.s
index 1d8c4032e50b358d8060973cdbd6a0c6faee262b..b569d8b421431fc6d8295264893dc468a5ce79eb 100644 (file)
--- a/src/runtime/asm_s390x.s
+++ b/src/runtime/asm_s390x.s
@@ -825,30 +825,29 @@ TEXT ·checkASM(SB),NOSPLIT,$0-1
 // gcWriteBarrier does NOT follow the Go ABI. It takes two arguments:
 // - R2 is the destination of the write
 // - R3 is the value being written at R2.
-// It clobbers R10 and R11 (the linker temp registers).
+// It clobbers R10 (the temp register).
 // It does not clobber any other general-purpose registers,
 // but may clobber others (e.g., floating point registers).
-TEXT runtime·gcWriteBarrier(SB),NOSPLIT,$88
+TEXT runtime·gcWriteBarrier(SB),NOSPLIT,$104
        // Save the registers clobbered by the fast path.
-       MOVD    R1, 80(R15)
-       MOVD    R4, 88(R15)
+       MOVD    R1, 96(R15)
+       MOVD    R4, 104(R15)
        MOVD    g_m(g), R1
        MOVD    m_p(R1), R1
-       MOVD    (p_wbBuf+wbBuf_next)(R1), R4
        // Increment wbBuf.next position.
-       ADD     $16, R4
+       MOVD    $16, R4
+       ADD     (p_wbBuf+wbBuf_next)(R1), R4
        MOVD    R4, (p_wbBuf+wbBuf_next)(R1)
        MOVD    (p_wbBuf+wbBuf_end)(R1), R1
-       MOVD    R1, R10         // R10 is linker temp register
        // Record the write.
-       MOVD    R3, -16(R4)     // Record value
-       MOVD    (R2), R1        // TODO: This turns bad writes into bad reads.
-       MOVD    R1, -8(R4)      // Record *slot
+       MOVD    R3, -16(R4) // Record value
+       MOVD    (R2), R10   // TODO: This turns bad writes into bad reads.
+       MOVD    R10, -8(R4) // Record *slot
        // Is the buffer full?
-       CMPBEQ  R4, R10, flush
+       CMPBEQ  R4, R1, flush
 ret:
-       MOVD    80(R15), R1
-       MOVD    88(R15), R4
+       MOVD    96(R15), R1
+       MOVD    104(R15), R4
        // Do the write.
        MOVD    R3, (R2)
        RET
@@ -856,18 +855,11 @@ ret:
 flush:
        // Save all general purpose registers since these could be
        // clobbered by wbBufFlush and were not saved by the caller.
-       MOVD    R2, 8(R15)      // Also first argument to wbBufFlush
-       MOVD    R3, 16(R15)     // Also second argument to wbBufFlush
+       STMG    R2, R3, 8(R15)   // set R2 and R3 as arguments for wbBufFlush
        MOVD    R0, 24(R15)
        // R1 already saved.
        // R4 already saved.
-       MOVD    R5, 32(R15)
-       MOVD    R6, 40(R15)
-       MOVD    R7, 48(R15)
-       MOVD    R8, 56(R15)
-       MOVD    R9, 64(R15)
-       // R10 and R11 are linker temp registers.
-       MOVD    R12, 72(R15)
+       STMG    R5, R12, 32(R15) // save R5 - R12
        // R13 is g.
        // R14 is LR.
        // R15 is SP.
@@ -875,13 +867,7 @@ flush:
        // This takes arguments R2 and R3.
        CALL    runtime·wbBufFlush(SB)
 
-       MOVD    8(R15), R2
-       MOVD    16(R15), R3
-       MOVD    24(R15), R0
-       MOVD    32(R15), R5
-       MOVD    40(R15), R6
-       MOVD    48(R15), R7
-       MOVD    56(R15), R8
-       MOVD    64(R15), R9
-       MOVD    72(R15), R12
+       LMG     8(R15), R2, R3   // restore R2 - R3
+       MOVD    24(R15), R0      // restore R0
+       LMG     32(R15), R5, R12 // restore R5 - R12
        JMP     ret
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