internal/cpu: fix wrong cache line size of riscv64

All of riscv CPU using 64B for cache-line size.
i.e. U540 of Hifive Unleashed (https://www.sifive.com/boards/hifive-unleashed)

Change-Id: I0d72d88ac026f45383c3b3eb3a77233d3c2e4004
Reviewed-on: https://go-review.googlesource.com/c/go/+/526659
Run-TryBot: M Zhuo <mzh@golangcn.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Heschi Kreinick <heschi@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>

diff --git a/src/internal/cpu/cpu_riscv64.go b/src/internal/cpu/cpu_riscv64.go
index 54b8c3378b4ad46703154c82f1640b8870984afa..2173fe8886090411d8b8c0da5eb8f91efea9736b 100644 (file)
--- a/src/internal/cpu/cpu_riscv64.go
+++ b/src/internal/cpu/cpu_riscv64.go
@@ -4,7 +4,7 @@
 
 package cpu
 
-const CacheLinePadSize = 32
+const CacheLinePadSize = 64
 
 func doinit() {
 }