RLWMI $7, R3, $65535, R6 // 50663c3e
RLWMICC $7, R3, $65535, R6 // 50663c3f
RLWNM $3, R4, $7, R6 // 54861f7e
+ RLWNM R3, R4, $7, R6 // 5c861f7e
RLWNMCC $3, R4, $7, R6 // 54861f7f
+ RLWNMCC R3, R4, $7, R6 // 5c861f7f
RLDMI $0, R4, $7, R6 // 7886076c
RLDMICC $0, R4, $7, R6 // 7886076d
RLDIMI $0, R4, $7, R6 // 788601cc
{ASRAD, C_SCON, C_NONE, C_NONE, C_REG, 56, 4, 0},
{ARLWMI, C_SCON, C_REG, C_LCON, C_REG, 62, 4, 0},
{ARLWMI, C_REG, C_REG, C_LCON, C_REG, 63, 4, 0},
+ {ACLRLSLWI, C_SCON, C_REG, C_LCON, C_REG, 62, 4, 0},
{ARLDMI, C_SCON, C_REG, C_LCON, C_REG, 30, 4, 0},
{ARLDC, C_SCON, C_REG, C_LCON, C_REG, 29, 4, 0},
{ARLDCL, C_SCON, C_REG, C_LCON, C_REG, 29, 4, 0},
opset(ARLWMICC, r0)
opset(ARLWNM, r0)
opset(ARLWNMCC, r0)
- opset(ACLRLSLWI, r0)
case ARLDMI:
opset(ARLDMICC, r0)
AADDEX,
ACMPEQB,
AECIWX,
+ ACLRLSLWI,
obj.ANOP,
obj.ATEXT,
obj.AUNDEF,
}
case 63: /* rlwmi b,s,$mask,a */
- v := c.regoff(&p.From)
- switch p.As {
- case ACLRLSLWI:
- n := c.regoff(p.GetFrom3())
- if n > v || v >= 32 {
- // Message will match operands from the ISA even though in the
- // code it uses 'v'
- c.ctxt.Diag("Invalid n or b for CLRLSLWI: %x %x\n%v", v, n, p)
- }
- // This is an extended mnemonic described in the ISA C.8.2
- // clrlslwi ra,rs,b,n -> rlwinm ra,rs,n,b-n,31-n
- // It generates the rlwinm directly here.
- o1 = OP_RLW(OP_RLWINM, uint32(p.To.Reg), uint32(p.Reg), uint32(n), uint32(v-n), uint32(31-n))
- default:
- var mask [2]uint8
- c.maskgen(p, mask[:], uint32(c.regoff(p.GetFrom3())))
- o1 = AOP_RRR(c.opirr(p.As), uint32(p.Reg), uint32(p.To.Reg), uint32(v))
- o1 |= (uint32(mask[0])&31)<<6 | (uint32(mask[1])&31)<<1
- }
+ var mask [2]uint8
+ c.maskgen(p, mask[:], uint32(c.regoff(p.GetFrom3())))
+ o1 = AOP_RRR(c.oprrr(p.As), uint32(p.Reg), uint32(p.To.Reg), uint32(p.From.Reg))
+ o1 |= (uint32(mask[0])&31)<<6 | (uint32(mask[1])&31)<<1
case 64: /* mtfsf fr[, $m] {,fpcsr} */
var v int32