cmd/5g: fix temp-merging on ARM

mkvar was taking care of the "LeftAddr" case,
effectively hiding it from the temp-merging optimization.

Move it into prog.c.

R=ken2
CC=golang-dev
https://golang.org/cl/12884045

diff --git a/src/cmd/5g/prog.c b/src/cmd/5g/prog.c
index 054461955f41d910323f10a75e65cb74a47653e9..dffad47c121e441fb4658cebe554f79408314dd8 100644 (file)
--- a/src/cmd/5g/prog.c
+++ b/src/cmd/5g/prog.c
@@ -127,6 +127,11 @@ proginfo(ProgInfo *info, Prog *p)
        if(info->flags == 0)
                fatal("unknown instruction %P", p);
 
+       if(p->from.type == D_CONST && p->from.sym != nil && (info->flags & LeftRead)) {
+               info->flags &= ~LeftRead;
+               info->flags |= LeftAddr;
+       }
+
        if((info->flags & RegRead) && p->reg == NREG) {
                info->flags &= ~RegRead;
                info->flags |= CanRegRead | RightRead;

diff --git a/src/cmd/5g/reg.c b/src/cmd/5g/reg.c
index f35713f67a5a553b31bccbbb3b29a852813956ff..c9a5e8446e49c4f938d6b00d3365a777ee70b8ba 100644 (file)
--- a/src/cmd/5g/reg.c
+++ b/src/cmd/5g/reg.c
@@ -216,11 +216,12 @@ regopt(Prog *firstp)
                if(p->as == ABL && p->to.type == D_EXTERN)
                        continue;
 
-               if(info.flags & LeftRead) {
-                       bit = mkvar(r, &p->from);
+               bit = mkvar(r, &p->from);
+               if(info.flags & LeftRead)
                        for(z=0; z<BITS; z++)
                                r->use1.b[z] |= bit.b[z];
-               }
+               if(info.flags & LeftAddr)
+                       setaddrs(bit);
 
                if(info.flags & RegRead) {      
                        if(p->from.type != D_FREG)
@@ -697,9 +698,6 @@ mkvar(Reg *r, Adr *a)
        case D_BRANCH:
                break;
 
-       case D_CONST:
-               flag = 1;
-               goto onereg;
 
        case D_REGREG:
        case D_REGREG2:
@@ -710,9 +708,9 @@ mkvar(Reg *r, Adr *a)
                        bit.b[0] |= RtoB(a->reg);
                return bit;
 
+       case D_CONST:
        case D_REG:
        case D_SHIFT:
-       onereg:
                if(a->reg != NREG) {
                        bit = zbits;
                        bit.b[0] = RtoB(a->reg);