]> Cypherpunks repositories - gostls13.git/commitdiff
cmd/compile: constant fold ANDs.
authorAlexandru Moșoi <brtzsnr@gmail.com>
Thu, 31 Mar 2016 22:54:13 +0000 (00:54 +0200)
committerAlexandru Moșoi <alexandru@mosoi.ro>
Thu, 31 Mar 2016 23:32:11 +0000 (23:32 +0000)
ANDQConst show up occassionally because of right shifting lowering.
ORs and XORs are already folded properly during generic.

Change-Id: I2f9134679555029c641264ce5333d70e167c65f7
Reviewed-on: https://go-review.googlesource.com/21375
Reviewed-by: Keith Randall <khr@golang.org>
Run-TryBot: Alexandru Moșoi <alexandru@mosoi.ro>
TryBot-Result: Gobot Gobot <gobot@golang.org>

src/cmd/compile/internal/ssa/gen/AMD64.rules
src/cmd/compile/internal/ssa/rewriteAMD64.go

index 65ffdbfc071fd053f946c8cbcdae67c0578ca628..4ad0f883b05fb376d66117904205016994b6b44e 100644 (file)
 (ANDB x (MOVBconst [c])) -> (ANDBconst [c] x)
 (ANDB (MOVBconst [c]) x) -> (ANDBconst [c] x)
 
+(ANDBconst [c] (ANDBconst [d] x)) -> (ANDBconst [c & d] x)
+(ANDWconst [c] (ANDWconst [d] x)) -> (ANDWconst [c & d] x)
+(ANDLconst [c] (ANDLconst [d] x)) -> (ANDLconst [c & d] x)
+(ANDQconst [c] (ANDQconst [d] x)) -> (ANDQconst [c & d] x)
+
 (ORQ x (MOVQconst [c])) && is32Bit(c) -> (ORQconst [c] x)
 (ORQ (MOVQconst [c]) x) && is32Bit(c) -> (ORQconst [c] x)
 (ORL x (MOVLconst [c])) -> (ORLconst [c] x)
index f7ede3b25987aadff10b4711b3d78f3051c545c5..11c2de391ca0c11c669a703ceb02b17c85fcbfb0 100644 (file)
@@ -1598,6 +1598,22 @@ func rewriteValueAMD64_OpAMD64ANDB(v *Value, config *Config) bool {
 func rewriteValueAMD64_OpAMD64ANDBconst(v *Value, config *Config) bool {
        b := v.Block
        _ = b
+       // match: (ANDBconst [c] (ANDBconst [d] x))
+       // cond:
+       // result: (ANDBconst [c & d] x)
+       for {
+               c := v.AuxInt
+               v_0 := v.Args[0]
+               if v_0.Op != OpAMD64ANDBconst {
+                       break
+               }
+               d := v_0.AuxInt
+               x := v_0.Args[0]
+               v.reset(OpAMD64ANDBconst)
+               v.AuxInt = c & d
+               v.AddArg(x)
+               return true
+       }
        // match: (ANDBconst [c] _)
        // cond: int8(c)==0
        // result: (MOVBconst [0])
@@ -1691,6 +1707,22 @@ func rewriteValueAMD64_OpAMD64ANDL(v *Value, config *Config) bool {
 func rewriteValueAMD64_OpAMD64ANDLconst(v *Value, config *Config) bool {
        b := v.Block
        _ = b
+       // match: (ANDLconst [c] (ANDLconst [d] x))
+       // cond:
+       // result: (ANDLconst [c & d] x)
+       for {
+               c := v.AuxInt
+               v_0 := v.Args[0]
+               if v_0.Op != OpAMD64ANDLconst {
+                       break
+               }
+               d := v_0.AuxInt
+               x := v_0.Args[0]
+               v.reset(OpAMD64ANDLconst)
+               v.AuxInt = c & d
+               v.AddArg(x)
+               return true
+       }
        // match: (ANDLconst [c] _)
        // cond: int32(c)==0
        // result: (MOVLconst [0])
@@ -1790,6 +1822,22 @@ func rewriteValueAMD64_OpAMD64ANDQ(v *Value, config *Config) bool {
 func rewriteValueAMD64_OpAMD64ANDQconst(v *Value, config *Config) bool {
        b := v.Block
        _ = b
+       // match: (ANDQconst [c] (ANDQconst [d] x))
+       // cond:
+       // result: (ANDQconst [c & d] x)
+       for {
+               c := v.AuxInt
+               v_0 := v.Args[0]
+               if v_0.Op != OpAMD64ANDQconst {
+                       break
+               }
+               d := v_0.AuxInt
+               x := v_0.Args[0]
+               v.reset(OpAMD64ANDQconst)
+               v.AuxInt = c & d
+               v.AddArg(x)
+               return true
+       }
        // match: (ANDQconst [0] _)
        // cond:
        // result: (MOVQconst [0])
@@ -1911,6 +1959,22 @@ func rewriteValueAMD64_OpAMD64ANDW(v *Value, config *Config) bool {
 func rewriteValueAMD64_OpAMD64ANDWconst(v *Value, config *Config) bool {
        b := v.Block
        _ = b
+       // match: (ANDWconst [c] (ANDWconst [d] x))
+       // cond:
+       // result: (ANDWconst [c & d] x)
+       for {
+               c := v.AuxInt
+               v_0 := v.Args[0]
+               if v_0.Op != OpAMD64ANDWconst {
+                       break
+               }
+               d := v_0.AuxInt
+               x := v_0.Args[0]
+               v.reset(OpAMD64ANDWconst)
+               v.AuxInt = c & d
+               v.AddArg(x)
+               return true
+       }
        // match: (ANDWconst [c] _)
        // cond: int16(c)==0
        // result: (MOVWconst [0])