cmd/internal/obj/arm64: add register indexed FMOVS/FMOVD

This CL adds register indexed FMOVS/FMOVD.
FMOVS Fx, (Rn)(Rm)
FMOVS Fx, (Rn)(Rm<<2)
FMOVD Fx, (Rn)(Rm)
FMOVD Fx, (Rn)(Rm<<3)
FMOVS (Rn)(Rm), Fx
FMOVS (Rn)(Rm<<2), Fx
FMOVD (Rn)(Rm), Fx
FMOVD (Rn)(Rm<<3), Fx

Change-Id: Id76de6a4be96b64cf79d7e9a1962d9d49cb462f2
Reviewed-on: https://go-review.googlesource.com/123995
Run-TryBot: Ben Shi <powerman1st@163.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>

diff --git a/src/cmd/asm/internal/asm/testdata/arm64.s b/src/cmd/asm/internal/asm/testdata/arm64.s
index 3a1b2f79beb81ee08dbd9477e705da859bab9e9e..38616bd8376b1ffa53dc8e65b21ba4b733cc0845 100644 (file)
--- a/src/cmd/asm/internal/asm/testdata/arm64.s
+++ b/src/cmd/asm/internal/asm/testdata/arm64.s
@@ -164,6 +164,15 @@ TEXT       foo(SB), DUPOK|NOSPLIT, $-8
        MOVB    (R29)(R30), R14                 // MOVB (R29)(R30*1), R14                // ae6bbe38
        MOVB    R4, (R2)(R6.SXTX)               // 44e82638
 
+       FMOVS   (R2)(R6), F4       // FMOVS (R2)(R6*1), F4    // 446866bc
+       FMOVS   (R2)(R6<<2), F4                               // 447866bc
+       FMOVD   (R2)(R6), F4       // FMOVD (R2)(R6*1), F4    // 446866fc
+       FMOVD   (R2)(R6<<3), F4                               // 447866fc
+       FMOVS   F4, (R2)(R6)       // FMOVS F4, (R2)(R6*1)    // 446826bc
+       FMOVS   F4, (R2)(R6<<2)                               // 447826bc
+       FMOVD   F4, (R2)(R6)       // FMOVD F4, (R2)(R6*1)    // 446826fc
+       FMOVD   F4, (R2)(R6<<3)                               // 447826fc
+
 //     LTYPE1 imsr ',' spreg ','
 //     {
 //             outcode($1, &$2, $4, &nullgen);

diff --git a/src/cmd/internal/obj/arm64/asm7.go b/src/cmd/internal/obj/arm64/asm7.go
index f7a3babd198d693de545f9cd6c7277408ca23e1e..4840a969fd6658e747e67c99ae36cb6d21b8c70b 100644 (file)
--- a/src/cmd/internal/obj/arm64/asm7.go
+++ b/src/cmd/internal/obj/arm64/asm7.go
@@ -519,12 +519,16 @@ var optab = []Optab{
        {AMOVH, C_ROFF, C_NONE, C_NONE, C_REG, 98, 4, 0, 0, 0},
        {AMOVB, C_ROFF, C_NONE, C_NONE, C_REG, 98, 4, 0, 0, 0},
        {AMOVBU, C_ROFF, C_NONE, C_NONE, C_REG, 98, 4, 0, 0, 0},
+       {AFMOVS, C_ROFF, C_NONE, C_NONE, C_FREG, 98, 4, 0, 0, 0},
+       {AFMOVD, C_ROFF, C_NONE, C_NONE, C_FREG, 98, 4, 0, 0, 0},
 
        /* store with extended register offset */
        {AMOVD, C_REG, C_NONE, C_NONE, C_ROFF, 99, 4, 0, 0, 0},
        {AMOVW, C_REG, C_NONE, C_NONE, C_ROFF, 99, 4, 0, 0, 0},
        {AMOVH, C_REG, C_NONE, C_NONE, C_ROFF, 99, 4, 0, 0, 0},
        {AMOVB, C_REG, C_NONE, C_NONE, C_ROFF, 99, 4, 0, 0, 0},
+       {AFMOVS, C_FREG, C_NONE, C_NONE, C_ROFF, 99, 4, 0, 0, 0},
+       {AFMOVD, C_FREG, C_NONE, C_NONE, C_ROFF, 99, 4, 0, 0, 0},
 
        /* pre/post-indexed/signed-offset load/store register pair
           (unscaled, signed 10-bit quad-aligned and long offset) */
@@ -2540,11 +2544,11 @@ func (c *ctxt7) checkShiftAmount(p *obj.Prog, a *obj.Addr) {
                if amount != 1 && amount != 0 {
                        c.ctxt.Diag("invalid index shift amount: %v", p)
                }
-       case AMOVW, AMOVWU:
+       case AMOVW, AMOVWU, AFMOVS:
                if amount != 2 && amount != 0 {
                        c.ctxt.Diag("invalid index shift amount: %v", p)
                }
-       case AMOVD:
+       case AMOVD, AFMOVD:
                if amount != 3 && amount != 0 {
                        c.ctxt.Diag("invalid index shift amount: %v", p)
                }