}
defer os.RemoveAll(dir)
+ nameRegexp := regexp.MustCompile("func \\w+")
t.Run("platform", func(t *testing.T) {
for _, ats := range allAsmTests {
ats := ats
asm := ats.compileToAsm(tt, dir)
- for i, at := range ats.tests {
- fa := funcAsm(asm, i)
-
+ for _, at := range ats.tests {
+ funcName := nameRegexp.FindString(at.function)[5:]
+ fa := funcAsm(asm, funcName)
at.verifyAsm(tt, fa)
}
})
})
}
-// funcAsm returns the assembly listing for f{funcIndex}
-func funcAsm(asm string, funcIndex int) string {
- if i := strings.Index(asm, fmt.Sprintf("TEXT\t\"\".f%d(SB)", funcIndex)); i >= 0 {
+// funcAsm returns the assembly listing for the given function name.
+func funcAsm(asm string, funcName string) string {
+ if i := strings.Index(asm, fmt.Sprintf("TEXT\t\"\".%s(SB)", funcName)); i >= 0 {
asm = asm[i:]
}
- if i := strings.Index(asm, fmt.Sprintf("TEXT\t\"\".f%d(SB)", funcIndex+1)); i >= 0 {
+ if i := strings.Index(asm[1:], "TEXT\t\"\"."); i >= 0 {
asm = asm[:i+1]
}
// Rotate after inlining (see issue 18254).
{
`
- func g(x uint32, k uint) uint32 {
- return x<<k | x>>(32-k)
- }
func f32(x uint32) uint32 {
return g(x, 7)
}
+ func g(x uint32, k uint) uint32 {
+ return x<<k | x>>(32-k)
+ }
`,
[]string{"\tROLL\t[$]7,"},
},
`,
[]string{"\tBSRQ\t"},
},
+ // see issue 19595.
+ // We want to merge load+op in f58, but not in f59.
+ {
+ `
+ func f58(p, q *int) {
+ x := *p
+ *q += x
+ }`,
+ []string{"\tADDQ\t\\("},
+ },
+ {
+ `
+ func f59(p, q *int) {
+ x := *p
+ for i := 0; i < 10; i++ {
+ *q += x
+ }
+ }`,
+ []string{"\tADDQ\t[A-Z]"},
+ },
}
var linux386Tests = []*asmTest{
// Merge load and op
// TODO: add indexed variants?
-(ADDQ x l:(MOVQload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ADDQmem x [off] {sym} ptr mem)
-(ADDQ l:(MOVQload [off] {sym} ptr mem) x) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ADDQmem x [off] {sym} ptr mem)
-(ADDL x l:(MOVLload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ADDLmem x [off] {sym} ptr mem)
-(ADDL l:(MOVLload [off] {sym} ptr mem) x) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ADDLmem x [off] {sym} ptr mem)
-(SUBQ x l:(MOVQload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (SUBQmem x [off] {sym} ptr mem)
-(SUBL x l:(MOVLload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (SUBLmem x [off] {sym} ptr mem)
-(ANDQ x l:(MOVQload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ANDQmem x [off] {sym} ptr mem)
-(ANDQ l:(MOVQload [off] {sym} ptr mem) x) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ANDQmem x [off] {sym} ptr mem)
-(ANDL x l:(MOVLload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ANDLmem x [off] {sym} ptr mem)
-(ANDL l:(MOVLload [off] {sym} ptr mem) x) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ANDLmem x [off] {sym} ptr mem)
-(ORQ x l:(MOVQload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ORQmem x [off] {sym} ptr mem)
-(ORQ l:(MOVQload [off] {sym} ptr mem) x) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ORQmem x [off] {sym} ptr mem)
-(ORL x l:(MOVLload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ORLmem x [off] {sym} ptr mem)
-(ORL l:(MOVLload [off] {sym} ptr mem) x) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ORLmem x [off] {sym} ptr mem)
-(XORQ x l:(MOVQload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (XORQmem x [off] {sym} ptr mem)
-(XORQ l:(MOVQload [off] {sym} ptr mem) x) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (XORQmem x [off] {sym} ptr mem)
-(XORL x l:(MOVLload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (XORLmem x [off] {sym} ptr mem)
-(XORL l:(MOVLload [off] {sym} ptr mem) x) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (XORLmem x [off] {sym} ptr mem)
-(ADDSD x l:(MOVSDload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ADDSDmem x [off] {sym} ptr mem)
-(ADDSD l:(MOVSDload [off] {sym} ptr mem) x) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ADDSDmem x [off] {sym} ptr mem)
-(ADDSS x l:(MOVSSload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ADDSSmem x [off] {sym} ptr mem)
-(ADDSS l:(MOVSSload [off] {sym} ptr mem) x) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (ADDSSmem x [off] {sym} ptr mem)
-(SUBSD x l:(MOVSDload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (SUBSDmem x [off] {sym} ptr mem)
-(SUBSS x l:(MOVSSload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (SUBSSmem x [off] {sym} ptr mem)
-(MULSD x l:(MOVSDload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (MULSDmem x [off] {sym} ptr mem)
-(MULSD l:(MOVSDload [off] {sym} ptr mem) x) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (MULSDmem x [off] {sym} ptr mem)
-(MULSS x l:(MOVSSload [off] {sym} ptr mem)) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (MULSSmem x [off] {sym} ptr mem)
-(MULSS l:(MOVSSload [off] {sym} ptr mem) x) && l.Uses == 1 && canMergeLoad(v, l) && clobber(l) -> (MULSSmem x [off] {sym} ptr mem)
+(ADDQ x l:(MOVQload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (ADDQmem x [off] {sym} ptr mem)
+(ADDQ l:(MOVQload [off] {sym} ptr mem) x) && canMergeLoad(v, l, x) && clobber(l) -> (ADDQmem x [off] {sym} ptr mem)
+(ADDL x l:(MOVLload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (ADDLmem x [off] {sym} ptr mem)
+(ADDL l:(MOVLload [off] {sym} ptr mem) x) && canMergeLoad(v, l, x) && clobber(l) -> (ADDLmem x [off] {sym} ptr mem)
+(SUBQ x l:(MOVQload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (SUBQmem x [off] {sym} ptr mem)
+(SUBL x l:(MOVLload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (SUBLmem x [off] {sym} ptr mem)
+(ANDQ x l:(MOVQload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (ANDQmem x [off] {sym} ptr mem)
+(ANDQ l:(MOVQload [off] {sym} ptr mem) x) && canMergeLoad(v, l, x) && clobber(l) -> (ANDQmem x [off] {sym} ptr mem)
+(ANDL x l:(MOVLload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (ANDLmem x [off] {sym} ptr mem)
+(ANDL l:(MOVLload [off] {sym} ptr mem) x) && canMergeLoad(v, l, x) && clobber(l) -> (ANDLmem x [off] {sym} ptr mem)
+(ORQ x l:(MOVQload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (ORQmem x [off] {sym} ptr mem)
+(ORQ l:(MOVQload [off] {sym} ptr mem) x) && canMergeLoad(v, l, x) && clobber(l) -> (ORQmem x [off] {sym} ptr mem)
+(ORL x l:(MOVLload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (ORLmem x [off] {sym} ptr mem)
+(ORL l:(MOVLload [off] {sym} ptr mem) x) && canMergeLoad(v, l, x) && clobber(l) -> (ORLmem x [off] {sym} ptr mem)
+(XORQ x l:(MOVQload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (XORQmem x [off] {sym} ptr mem)
+(XORQ l:(MOVQload [off] {sym} ptr mem) x) && canMergeLoad(v, l, x) && clobber(l) -> (XORQmem x [off] {sym} ptr mem)
+(XORL x l:(MOVLload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (XORLmem x [off] {sym} ptr mem)
+(XORL l:(MOVLload [off] {sym} ptr mem) x) && canMergeLoad(v, l, x) && clobber(l) -> (XORLmem x [off] {sym} ptr mem)
+(ADDSD x l:(MOVSDload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (ADDSDmem x [off] {sym} ptr mem)
+(ADDSD l:(MOVSDload [off] {sym} ptr mem) x) && canMergeLoad(v, l, x) && clobber(l) -> (ADDSDmem x [off] {sym} ptr mem)
+(ADDSS x l:(MOVSSload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (ADDSSmem x [off] {sym} ptr mem)
+(ADDSS l:(MOVSSload [off] {sym} ptr mem) x) && canMergeLoad(v, l, x) && clobber(l) -> (ADDSSmem x [off] {sym} ptr mem)
+(SUBSD x l:(MOVSDload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (SUBSDmem x [off] {sym} ptr mem)
+(SUBSS x l:(MOVSSload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (SUBSSmem x [off] {sym} ptr mem)
+(MULSD x l:(MOVSDload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (MULSDmem x [off] {sym} ptr mem)
+(MULSD l:(MOVSDload [off] {sym} ptr mem) x) && canMergeLoad(v, l, x) && clobber(l) -> (MULSDmem x [off] {sym} ptr mem)
+(MULSS x l:(MOVSSload [off] {sym} ptr mem)) && canMergeLoad(v, l, x) && clobber(l) -> (MULSSmem x [off] {sym} ptr mem)
+(MULSS l:(MOVSSload [off] {sym} ptr mem) x) && canMergeLoad(v, l, x) && clobber(l) -> (MULSSmem x [off] {sym} ptr mem)
// Merge ADDQconst and LEAQ into atomic loads.
(MOVQatomicload [off1] {sym} (ADDQconst [off2] ptr) mem) && is32Bit(off1+off2) ->
// Exclude global data (SB) because these instructions cannot handle relative addresses.
// TODO(mundaym): use LARL in the assembler to handle SB?
// TODO(mundaym): indexed versions of these?
-(ADD <t> x g:(MOVDload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ADD <t> x g:(MOVDload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ADDload <t> [off] {sym} x ptr mem)
-(ADD <t> g:(MOVDload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ADD <t> g:(MOVDload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ADDload <t> [off] {sym} x ptr mem)
-(ADDW <t> x g:(MOVWload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ADDW <t> x g:(MOVWload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ADDWload <t> [off] {sym} x ptr mem)
-(ADDW <t> g:(MOVWload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ADDW <t> g:(MOVWload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ADDWload <t> [off] {sym} x ptr mem)
-(ADDW <t> x g:(MOVWZload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ADDW <t> x g:(MOVWZload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ADDWload <t> [off] {sym} x ptr mem)
-(ADDW <t> g:(MOVWZload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ADDW <t> g:(MOVWZload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ADDWload <t> [off] {sym} x ptr mem)
-(MULLD <t> x g:(MOVDload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(MULLD <t> x g:(MOVDload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (MULLDload <t> [off] {sym} x ptr mem)
-(MULLD <t> g:(MOVDload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(MULLD <t> g:(MOVDload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (MULLDload <t> [off] {sym} x ptr mem)
-(MULLW <t> x g:(MOVWload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(MULLW <t> x g:(MOVWload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (MULLWload <t> [off] {sym} x ptr mem)
-(MULLW <t> g:(MOVWload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(MULLW <t> g:(MOVWload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (MULLWload <t> [off] {sym} x ptr mem)
-(MULLW <t> x g:(MOVWZload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(MULLW <t> x g:(MOVWZload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (MULLWload <t> [off] {sym} x ptr mem)
-(MULLW <t> g:(MOVWZload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(MULLW <t> g:(MOVWZload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (MULLWload <t> [off] {sym} x ptr mem)
-(SUB <t> x g:(MOVDload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(SUB <t> x g:(MOVDload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (SUBload <t> [off] {sym} x ptr mem)
-(SUBW <t> x g:(MOVWload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(SUBW <t> x g:(MOVWload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (SUBWload <t> [off] {sym} x ptr mem)
-(SUBW <t> x g:(MOVWZload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(SUBW <t> x g:(MOVWZload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (SUBWload <t> [off] {sym} x ptr mem)
-(AND <t> x g:(MOVDload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(AND <t> x g:(MOVDload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ANDload <t> [off] {sym} x ptr mem)
-(AND <t> g:(MOVDload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(AND <t> g:(MOVDload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ANDload <t> [off] {sym} x ptr mem)
-(ANDW <t> x g:(MOVWload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ANDW <t> x g:(MOVWload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ANDWload <t> [off] {sym} x ptr mem)
-(ANDW <t> g:(MOVWload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ANDW <t> g:(MOVWload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ANDWload <t> [off] {sym} x ptr mem)
-(ANDW <t> x g:(MOVWZload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ANDW <t> x g:(MOVWZload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ANDWload <t> [off] {sym} x ptr mem)
-(ANDW <t> g:(MOVWZload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ANDW <t> g:(MOVWZload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ANDWload <t> [off] {sym} x ptr mem)
-(OR <t> x g:(MOVDload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(OR <t> x g:(MOVDload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ORload <t> [off] {sym} x ptr mem)
-(OR <t> g:(MOVDload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(OR <t> g:(MOVDload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ORload <t> [off] {sym} x ptr mem)
-(ORW <t> x g:(MOVWload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ORW <t> x g:(MOVWload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ORWload <t> [off] {sym} x ptr mem)
-(ORW <t> g:(MOVWload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ORW <t> g:(MOVWload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ORWload <t> [off] {sym} x ptr mem)
-(ORW <t> x g:(MOVWZload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ORW <t> x g:(MOVWZload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ORWload <t> [off] {sym} x ptr mem)
-(ORW <t> g:(MOVWZload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(ORW <t> g:(MOVWZload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (ORWload <t> [off] {sym} x ptr mem)
-(XOR <t> x g:(MOVDload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(XOR <t> x g:(MOVDload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (XORload <t> [off] {sym} x ptr mem)
-(XOR <t> g:(MOVDload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(XOR <t> g:(MOVDload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (XORload <t> [off] {sym} x ptr mem)
-(XORW <t> x g:(MOVWload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(XORW <t> x g:(MOVWload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (XORWload <t> [off] {sym} x ptr mem)
-(XORW <t> g:(MOVWload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(XORW <t> g:(MOVWload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (XORWload <t> [off] {sym} x ptr mem)
-(XORW <t> x g:(MOVWZload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(XORW <t> x g:(MOVWZload [off] {sym} ptr mem)) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (XORWload <t> [off] {sym} x ptr mem)
-(XORW <t> g:(MOVWZload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+(XORW <t> g:(MOVWZload [off] {sym} ptr mem) x) && g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
-> (XORWload <t> [off] {sym} x ptr mem)
// Combine constant stores into larger (unaligned) stores.
ln.initializedExits = true
}
+// depth returns the loop nesting level of block b.
+func (ln *loopnest) depth(b ID) int16 {
+ if l := ln.b2l[b]; l != nil {
+ return l.depth
+ }
+ return 0
+}
+
// recordIfExit checks sl (the loop containing b) to see if it
// is outside of loop l, and if so, records b as an exit block
// from l and returns true.
// canMergeLoad reports whether the load can be merged into target without
// invalidating the schedule.
-func canMergeLoad(target, load *Value) bool {
+// It also checks that the other non-load argument x is something we
+// are ok with clobbering (all our current load+op instructions clobber
+// their input register).
+func canMergeLoad(target, load, x *Value) bool {
if target.Block.ID != load.Block.ID {
// If the load is in a different block do not merge it.
return false
}
+
+ // We can't merge the load into the target if the load
+ // has more than one use.
+ if load.Uses != 1 {
+ return false
+ }
+
+ // The register containing x is going to get clobbered.
+ // Don't merge if we still need the value of x.
+ // We don't have liveness information here, but we can
+ // approximate x dying with:
+ // 1) target is x's only use.
+ // 2) target is not in a deeper loop than x.
+ if x.Uses != 1 {
+ return false
+ }
+ loopnest := x.Block.Func.loopnest()
+ loopnest.calculateDepths()
+ if loopnest.depth(target.Block.ID) > loopnest.depth(x.Block.ID) {
+ return false
+ }
+
mem := load.MemoryArg()
// We need the load's memory arg to still be alive at target. That
}
}
}
+
return true
}
return true
}
// match: (ADDL x l:(MOVLload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ADDLmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ADDLmem)
return true
}
// match: (ADDL l:(MOVLload [off] {sym} ptr mem) x)
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ADDLmem x [off] {sym} ptr mem)
for {
l := v.Args[0]
ptr := l.Args[0]
mem := l.Args[1]
x := v.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ADDLmem)
return true
}
// match: (ADDQ x l:(MOVQload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ADDQmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ADDQmem)
return true
}
// match: (ADDQ l:(MOVQload [off] {sym} ptr mem) x)
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ADDQmem x [off] {sym} ptr mem)
for {
l := v.Args[0]
ptr := l.Args[0]
mem := l.Args[1]
x := v.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ADDQmem)
}
func rewriteValueAMD64_OpAMD64ADDSD(v *Value) bool {
// match: (ADDSD x l:(MOVSDload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ADDSDmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ADDSDmem)
return true
}
// match: (ADDSD l:(MOVSDload [off] {sym} ptr mem) x)
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ADDSDmem x [off] {sym} ptr mem)
for {
l := v.Args[0]
ptr := l.Args[0]
mem := l.Args[1]
x := v.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ADDSDmem)
}
func rewriteValueAMD64_OpAMD64ADDSS(v *Value) bool {
// match: (ADDSS x l:(MOVSSload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ADDSSmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ADDSSmem)
return true
}
// match: (ADDSS l:(MOVSSload [off] {sym} ptr mem) x)
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ADDSSmem x [off] {sym} ptr mem)
for {
l := v.Args[0]
ptr := l.Args[0]
mem := l.Args[1]
x := v.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ADDSSmem)
return true
}
// match: (ANDL x l:(MOVLload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ANDLmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ANDLmem)
return true
}
// match: (ANDL l:(MOVLload [off] {sym} ptr mem) x)
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ANDLmem x [off] {sym} ptr mem)
for {
l := v.Args[0]
ptr := l.Args[0]
mem := l.Args[1]
x := v.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ANDLmem)
return true
}
// match: (ANDQ x l:(MOVQload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ANDQmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ANDQmem)
return true
}
// match: (ANDQ l:(MOVQload [off] {sym} ptr mem) x)
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ANDQmem x [off] {sym} ptr mem)
for {
l := v.Args[0]
ptr := l.Args[0]
mem := l.Args[1]
x := v.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ANDQmem)
}
func rewriteValueAMD64_OpAMD64MULSD(v *Value) bool {
// match: (MULSD x l:(MOVSDload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (MULSDmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64MULSDmem)
return true
}
// match: (MULSD l:(MOVSDload [off] {sym} ptr mem) x)
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (MULSDmem x [off] {sym} ptr mem)
for {
l := v.Args[0]
ptr := l.Args[0]
mem := l.Args[1]
x := v.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64MULSDmem)
}
func rewriteValueAMD64_OpAMD64MULSS(v *Value) bool {
// match: (MULSS x l:(MOVSSload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (MULSSmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64MULSSmem)
return true
}
// match: (MULSS l:(MOVSSload [off] {sym} ptr mem) x)
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (MULSSmem x [off] {sym} ptr mem)
for {
l := v.Args[0]
ptr := l.Args[0]
mem := l.Args[1]
x := v.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64MULSSmem)
return true
}
// match: (ORL x l:(MOVLload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ORLmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ORLmem)
return true
}
// match: (ORL l:(MOVLload [off] {sym} ptr mem) x)
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ORLmem x [off] {sym} ptr mem)
for {
l := v.Args[0]
ptr := l.Args[0]
mem := l.Args[1]
x := v.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ORLmem)
return true
}
// match: (ORQ x l:(MOVQload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ORQmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ORQmem)
return true
}
// match: (ORQ l:(MOVQload [off] {sym} ptr mem) x)
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (ORQmem x [off] {sym} ptr mem)
for {
l := v.Args[0]
ptr := l.Args[0]
mem := l.Args[1]
x := v.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64ORQmem)
return true
}
// match: (SUBL x l:(MOVLload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (SUBLmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64SUBLmem)
return true
}
// match: (SUBQ x l:(MOVQload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (SUBQmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64SUBQmem)
}
func rewriteValueAMD64_OpAMD64SUBSD(v *Value) bool {
// match: (SUBSD x l:(MOVSDload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (SUBSDmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64SUBSDmem)
}
func rewriteValueAMD64_OpAMD64SUBSS(v *Value) bool {
// match: (SUBSS x l:(MOVSSload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (SUBSSmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64SUBSSmem)
return true
}
// match: (XORL x l:(MOVLload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (XORLmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64XORLmem)
return true
}
// match: (XORL l:(MOVLload [off] {sym} ptr mem) x)
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (XORLmem x [off] {sym} ptr mem)
for {
l := v.Args[0]
ptr := l.Args[0]
mem := l.Args[1]
x := v.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64XORLmem)
return true
}
// match: (XORQ x l:(MOVQload [off] {sym} ptr mem))
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (XORQmem x [off] {sym} ptr mem)
for {
x := v.Args[0]
sym := l.Aux
ptr := l.Args[0]
mem := l.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64XORQmem)
return true
}
// match: (XORQ l:(MOVQload [off] {sym} ptr mem) x)
- // cond: l.Uses == 1 && canMergeLoad(v, l) && clobber(l)
+ // cond: canMergeLoad(v, l, x) && clobber(l)
// result: (XORQmem x [off] {sym} ptr mem)
for {
l := v.Args[0]
ptr := l.Args[0]
mem := l.Args[1]
x := v.Args[1]
- if !(l.Uses == 1 && canMergeLoad(v, l) && clobber(l)) {
+ if !(canMergeLoad(v, l, x) && clobber(l)) {
break
}
v.reset(OpAMD64XORQmem)
return true
}
// match: (ADD <t> x g:(MOVDload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ADDload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XADDload)
return true
}
// match: (ADD <t> g:(MOVDload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ADDload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XADDload)
return true
}
// match: (ADDW <t> x g:(MOVWload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ADDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XADDWload)
return true
}
// match: (ADDW <t> g:(MOVWload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ADDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XADDWload)
return true
}
// match: (ADDW <t> x g:(MOVWZload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ADDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XADDWload)
return true
}
// match: (ADDW <t> g:(MOVWZload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ADDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XADDWload)
return true
}
// match: (AND <t> x g:(MOVDload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ANDload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XANDload)
return true
}
// match: (AND <t> g:(MOVDload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ANDload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XANDload)
return true
}
// match: (ANDW <t> x g:(MOVWload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ANDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XANDWload)
return true
}
// match: (ANDW <t> g:(MOVWload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ANDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XANDWload)
return true
}
// match: (ANDW <t> x g:(MOVWZload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ANDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XANDWload)
return true
}
// match: (ANDW <t> g:(MOVWZload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ANDWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XANDWload)
return true
}
// match: (MULLD <t> x g:(MOVDload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (MULLDload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XMULLDload)
return true
}
// match: (MULLD <t> g:(MOVDload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (MULLDload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XMULLDload)
return true
}
// match: (MULLW <t> x g:(MOVWload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (MULLWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XMULLWload)
return true
}
// match: (MULLW <t> g:(MOVWload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (MULLWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XMULLWload)
return true
}
// match: (MULLW <t> x g:(MOVWZload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (MULLWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XMULLWload)
return true
}
// match: (MULLW <t> g:(MOVWZload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (MULLWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XMULLWload)
return true
}
// match: (OR <t> x g:(MOVDload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ORload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XORload)
return true
}
// match: (OR <t> g:(MOVDload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ORload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XORload)
return true
}
// match: (ORW <t> x g:(MOVWload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XORWload)
return true
}
// match: (ORW <t> g:(MOVWload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XORWload)
return true
}
// match: (ORW <t> x g:(MOVWZload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XORWload)
return true
}
// match: (ORW <t> g:(MOVWZload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (ORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XORWload)
return true
}
// match: (SUB <t> x g:(MOVDload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (SUBload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XSUBload)
return true
}
// match: (SUBW <t> x g:(MOVWload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (SUBWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XSUBWload)
return true
}
// match: (SUBW <t> x g:(MOVWZload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (SUBWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XSUBWload)
return true
}
// match: (XOR <t> x g:(MOVDload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (XORload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XXORload)
return true
}
// match: (XOR <t> g:(MOVDload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (XORload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XXORload)
return true
}
// match: (XORW <t> x g:(MOVWload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (XORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XXORWload)
return true
}
// match: (XORW <t> g:(MOVWload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (XORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XXORWload)
return true
}
// match: (XORW <t> x g:(MOVWZload [off] {sym} ptr mem))
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (XORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
sym := g.Aux
ptr := g.Args[0]
mem := g.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XXORWload)
return true
}
// match: (XORW <t> g:(MOVWZload [off] {sym} ptr mem) x)
- // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)
+ // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)
// result: (XORWload <t> [off] {sym} x ptr mem)
for {
t := v.Type
ptr := g.Args[0]
mem := g.Args[1]
x := v.Args[1]
- if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) {
+ if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g, x) && clobber(g)) {
break
}
v.reset(OpS390XXORWload)