cmd/compile: improve SignExt32to64 on riscv64

SignExt32to64 can be implemented with a single ADDIW instruction, rather than
the two shifts that are in use currently.

Change-Id: Ie1bbaef4018f1ba5162773fc64fa5a887457cfc9
Reviewed-on: https://go-review.googlesource.com/c/go/+/220922
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>

diff --git a/src/cmd/compile/internal/riscv64/ssa.go b/src/cmd/compile/internal/riscv64/ssa.go
index 2ccd3b28309e8e89dfcbb385861f7a8a6b029f21..167c9a3411984a88d884a3da5494b836c411b028 100644 (file)
--- a/src/cmd/compile/internal/riscv64/ssa.go
+++ b/src/cmd/compile/internal/riscv64/ssa.go
@@ -256,7 +256,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
                p.From.Reg = v.Args[0].Reg()
                p.To.Type = obj.TYPE_REG
                p.To.Reg = v.Reg()
-       case ssa.OpRISCV64ADDI, ssa.OpRISCV64XORI, ssa.OpRISCV64ORI, ssa.OpRISCV64ANDI,
+       case ssa.OpRISCV64ADDI, ssa.OpRISCV64ADDIW, ssa.OpRISCV64XORI, ssa.OpRISCV64ORI, ssa.OpRISCV64ANDI,
                ssa.OpRISCV64SLLI, ssa.OpRISCV64SRAI, ssa.OpRISCV64SRLI, ssa.OpRISCV64SLTI,
                ssa.OpRISCV64SLTIU:
                p := s.Prog(v.Op.Asm())

diff --git a/src/cmd/compile/internal/ssa/gen/RISCV64.rules b/src/cmd/compile/internal/ssa/gen/RISCV64.rules
index e2ac4ea5e6e2b1ab8bd60dc01bbb70174791d46b..720724647e7b306baa56e210a984084ecc6a1926 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/RISCV64.rules
+++ b/src/cmd/compile/internal/ssa/gen/RISCV64.rules
@@ -109,7 +109,7 @@
 (SignExt8to64  <t> x) -> (SRAI [56] (SLLI <t> [56] x))
 (SignExt16to32 <t> x) -> (SRAI [48] (SLLI <t> [48] x))
 (SignExt16to64 <t> x) -> (SRAI [48] (SLLI <t> [48] x))
-(SignExt32to64 <t> x) -> (SRAI [32] (SLLI <t> [32] x))
+(SignExt32to64 <t> x) -> (ADDIW [0] x)
 
 (ZeroExt8to16  <t> x) -> (SRLI [56] (SLLI <t> [56] x))
 (ZeroExt8to32  <t> x) -> (SRLI [56] (SLLI <t> [56] x))

diff --git a/src/cmd/compile/internal/ssa/gen/RISCV64Ops.go b/src/cmd/compile/internal/ssa/gen/RISCV64Ops.go
index a1cf2e685757a95fc5113536fa38323fb01e34f9..7829f9a07c5dfeb6c19187620e7169d66e144e96 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/RISCV64Ops.go
+++ b/src/cmd/compile/internal/ssa/gen/RISCV64Ops.go
@@ -129,6 +129,7 @@ func init() {
        RISCV64ops := []opData{
                {name: "ADD", argLength: 2, reg: gp21, asm: "ADD", commutative: true}, // arg0 + arg1
                {name: "ADDI", argLength: 1, reg: gp11sb, asm: "ADDI", aux: "Int64"},  // arg0 + auxint
+               {name: "ADDIW", argLength: 1, reg: gp11, asm: "ADDIW", aux: "Int64"},  // 32 low bits of arg0 + auxint, sign extended to 64 bits
                {name: "SUB", argLength: 2, reg: gp21, asm: "SUB"},                    // arg0 - arg1
                {name: "SUBW", argLength: 2, reg: gp21, asm: "SUBW"},                  // 32 low bits of arg 0 - 32 low bits of arg 1, sign extended to 64 bits
 

diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go
index a810d9fbc6bc86c64aa99612bfc67c67d12ffc4b..b951065e7c4f207ff8542e7cdac2c48a2a85e623 100644 (file)
--- a/src/cmd/compile/internal/ssa/opGen.go
+++ b/src/cmd/compile/internal/ssa/opGen.go
@@ -1884,6 +1884,7 @@ const (
 
        OpRISCV64ADD
        OpRISCV64ADDI
+       OpRISCV64ADDIW
        OpRISCV64SUB
        OpRISCV64SUBW
        OpRISCV64MUL
@@ -25015,6 +25016,20 @@ var opcodeTable = [...]opInfo{
                        },
                },
        },
+       {
+               name:    "ADDIW",
+               auxType: auxInt64,
+               argLen:  1,
+               asm:     riscv.AADDIW,
+               reg: regInfo{
+                       inputs: []inputInfo{
+                               {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30
+                       },
+                       outputs: []outputInfo{
+                               {0, 1073741812}, // X3 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15 X16 X17 X18 X19 X20 X21 X22 X23 X24 X25 X26 X27 X28 X29 X30
+                       },
+               },
+       },
        {
                name:   "SUB",
                argLen: 2,

diff --git a/src/cmd/compile/internal/ssa/rewriteRISCV64.go b/src/cmd/compile/internal/ssa/rewriteRISCV64.go
index e25f80c5ca037343a40615a3b71b8deed79b9e48..e4480dc3669fc8886332e42dd56f58144b201cb3 100644 (file)
--- a/src/cmd/compile/internal/ssa/rewriteRISCV64.go
+++ b/src/cmd/compile/internal/ssa/rewriteRISCV64.go
@@ -4109,18 +4109,13 @@ func rewriteValueRISCV64_OpSignExt16to64(v *Value) bool {
 }
 func rewriteValueRISCV64_OpSignExt32to64(v *Value) bool {
        v_0 := v.Args[0]
-       b := v.Block
        // match: (SignExt32to64 <t> x)
-       // result: (SRAI [32] (SLLI <t> [32] x))
+       // result: (ADDIW [0] x)
        for {
-               t := v.Type
                x := v_0
-               v.reset(OpRISCV64SRAI)
-               v.AuxInt = 32
-               v0 := b.NewValue0(v.Pos, OpRISCV64SLLI, t)
-               v0.AuxInt = 32
-               v0.AddArg(x)
-               v.AddArg(v0)
+               v.reset(OpRISCV64ADDIW)
+               v.AuxInt = 0
+               v.AddArg(x)
                return true
        }
 }