cmd/internal/obj/arm64: adjust rule for VMOVQ instruction

The VMOVQ instruction stores a 128-bit number into a V register, for
example:
    VMOVQ $0x1122334455667788, $0x99aabbccddeeff00, V2
From a documentation (https://pkg.go.dev/cmd/internal/obj/arm64) point
of view, the value in V2 should be 0x112233445566778899aabbccddeeff00,
however the value is actually 0x99aabbccddeeff001122334455667788. The
reason is that we misplaced the high 64-bit and the low 64-bit in the
literal pool. To maintain backward compatibility, this CL adjusts the
rule of VMOVQ instruction to make the documentation consistent with the
code.

Fixes #50528

Change-Id: Ib51f59e97c55252ab2a50bbc6ba4d430732a7a04
Reviewed-on: https://go-review.googlesource.com/c/go/+/377055
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Eric Fang <eric.fang@arm.com>
Run-TryBot: Eric Fang <eric.fang@arm.com>
Trust: Eric Fang <eric.fang@arm.com>
TryBot-Result: Gopher Robot <gobot@golang.org>

diff --git a/src/cmd/internal/obj/arm64/asm7.go b/src/cmd/internal/obj/arm64/asm7.go
index 68f0921d4d9aa4cecb22122ab512bc9c867ef115..f4111f4f5cd3896aa9b0a469257d546cae4c880d 100644 (file)
--- a/src/cmd/internal/obj/arm64/asm7.go
+++ b/src/cmd/internal/obj/arm64/asm7.go
@@ -1184,7 +1184,7 @@ func (c *ctxt7) addpool128(p *obj.Prog, al, ah *obj.Addr) {
        q := c.newprog()
        q.As = ADWORD
        q.To.Type = obj.TYPE_CONST
-       q.To.Offset = al.Offset
+       q.To.Offset = al.Offset // q.Pc is lower than t.Pc, so al.Offset is stored in q.
 
        t := c.newprog()
        t.As = ADWORD

diff --git a/src/cmd/internal/obj/arm64/doc.go b/src/cmd/internal/obj/arm64/doc.go
index 14f0f4c616f227e9b4175195152d8d817b726e5e..1234a3e8187eca8e9d1a0567201d8a66cffb04b2 100644 (file)
--- a/src/cmd/internal/obj/arm64/doc.go
+++ b/src/cmd/internal/obj/arm64/doc.go
@@ -89,12 +89,12 @@ In the following example, PCALIGN at the entry of the function Add will align it
 7. Move large constants to vector registers.
 
 Go asm uses VMOVQ/VMOVD/VMOVS to move 128-bit, 64-bit and 32-bit constants into vector registers, respectively.
-And for a 128-bit interger, it take two 64-bit operands, for the high and low parts separately.
+And for a 128-bit interger, it take two 64-bit operands, for the low and high parts separately.
 
   Examples:
     VMOVS $0x11223344, V0
     VMOVD $0x1122334455667788, V1
-    VMOVQ $0x1122334455667788, $8877665544332211, V2   // V2=0x11223344556677888877665544332211
+    VMOVQ $0x1122334455667788, $0x99aabbccddeeff00, V2   // V2=0x99aabbccddeeff001122334455667788
 
 8. Move an optionally-shifted 16-bit immediate value to a register.