(Rsh8x8 <t> x y) -> (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [7])))))
// Lowering comparisons
-(Less64 x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
-(Less32 x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
-(Less16 x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y)))
-(Less8 x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
-(Less64U x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y))
-(Less32U x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y))
-(Less16U x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y)))
-(Less8U x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y)))
+(Less64 x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
+(Less32 x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
+(Less(16|8) x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOV(H|B)reg x) (MOV(H|B)reg y)))
+(Less64U x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y))
+(Less32U x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y))
+(Less(16|8)U x y) -> (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOV(H|B)Zreg x) (MOV(H|B)Zreg y)))
// Use SETG with reversed operands to dodge NaN case.
(Less64F x y) -> (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x))
(Less32F x y) -> (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x))
-(Leq64 x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
-(Leq32 x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
-(Leq16 x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y)))
-(Leq8 x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
-(Leq64U x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y))
-(Leq32U x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y))
-(Leq16U x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y)))
-(Leq8U x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y)))
+(Leq64 x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
+(Leq32 x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
+(Leq(16|8) x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOV(H|B)reg x) (MOV(H|B)reg y)))
+(Leq64U x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y))
+(Leq32U x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y))
+(Leq(16|8)U x y) -> (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOV(H|B)Zreg x) (MOV(H|B)Zreg y)))
// Use SETGE with reversed operands to dodge NaN case.
(Leq64F x y) -> (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x))
(Leq32F x y) -> (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x))
-(Greater64 x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
-(Greater32 x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
-(Greater16 x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y)))
-(Greater8 x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
-(Greater64U x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y))
-(Greater32U x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y))
-(Greater16U x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y)))
-(Greater8U x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y)))
+(Greater64 x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
+(Greater32 x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
+(Greater(16|8) x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOV(H|B)reg x) (MOV(H|B)reg y)))
+(Greater64U x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y))
+(Greater32U x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y))
+(Greater(16|8)U x y) -> (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOV(H|B)Zreg x) (MOV(H|B)Zreg y)))
(Greater64F x y) -> (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y))
(Greater32F x y) -> (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y))
-(Geq64 x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
-(Geq32 x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
-(Geq16 x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y)))
-(Geq8 x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
-(Geq64U x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y))
-(Geq32U x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y))
-(Geq16U x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y)))
-(Geq8U x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y)))
+(Geq64 x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
+(Geq32 x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
+(Geq(16|8) x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOV(H|B)reg x) (MOV(H|B)reg y)))
+(Geq64U x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y))
+(Geq32U x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y))
+(Geq(16|8)U x y) -> (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOV(H|B)Zreg x) (MOV(H|B)Zreg y)))
(Geq64F x y) -> (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y))
(Geq32F x y) -> (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y))
-(Eq64 x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
-(Eq32 x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
-(Eq16 x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y)))
-(Eq8 x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
-(EqB x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
-(EqPtr x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
-(Eq64F x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMP x y))
-(Eq32F x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y))
-
-(Neq64 x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
-(Neq32 x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
-(Neq16 x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y)))
-(Neq8 x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
-(NeqB x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
-(NeqPtr x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
-(Neq64F x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMP x y))
-(Neq32F x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y))
+(Eq(64|Ptr) x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
+(Eq32 x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
+(Eq(16|8|B) x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOV(H|B|B)reg x) (MOV(H|B|B)reg y)))
+(Eq64F x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMP x y))
+(Eq32F x y) -> (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y))
+
+(Neq(64|Ptr) x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y))
+(Neq32 x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y))
+(Neq(16|8|B) x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOV(H|B|B)reg x) (MOV(H|B|B)reg y)))
+(Neq64F x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMP x y))
+(Neq32F x y) -> (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y))
// Lowering loads
(Load <t> ptr mem) && (is64BitInt(t) || isPtr(t)) -> (MOVDload ptr mem)
(MOVWreg x:(MOVBreg _)) -> (MOVDreg x)
(MOVWreg x:(MOVBZreg _)) -> (MOVDreg x)
(MOVWreg x:(MOVHreg _)) -> (MOVDreg x)
-(MOVWreg x:(MOVHreg _)) -> (MOVDreg x)
+(MOVWreg x:(MOVHZreg _)) -> (MOVDreg x)
(MOVWreg x:(MOVWreg _)) -> (MOVDreg x)
(MOVWZreg x:(MOVBZreg _)) -> (MOVDreg x)
(MOVWZreg x:(MOVHZreg _)) -> (MOVDreg x)
(MOVWZreg x:(MOVWZreg _)) -> (MOVDreg x)
+(MOVBreg (MOVBZreg x)) -> (MOVBreg x)
+(MOVBZreg (MOVBreg x)) -> (MOVBZreg x)
+(MOVHreg (MOVHZreg x)) -> (MOVHreg x)
+(MOVHZreg (MOVHreg x)) -> (MOVHZreg x)
+(MOVWreg (MOVWZreg x)) -> (MOVWreg x)
+(MOVWZreg (MOVWreg x)) -> (MOVWZreg x)
+
// fold extensions into constants
(MOVBreg (MOVDconst [c])) -> (MOVDconst [int64(int8(c))])
(MOVBZreg (MOVDconst [c])) -> (MOVDconst [int64(uint8(c))])
case OpS390XMOVHZloadidx:
return rewriteValueS390X_OpS390XMOVHZloadidx_0(v)
case OpS390XMOVHZreg:
- return rewriteValueS390X_OpS390XMOVHZreg_0(v)
+ return rewriteValueS390X_OpS390XMOVHZreg_0(v) || rewriteValueS390X_OpS390XMOVHZreg_10(v)
case OpS390XMOVHload:
return rewriteValueS390X_OpS390XMOVHload_0(v)
case OpS390XMOVHloadidx:
_ = typ
// match: (Eq16 x y)
// cond:
- // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y)))
+ // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Eq8 x y)
// cond:
- // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
+ // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (EqB x y)
// cond:
- // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
+ // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Geq16 x y)
// cond:
- // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y)))
+ // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Geq16U x y)
// cond:
- // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y)))
+ // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVHZreg x) (MOVHZreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMPU, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPWU, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, typ.UInt64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Geq8 x y)
// cond:
- // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
+ // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Geq8U x y)
// cond:
- // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y)))
+ // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVBZreg x) (MOVBZreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMPU, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPWU, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, typ.UInt64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Greater16 x y)
// cond:
- // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y)))
+ // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Greater16U x y)
// cond:
- // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y)))
+ // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVHZreg x) (MOVHZreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMPU, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPWU, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, typ.UInt64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Greater8 x y)
// cond:
- // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
+ // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Greater8U x y)
// cond:
- // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y)))
+ // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVBZreg x) (MOVBZreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMPU, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPWU, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, typ.UInt64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Leq16 x y)
// cond:
- // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y)))
+ // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Leq16U x y)
// cond:
- // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y)))
+ // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVHZreg x) (MOVHZreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMPU, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPWU, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, typ.UInt64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Leq8 x y)
// cond:
- // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
+ // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Leq8U x y)
// cond:
- // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y)))
+ // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVBZreg x) (MOVBZreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMPU, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPWU, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, typ.UInt64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Less16 x y)
// cond:
- // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y)))
+ // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Less16U x y)
// cond:
- // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y)))
+ // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVHZreg x) (MOVHZreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMPU, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPWU, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVHZreg, typ.UInt64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Less8 x y)
// cond:
- // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
+ // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Less8U x y)
// cond:
- // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y)))
+ // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU (MOVBZreg x) (MOVBZreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMPU, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPWU, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVBZreg, typ.UInt64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Neq16 x y)
// cond:
- // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y)))
+ // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVHreg x) (MOVHreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVHreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (Neq8 x y)
// cond:
- // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
+ // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
_ = typ
// match: (NeqB x y)
// cond:
- // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y)))
+ // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW (MOVBreg x) (MOVBreg y)))
for {
_ = v.Args[1]
x := v.Args[0]
v1 := b.NewValue0(v.Pos, OpS390XMOVDconst, typ.UInt64)
v1.AuxInt = 1
v.AddArg(v1)
- v2 := b.NewValue0(v.Pos, OpS390XCMP, types.TypeFlags)
+ v2 := b.NewValue0(v.Pos, OpS390XCMPW, types.TypeFlags)
v3 := b.NewValue0(v.Pos, OpS390XMOVBreg, typ.Int64)
v3.AddArg(x)
v2.AddArg(v3)
v.AddArg(x)
return true
}
+ // match: (MOVBZreg (MOVBreg x))
+ // cond:
+ // result: (MOVBZreg x)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpS390XMOVBreg {
+ break
+ }
+ x := v_0.Args[0]
+ v.reset(OpS390XMOVBZreg)
+ v.AddArg(x)
+ return true
+ }
// match: (MOVBZreg (MOVDconst [c]))
// cond:
// result: (MOVDconst [int64(uint8(c))])
v.AddArg(x)
return true
}
+ // match: (MOVBreg (MOVBZreg x))
+ // cond:
+ // result: (MOVBreg x)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpS390XMOVBZreg {
+ break
+ }
+ x := v_0.Args[0]
+ v.reset(OpS390XMOVBreg)
+ v.AddArg(x)
+ return true
+ }
// match: (MOVBreg (MOVDconst [c]))
// cond:
// result: (MOVDconst [int64(int8(c))])
v.AddArg(x)
return true
}
+ // match: (MOVHZreg (MOVHreg x))
+ // cond:
+ // result: (MOVHZreg x)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpS390XMOVHreg {
+ break
+ }
+ x := v_0.Args[0]
+ v.reset(OpS390XMOVHZreg)
+ v.AddArg(x)
+ return true
+ }
// match: (MOVHZreg (MOVDconst [c]))
// cond:
// result: (MOVDconst [int64(uint16(c))])
v0.AddArg(mem)
return true
}
+ return false
+}
+func rewriteValueS390X_OpS390XMOVHZreg_10(v *Value) bool {
+ b := v.Block
+ _ = b
// match: (MOVHZreg x:(MOVHloadidx [off] {sym} ptr idx mem))
// cond: x.Uses == 1 && clobber(x)
// result: @x.Block (MOVHZloadidx <v.Type> [off] {sym} ptr idx mem)
v.AddArg(x)
return true
}
+ // match: (MOVHreg (MOVHZreg x))
+ // cond:
+ // result: (MOVHreg x)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpS390XMOVHZreg {
+ break
+ }
+ x := v_0.Args[0]
+ v.reset(OpS390XMOVHreg)
+ v.AddArg(x)
+ return true
+ }
// match: (MOVHreg (MOVDconst [c]))
// cond:
// result: (MOVDconst [int64(int16(c))])
v0.AddArg(mem)
return true
}
+ return false
+}
+func rewriteValueS390X_OpS390XMOVHreg_10(v *Value) bool {
+ b := v.Block
+ _ = b
// match: (MOVHreg x:(MOVHload [off] {sym} ptr mem))
// cond: x.Uses == 1 && clobber(x)
// result: @x.Block (MOVHload <v.Type> [off] {sym} ptr mem)
v0.AddArg(mem)
return true
}
- return false
-}
-func rewriteValueS390X_OpS390XMOVHreg_10(v *Value) bool {
- b := v.Block
- _ = b
// match: (MOVHreg x:(MOVHZloadidx [off] {sym} ptr idx mem))
// cond: x.Uses == 1 && clobber(x)
// result: @x.Block (MOVHloadidx <v.Type> [off] {sym} ptr idx mem)
v.AddArg(x)
return true
}
+ // match: (MOVWZreg (MOVWreg x))
+ // cond:
+ // result: (MOVWZreg x)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpS390XMOVWreg {
+ break
+ }
+ x := v_0.Args[0]
+ v.reset(OpS390XMOVWZreg)
+ v.AddArg(x)
+ return true
+ }
// match: (MOVWZreg (MOVDconst [c]))
// cond:
// result: (MOVDconst [int64(uint32(c))])
v0.AddArg(mem)
return true
}
+ return false
+}
+func rewriteValueS390X_OpS390XMOVWZreg_10(v *Value) bool {
+ b := v.Block
+ _ = b
// match: (MOVWZreg x:(MOVWload [off] {sym} ptr mem))
// cond: x.Uses == 1 && clobber(x)
// result: @x.Block (MOVWZload <v.Type> [off] {sym} ptr mem)
v0.AddArg(mem)
return true
}
- return false
-}
-func rewriteValueS390X_OpS390XMOVWZreg_10(v *Value) bool {
- b := v.Block
- _ = b
// match: (MOVWZreg x:(MOVWZloadidx [off] {sym} ptr idx mem))
// cond: x.Uses == 1 && clobber(x)
// result: @x.Block (MOVWZloadidx <v.Type> [off] {sym} ptr idx mem)
v.AddArg(x)
return true
}
- // match: (MOVWreg x:(MOVHreg _))
+ // match: (MOVWreg x:(MOVHZreg _))
// cond:
// result: (MOVDreg x)
for {
x := v.Args[0]
- if x.Op != OpS390XMOVHreg {
+ if x.Op != OpS390XMOVHZreg {
break
}
v.reset(OpS390XMOVDreg)
v.AddArg(x)
return true
}
+ // match: (MOVWreg (MOVWZreg x))
+ // cond:
+ // result: (MOVWreg x)
+ for {
+ v_0 := v.Args[0]
+ if v_0.Op != OpS390XMOVWZreg {
+ break
+ }
+ x := v_0.Args[0]
+ v.reset(OpS390XMOVWreg)
+ v.AddArg(x)
+ return true
+ }
// match: (MOVWreg (MOVDconst [c]))
// cond:
// result: (MOVDconst [int64(int32(c))])