fix tst instruction on arm to set overflow bit

R=r
CC=golang-dev
https://golang.org/cl/4009041

diff --git a/src/cmd/5g/cgen.c b/src/cmd/5g/cgen.c
index 587b500a9e8a07c6b18b51f5113d737bf23181d8..bd44cab46dbc2f28708dcf8c98194ec13fd7b71a 100644 (file)
--- a/src/cmd/5g/cgen.c
+++ b/src/cmd/5g/cgen.c
@@ -832,7 +832,7 @@ gencmp0(Node *n, Type *t, int o, Prog *to)
        } else
                gins(ATST, &n1, N);
        a = optoas(o, t);
-       patch(gbranch(optoas(o, t), t), to);
+       patch(gbranch(a, t), to);
        regfree(&n1);
 }
 

diff --git a/src/cmd/5l/asm.c b/src/cmd/5l/asm.c
index b48a7a88b539f3330e02a715a8e29b2a47da2c2b..9767e830360329518d87578c7e05f9b4e432b791 100644 (file)
--- a/src/cmd/5l/asm.c
+++ b/src/cmd/5l/asm.c
@@ -1559,11 +1559,9 @@ if(debug['G']) print("%ux: %s: arm %d %d %d\n", (uint32)(p->pc), p->from.sym->na
                o1 |= (p->from.reg<<16);
                o1 |= (p->to.reg<<12);
                break;
-
        case 90:        /* tst reg  */
-               o1 = oprrr(AMOVW, p->scond);
-               o1 |= p->from.reg | (p->from.reg<<12);
-               o1 |= 1 << 20;  // SBIT
+               o1 = oprrr(ACMP+AEND, p->scond);
+               o1 |= p->from.reg<<16;
                break;
        }
        
@@ -1716,6 +1714,8 @@ oprrr(int a, int sc)
                return o | (0xe<<24) | (0x0<<20) | (0xb<<8) | (1<<4);
        case AMOVFW+AEND:       // copy FtoW
                return o | (0xe<<24) | (0x1<<20) | (0xb<<8) | (1<<4);
+       case ACMP+AEND: // cmp imm
+               return o | (0x3<<24) | (0x5<<20);
        }
        diag("bad rrr %d", a);
        prasm(curp);