cmd/internal/obj/riscv,cmd/link: shorten the riscv64 call sequence

Now that the other dependent offset has been identified, we can remove the
unnecessary ADDI instruction from the riscv64 call sequence (reducing it
to AUIPC+JALR, rather than the previous AUIPC+ADDI+JALR).

Change-Id: I348c4efb686f9f71ed1dd1d25fb9142a41230b0d
Reviewed-on: https://go-review.googlesource.com/c/go/+/216798
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>

diff --git a/src/cmd/internal/obj/riscv/obj.go b/src/cmd/internal/obj/riscv/obj.go
index e90769eb20e099284015672dfb614b1caf2e06a5..1d2c4981104b2a5daeb3ef65e4ae6683f0c2cea3 100644 (file)
--- a/src/cmd/internal/obj/riscv/obj.go
+++ b/src/cmd/internal/obj/riscv/obj.go
@@ -55,15 +55,6 @@ func jalrToSym(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc, lr int16) *ob
        p.Mark |= NEED_PCREL_ITYPE_RELOC
        p = obj.Appendp(p, newprog)
 
-       // TODO(jsing): This instruction is not necessary, as the lower bits
-       // of the immediate can be encoded directly in the JALR instruction.
-       // However, other code currently depends on jalrToSym being 12 bytes...
-       p.As = AADDI
-       p.From = obj.Addr{Type: obj.TYPE_CONST}
-       p.Reg = REG_TMP
-       p.To = obj.Addr{Type: obj.TYPE_REG, Reg: REG_TMP}
-       p = obj.Appendp(p, newprog)
-
        // Leave Sym only for the CALL reloc in assemble.
        p.As = AJALR
        p.From.Type = obj.TYPE_REG

diff --git a/src/cmd/link/internal/ld/pcln.go b/src/cmd/link/internal/ld/pcln.go
index 7cba9bde6d1eb904921504bde836746e54c05f1b..db44c0292e106dc4bea170e98ce9ff8e4940b08d 100644 (file)
--- a/src/cmd/link/internal/ld/pcln.go
+++ b/src/cmd/link/internal/ld/pcln.go
@@ -271,8 +271,8 @@ func (ctxt *Link) pclntab() {
                                        case sys.RISCV64:
                                                // TODO(jsing): The JALR instruction is marked with
                                                // R_CALLRISCV, whereas the actual reloc is currently
-                                               // two instructions earlier for the AUIPC+AADI sequence.
-                                               deferreturn -= 8
+                                               // one instruction earlier starting with the AUIPC.
+                                               deferreturn -= 4
                                        case sys.S390X:
                                                deferreturn -= 2
                                        default:

diff --git a/src/runtime/asm_riscv64.s b/src/runtime/asm_riscv64.s
index 444e2bba1b8d24dc8055694dd36c3148cfaa9282..31dc94ce54c8cd817db2729896bf337738541784 100644 (file)
--- a/src/runtime/asm_riscv64.s
+++ b/src/runtime/asm_riscv64.s
@@ -254,12 +254,11 @@ TEXT runtime·gogo(SB), NOSPLIT, $16-8
 // func jmpdefer(fv *funcval, argp uintptr)
 // called from deferreturn
 // 1. grab stored return address from the caller's frame
-// 2. sub 12 bytes to get back to JAL deferreturn
+// 2. sub 8 bytes to get back to JAL deferreturn
 // 3. JMP to fn
-// TODO(sorear): There are shorter jump sequences.  This function will need to be updated when we use them.
 TEXT runtime·jmpdefer(SB), NOSPLIT|NOFRAME, $0-16
        MOV     0(X2), RA
-       ADD     $-12, RA
+       ADD     $-8, RA
 
        MOV     fv+0(FP), CTXT
        MOV     argp+8(FP), X2