cmd/compile: mark unsafe points for MIPS and MIPS64

Mark atomic LL/SC loops as unsafe for async preemption, as they
use REGTMP.

Change-Id: I5be7f93ad3ee337049ec7c3efd6fdc30eef87d97
Reviewed-on: https://go-review.googlesource.com/c/go/+/203719
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Keith Randall <khr@golang.org>
Reviewed-by: Austin Clements <austin@google.com>

diff --git a/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go b/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go
index a5eabcf9eb9dcd9f42b4834ee198929a1ceda704..10cf4a8b892331d063f7ded336745ad930920214 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go
+++ b/src/cmd/compile/internal/ssa/gen/MIPS64Ops.go
@@ -382,8 +382,8 @@ func init() {
                // SC   Rtmp, (Rarg0)
                // BEQ  Rtmp, -3(PC)
                // SYNC
-               {name: "LoweredAtomicExchange32", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true},
-               {name: "LoweredAtomicExchange64", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true},
+               {name: "LoweredAtomicExchange32", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
+               {name: "LoweredAtomicExchange64", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
 
                // atomic add.
                // *arg0 += arg1. arg2=mem. returns <new content of *arg0, memory>.
@@ -394,11 +394,11 @@ func init() {
                // BEQ  Rtmp, -3(PC)
                // SYNC
                // ADDV Rarg1, Rout
-               {name: "LoweredAtomicAdd32", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true},
-               {name: "LoweredAtomicAdd64", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true},
+               {name: "LoweredAtomicAdd32", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
+               {name: "LoweredAtomicAdd64", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
                // *arg0 += auxint. arg1=mem. returns <new content of *arg0, memory>. auxint is 32-bit.
-               {name: "LoweredAtomicAddconst32", argLength: 2, reg: regInfo{inputs: []regMask{gpspsbg}, outputs: []regMask{gp}}, aux: "Int32", resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true},
-               {name: "LoweredAtomicAddconst64", argLength: 2, reg: regInfo{inputs: []regMask{gpspsbg}, outputs: []regMask{gp}}, aux: "Int64", resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true},
+               {name: "LoweredAtomicAddconst32", argLength: 2, reg: regInfo{inputs: []regMask{gpspsbg}, outputs: []regMask{gp}}, aux: "Int32", resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
+               {name: "LoweredAtomicAddconst64", argLength: 2, reg: regInfo{inputs: []regMask{gpspsbg}, outputs: []regMask{gp}}, aux: "Int64", resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
 
                // atomic compare and swap.
                // arg0 = pointer, arg1 = old value, arg2 = new value, arg3 = memory.
@@ -416,8 +416,8 @@ func init() {
                // SC   Rout, (Rarg0)
                // BEQ  Rout, -4(PC)
                // SYNC
-               {name: "LoweredAtomicCas32", argLength: 4, reg: gpcas, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true},
-               {name: "LoweredAtomicCas64", argLength: 4, reg: gpcas, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true},
+               {name: "LoweredAtomicCas32", argLength: 4, reg: gpcas, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
+               {name: "LoweredAtomicCas64", argLength: 4, reg: gpcas, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
 
                // pseudo-ops
                {name: "LoweredNilCheck", argLength: 2, reg: regInfo{inputs: []regMask{gpg}}, nilCheck: true, faultOnNilArg0: true}, // panic if arg0 is nil.  arg1=mem.

diff --git a/src/cmd/compile/internal/ssa/gen/MIPSOps.go b/src/cmd/compile/internal/ssa/gen/MIPSOps.go
index b82358b24a1ddfc9a1162aa5a63c45f6b8dcd885..a19f5b4c387e35b046e15bb175021d9ca74a5868 100644 (file)
--- a/src/cmd/compile/internal/ssa/gen/MIPSOps.go
+++ b/src/cmd/compile/internal/ssa/gen/MIPSOps.go
@@ -283,7 +283,7 @@ func init() {
                // SC   Rtmp, (Rarg0)
                // BEQ  Rtmp, -3(PC)
                // SYNC
-               {name: "LoweredAtomicExchange", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true},
+               {name: "LoweredAtomicExchange", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
 
                // atomic add.
                // *arg0 += arg1. arg2=mem. returns <new content of *arg0, memory>.
@@ -294,8 +294,8 @@ func init() {
                // BEQ  Rtmp, -3(PC)
                // SYNC
                // ADDU Rarg1, Rout
-               {name: "LoweredAtomicAdd", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true},
-               {name: "LoweredAtomicAddconst", argLength: 2, reg: regInfo{inputs: []regMask{gpspsbg}, outputs: []regMask{gp}}, aux: "Int32", resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true},
+               {name: "LoweredAtomicAdd", argLength: 3, reg: gpxchg, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
+               {name: "LoweredAtomicAddconst", argLength: 2, reg: regInfo{inputs: []regMask{gpspsbg}, outputs: []regMask{gp}}, aux: "Int32", resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
 
                // atomic compare and swap.
                // arg0 = pointer, arg1 = old value, arg2 = new value, arg3 = memory.
@@ -313,7 +313,7 @@ func init() {
                // SC   Rout, (Rarg0)
                // BEQ  Rout, -4(PC)
                // SYNC
-               {name: "LoweredAtomicCas", argLength: 4, reg: gpcas, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true},
+               {name: "LoweredAtomicCas", argLength: 4, reg: gpcas, resultNotInArgs: true, faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
 
                // atomic and/or.
                // *arg0 &= (|=) arg1. arg2=mem. returns memory.
@@ -323,8 +323,8 @@ func init() {
                // SC   Rtmp, (Rarg0)
                // BEQ  Rtmp, -3(PC)
                // SYNC
-               {name: "LoweredAtomicAnd", argLength: 3, reg: gpstore, asm: "AND", faultOnNilArg0: true, hasSideEffects: true},
-               {name: "LoweredAtomicOr", argLength: 3, reg: gpstore, asm: "OR", faultOnNilArg0: true, hasSideEffects: true},
+               {name: "LoweredAtomicAnd", argLength: 3, reg: gpstore, asm: "AND", faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
+               {name: "LoweredAtomicOr", argLength: 3, reg: gpstore, asm: "OR", faultOnNilArg0: true, hasSideEffects: true, unsafePoint: true},
 
                // large or unaligned zeroing
                // arg0 = address of memory to zero (in R1, changed as side effect)

diff --git a/src/cmd/compile/internal/ssa/opGen.go b/src/cmd/compile/internal/ssa/opGen.go
index f4370bc38d124a1ca3a9027adcb8d24e7629222f..b5b2c1d406134db8d58e516a68615fc49f1dadfd 100644 (file)
--- a/src/cmd/compile/internal/ssa/opGen.go
+++ b/src/cmd/compile/internal/ssa/opGen.go
@@ -20392,6 +20392,7 @@ var opcodeTable = [...]opInfo{
                resultNotInArgs: true,
                faultOnNilArg0:  true,
                hasSideEffects:  true,
+               unsafePoint:     true,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 469762046},       // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R28 g R31
@@ -20408,6 +20409,7 @@ var opcodeTable = [...]opInfo{
                resultNotInArgs: true,
                faultOnNilArg0:  true,
                hasSideEffects:  true,
+               unsafePoint:     true,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 469762046},       // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R28 g R31
@@ -20425,6 +20427,7 @@ var opcodeTable = [...]opInfo{
                resultNotInArgs: true,
                faultOnNilArg0:  true,
                hasSideEffects:  true,
+               unsafePoint:     true,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 140738025226238}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R28 SP g R31 SB
@@ -20440,6 +20443,7 @@ var opcodeTable = [...]opInfo{
                resultNotInArgs: true,
                faultOnNilArg0:  true,
                hasSideEffects:  true,
+               unsafePoint:     true,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 469762046},       // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 R28 g R31
@@ -20456,6 +20460,7 @@ var opcodeTable = [...]opInfo{
                argLen:         3,
                faultOnNilArg0: true,
                hasSideEffects: true,
+               unsafePoint:    true,
                asm:            mips.AAND,
                reg: regInfo{
                        inputs: []inputInfo{
@@ -20469,6 +20474,7 @@ var opcodeTable = [...]opInfo{
                argLen:         3,
                faultOnNilArg0: true,
                hasSideEffects: true,
+               unsafePoint:    true,
                asm:            mips.AOR,
                reg: regInfo{
                        inputs: []inputInfo{
@@ -22019,6 +22025,7 @@ var opcodeTable = [...]opInfo{
                resultNotInArgs: true,
                faultOnNilArg0:  true,
                hasSideEffects:  true,
+               unsafePoint:     true,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 234881022},           // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 g R31
@@ -22035,6 +22042,7 @@ var opcodeTable = [...]opInfo{
                resultNotInArgs: true,
                faultOnNilArg0:  true,
                hasSideEffects:  true,
+               unsafePoint:     true,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 234881022},           // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 g R31
@@ -22051,6 +22059,7 @@ var opcodeTable = [...]opInfo{
                resultNotInArgs: true,
                faultOnNilArg0:  true,
                hasSideEffects:  true,
+               unsafePoint:     true,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 234881022},           // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 g R31
@@ -22067,6 +22076,7 @@ var opcodeTable = [...]opInfo{
                resultNotInArgs: true,
                faultOnNilArg0:  true,
                hasSideEffects:  true,
+               unsafePoint:     true,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 234881022},           // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 g R31
@@ -22084,6 +22094,7 @@ var opcodeTable = [...]opInfo{
                resultNotInArgs: true,
                faultOnNilArg0:  true,
                hasSideEffects:  true,
+               unsafePoint:     true,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 4611686018695823358}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 SP g R31 SB
@@ -22100,6 +22111,7 @@ var opcodeTable = [...]opInfo{
                resultNotInArgs: true,
                faultOnNilArg0:  true,
                hasSideEffects:  true,
+               unsafePoint:     true,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 4611686018695823358}, // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 SP g R31 SB
@@ -22115,6 +22127,7 @@ var opcodeTable = [...]opInfo{
                resultNotInArgs: true,
                faultOnNilArg0:  true,
                hasSideEffects:  true,
+               unsafePoint:     true,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 234881022},           // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 g R31
@@ -22132,6 +22145,7 @@ var opcodeTable = [...]opInfo{
                resultNotInArgs: true,
                faultOnNilArg0:  true,
                hasSideEffects:  true,
+               unsafePoint:     true,
                reg: regInfo{
                        inputs: []inputInfo{
                                {1, 234881022},           // R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R24 R25 g R31