cmd/8g: add descriptions for some missing instructions.

These instructions are emitted when GO386=387 or the target
i386 CPU does not have SSE2 capabilities.

Fixes #6215.

R=golang-dev, remyoudompheng
CC=golang-dev
https://golang.org/cl/12812045

diff --git a/src/cmd/8g/prog.c b/src/cmd/8g/prog.c
index 5fded770ea6ef5192487c13229094a53f22a584e..14f197b6ab6a3e8c0d17ce22412f8a0f48bce6f3 100644 (file)
--- a/src/cmd/8g/prog.c
+++ b/src/cmd/8g/prog.c
@@ -95,8 +95,10 @@ static ProgInfo progtable[ALAST] = {
        [ADIVSD]=       {SizeD | LeftRead | RightRdwr},
        [ADIVSS]=       {SizeF | LeftRead | RightRdwr},
        
-       [AFLDCW]=       {SizeW | LeftAddr },
-       [AFSTCW]=       {SizeW | RightAddr },
+       [AFLDCW]=       {SizeW | LeftAddr},
+       [AFSTCW]=       {SizeW | RightAddr},
+
+       [AFSTSW]=       {SizeW | RightAddr | RightWrite},
 
        [AFADDD]=       {SizeD | LeftAddr | RightRdwr},
        [AFADDDP]=      {SizeD | LeftAddr | RightRdwr},
@@ -111,9 +113,15 @@ static ProgInfo progtable[ALAST] = {
 
        [AFCHS]=        {SizeD | RightRdwr}, // also SizeF
 
-       [AFDIVD]=       {SizeD | LeftAddr | RightRdwr},
        [AFDIVDP]=      {SizeD | LeftAddr | RightRdwr},
        [AFDIVF]=       {SizeF | LeftAddr | RightRdwr},
+       [AFDIVD]=       {SizeD | LeftAddr | RightRdwr},
+
+       [AFDIVRDP]=     {SizeD | LeftAddr | RightRdwr},
+       [AFDIVRF]=      {SizeF | LeftAddr | RightRdwr},
+       [AFDIVRD]=      {SizeD | LeftAddr | RightRdwr},
+
+       [AFXCHD]=       {SizeD | LeftRdwr | RightRdwr},
 
        [AFSUBD]=       {SizeD | LeftAddr | RightRdwr},
        [AFSUBDP]=      {SizeD | LeftAddr | RightRdwr},
@@ -235,6 +243,8 @@ static ProgInfo progtable[ALAST] = {
        [ARORL]=        {SizeL | LeftRead | RightRdwr | ShiftCX | SetCarry},
        [ARORW]=        {SizeW | LeftRead | RightRdwr | ShiftCX | SetCarry},
 
+       [ASAHF]=        {OK, AX, AX},
+
        [ASALB]=        {SizeB | LeftRead | RightRdwr | ShiftCX | SetCarry},
        [ASALL]=        {SizeL | LeftRead | RightRdwr | ShiftCX | SetCarry},
        [ASALW]=        {SizeW | LeftRead | RightRdwr | ShiftCX | SetCarry},