]> Cypherpunks repositories - gostls13.git/commitdiff
cmd/compile: remove ARMv5 special case in register allocator
authorCherry Zhang <cherryyz@google.com>
Fri, 12 Mar 2021 23:45:52 +0000 (18:45 -0500)
committerCherry Zhang <cherryyz@google.com>
Mon, 15 Mar 2021 18:11:32 +0000 (18:11 +0000)
The register allocator has a special case that doesn't allocate
LR on ARMv5. This was necessary when softfloat expansion was done
by the assembler. Now softfloat calls are inserted by SSA, so it
works as normal. Remove this special case.

Change-Id: I5502f07597f4d4b675dc16b6b0d7cb47e1e8974b
Reviewed-on: https://go-review.googlesource.com/c/go/+/301792
Trust: Cherry Zhang <cherryyz@google.com>
Reviewed-by: David Chase <drchase@google.com>
src/cmd/compile/internal/ssa/regalloc.go

index 15f6412a85ce0f98313ab5c7c6fffad6950dfa39..c104a36888b4cb35fef821c1e11c57c300dfb869 100644 (file)
@@ -605,12 +605,6 @@ func (s *regAllocState) init(f *Func) {
                        // Leaf functions don't save/restore the link register.
                        s.allocatable &^= 1 << uint(s.f.Config.LinkReg)
                }
-               if s.f.Config.arch == "arm" && objabi.GOARM == 5 {
-                       // On ARMv5 we insert softfloat calls at each FP instruction.
-                       // This clobbers LR almost everywhere. Disable allocating LR
-                       // on ARMv5.
-                       s.allocatable &^= 1 << uint(s.f.Config.LinkReg)
-               }
        }
        if s.f.Config.ctxt.Flag_dynlink {
                switch s.f.Config.arch {