// rtmp := 1
// isel rt,0,rtmp,!cond // rt is target in ppc asm
- if v.Block.Func.Config.OldArch {
- p := s.Prog(ppc64.AMOVD)
- p.From.Type = obj.TYPE_CONST
- p.From.Offset = 1
- p.To.Type = obj.TYPE_REG
- p.To.Reg = v.Reg()
-
- pb := s.Prog(condOps[v.Op])
- pb.To.Type = obj.TYPE_BRANCH
-
- p = s.Prog(ppc64.AMOVD)
- p.From.Type = obj.TYPE_CONST
- p.From.Offset = 0
- p.To.Type = obj.TYPE_REG
- p.To.Reg = v.Reg()
-
- p = s.Prog(obj.ANOP)
- gc.Patch(pb, p)
- break
- }
- // Modern PPC uses ISEL
p := s.Prog(ppc64.AMOVD)
p.From.Type = obj.TYPE_CONST
p.From.Offset = 1
case ssa.OpPPC64FLessEqual, // These include a second branch for EQ -- dealing with NaN prevents REL= to !REL conversion
ssa.OpPPC64FGreaterEqual:
- if v.Block.Func.Config.OldArch {
- p := s.Prog(ppc64.AMOVW)
- p.From.Type = obj.TYPE_CONST
- p.From.Offset = 1
- p.To.Type = obj.TYPE_REG
- p.To.Reg = v.Reg()
-
- pb0 := s.Prog(condOps[v.Op])
- pb0.To.Type = obj.TYPE_BRANCH
- pb1 := s.Prog(ppc64.ABEQ)
- pb1.To.Type = obj.TYPE_BRANCH
-
- p = s.Prog(ppc64.AMOVW)
- p.From.Type = obj.TYPE_CONST
- p.From.Offset = 0
- p.To.Type = obj.TYPE_REG
- p.To.Reg = v.Reg()
-
- p = s.Prog(obj.ANOP)
- gc.Patch(pb0, p)
- gc.Patch(pb1, p)
- break
- }
- // Modern PPC uses ISEL
p := s.Prog(ppc64.AMOVD)
p.From.Type = obj.TYPE_CONST
p.From.Offset = 1
noDuffDevice bool // Don't use Duff's device
nacl bool // GOOS=nacl
use387 bool // GO386=387
- OldArch bool // True for older versions of architecture, e.g. true for PPC64BE, false for PPC64LE
NeedsFpScratch bool // No direct move between GP and FP register sets
BigEndian bool //
sparsePhiCutoff uint64 // Sparse phi location algorithm used above this #blocks*#variables score
c.hasGReg = true
c.noDuffDevice = obj.GOOS == "darwin" // darwin linker cannot handle BR26 reloc with non-zero addend
case "ppc64":
- c.OldArch = true
c.BigEndian = true
fallthrough
case "ppc64le":