cmd/internal/obj/arm: remove illegal form of the SWI instruction

SWI only support "SWI $imm", but currently "SWI (Reg)" is also
accepted. This patch fixes it.

And more instruction tests are added to cmd/asm/internal/asm/testdata/arm.s

fixes #20375

Change-Id: Id437d853924a403e41da9b6cbddd20d994b624ff
Reviewed-on: https://go-review.googlesource.com/43552
Run-TryBot: Brad Fitzpatrick <bradfitz@golang.org>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>

diff --git a/src/cmd/asm/internal/asm/testdata/arm.s b/src/cmd/asm/internal/asm/testdata/arm.s
index e814905bec9c597fb2034f7f1857facf443f5062..66fb207e3e2997e7a24d5d1337c4ab80a7c6913d 100644 (file)
--- a/src/cmd/asm/internal/asm/testdata/arm.s
+++ b/src/cmd/asm/internal/asm/testdata/arm.s
@@ -103,9 +103,9 @@ TEXT        foo(SB), DUPOK|NOSPLIT, $0
 //     {
 //             outcode($1, $2, &nullgen, 0, &$4);
 //     }
-       SWI.S   $2
-       SWI.S   (R1)
-//     SWI.S   foo(SB) - TODO: classifying foo(SB) as C_TLS_LE
+       SWI     $2
+       SWI     $3
+//     SWI     foo(SB) - TODO: classifying foo(SB) as C_TLS_LE
 
 //
 // CMP
@@ -948,16 +948,28 @@ jmp_label_3:
        SLL.S   R5, R7               // 1775b0e1
 
 // MULA / MULS
-       MULAWT  R1, R2, R3, R4       // c23124e1
-       MULAWB  R1, R2, R3, R4       // 823124e1
-       MULS    R1, R2, R3, R4       // 923164e0
-       MULA    R1, R2, R3, R4       // 923124e0
-       MULA.S  R1, R2, R3, R4       // 923134e0
-       MMULA   R1, R2, R3, R4       // 123154e7
-       MMULS   R1, R2, R3, R4       // d23154e7
-       MULABB  R1, R2, R3, R4       // 823104e1
+       MULAWT          R1, R2, R3, R4       // c23124e1
+       MULAWB          R1, R2, R3, R4       // 823124e1
+       MULS            R1, R2, R3, R4       // 923164e0
+       MULA            R1, R2, R3, R4       // 923124e0
+       MULA.S          R1, R2, R3, R4       // 923134e0
+       MMULA           R1, R2, R3, R4       // 123154e7
+       MMULS           R1, R2, R3, R4       // d23154e7
+       MULABB          R1, R2, R3, R4       // 823104e1
+       MULAL           R1, R2, (R4, R3)     // 9231e4e0
+       MULAL.S         R1, R2, (R4, R3)     // 9231f4e0
+       MULALU          R1, R2, (R4, R3)     // 9231a4e0
+       MULALU.S        R1, R2, (R4, R3)     // 9231b4e0
 
 // MUL
+       MUL     R2, R3, R4           // 930204e0
+       MUL.S   R2, R3, R4           // 930214e0
+       MULU    R5, R6, R7           // 960507e0
+       MULU.S  R5, R6, R7           // 960517e0
+       MULLU   R1, R2, (R4, R3)     // 923184e0
+       MULLU.S R1, R2, (R4, R3)     // 923194e0
+       MULL    R1, R2, (R4, R3)     // 9231c4e0
+       MULL.S  R1, R2, (R4, R3)     // 9231d4e0
        MMUL    R1, R2, R3           // 12f153e7
        MULBB   R1, R2, R3           // 82f163e1
        MULWB   R1, R2, R3           // a20123e1
@@ -976,6 +988,21 @@ jmp_label_3:
        DIVHW   R0, R1               // 11f011e7
        DIVUHW  R0, R1               // 11f031e7
 
+// misc
+       CLZ     R1, R2         // 112f6fe1
+       WORD    $0             // 00000000
+       WORD    $4294967295    // ffffffff
+       WORD    $2863311530    // aaaaaaaa
+       WORD    $1431655765    // 55555555
+       PLD     4080(R6)       // f0ffd6f5
+       PLD     -4080(R9)      // f0ff59f5
+       RFE                    // 0080fde8
+       SWPW    R3, (R7), R9   // SWPW  (R7), R3, R9 // 939007e1
+       SWPBU   R4, (R2), R8   // SWPBU (R2), R4, R8 // 948042e1
+       SWI     $0             // 000000ef
+       SWI     $65535         // ffff00ef
+       SWI                    // 000000ef
+
 //
 // END
 //

diff --git a/src/cmd/internal/obj/arm/asm5.go b/src/cmd/internal/obj/arm/asm5.go
index f3122f725e86940be5ebd3fe992d490f9fc148a0..6d8856eed723d487bb682dcf2475152abc1198a2 100644 (file)
--- a/src/cmd/internal/obj/arm/asm5.go
+++ b/src/cmd/internal/obj/arm/asm5.go
@@ -127,7 +127,6 @@ var optab = []Optab{
        {ASLL, C_REG, C_NONE, C_REG, 9, 4, 0, 0, 0},
        {ASLL, C_REG, C_REG, C_REG, 9, 4, 0, 0, 0},
        {ASWI, C_NONE, C_NONE, C_NONE, 10, 4, 0, 0, 0},
-       {ASWI, C_NONE, C_NONE, C_LOREG, 10, 4, 0, 0, 0},
        {ASWI, C_NONE, C_NONE, C_LCON, 10, 4, 0, 0, 0},
        {AWORD, C_NONE, C_NONE, C_LCON, 11, 4, 0, 0, 0},
        {AWORD, C_NONE, C_NONE, C_LCONADDR, 11, 4, 0, 0, 0},