REMW X5, X6, X7 // bb635302
REMUW X5, X6, X7 // bb735302
+ // 10.1: Base Counters and Timers
+ RDCYCLE X5 // f32200c0
+ RDTIME X5 // f32210c0
+ RDINSTRET X5 // f32220c0
+
+ // Privileged ISA
+
+ // 3.2.1: Environment Call and Breakpoint
+ ECALL // 73000000
+ SCALL // 73000000
+ EBREAK // 73001000
+ SBREAK // 73001000
+
// Arbitrary bytes (entered in little-endian mode)
WORD $0x12345678 // WORD $305419896 // 78563412
WORD $0x9abcdef0 // WORD $2596069104 // f0debc9a
p.As = ASRAI
}
}
+
+ switch p.As {
+ case obj.AUNDEF, AECALL, AEBREAK, ASCALL, ASBREAK, ARDCYCLE, ARDTIME, ARDINSTRET:
+ switch p.As {
+ case obj.AUNDEF:
+ p.As = AEBREAK
+ case ASCALL:
+ // SCALL is the old name for ECALL.
+ p.As = AECALL
+ case ASBREAK:
+ // SBREAK is the old name for EBREAK.
+ p.As = AEBREAK
+ }
+
+ ins := encode(p.As)
+ if ins == nil {
+ panic("progedit: tried to rewrite nonexistent instruction")
+ }
+
+ // The CSR isn't exactly an offset, but it winds up in the
+ // immediate area of the encoded instruction, so record it in
+ // the Offset field.
+ p.From.Type = obj.TYPE_CONST
+ p.From.Offset = ins.csr
+ p.Reg = REG_ZERO
+ if p.To.Type == obj.TYPE_NONE {
+ p.To.Type, p.To.Reg = obj.TYPE_REG, REG_ZERO
+ }
+ }
}
// setPCs sets the Pc field in all instructions reachable from p.
AREMW & obj.AMask: rIIIEncoding,
AREMUW & obj.AMask: rIIIEncoding,
+ // 10.1: Base Counters and Timers
+ ARDCYCLE & obj.AMask: iIEncoding,
+ ARDTIME & obj.AMask: iIEncoding,
+ ARDINSTRET & obj.AMask: iIEncoding,
+
+ // Privileged ISA
+
+ // 3.2.1: Environment Call and Breakpoint
+ AECALL & obj.AMask: iIEncoding,
+ AEBREAK & obj.AMask: iIEncoding,
+
// Escape hatch
AWORD & obj.AMask: rawEncoding,