]> Cypherpunks repositories - gostls13.git/commitdiff
cmd/compile: clean up ADDconst on PPC64
authorCherry Zhang <cherryyz@google.com>
Tue, 10 Oct 2017 14:26:35 +0000 (10:26 -0400)
committerCherry Zhang <cherryyz@google.com>
Tue, 10 Oct 2017 15:54:13 +0000 (15:54 +0000)
ADDconst op is no longer used for addresses, as we lower Addr to
MOVDaddr. There is no rule that produces ADDconst with a non-nil
sym. So we can remove the sym aux field in ADDconst and limit its
use for adding constant (not offset to symbol).

Passes "toolstash -cmp" on std cmd for GOARCH=ppc64 and ppc64le.

Change-Id: Icee35cdb34d8d121ad7035076dfd07595c7ff809
Reviewed-on: https://go-review.googlesource.com/69450
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
src/cmd/compile/internal/ppc64/ssa.go
src/cmd/compile/internal/ssa/gen/PPC64.rules
src/cmd/compile/internal/ssa/gen/PPC64Ops.go
src/cmd/compile/internal/ssa/opGen.go

index c30494f8f1eb4077ac3f168073c15a7eae79b440..8b6f1e2de0382351c27fe475127560acdc778c0c 100644 (file)
@@ -593,15 +593,8 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
                ssa.OpPPC64SRADconst, ssa.OpPPC64SRAWconst, ssa.OpPPC64SRDconst, ssa.OpPPC64SRWconst, ssa.OpPPC64SLDconst, ssa.OpPPC64SLWconst:
                p := s.Prog(v.Op.Asm())
                p.Reg = v.Args[0].Reg()
-
-               if v.Aux != nil {
-                       p.From.Type = obj.TYPE_CONST
-                       p.From.Offset = gc.AuxOffset(v)
-               } else {
-                       p.From.Type = obj.TYPE_CONST
-                       p.From.Offset = v.AuxInt
-               }
-
+               p.From.Type = obj.TYPE_CONST
+               p.From.Offset = v.AuxInt
                p.To.Type = obj.TYPE_REG
                p.To.Reg = v.Reg()
 
index 374b5c0cb119ef2ed255c4f72256d9c2b9ac4428..b80d8ce83ed99cdcf95d9f056aeb34272cfffa2c 100644 (file)
 // (MaskIfNotCarry CarrySet) -> -1
 
 (Addr {sym} base) -> (MOVDaddr {sym} base)
-// (Addr {sym} base) -> (ADDconst {sym} base)
 (OffPtr [off] ptr) -> (ADD (MOVDconst <typ.Int64> [off]) ptr)
 
 (Ctz64 x) -> (POPCNTD (ANDN <typ.Int64> (ADDconst <typ.Int64> [-1] x) x))
index e31c4503443697a44516ed49447896fac9f6f5bf..57924d7b71ba76ba07364e3b2af8eff1ea3a8871 100644 (file)
@@ -155,13 +155,13 @@ func init() {
                callerSave  = regMask(gp | fp | gr)
        )
        ops := []opData{
-               {name: "ADD", argLength: 2, reg: gp21, asm: "ADD", commutative: true},                     // arg0 + arg1
-               {name: "ADDconst", argLength: 1, reg: gp11, asm: "ADD", aux: "SymOff", symEffect: "Addr"}, // arg0 + auxInt + aux.(*gc.Sym)
-               {name: "FADD", argLength: 2, reg: fp21, asm: "FADD", commutative: true},                   // arg0+arg1
-               {name: "FADDS", argLength: 2, reg: fp21, asm: "FADDS", commutative: true},                 // arg0+arg1
-               {name: "SUB", argLength: 2, reg: gp21, asm: "SUB"},                                        // arg0-arg1
-               {name: "FSUB", argLength: 2, reg: fp21, asm: "FSUB"},                                      // arg0-arg1
-               {name: "FSUBS", argLength: 2, reg: fp21, asm: "FSUBS"},                                    // arg0-arg1
+               {name: "ADD", argLength: 2, reg: gp21, asm: "ADD", commutative: true},     // arg0 + arg1
+               {name: "ADDconst", argLength: 1, reg: gp11, asm: "ADD", aux: "Int64"},     // arg0 + auxInt
+               {name: "FADD", argLength: 2, reg: fp21, asm: "FADD", commutative: true},   // arg0+arg1
+               {name: "FADDS", argLength: 2, reg: fp21, asm: "FADDS", commutative: true}, // arg0+arg1
+               {name: "SUB", argLength: 2, reg: gp21, asm: "SUB"},                        // arg0-arg1
+               {name: "FSUB", argLength: 2, reg: fp21, asm: "FSUB"},                      // arg0-arg1
+               {name: "FSUBS", argLength: 2, reg: fp21, asm: "FSUBS"},                    // arg0-arg1
 
                {name: "MULLD", argLength: 2, reg: gp21, asm: "MULLD", typ: "Int64", commutative: true}, // arg0*arg1 (signed 64-bit)
                {name: "MULLW", argLength: 2, reg: gp21, asm: "MULLW", typ: "Int32", commutative: true}, // arg0*arg1 (signed 32-bit)
index 819de9d2c247827bcea917dcfa3894c69dacaa3e..b458dc36f70674d7d402904426af7b9a10dcad03 100644 (file)
@@ -16713,11 +16713,10 @@ var opcodeTable = [...]opInfo{
                },
        },
        {
-               name:      "ADDconst",
-               auxType:   auxSymOff,
-               argLen:    1,
-               symEffect: SymAddr,
-               asm:       ppc64.AADD,
+               name:    "ADDconst",
+               auxType: auxInt64,
+               argLen:  1,
+               asm:     ppc64.AADD,
                reg: regInfo{
                        inputs: []inputInfo{
                                {0, 1073733630}, // SP SB R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R14 R15 R16 R17 R18 R19 R20 R21 R22 R23 R24 R25 R26 R27 R28 R29