runtime, internal/cpu: change cache line size for arm64 to 64 bytes

According to http://infocenter.arm.com:
* ARM Cortex-A53 (Raspberry Pi 3, Pine A64)
* ARM Cortex-A57 (Opteron A1100, Tegra X1)
* ARM Cortex-A72
all have a cache line size of 64 bytes.

Change-Id: I4b333e930792fb1a221b3ca6f395bfa1b7762afa
Reviewed-on: https://go-review.googlesource.com/43250
Run-TryBot: Martin Möhrmann <moehrmann@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Keith Randall <khr@golang.org>

diff --git a/src/internal/cpu/cpu_arm64.go b/src/internal/cpu/cpu_arm64.go
index 078a6c3b80a28d6049ad5dd50932d46413618918..d3c6cc83051937d8f484f3267a34fc759a2d3482 100644 (file)
--- a/src/internal/cpu/cpu_arm64.go
+++ b/src/internal/cpu/cpu_arm64.go
@@ -4,4 +4,4 @@
 
 package cpu
 
-const CacheLineSize = 32
+const CacheLineSize = 64

diff --git a/src/runtime/internal/sys/arch_arm64.go b/src/runtime/internal/sys/arch_arm64.go
index 2d57ddae191c635aa7cbd58b19fd768298a19551..df8fb1e5fbbb47ff26fd3c65347f8b0ca73f2539 100644 (file)
--- a/src/runtime/internal/sys/arch_arm64.go
+++ b/src/runtime/internal/sys/arch_arm64.go
@@ -7,7 +7,7 @@ package sys
 const (
        ArchFamily          = ARM64
        BigEndian           = 0
-       CacheLineSize       = 32
+       CacheLineSize       = 64
        DefaultPhysPageSize = 65536
        PCQuantum           = 4
        Int64Align          = 8