SRLV R27, R6, R17 // 03668816
SRA R11, R19, R20 // 0173a007
SRAV R20, R19, R19 // 02939817
+ ROTR R19, R18, R20 // 0272a046
+ ROTRV R9, R13, R16 // 012d8056
// LSHW rreg ',' rreg
// {
SRLV R27, R6 // 03663016
SRA R11, R19 // 01739807
SRAV R20, R19 // 02939817
+ ROTR R20, R19 // 02939846
+ ROTRV R16, R9 // 02094856
// LSHW imm ',' sreg ',' rreg
// {
SRLV $31, R6, R17 // 00068ffa
SRA $8, R8, R19 // 00089a03
SRAV $19, R8, R7 // 00083cfb
+ ROTR $12, R8, R3 // 00281b02
+ ROTRV $8, R22, R22 // 0036b23a
// LSHW imm ',' rreg
// {
SRLV $31, R17 // 00118ffa
SRA $3, R12 // 000c60c3
SRAV $12, R3 // 00031b3b
+ ROTR $12, R8 // 00284302
+ ROTRV $63, R22 // 0036b7fe
// LAND/LXOR/LNOR/LOR rreg ',' rreg
case ASLL:
opset(ASRL, r0)
opset(ASRA, r0)
+ opset(AROTR, r0)
case ASLLV:
opset(ASRAV, r0)
opset(ASRLV, r0)
+ opset(AROTRV, r0)
case ASUB:
opset(ASUBU, r0)
return OP(0, 6)
case ASRA:
return OP(0, 7)
+ case AROTR:
+ return OP(8, 6)
case ASLLV:
return OP(2, 4)
case ASRLV:
return OP(2, 6)
case ASRAV:
return OP(2, 7)
+ case AROTRV:
+ return OP(10, 6)
case AADDV:
return OP(5, 4)
case AADDVU:
return OP(0, 2)
case ASRA:
return OP(0, 3)
+ case AROTR:
+ return OP(0, 2) | 1<<21
case AADDV:
return SP(3, 0)
case AADDVU:
return OP(7, 2)
case ASRAV:
return OP(7, 3)
+ case AROTRV:
+ return OP(7, 2) | 1<<21
case -ASLLV:
return OP(7, 4)
case -ASRLV:
return OP(7, 6)
case -ASRAV:
return OP(7, 7)
+ case -AROTRV:
+ return OP(7, 6) | 1<<21
case ATEQ:
return OP(6, 4)
switch a {
case ASLLV,
ASRLV,
- ASRAV:
+ ASRAV,
+ AROTRV:
return true
}
return false