// FSTX.{S,D} instructions
MOVF F2, (R14)(R13) // c2353838
MOVD F2, (R14)(R13) // c2353c38
+
+ BSTRINSW $0, R4, $0, R5 // 85006000
+ BSTRINSW $31, R4, $0, R5 // 85007f00
+ BSTRINSW $15, R4, $6, R5 // 85186f00
+ BSTRINSV $0, R4, $0, R5 // 85008000
+ BSTRINSV $63, R4, $0, R5 // 8500bf00
+ BSTRINSV $15, R4, $6, R5 // 85188f00
+
+ BSTRPICKW $0, R4, $0, R5 // 85806000
+ BSTRPICKW $31, R4, $0, R5 // 85807f00
+ BSTRPICKW $15, R4, $6, R5 // 85986f00
+ BSTRPICKV $0, R4, $0, R5 // 8500c000
+ BSTRPICKV $63, R4, $0, R5 // 8500ff00
+ BSTRPICKV $15, R4, $6, R5 // 8518cf00
{ASLLV, C_SCON, C_REG, C_NONE, C_REG, C_NONE, 16, 4, 0, 0},
{ASLLV, C_SCON, C_NONE, C_NONE, C_REG, C_NONE, 16, 4, 0, 0},
+ {ABSTRPICKW, C_SCON, C_REG, C_SCON, C_REG, C_NONE, 17, 4, 0, 0},
+ {ABSTRPICKW, C_SCON, C_REG, C_ZCON, C_REG, C_NONE, 17, 4, 0, 0},
+ {ABSTRPICKW, C_ZCON, C_REG, C_ZCON, C_REG, C_NONE, 17, 4, 0, 0},
+
{ASYSCALL, C_NONE, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0},
{ASYSCALL, C_ANDCON, C_NONE, C_NONE, C_NONE, C_NONE, 5, 4, 0, 0},
opset(ASRLV, r0)
opset(AROTRV, r0)
+ case ABSTRPICKW:
+ opset(ABSTRPICKV, r0)
+ opset(ABSTRINSW, r0)
+ opset(ABSTRINSV, r0)
+
case ASUB:
opset(ASUBU, r0)
opset(ANOR, r0)
return op | (i&0x7FFF)<<0
}
+// i1 -> msb
+// r2 -> rj
+// i3 -> lsb
+// r4 -> rd
+func OP_IRIR(op uint32, i1 uint32, r2 uint32, i3 uint32, r4 uint32) uint32 {
+ return op | (i1 << 16) | (r2&0x1F)<<5 | (i3 << 10) | (r4&0x1F)<<0
+}
+
// Encoding for the 'b' or 'bl' instruction.
func OP_B_BL(op uint32, i uint32) uint32 {
return op | ((i & 0xFFFF) << 10) | ((i >> 16) & 0x3FF)
o1 = OP_16IRR(c.opirr(p.As), uint32(v)&0x1f, uint32(r), uint32(p.To.Reg))
}
+ case 17: // bstrpickw $msbw, r1, $lsbw, r2
+ rd, rj := p.To.Reg, p.Reg
+ if rj == obj.REG_NONE {
+ rj = rd
+ }
+ msb, lsb := p.From.Offset, p.GetFrom3().Offset
+
+ // check the range of msb and lsb
+ var b uint32
+ if p.As == ABSTRPICKW || p.As == ABSTRINSW {
+ b = 32
+ } else {
+ b = 64
+ }
+ if lsb < 0 || uint32(lsb) >= b || msb < 0 || uint32(msb) >= b || uint32(lsb) > uint32(msb) {
+ c.ctxt.Diag("illegal bit number\n%v", p)
+ }
+
+ o1 = OP_IRIR(c.opirir(p.As), uint32(msb), uint32(rj), uint32(lsb), uint32(rd))
+
case 18: // jmp [r1],0(r2)
r := int(p.Reg)
if r == 0 {
return 0
}
+func (c *ctxt0) opirir(a obj.As) uint32 {
+ switch a {
+ case ABSTRINSW:
+ return 0x3<<21 | 0x0<<15 // bstrins.w
+ case ABSTRINSV:
+ return 0x2 << 22 // bstrins.d
+ case ABSTRPICKW:
+ return 0x3<<21 | 0x1<<15 // bstrpick.w
+ case ABSTRPICKV:
+ return 0x3 << 22 // bstrpick.d
+ }
+
+ return 0
+}
+
func (c *ctxt0) specailFpMovInst(a obj.As, fclass int, tclass int) uint32 {
switch a {
case AMOVV:
OR R5, R6 <=> or R6, R6, R5
Special Cases.
-Argument order is the same as in the GNU Loong64 syntax: jump instructions,
+(1) Argument order is the same as in the GNU Loong64 syntax: jump instructions,
Examples:
BEQ R0, R4, lable1 <=> beq R0, R4, lable1
JMP lable1 <=> b lable1
+(2) BSTRINSW, BSTRINSV, BSTRPICKW, BSTRPICKV $<msb>, <Rj>, $<lsb>, <Rd>
+
+Examples:
+
+ BSTRPICKW $15, R4, $6, R5 <=> bstrpick.w r5, r4, 15, 6
+
2. Expressions for special arguments.
Memory references: a base register and an offset register is written as (Rbase)(Roff).